Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.09 99.81 96.99 100.00 100.00 98.60 99.70 98.52


Total tests in report: 1038
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
84.53 84.53 97.47 97.47 81.30 81.30 95.03 95.03 71.43 71.43 89.58 89.58 95.10 95.10 61.78 61.78 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.923398151
91.77 7.25 99.06 1.59 86.49 5.19 96.45 1.42 100.00 28.57 94.65 5.07 95.25 0.15 70.50 8.72 /workspace/coverage/default/39.sram_ctrl_stress_all.1025037090
93.69 1.92 99.06 0.00 86.49 0.00 96.45 0.00 100.00 0.00 94.65 0.00 95.69 0.45 83.49 12.99 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2760922432
94.89 1.20 99.06 0.00 88.96 2.47 97.98 1.53 100.00 0.00 96.34 1.69 96.73 1.04 85.16 1.67 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1501955759
95.91 1.02 99.25 0.19 89.87 0.91 98.19 0.21 100.00 0.00 97.18 0.85 96.73 0.00 90.17 5.01 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3701821069
96.66 0.74 99.44 0.19 91.82 1.95 98.90 0.71 100.00 0.00 98.03 0.85 97.33 0.59 91.09 0.93 /workspace/coverage/default/1.sram_ctrl_sec_cm.20587844
97.22 0.56 99.72 0.28 92.60 0.78 99.15 0.25 100.00 0.00 98.31 0.28 98.37 1.04 92.39 1.30 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.2595824779
97.51 0.29 99.72 0.00 92.60 0.00 99.15 0.00 100.00 0.00 98.31 0.00 98.37 0.00 94.43 2.04 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3998045375
97.77 0.25 99.72 0.00 92.99 0.39 99.15 0.00 100.00 0.00 98.59 0.28 98.37 0.00 95.55 1.11 /workspace/coverage/default/31.sram_ctrl_executable.1400732056
97.97 0.20 99.72 0.00 92.99 0.00 99.22 0.07 100.00 0.00 98.59 0.00 99.70 1.34 95.55 0.00 /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.519580067
98.12 0.16 99.81 0.09 92.99 0.00 99.93 0.71 100.00 0.00 98.87 0.28 99.70 0.00 95.55 0.00 /workspace/coverage/default/15.sram_ctrl_ram_cfg.918986547
98.24 0.12 99.81 0.00 93.25 0.26 99.93 0.00 100.00 0.00 98.87 0.00 99.70 0.00 96.10 0.56 /workspace/coverage/default/8.sram_ctrl_stress_all.3638632210
98.34 0.11 99.81 0.00 93.25 0.00 99.93 0.00 100.00 0.00 98.87 0.00 99.70 0.00 96.85 0.74 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3058178571
98.43 0.08 99.81 0.00 93.77 0.52 100.00 0.07 100.00 0.00 98.87 0.00 99.70 0.00 96.85 0.00 /workspace/coverage/default/47.sram_ctrl_alert_test.3920662968
98.51 0.08 99.81 0.00 93.77 0.00 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.00 97.40 0.56 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3348053796
98.56 0.05 99.81 0.00 93.77 0.00 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.00 97.77 0.37 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2287899439
98.61 0.05 99.81 0.00 93.90 0.13 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.00 97.96 0.19 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1989815173
98.64 0.04 99.81 0.00 94.16 0.26 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.00 97.96 0.00 /workspace/coverage/default/0.sram_ctrl_sec_cm.2070020285
98.67 0.03 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.00 98.14 0.19 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1417953656
98.70 0.03 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.00 98.33 0.19 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.462936113
98.72 0.03 99.81 0.00 94.16 0.00 100.00 0.00 100.00 0.00 98.87 0.00 99.70 0.00 98.52 0.19 /workspace/coverage/default/21.sram_ctrl_stress_all.936514076

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1802769777
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3725610913
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4006319069
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.888684329
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2440141970
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1056543582
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4009938622
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3492234703
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.748657955
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.926655199
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.804678619
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3253364759
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1932517572
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.40163066
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2625547300
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2011343591
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.260807447
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.696319505
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2902058316
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.991990240
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3746438745
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2022792248
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1499663254
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2827241685
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3451817922
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3309093971
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3865372458
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1469886360
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.4119316755
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.424053800
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1187247108
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4044241185
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1124200858
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3962848444
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.214047393
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.96858039
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1235590099
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.916607166
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1895113065
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.33085060
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.945840603
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2366731498
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2258674772
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3082512463
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1025927316
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.4276144609
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3766355757
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1413200162
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1606922177
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3018873048
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2947485015
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1224422007
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3148052966
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3153842619
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.468457415
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3763868510
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2138781170
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3491437568
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.632569243
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1099291200
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.987159531
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3362557736
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1689588250
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.620551161
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.548256610
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3021066432
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3070196302
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1713259529
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3674447530
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4257841722
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1665353638
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3170904695
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.603939564
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3135798405
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3200854128
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1690610772
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.265697004
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2961110889
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2534547814
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.4250591171
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1875010060
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.892940392
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3293423665
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2790235499
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.4121269096
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3723804371
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2916914288
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2058780110
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3997921366
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2019462380
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3129469842
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3712309373
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1218158944
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3374742086
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1611396489
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2068737998
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2403119045
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.789756451
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2637663425
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1586486557
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4113632753
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.917211638
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1110974619
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.533102670
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1763290038
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.272799696
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.965195223
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3299874020
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2202743716
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.529876093
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3917795644
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.464438679
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1533434376
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3361330138
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2195185776
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1765979106
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2787770131
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1444926314
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1528548083
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.123097665
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.585372065
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3509721222
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.144062313
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1215299404
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1295965548
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.181767213
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.932716395
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1140170746
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2665031796
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.852460265
/workspace/coverage/default/0.sram_ctrl_alert_test.2744155624
/workspace/coverage/default/0.sram_ctrl_bijection.3101259543
/workspace/coverage/default/0.sram_ctrl_executable.3076012950
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2376976189
/workspace/coverage/default/0.sram_ctrl_max_throughput.1147753373
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2857876536
/workspace/coverage/default/0.sram_ctrl_mem_walk.3102429844
/workspace/coverage/default/0.sram_ctrl_multiple_keys.253715150
/workspace/coverage/default/0.sram_ctrl_partial_access.3944321242
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2970519840
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1858319095
/workspace/coverage/default/0.sram_ctrl_regwen.1564426217
/workspace/coverage/default/0.sram_ctrl_smoke.2101057768
/workspace/coverage/default/0.sram_ctrl_stress_all.494583905
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1210329058
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.146493948
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.927511913
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2922333642
/workspace/coverage/default/1.sram_ctrl_alert_test.2358628381
/workspace/coverage/default/1.sram_ctrl_bijection.3006621260
/workspace/coverage/default/1.sram_ctrl_executable.2442363534
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2993604004
/workspace/coverage/default/1.sram_ctrl_max_throughput.4207234705
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.532109305
/workspace/coverage/default/1.sram_ctrl_mem_walk.224821073
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1910512170
/workspace/coverage/default/1.sram_ctrl_partial_access.3990925438
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1269577751
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2136076393
/workspace/coverage/default/1.sram_ctrl_regwen.1245697726
/workspace/coverage/default/1.sram_ctrl_smoke.2685666451
/workspace/coverage/default/1.sram_ctrl_stress_all.1170882072
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3647504136
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3999709140
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1708641132
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4227141428
/workspace/coverage/default/10.sram_ctrl_alert_test.1895696350
/workspace/coverage/default/10.sram_ctrl_bijection.1453609413
/workspace/coverage/default/10.sram_ctrl_executable.303445007
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2496193091
/workspace/coverage/default/10.sram_ctrl_max_throughput.4020946129
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.4145692926
/workspace/coverage/default/10.sram_ctrl_mem_walk.941123028
/workspace/coverage/default/10.sram_ctrl_multiple_keys.395645759
/workspace/coverage/default/10.sram_ctrl_partial_access.2510237384
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3423264493
/workspace/coverage/default/10.sram_ctrl_regwen.1213223369
/workspace/coverage/default/10.sram_ctrl_smoke.283640458
/workspace/coverage/default/10.sram_ctrl_stress_all.1501653753
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3700014477
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.158759075
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.804926082
/workspace/coverage/default/11.sram_ctrl_alert_test.1820151330
/workspace/coverage/default/11.sram_ctrl_bijection.3518738265
/workspace/coverage/default/11.sram_ctrl_executable.799448504
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1970810858
/workspace/coverage/default/11.sram_ctrl_max_throughput.4150980305
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.4103322690
/workspace/coverage/default/11.sram_ctrl_mem_walk.2050988257
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1390031255
/workspace/coverage/default/11.sram_ctrl_partial_access.3427145192
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3352111113
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1081338138
/workspace/coverage/default/11.sram_ctrl_regwen.3274351089
/workspace/coverage/default/11.sram_ctrl_smoke.2803323126
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3064105772
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.538756173
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2736104387
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3133164511
/workspace/coverage/default/12.sram_ctrl_alert_test.1617347735
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/workspace/coverage/default/42.sram_ctrl_ram_cfg.718519720
/workspace/coverage/default/42.sram_ctrl_regwen.517353703
/workspace/coverage/default/42.sram_ctrl_smoke.1800414130
/workspace/coverage/default/42.sram_ctrl_stress_all.1602879514
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3990319541
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3884898355
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.472167792
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1836326844
/workspace/coverage/default/43.sram_ctrl_alert_test.4262331347
/workspace/coverage/default/43.sram_ctrl_bijection.1277931591
/workspace/coverage/default/43.sram_ctrl_executable.3092579068
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3726731223
/workspace/coverage/default/43.sram_ctrl_max_throughput.2877839699
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3483871944
/workspace/coverage/default/43.sram_ctrl_mem_walk.2516849156
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3161540605
/workspace/coverage/default/43.sram_ctrl_partial_access.3128353327
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1304529736
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1687328089
/workspace/coverage/default/43.sram_ctrl_regwen.4084583741
/workspace/coverage/default/43.sram_ctrl_smoke.3619906644
/workspace/coverage/default/43.sram_ctrl_stress_all.1261933285
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1359619561
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.4263091121
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.578362003
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4053037203
/workspace/coverage/default/44.sram_ctrl_alert_test.3699760286
/workspace/coverage/default/44.sram_ctrl_bijection.1615849196
/workspace/coverage/default/44.sram_ctrl_executable.910488164
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1401087546
/workspace/coverage/default/44.sram_ctrl_max_throughput.1094436824
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.759183147
/workspace/coverage/default/44.sram_ctrl_mem_walk.3849626587
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1524119040
/workspace/coverage/default/44.sram_ctrl_partial_access.1126161686
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3022283865
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1227778877
/workspace/coverage/default/44.sram_ctrl_regwen.3627824375
/workspace/coverage/default/44.sram_ctrl_smoke.1202352360
/workspace/coverage/default/44.sram_ctrl_stress_all.113294277
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1198133599
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4010990224
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2330723396
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3899594797
/workspace/coverage/default/45.sram_ctrl_alert_test.2387971057
/workspace/coverage/default/45.sram_ctrl_bijection.1065771653
/workspace/coverage/default/45.sram_ctrl_executable.460375407
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1555932851
/workspace/coverage/default/45.sram_ctrl_max_throughput.1073599067
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.200401365
/workspace/coverage/default/45.sram_ctrl_mem_walk.3891166939
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1787524158
/workspace/coverage/default/45.sram_ctrl_partial_access.3109831782
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1818483428
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2586152708
/workspace/coverage/default/45.sram_ctrl_regwen.3564396764
/workspace/coverage/default/45.sram_ctrl_smoke.1200384518
/workspace/coverage/default/45.sram_ctrl_stress_all.3453871919
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3154309525
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1982013390
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.429303284
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3060664615
/workspace/coverage/default/46.sram_ctrl_alert_test.3962807856
/workspace/coverage/default/46.sram_ctrl_bijection.1145843822
/workspace/coverage/default/46.sram_ctrl_executable.3418346753
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1786565453
/workspace/coverage/default/46.sram_ctrl_max_throughput.3606430851
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3686612075
/workspace/coverage/default/46.sram_ctrl_mem_walk.4116198595
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1539999174
/workspace/coverage/default/46.sram_ctrl_partial_access.3152476575
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1457584862
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1167821267
/workspace/coverage/default/46.sram_ctrl_regwen.3287192361
/workspace/coverage/default/46.sram_ctrl_smoke.3154183202
/workspace/coverage/default/46.sram_ctrl_stress_all.764612089
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3187583799
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3461859175
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2892303294
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3499806366
/workspace/coverage/default/47.sram_ctrl_bijection.1176941878
/workspace/coverage/default/47.sram_ctrl_executable.3592574967
/workspace/coverage/default/47.sram_ctrl_lc_escalation.4281414621
/workspace/coverage/default/47.sram_ctrl_max_throughput.520509814
/workspace/coverage/default/47.sram_ctrl_mem_walk.609724878
/workspace/coverage/default/47.sram_ctrl_multiple_keys.664252525
/workspace/coverage/default/47.sram_ctrl_partial_access.2986842881
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3360745725
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2554898193
/workspace/coverage/default/47.sram_ctrl_regwen.3289819675
/workspace/coverage/default/47.sram_ctrl_smoke.3728405058
/workspace/coverage/default/47.sram_ctrl_stress_all.4197532750
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1156477010
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.4106076885
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1719602252
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1461149673
/workspace/coverage/default/48.sram_ctrl_alert_test.2864660651
/workspace/coverage/default/48.sram_ctrl_bijection.2796508628
/workspace/coverage/default/48.sram_ctrl_executable.3636842779
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3819663626
/workspace/coverage/default/48.sram_ctrl_max_throughput.3692867656
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3069877652
/workspace/coverage/default/48.sram_ctrl_mem_walk.370414317
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2065908540
/workspace/coverage/default/48.sram_ctrl_partial_access.82418956
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1003973211
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3187810331
/workspace/coverage/default/48.sram_ctrl_regwen.3613816544
/workspace/coverage/default/48.sram_ctrl_smoke.2581479515
/workspace/coverage/default/48.sram_ctrl_stress_all.2949562711
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.795617302
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.352439898
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.422935794
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1491048194
/workspace/coverage/default/49.sram_ctrl_alert_test.2490404129
/workspace/coverage/default/49.sram_ctrl_bijection.3007191995
/workspace/coverage/default/49.sram_ctrl_executable.1349168084
/workspace/coverage/default/49.sram_ctrl_lc_escalation.798182862
/workspace/coverage/default/49.sram_ctrl_max_throughput.1442387166
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.187739071
/workspace/coverage/default/49.sram_ctrl_mem_walk.1072291318
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1842418790
/workspace/coverage/default/49.sram_ctrl_partial_access.2125782569
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3909694131
/workspace/coverage/default/49.sram_ctrl_ram_cfg.185072210
/workspace/coverage/default/49.sram_ctrl_regwen.1600282115
/workspace/coverage/default/49.sram_ctrl_smoke.280729794
/workspace/coverage/default/49.sram_ctrl_stress_all.1800253957
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3501215850
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2189844079
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.132396393
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3862884355
/workspace/coverage/default/5.sram_ctrl_alert_test.712727310
/workspace/coverage/default/5.sram_ctrl_bijection.353085916
/workspace/coverage/default/5.sram_ctrl_executable.1950647321
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1928925329
/workspace/coverage/default/5.sram_ctrl_max_throughput.3094010226
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3575594114
/workspace/coverage/default/5.sram_ctrl_mem_walk.1810633960
/workspace/coverage/default/5.sram_ctrl_multiple_keys.197024259
/workspace/coverage/default/5.sram_ctrl_partial_access.41813558
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.76879417
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1460192797
/workspace/coverage/default/5.sram_ctrl_regwen.1737201232
/workspace/coverage/default/5.sram_ctrl_smoke.747023175
/workspace/coverage/default/5.sram_ctrl_stress_all.2143620793
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3604430283
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3502925076
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.224549285
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3164248734
/workspace/coverage/default/6.sram_ctrl_alert_test.1557599129
/workspace/coverage/default/6.sram_ctrl_bijection.3009141165
/workspace/coverage/default/6.sram_ctrl_executable.793795209
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1953686349
/workspace/coverage/default/6.sram_ctrl_max_throughput.1354395527
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3726321696
/workspace/coverage/default/6.sram_ctrl_mem_walk.3300398530
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3963317142
/workspace/coverage/default/6.sram_ctrl_partial_access.2148345881
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2534111448
/workspace/coverage/default/6.sram_ctrl_ram_cfg.521664583
/workspace/coverage/default/6.sram_ctrl_regwen.1161029071
/workspace/coverage/default/6.sram_ctrl_smoke.3954460432
/workspace/coverage/default/6.sram_ctrl_stress_all.2383250340
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3991246984
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3204659157
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.655665099
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.421221176
/workspace/coverage/default/7.sram_ctrl_alert_test.600725730
/workspace/coverage/default/7.sram_ctrl_bijection.2425677202
/workspace/coverage/default/7.sram_ctrl_executable.220868760
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3846539687
/workspace/coverage/default/7.sram_ctrl_max_throughput.2269296184
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4202427047
/workspace/coverage/default/7.sram_ctrl_mem_walk.3928026723
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2251330839
/workspace/coverage/default/7.sram_ctrl_partial_access.2702949141
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1312667305
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3723645585
/workspace/coverage/default/7.sram_ctrl_regwen.3473348677
/workspace/coverage/default/7.sram_ctrl_smoke.11491818
/workspace/coverage/default/7.sram_ctrl_stress_all.1907964786
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2746671217
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2896646698
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2263008423
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2027963362
/workspace/coverage/default/8.sram_ctrl_alert_test.2081445652
/workspace/coverage/default/8.sram_ctrl_bijection.2717272706
/workspace/coverage/default/8.sram_ctrl_executable.3968235408
/workspace/coverage/default/8.sram_ctrl_lc_escalation.461400206
/workspace/coverage/default/8.sram_ctrl_max_throughput.313714112
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3943965476
/workspace/coverage/default/8.sram_ctrl_mem_walk.3446153859
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2372404846
/workspace/coverage/default/8.sram_ctrl_partial_access.841342540
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1401881413
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3534661157
/workspace/coverage/default/8.sram_ctrl_regwen.811118364
/workspace/coverage/default/8.sram_ctrl_smoke.2517593229
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3348426161
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2529591962
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.186954912
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2597620489
/workspace/coverage/default/9.sram_ctrl_alert_test.2375128196
/workspace/coverage/default/9.sram_ctrl_bijection.3542816080
/workspace/coverage/default/9.sram_ctrl_executable.1499206639
/workspace/coverage/default/9.sram_ctrl_lc_escalation.70708619
/workspace/coverage/default/9.sram_ctrl_max_throughput.819767426
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.435207053
/workspace/coverage/default/9.sram_ctrl_mem_walk.130706202
/workspace/coverage/default/9.sram_ctrl_multiple_keys.4200629282
/workspace/coverage/default/9.sram_ctrl_partial_access.3861202108
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1327201015
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1915110037
/workspace/coverage/default/9.sram_ctrl_regwen.4280157855
/workspace/coverage/default/9.sram_ctrl_smoke.246036477
/workspace/coverage/default/9.sram_ctrl_stress_all.2193203047
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1169226679
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.4153148950
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4098242410



Total test records in report: 1038
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.2985854030 May 14 02:16:20 PM PDT 24 May 14 02:21:48 PM PDT 24 25186096346 ps
T2 /workspace/coverage/default/33.sram_ctrl_stress_all.2195359084 May 14 02:15:45 PM PDT 24 May 14 03:14:22 PM PDT 24 45429789325 ps
T3 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.2595824779 May 14 02:12:29 PM PDT 24 May 14 02:17:46 PM PDT 24 5213134519 ps
T8 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.513173370 May 14 02:17:11 PM PDT 24 May 14 02:22:23 PM PDT 24 4664892348 ps
T4 /workspace/coverage/default/46.sram_ctrl_executable.3418346753 May 14 02:18:23 PM PDT 24 May 14 02:33:09 PM PDT 24 70398480188 ps
T9 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.923398151 May 14 02:14:22 PM PDT 24 May 14 02:15:04 PM PDT 24 1145229033 ps
T10 /workspace/coverage/default/4.sram_ctrl_multiple_keys.1287226503 May 14 02:11:51 PM PDT 24 May 14 02:41:27 PM PDT 24 21730786352 ps
T11 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.1401526628 May 14 02:15:51 PM PDT 24 May 14 02:22:23 PM PDT 24 78201922950 ps
T12 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3151211502 May 14 02:12:37 PM PDT 24 May 14 02:13:09 PM PDT 24 824918304 ps
T13 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3461859175 May 14 02:18:20 PM PDT 24 May 14 02:21:07 PM PDT 24 3046786124 ps
T22 /workspace/coverage/default/9.sram_ctrl_alert_test.2375128196 May 14 02:12:14 PM PDT 24 May 14 02:12:17 PM PDT 24 23967620 ps
T17 /workspace/coverage/default/11.sram_ctrl_max_throughput.4150980305 May 14 02:12:25 PM PDT 24 May 14 02:12:34 PM PDT 24 786358257 ps
T18 /workspace/coverage/default/49.sram_ctrl_executable.1349168084 May 14 02:19:21 PM PDT 24 May 14 02:23:08 PM PDT 24 20874722672 ps
T57 /workspace/coverage/default/27.sram_ctrl_mem_walk.153125434 May 14 02:14:32 PM PDT 24 May 14 02:18:40 PM PDT 24 15758335032 ps
T58 /workspace/coverage/default/15.sram_ctrl_partial_access.2052149763 May 14 02:12:39 PM PDT 24 May 14 02:14:48 PM PDT 24 1721630164 ps
T23 /workspace/coverage/default/47.sram_ctrl_alert_test.3920662968 May 14 02:18:46 PM PDT 24 May 14 02:18:48 PM PDT 24 73637344 ps
T132 /workspace/coverage/default/29.sram_ctrl_executable.1650733541 May 14 02:14:50 PM PDT 24 May 14 02:26:39 PM PDT 24 39049112813 ps
T70 /workspace/coverage/default/9.sram_ctrl_smoke.246036477 May 14 02:12:04 PM PDT 24 May 14 02:13:58 PM PDT 24 1998367155 ps
T49 /workspace/coverage/default/13.sram_ctrl_executable.3196783744 May 14 02:12:24 PM PDT 24 May 14 02:45:57 PM PDT 24 15721258366 ps
T71 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2683202790 May 14 02:14:42 PM PDT 24 May 14 02:21:42 PM PDT 24 17653135278 ps
T133 /workspace/coverage/default/9.sram_ctrl_executable.1499206639 May 14 02:12:13 PM PDT 24 May 14 02:29:02 PM PDT 24 17798241016 ps
T134 /workspace/coverage/default/14.sram_ctrl_executable.2355896181 May 14 02:12:31 PM PDT 24 May 14 02:21:49 PM PDT 24 23360738674 ps
T72 /workspace/coverage/default/36.sram_ctrl_executable.3218216012 May 14 02:16:14 PM PDT 24 May 14 02:34:16 PM PDT 24 19833778193 ps
T14 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1501955759 May 14 02:18:37 PM PDT 24 May 14 02:19:55 PM PDT 24 2464999036 ps
T76 /workspace/coverage/default/12.sram_ctrl_mem_walk.1415999421 May 14 02:12:25 PM PDT 24 May 14 02:16:30 PM PDT 24 3944037637 ps
T73 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2203167446 May 14 02:12:30 PM PDT 24 May 14 02:16:13 PM PDT 24 7645050657 ps
T25 /workspace/coverage/default/31.sram_ctrl_bijection.1410870028 May 14 02:15:08 PM PDT 24 May 14 02:31:04 PM PDT 24 14135795752 ps
T74 /workspace/coverage/default/0.sram_ctrl_executable.3076012950 May 14 02:11:40 PM PDT 24 May 14 02:14:19 PM PDT 24 3222635017 ps
T32 /workspace/coverage/default/48.sram_ctrl_ram_cfg.3187810331 May 14 02:18:59 PM PDT 24 May 14 02:19:03 PM PDT 24 1345853388 ps
T77 /workspace/coverage/default/44.sram_ctrl_partial_access.1126161686 May 14 02:17:55 PM PDT 24 May 14 02:18:12 PM PDT 24 1795459731 ps
T31 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.1162940546 May 14 02:16:43 PM PDT 24 May 14 02:16:59 PM PDT 24 2442186263 ps
T26 /workspace/coverage/default/3.sram_ctrl_bijection.704546377 May 14 02:11:55 PM PDT 24 May 14 02:41:39 PM PDT 24 25275778540 ps
T75 /workspace/coverage/default/18.sram_ctrl_partial_access.2934635551 May 14 02:13:02 PM PDT 24 May 14 02:14:14 PM PDT 24 3303183417 ps
T33 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3497671505 May 14 02:13:20 PM PDT 24 May 14 02:13:24 PM PDT 24 357637162 ps
T44 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.4245745945 May 14 02:15:42 PM PDT 24 May 14 02:37:43 PM PDT 24 15059244695 ps
T45 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.1694550711 May 14 02:17:13 PM PDT 24 May 14 02:30:12 PM PDT 24 53941074785 ps
T116 /workspace/coverage/default/45.sram_ctrl_max_throughput.1073599067 May 14 02:18:13 PM PDT 24 May 14 02:19:08 PM PDT 24 771802528 ps
T117 /workspace/coverage/default/33.sram_ctrl_partial_access.4149239678 May 14 02:15:33 PM PDT 24 May 14 02:15:38 PM PDT 24 388055255 ps
T24 /workspace/coverage/default/10.sram_ctrl_alert_test.1895696350 May 14 02:12:14 PM PDT 24 May 14 02:12:16 PM PDT 24 13950017 ps
T5 /workspace/coverage/default/39.sram_ctrl_stress_all.1025037090 May 14 02:17:03 PM PDT 24 May 14 03:36:12 PM PDT 24 149057084607 ps
T59 /workspace/coverage/default/3.sram_ctrl_regwen.929949826 May 14 02:11:51 PM PDT 24 May 14 02:34:23 PM PDT 24 23003449658 ps
T34 /workspace/coverage/default/25.sram_ctrl_ram_cfg.4275091500 May 14 02:14:15 PM PDT 24 May 14 02:14:20 PM PDT 24 576886800 ps
T148 /workspace/coverage/default/3.sram_ctrl_partial_access.1143442717 May 14 02:11:52 PM PDT 24 May 14 02:12:46 PM PDT 24 830205137 ps
T149 /workspace/coverage/default/1.sram_ctrl_smoke.2685666451 May 14 02:11:41 PM PDT 24 May 14 02:11:56 PM PDT 24 3050283033 ps
T15 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.280384931 May 14 02:13:37 PM PDT 24 May 14 02:22:25 PM PDT 24 157124510640 ps
T157 /workspace/coverage/default/13.sram_ctrl_partial_access.3521037817 May 14 02:12:30 PM PDT 24 May 14 02:13:11 PM PDT 24 469181388 ps
T16 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2890975436 May 14 02:15:14 PM PDT 24 May 14 02:25:52 PM PDT 24 19234210107 ps
T142 /workspace/coverage/default/23.sram_ctrl_max_throughput.197712560 May 14 02:13:49 PM PDT 24 May 14 02:14:01 PM PDT 24 723324760 ps
T103 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.4282945295 May 14 02:14:59 PM PDT 24 May 14 02:20:04 PM PDT 24 10767306755 ps
T6 /workspace/coverage/default/21.sram_ctrl_stress_all.936514076 May 14 02:13:40 PM PDT 24 May 14 03:10:37 PM PDT 24 101523288133 ps
T84 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.3307553056 May 14 02:16:25 PM PDT 24 May 14 02:19:14 PM PDT 24 8921996842 ps
T46 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.3449829747 May 14 02:12:54 PM PDT 24 May 14 02:14:42 PM PDT 24 16920608618 ps
T158 /workspace/coverage/default/5.sram_ctrl_ram_cfg.1460192797 May 14 02:12:01 PM PDT 24 May 14 02:12:06 PM PDT 24 1402765891 ps
T47 /workspace/coverage/default/31.sram_ctrl_executable.1400732056 May 14 02:15:17 PM PDT 24 May 14 02:28:51 PM PDT 24 25406561556 ps
T150 /workspace/coverage/default/48.sram_ctrl_partial_access.82418956 May 14 02:18:48 PM PDT 24 May 14 02:18:53 PM PDT 24 465960747 ps
T154 /workspace/coverage/default/0.sram_ctrl_max_throughput.1147753373 May 14 02:11:41 PM PDT 24 May 14 02:13:37 PM PDT 24 780562053 ps
T159 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2736104387 May 14 02:12:21 PM PDT 24 May 14 02:13:44 PM PDT 24 802658525 ps
T7 /workspace/coverage/default/32.sram_ctrl_stress_all.1193429054 May 14 02:15:34 PM PDT 24 May 14 03:18:33 PM PDT 24 112831428411 ps
T160 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2586152708 May 14 02:18:13 PM PDT 24 May 14 02:18:17 PM PDT 24 2404461835 ps
T139 /workspace/coverage/default/6.sram_ctrl_bijection.3009141165 May 14 02:12:01 PM PDT 24 May 14 02:26:22 PM PDT 24 48556261274 ps
T145 /workspace/coverage/default/20.sram_ctrl_alert_test.2061995235 May 14 02:13:23 PM PDT 24 May 14 02:13:25 PM PDT 24 15577589 ps
T161 /workspace/coverage/default/5.sram_ctrl_mem_walk.1810633960 May 14 02:12:00 PM PDT 24 May 14 02:17:38 PM PDT 24 93959662381 ps
T162 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.578362003 May 14 02:17:47 PM PDT 24 May 14 02:20:16 PM PDT 24 8657135916 ps
T163 /workspace/coverage/default/35.sram_ctrl_smoke.560632706 May 14 02:16:03 PM PDT 24 May 14 02:16:21 PM PDT 24 3360751371 ps
T164 /workspace/coverage/default/36.sram_ctrl_mem_walk.3155433729 May 14 02:16:24 PM PDT 24 May 14 02:21:30 PM PDT 24 86043872971 ps
T85 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.1248008495 May 14 02:14:26 PM PDT 24 May 14 02:16:37 PM PDT 24 1571221857 ps
T48 /workspace/coverage/default/9.sram_ctrl_regwen.4280157855 May 14 02:12:19 PM PDT 24 May 14 02:23:38 PM PDT 24 5419846974 ps
T165 /workspace/coverage/default/40.sram_ctrl_partial_access.2623107182 May 14 02:17:07 PM PDT 24 May 14 02:17:49 PM PDT 24 771892639 ps
T153 /workspace/coverage/default/41.sram_ctrl_multiple_keys.328722020 May 14 02:17:13 PM PDT 24 May 14 02:38:25 PM PDT 24 15762292920 ps
T166 /workspace/coverage/default/45.sram_ctrl_executable.460375407 May 14 02:18:12 PM PDT 24 May 14 02:39:38 PM PDT 24 29952705877 ps
T141 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.32360153 May 14 02:16:32 PM PDT 24 May 14 02:20:19 PM PDT 24 10734913083 ps
T143 /workspace/coverage/default/22.sram_ctrl_multiple_keys.3706206092 May 14 02:13:37 PM PDT 24 May 14 02:24:01 PM PDT 24 9520714685 ps
T86 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.3862884355 May 14 02:11:58 PM PDT 24 May 14 02:13:44 PM PDT 24 13263546747 ps
T167 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3322106058 May 14 02:15:42 PM PDT 24 May 14 02:16:54 PM PDT 24 9282302011 ps
T168 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1545930478 May 14 02:14:23 PM PDT 24 May 14 02:15:13 PM PDT 24 2990538199 ps
T169 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3360745725 May 14 02:18:29 PM PDT 24 May 14 02:25:05 PM PDT 24 28699771163 ps
T27 /workspace/coverage/default/41.sram_ctrl_stress_all.1659267009 May 14 02:17:19 PM PDT 24 May 14 03:15:21 PM PDT 24 99739087640 ps
T151 /workspace/coverage/default/32.sram_ctrl_executable.3676593198 May 14 02:15:27 PM PDT 24 May 14 02:26:44 PM PDT 24 10517533999 ps
T170 /workspace/coverage/default/41.sram_ctrl_smoke.4273670086 May 14 02:17:16 PM PDT 24 May 14 02:19:49 PM PDT 24 779421335 ps
T87 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.421221176 May 14 02:12:04 PM PDT 24 May 14 02:43:32 PM PDT 24 97016210011 ps
T88 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.2200490916 May 14 02:17:21 PM PDT 24 May 14 02:18:39 PM PDT 24 7570418048 ps
T19 /workspace/coverage/default/1.sram_ctrl_sec_cm.20587844 May 14 02:11:51 PM PDT 24 May 14 02:11:56 PM PDT 24 276704756 ps
T37 /workspace/coverage/default/40.sram_ctrl_smoke.1484029527 May 14 02:17:05 PM PDT 24 May 14 02:17:09 PM PDT 24 824603956 ps
T30 /workspace/coverage/default/38.sram_ctrl_lc_escalation.2546444849 May 14 02:16:41 PM PDT 24 May 14 02:20:05 PM PDT 24 248011577892 ps
T38 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3022283865 May 14 02:17:57 PM PDT 24 May 14 02:25:34 PM PDT 24 34787197392 ps
T39 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1937195848 May 14 02:15:24 PM PDT 24 May 14 02:18:50 PM PDT 24 4134775158 ps
T28 /workspace/coverage/default/24.sram_ctrl_regwen.4094573663 May 14 02:14:04 PM PDT 24 May 14 02:30:08 PM PDT 24 12600094754 ps
T40 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.146493948 May 14 02:11:42 PM PDT 24 May 14 02:16:20 PM PDT 24 4599517185 ps
T41 /workspace/coverage/default/48.sram_ctrl_executable.3636842779 May 14 02:18:57 PM PDT 24 May 14 02:39:22 PM PDT 24 38449234248 ps
T42 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.2597808061 May 14 02:13:16 PM PDT 24 May 14 02:18:14 PM PDT 24 4550006777 ps
T43 /workspace/coverage/default/15.sram_ctrl_ram_cfg.918986547 May 14 02:12:38 PM PDT 24 May 14 02:12:41 PM PDT 24 1433803587 ps
T171 /workspace/coverage/default/41.sram_ctrl_ram_cfg.731952163 May 14 02:17:21 PM PDT 24 May 14 02:17:25 PM PDT 24 348029449 ps
T172 /workspace/coverage/default/3.sram_ctrl_mem_walk.90566666 May 14 02:11:52 PM PDT 24 May 14 02:16:17 PM PDT 24 4106677675 ps
T173 /workspace/coverage/default/15.sram_ctrl_alert_test.3900370739 May 14 02:12:45 PM PDT 24 May 14 02:12:47 PM PDT 24 14044736 ps
T155 /workspace/coverage/default/19.sram_ctrl_bijection.1692310748 May 14 02:13:09 PM PDT 24 May 14 02:49:56 PM PDT 24 31141986984 ps
T89 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.1340894289 May 14 02:13:08 PM PDT 24 May 14 02:28:39 PM PDT 24 124031922786 ps
T174 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.2390557235 May 14 02:16:04 PM PDT 24 May 14 02:20:40 PM PDT 24 14345728513 ps
T152 /workspace/coverage/default/35.sram_ctrl_executable.2583878129 May 14 02:16:05 PM PDT 24 May 14 02:29:00 PM PDT 24 13569373257 ps
T50 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3348053796 May 14 02:12:16 PM PDT 24 May 14 02:12:46 PM PDT 24 4101881461 ps
T175 /workspace/coverage/default/32.sram_ctrl_smoke.2780541735 May 14 02:15:17 PM PDT 24 May 14 02:17:12 PM PDT 24 1204299870 ps
T176 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2319411729 May 14 02:14:41 PM PDT 24 May 14 02:16:58 PM PDT 24 7082570411 ps
T177 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1910512170 May 14 02:11:42 PM PDT 24 May 14 02:31:05 PM PDT 24 8447323755 ps
T99 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2319948638 May 14 02:12:48 PM PDT 24 May 14 02:15:23 PM PDT 24 17362675667 ps
T29 /workspace/coverage/default/8.sram_ctrl_stress_all.3638632210 May 14 02:12:11 PM PDT 24 May 14 03:58:45 PM PDT 24 205350195175 ps
T144 /workspace/coverage/default/38.sram_ctrl_stress_all.1841159664 May 14 02:16:55 PM PDT 24 May 14 03:03:44 PM PDT 24 62584442944 ps
T178 /workspace/coverage/default/14.sram_ctrl_alert_test.2301025144 May 14 02:12:30 PM PDT 24 May 14 02:12:33 PM PDT 24 53936378 ps
T179 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2928047886 May 14 02:12:45 PM PDT 24 May 14 02:13:19 PM PDT 24 2873161528 ps
T180 /workspace/coverage/default/3.sram_ctrl_alert_test.4104182105 May 14 02:11:52 PM PDT 24 May 14 02:11:54 PM PDT 24 22825232 ps
T181 /workspace/coverage/default/28.sram_ctrl_ram_cfg.1921550153 May 14 02:14:42 PM PDT 24 May 14 02:14:47 PM PDT 24 1878107707 ps
T182 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.3850719267 May 14 02:15:07 PM PDT 24 May 14 02:16:16 PM PDT 24 3926037861 ps
T183 /workspace/coverage/default/47.sram_ctrl_regwen.3289819675 May 14 02:18:37 PM PDT 24 May 14 02:38:52 PM PDT 24 4709982447 ps
T184 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.616134449 May 14 02:16:53 PM PDT 24 May 14 02:18:16 PM PDT 24 4988663669 ps
T185 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3386967638 May 14 02:15:27 PM PDT 24 May 14 02:20:17 PM PDT 24 5400110950 ps
T186 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.937036018 May 14 02:14:52 PM PDT 24 May 14 02:20:16 PM PDT 24 23308733068 ps
T187 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3572627466 May 14 02:12:46 PM PDT 24 May 14 02:16:14 PM PDT 24 50805133094 ps
T188 /workspace/coverage/default/26.sram_ctrl_smoke.1680686127 May 14 02:14:14 PM PDT 24 May 14 02:14:25 PM PDT 24 1911792387 ps
T135 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.140911256 May 14 02:12:31 PM PDT 24 May 14 02:15:23 PM PDT 24 45284195424 ps
T189 /workspace/coverage/default/24.sram_ctrl_bijection.3708690357 May 14 02:13:57 PM PDT 24 May 14 02:27:43 PM PDT 24 216388062051 ps
T190 /workspace/coverage/default/24.sram_ctrl_smoke.3417086291 May 14 02:13:57 PM PDT 24 May 14 02:14:09 PM PDT 24 1675783519 ps
T191 /workspace/coverage/default/0.sram_ctrl_partial_access.3944321242 May 14 02:11:43 PM PDT 24 May 14 02:14:51 PM PDT 24 1302955721 ps
T156 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1982013390 May 14 02:18:06 PM PDT 24 May 14 02:21:16 PM PDT 24 6314907239 ps
T146 /workspace/coverage/default/34.sram_ctrl_regwen.2090644767 May 14 02:15:50 PM PDT 24 May 14 02:22:08 PM PDT 24 4577603245 ps
T138 /workspace/coverage/default/33.sram_ctrl_lc_escalation.2843800045 May 14 02:15:43 PM PDT 24 May 14 02:16:52 PM PDT 24 57727693065 ps
T192 /workspace/coverage/default/15.sram_ctrl_smoke.377977135 May 14 02:12:31 PM PDT 24 May 14 02:12:51 PM PDT 24 1534826351 ps
T193 /workspace/coverage/default/25.sram_ctrl_multiple_keys.1422200417 May 14 02:14:15 PM PDT 24 May 14 02:30:38 PM PDT 24 64959142442 ps
T194 /workspace/coverage/default/16.sram_ctrl_executable.3447137592 May 14 02:12:50 PM PDT 24 May 14 02:24:38 PM PDT 24 13061302713 ps
T51 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.4208300659 May 14 02:14:50 PM PDT 24 May 14 02:15:02 PM PDT 24 321273559 ps
T118 /workspace/coverage/default/3.sram_ctrl_stress_all.267485431 May 14 02:11:51 PM PDT 24 May 14 04:31:56 PM PDT 24 1477729166587 ps
T147 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.158759075 May 14 02:12:15 PM PDT 24 May 14 02:13:59 PM PDT 24 15440678552 ps
T195 /workspace/coverage/default/34.sram_ctrl_smoke.1147371440 May 14 02:15:41 PM PDT 24 May 14 02:15:48 PM PDT 24 353753840 ps
T119 /workspace/coverage/default/9.sram_ctrl_lc_escalation.70708619 May 14 02:12:12 PM PDT 24 May 14 02:12:59 PM PDT 24 22817726085 ps
T196 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.3301485865 May 14 02:12:42 PM PDT 24 May 14 02:42:51 PM PDT 24 114885822402 ps
T197 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.3005875929 May 14 02:11:50 PM PDT 24 May 14 02:13:05 PM PDT 24 4786725524 ps
T198 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3204659157 May 14 02:11:55 PM PDT 24 May 14 02:14:50 PM PDT 24 16134999520 ps
T199 /workspace/coverage/default/20.sram_ctrl_bijection.1911369711 May 14 02:13:17 PM PDT 24 May 14 02:33:12 PM PDT 24 299024068803 ps
T200 /workspace/coverage/default/26.sram_ctrl_regwen.4244039232 May 14 02:14:23 PM PDT 24 May 14 02:22:44 PM PDT 24 8446364748 ps
T201 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1097526971 May 14 02:13:31 PM PDT 24 May 14 02:15:00 PM PDT 24 10953847043 ps
T140 /workspace/coverage/default/20.sram_ctrl_stress_all.2149107371 May 14 02:13:23 PM PDT 24 May 14 03:56:45 PM PDT 24 168681604850 ps
T202 /workspace/coverage/default/29.sram_ctrl_lc_escalation.927699636 May 14 02:14:50 PM PDT 24 May 14 02:15:50 PM PDT 24 32140076927 ps
T203 /workspace/coverage/default/34.sram_ctrl_lc_escalation.1441446613 May 14 02:15:50 PM PDT 24 May 14 02:17:25 PM PDT 24 53705205507 ps
T204 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1989815173 May 14 02:17:37 PM PDT 24 May 14 02:25:08 PM PDT 24 11865961467 ps
T205 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2263008423 May 14 02:12:05 PM PDT 24 May 14 02:13:17 PM PDT 24 832599855 ps
T206 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3711731839 May 14 02:14:23 PM PDT 24 May 14 02:14:29 PM PDT 24 6743592395 ps
T207 /workspace/coverage/default/7.sram_ctrl_ram_cfg.3723645585 May 14 02:12:03 PM PDT 24 May 14 02:12:07 PM PDT 24 366470876 ps
T52 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1210329058 May 14 02:11:45 PM PDT 24 May 14 02:11:56 PM PDT 24 318410127 ps
T208 /workspace/coverage/default/30.sram_ctrl_max_throughput.3696335328 May 14 02:14:59 PM PDT 24 May 14 02:16:40 PM PDT 24 3143868030 ps
T209 /workspace/coverage/default/31.sram_ctrl_multiple_keys.2401464882 May 14 02:15:08 PM PDT 24 May 14 02:28:56 PM PDT 24 24940482208 ps
T210 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3069877652 May 14 02:18:52 PM PDT 24 May 14 02:21:24 PM PDT 24 9692165120 ps
T211 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1269577751 May 14 02:11:41 PM PDT 24 May 14 02:20:03 PM PDT 24 21618442158 ps
T53 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2760922432 May 14 02:15:15 PM PDT 24 May 14 02:16:09 PM PDT 24 1889315111 ps
T212 /workspace/coverage/default/43.sram_ctrl_regwen.4084583741 May 14 02:17:48 PM PDT 24 May 14 02:19:37 PM PDT 24 14646511394 ps
T136 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.864402059 May 14 02:13:09 PM PDT 24 May 14 02:15:52 PM PDT 24 9967575972 ps
T213 /workspace/coverage/default/4.sram_ctrl_bijection.2712105068 May 14 02:11:51 PM PDT 24 May 14 02:44:57 PM PDT 24 111461692910 ps
T214 /workspace/coverage/default/23.sram_ctrl_alert_test.193243781 May 14 02:13:58 PM PDT 24 May 14 02:13:59 PM PDT 24 12298914 ps
T215 /workspace/coverage/default/7.sram_ctrl_stress_all.1907964786 May 14 02:12:05 PM PDT 24 May 14 03:28:29 PM PDT 24 66053576005 ps
T216 /workspace/coverage/default/13.sram_ctrl_smoke.18239731 May 14 02:12:25 PM PDT 24 May 14 02:12:39 PM PDT 24 540014553 ps
T217 /workspace/coverage/default/48.sram_ctrl_multiple_keys.2065908540 May 14 02:18:47 PM PDT 24 May 14 02:47:18 PM PDT 24 22405275362 ps
T218 /workspace/coverage/default/9.sram_ctrl_bijection.3542816080 May 14 02:12:13 PM PDT 24 May 14 02:39:42 PM PDT 24 384264445871 ps
T219 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.2507009402 May 14 02:14:45 PM PDT 24 May 14 02:24:58 PM PDT 24 141776775697 ps
T54 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2463830435 May 14 02:12:48 PM PDT 24 May 14 02:12:59 PM PDT 24 958470614 ps
T220 /workspace/coverage/default/32.sram_ctrl_bijection.3915759743 May 14 02:15:23 PM PDT 24 May 14 02:48:56 PM PDT 24 87561049850 ps
T221 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.4202427047 May 14 02:12:03 PM PDT 24 May 14 02:14:26 PM PDT 24 1624015329 ps
T222 /workspace/coverage/default/44.sram_ctrl_alert_test.3699760286 May 14 02:18:04 PM PDT 24 May 14 02:18:06 PM PDT 24 15307414 ps
T223 /workspace/coverage/default/14.sram_ctrl_ram_cfg.4207431671 May 14 02:12:31 PM PDT 24 May 14 02:12:36 PM PDT 24 1411992459 ps
T224 /workspace/coverage/default/45.sram_ctrl_regwen.3564396764 May 14 02:18:11 PM PDT 24 May 14 02:29:44 PM PDT 24 25004693137 ps
T225 /workspace/coverage/default/2.sram_ctrl_partial_access.1819761953 May 14 02:11:49 PM PDT 24 May 14 02:12:11 PM PDT 24 933364477 ps
T226 /workspace/coverage/default/39.sram_ctrl_lc_escalation.3502791820 May 14 02:16:54 PM PDT 24 May 14 02:17:52 PM PDT 24 8543547850 ps
T227 /workspace/coverage/default/46.sram_ctrl_ram_cfg.1167821267 May 14 02:18:29 PM PDT 24 May 14 02:18:34 PM PDT 24 1061800649 ps
T228 /workspace/coverage/default/9.sram_ctrl_partial_access.3861202108 May 14 02:12:13 PM PDT 24 May 14 02:12:23 PM PDT 24 1408632535 ps
T229 /workspace/coverage/default/17.sram_ctrl_smoke.4089707500 May 14 02:12:50 PM PDT 24 May 14 02:14:31 PM PDT 24 4953992647 ps
T230 /workspace/coverage/default/4.sram_ctrl_stress_all.90697908 May 14 02:12:02 PM PDT 24 May 14 04:09:38 PM PDT 24 163726811115 ps
T231 /workspace/coverage/default/1.sram_ctrl_bijection.3006621260 May 14 02:11:41 PM PDT 24 May 14 02:53:12 PM PDT 24 575003670144 ps
T232 /workspace/coverage/default/25.sram_ctrl_smoke.1512917896 May 14 02:14:16 PM PDT 24 May 14 02:16:31 PM PDT 24 10259180055 ps
T233 /workspace/coverage/default/47.sram_ctrl_partial_access.2986842881 May 14 02:18:30 PM PDT 24 May 14 02:18:39 PM PDT 24 1292221468 ps
T234 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.2430382118 May 14 02:14:31 PM PDT 24 May 14 02:18:41 PM PDT 24 43992669518 ps
T55 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2488912443 May 14 02:13:47 PM PDT 24 May 14 02:20:10 PM PDT 24 9616271640 ps
T235 /workspace/coverage/default/30.sram_ctrl_ram_cfg.2828084149 May 14 02:15:07 PM PDT 24 May 14 02:15:12 PM PDT 24 432436314 ps
T236 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3731373061 May 14 02:12:46 PM PDT 24 May 14 02:12:51 PM PDT 24 346235579 ps
T237 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.2010834694 May 14 02:12:02 PM PDT 24 May 14 02:13:22 PM PDT 24 2791141159 ps
T238 /workspace/coverage/default/33.sram_ctrl_max_throughput.4281341912 May 14 02:15:33 PM PDT 24 May 14 02:17:19 PM PDT 24 1933999061 ps
T239 /workspace/coverage/default/39.sram_ctrl_executable.389789130 May 14 02:16:55 PM PDT 24 May 14 02:33:26 PM PDT 24 37340643827 ps
T240 /workspace/coverage/default/38.sram_ctrl_ram_cfg.4083578333 May 14 02:16:42 PM PDT 24 May 14 02:16:46 PM PDT 24 345080597 ps
T241 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.3307556117 May 14 02:13:37 PM PDT 24 May 14 02:16:10 PM PDT 24 4460246251 ps
T242 /workspace/coverage/default/25.sram_ctrl_bijection.3108700948 May 14 02:14:13 PM PDT 24 May 14 02:42:54 PM PDT 24 220408878359 ps
T243 /workspace/coverage/default/44.sram_ctrl_smoke.1202352360 May 14 02:17:57 PM PDT 24 May 14 02:18:18 PM PDT 24 13565413189 ps
T244 /workspace/coverage/default/28.sram_ctrl_smoke.1415880875 May 14 02:14:42 PM PDT 24 May 14 02:14:55 PM PDT 24 612327076 ps
T245 /workspace/coverage/default/12.sram_ctrl_executable.1682667864 May 14 02:12:21 PM PDT 24 May 14 02:51:09 PM PDT 24 13630248466 ps
T246 /workspace/coverage/default/27.sram_ctrl_ram_cfg.2964213791 May 14 02:14:33 PM PDT 24 May 14 02:14:37 PM PDT 24 352311232 ps
T247 /workspace/coverage/default/15.sram_ctrl_stress_all.3017134019 May 14 02:12:46 PM PDT 24 May 14 03:34:45 PM PDT 24 57675621597 ps
T248 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.3726321696 May 14 02:12:06 PM PDT 24 May 14 02:14:12 PM PDT 24 3126189953 ps
T249 /workspace/coverage/default/22.sram_ctrl_mem_walk.3538264154 May 14 02:13:49 PM PDT 24 May 14 02:15:50 PM PDT 24 8233644135 ps
T250 /workspace/coverage/default/5.sram_ctrl_stress_all.2143620793 May 14 02:12:01 PM PDT 24 May 14 03:02:22 PM PDT 24 130674878094 ps
T251 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.536681902 May 14 02:11:51 PM PDT 24 May 14 02:13:00 PM PDT 24 5292759262 ps
T252 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1111881125 May 14 02:11:49 PM PDT 24 May 14 02:17:00 PM PDT 24 8814965723 ps
T253 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2397051895 May 14 02:17:04 PM PDT 24 May 14 02:22:02 PM PDT 24 12660728141 ps
T20 /workspace/coverage/default/0.sram_ctrl_sec_cm.2070020285 May 14 02:11:41 PM PDT 24 May 14 02:11:46 PM PDT 24 302655522 ps
T254 /workspace/coverage/default/29.sram_ctrl_max_throughput.3222895036 May 14 02:14:51 PM PDT 24 May 14 02:15:48 PM PDT 24 759326865 ps
T255 /workspace/coverage/default/12.sram_ctrl_multiple_keys.460442896 May 14 02:12:26 PM PDT 24 May 14 02:13:40 PM PDT 24 2294751371 ps
T256 /workspace/coverage/default/4.sram_ctrl_regwen.2197992956 May 14 02:11:56 PM PDT 24 May 14 02:23:57 PM PDT 24 16402233827 ps
T257 /workspace/coverage/default/1.sram_ctrl_alert_test.2358628381 May 14 02:11:48 PM PDT 24 May 14 02:11:49 PM PDT 24 20694247 ps
T258 /workspace/coverage/default/6.sram_ctrl_partial_access.2148345881 May 14 02:11:58 PM PDT 24 May 14 02:12:36 PM PDT 24 3964427468 ps
T259 /workspace/coverage/default/12.sram_ctrl_regwen.2781802528 May 14 02:12:25 PM PDT 24 May 14 02:25:41 PM PDT 24 1189824121 ps
T260 /workspace/coverage/default/35.sram_ctrl_mem_walk.3699598305 May 14 02:16:09 PM PDT 24 May 14 02:18:48 PM PDT 24 68825373300 ps
T261 /workspace/coverage/default/12.sram_ctrl_alert_test.1617347735 May 14 02:12:25 PM PDT 24 May 14 02:12:27 PM PDT 24 26499775 ps
T262 /workspace/coverage/default/26.sram_ctrl_stress_all.3727446559 May 14 02:14:22 PM PDT 24 May 14 03:46:16 PM PDT 24 51278987090 ps
T263 /workspace/coverage/default/2.sram_ctrl_ram_cfg.1856506014 May 14 02:11:51 PM PDT 24 May 14 02:11:56 PM PDT 24 876211251 ps
T264 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2780814068 May 14 02:13:32 PM PDT 24 May 14 02:13:37 PM PDT 24 680778558 ps
T265 /workspace/coverage/default/25.sram_ctrl_mem_walk.1932412199 May 14 02:14:15 PM PDT 24 May 14 02:16:44 PM PDT 24 9324468204 ps
T266 /workspace/coverage/default/1.sram_ctrl_regwen.1245697726 May 14 02:11:49 PM PDT 24 May 14 02:21:09 PM PDT 24 2487060189 ps
T267 /workspace/coverage/default/23.sram_ctrl_partial_access.384922011 May 14 02:13:48 PM PDT 24 May 14 02:14:09 PM PDT 24 655888081 ps
T56 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3187583799 May 14 02:18:31 PM PDT 24 May 14 02:18:40 PM PDT 24 132232275 ps
T268 /workspace/coverage/default/8.sram_ctrl_max_throughput.313714112 May 14 02:12:03 PM PDT 24 May 14 02:12:11 PM PDT 24 3715370645 ps
T269 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.3641759005 May 14 02:13:55 PM PDT 24 May 14 02:15:51 PM PDT 24 2656746416 ps
T270 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3963317142 May 14 02:12:01 PM PDT 24 May 14 02:21:05 PM PDT 24 1873935922 ps
T271 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2547735728 May 14 02:11:53 PM PDT 24 May 14 02:16:14 PM PDT 24 4997576572 ps
T272 /workspace/coverage/default/42.sram_ctrl_bijection.3123225286 May 14 02:17:31 PM PDT 24 May 14 02:29:40 PM PDT 24 33793364433 ps
T273 /workspace/coverage/default/34.sram_ctrl_max_throughput.375385059 May 14 02:15:50 PM PDT 24 May 14 02:16:01 PM PDT 24 1391952819 ps
T274 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3027996733 May 14 02:14:41 PM PDT 24 May 14 02:16:03 PM PDT 24 12045358485 ps
T275 /workspace/coverage/default/42.sram_ctrl_max_throughput.4021156404 May 14 02:17:33 PM PDT 24 May 14 02:17:46 PM PDT 24 695430660 ps
T276 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.85196957 May 14 02:12:55 PM PDT 24 May 14 02:15:22 PM PDT 24 3262066469 ps
T137 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3400281669 May 14 02:12:46 PM PDT 24 May 14 02:20:01 PM PDT 24 25134723030 ps
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T279 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3222148699 May 14 02:15:06 PM PDT 24 May 14 02:19:06 PM PDT 24 23905613319 ps
T280 /workspace/coverage/default/9.sram_ctrl_mem_walk.130706202 May 14 02:12:13 PM PDT 24 May 14 02:14:28 PM PDT 24 1977923858 ps
T281 /workspace/coverage/default/17.sram_ctrl_regwen.1782509487 May 14 02:12:56 PM PDT 24 May 14 02:30:20 PM PDT 24 15908572454 ps
T282 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3348426161 May 14 02:12:05 PM PDT 24 May 14 02:12:34 PM PDT 24 9413516885 ps
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T285 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.350735437 May 14 02:13:27 PM PDT 24 May 14 02:14:39 PM PDT 24 7881525244 ps
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T288 /workspace/coverage/default/48.sram_ctrl_lc_escalation.3819663626 May 14 02:18:57 PM PDT 24 May 14 02:19:39 PM PDT 24 76428840158 ps
T289 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.3234876858 May 14 02:13:56 PM PDT 24 May 14 02:15:22 PM PDT 24 39212864301 ps
T290 /workspace/coverage/default/11.sram_ctrl_ram_cfg.1081338138 May 14 02:12:22 PM PDT 24 May 14 02:12:27 PM PDT 24 350411799 ps
T291 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2351772341 May 14 02:14:29 PM PDT 24 May 14 02:15:45 PM PDT 24 9739259829 ps
T292 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3998045375 May 14 02:12:13 PM PDT 24 May 14 02:19:49 PM PDT 24 72601759368 ps
T293 /workspace/coverage/default/44.sram_ctrl_ram_cfg.1227778877 May 14 02:17:57 PM PDT 24 May 14 02:18:02 PM PDT 24 2597934266 ps
T294 /workspace/coverage/default/30.sram_ctrl_partial_access.639046158 May 14 02:14:59 PM PDT 24 May 14 02:15:22 PM PDT 24 4756202445 ps
T295 /workspace/coverage/default/20.sram_ctrl_executable.1080520885 May 14 02:13:27 PM PDT 24 May 14 02:40:39 PM PDT 24 19670873679 ps
T296 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.962088078 May 14 02:11:55 PM PDT 24 May 14 02:12:19 PM PDT 24 730489411 ps
T297 /workspace/coverage/default/28.sram_ctrl_partial_access.2958748273 May 14 02:14:42 PM PDT 24 May 14 02:15:32 PM PDT 24 728493205 ps
T298 /workspace/coverage/default/32.sram_ctrl_alert_test.3074906391 May 14 02:15:34 PM PDT 24 May 14 02:15:35 PM PDT 24 46013890 ps
T299 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.804926082 May 14 02:12:26 PM PDT 24 May 14 02:27:44 PM PDT 24 21507309387 ps
T300 /workspace/coverage/default/41.sram_ctrl_lc_escalation.2653648684 May 14 02:17:13 PM PDT 24 May 14 02:18:34 PM PDT 24 52307614149 ps
T301 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.927511913 May 14 02:11:42 PM PDT 24 May 14 02:14:10 PM PDT 24 7112248182 ps
T302 /workspace/coverage/default/46.sram_ctrl_lc_escalation.1786565453 May 14 02:18:22 PM PDT 24 May 14 02:18:56 PM PDT 24 5224325771 ps
T303 /workspace/coverage/default/1.sram_ctrl_executable.2442363534 May 14 02:11:42 PM PDT 24 May 14 02:22:24 PM PDT 24 3085061221 ps
T304 /workspace/coverage/default/43.sram_ctrl_stress_all.1261933285 May 14 02:17:45 PM PDT 24 May 14 03:18:05 PM PDT 24 72753068170 ps
T305 /workspace/coverage/default/21.sram_ctrl_executable.331875136 May 14 02:13:32 PM PDT 24 May 14 02:37:04 PM PDT 24 21683809308 ps
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