Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	17150111	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

153254252

1

T1

8423

T2

8222

T3

458752

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	83946077	1			T1	1494		T2	4979		T3	229376
values[0x0]	41522409	1			T1	3438		T2	2296		T3	114928
values[0x1]	44935877	1			T1	3491		T2	2725		T3	114448

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8711366	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

161692997

1

T1

8423

T2

9096

T3

458752

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	583175	1			T1	26		T2	51		T3	1739
valid_sources[0x01]	601134	1			T1	34		T2	47		T3	1778
valid_sources[0x02]	561099	1			T1	31		T2	37		T3	1953
valid_sources[0x03]	557359	1			T1	45		T2	41		T3	1731
valid_sources[0x04]	551350	1			T1	27		T2	32		T3	1754
valid_sources[0x05]	568199	1			T1	18		T2	46		T3	1836
valid_sources[0x06]	596173	1			T1	26		T2	45		T3	1754
valid_sources[0x07]	619343	1			T1	26		T2	30		T3	1711
valid_sources[0x08]	562501	1			T1	28		T2	46		T3	1879
valid_sources[0x09]	1794066	1			T1	28		T2	27		T3	1812
valid_sources[0x0a]	622845	1			T1	30		T2	34		T3	1774
valid_sources[0x0b]	569898	1			T1	24		T2	36		T3	1776
valid_sources[0x0c]	652341	1			T1	30		T2	42		T3	1739
valid_sources[0x0d]	547527	1			T1	28		T2	50		T3	1855
valid_sources[0x0e]	550250	1			T1	27		T2	26		T3	1802
valid_sources[0x0f]	546460	1			T1	43		T2	50		T3	1710
valid_sources[0x10]	564262	1			T1	37		T2	42		T3	1833
valid_sources[0x11]	591034	1			T1	37		T2	56		T3	1796
valid_sources[0x12]	553032	1			T1	44		T2	40		T3	1840
valid_sources[0x13]	583955	1			T1	18		T2	48		T3	1778
valid_sources[0x14]	622128	1			T1	19		T2	45		T3	1747
valid_sources[0x15]	3374547	1			T1	44		T2	35		T3	1792
valid_sources[0x16]	550693	1			T1	35		T2	48		T3	1818
valid_sources[0x17]	547326	1			T1	25		T2	52		T3	1794
valid_sources[0x18]	548640	1			T1	37		T2	43		T3	1794
valid_sources[0x19]	788762	1			T1	33		T2	35		T3	1715
valid_sources[0x1a]	555468	1			T1	32		T2	50		T3	1750
valid_sources[0x1b]	541743	1			T1	20		T2	34		T3	1746
valid_sources[0x1c]	607299	1			T1	28		T2	38		T3	1853
valid_sources[0x1d]	3270345	1			T1	33		T2	32		T3	1831
valid_sources[0x1e]	557956	1			T1	25		T2	34		T3	1779
valid_sources[0x1f]	619267	1			T1	37		T2	45		T3	1803
valid_sources[0x20]	588746	1			T1	27		T2	38		T3	1777
valid_sources[0x21]	1272132	1			T1	35		T2	40		T3	1827
valid_sources[0x22]	542242	1			T1	40		T2	54		T3	1771
valid_sources[0x23]	558613	1			T1	36		T2	31		T3	1695
valid_sources[0x24]	605359	1			T1	36		T2	35		T3	1813
valid_sources[0x25]	944274	1			T1	44		T2	37		T3	1752
valid_sources[0x26]	547147	1			T1	42		T2	39		T3	1867
valid_sources[0x27]	549995	1			T1	39		T2	32		T3	1759
valid_sources[0x28]	598658	1			T1	30		T2	25		T3	1791
valid_sources[0x29]	587464	1			T1	36		T2	24		T3	1834
valid_sources[0x2a]	566121	1			T1	30		T2	39		T3	1722
valid_sources[0x2b]	573249	1			T1	34		T2	33		T3	1815
valid_sources[0x2c]	587240	1			T1	35		T2	43		T3	1804
valid_sources[0x2d]	615311	1			T1	22		T2	43		T3	1882
valid_sources[0x2e]	546408	1			T1	31		T2	31		T3	1777
valid_sources[0x2f]	543535	1			T1	34		T2	52		T3	1786
valid_sources[0x30]	548618	1			T1	24		T2	30		T3	1794
valid_sources[0x31]	787435	1			T1	15		T2	30		T3	1746
valid_sources[0x32]	538988	1			T1	15		T2	46		T3	1916
valid_sources[0x33]	551866	1			T1	45		T2	36		T3	1860
valid_sources[0x34]	1501912	1			T1	14		T2	44		T3	1724
valid_sources[0x35]	554363	1			T1	53		T2	50		T3	1721
valid_sources[0x36]	552462	1			T1	28		T2	43		T3	1874
valid_sources[0x37]	568636	1			T1	44		T2	38		T3	1852
valid_sources[0x38]	545485	1			T1	24		T2	37		T3	1773
valid_sources[0x39]	578638	1			T1	29		T2	47		T3	1844
valid_sources[0x3a]	548733	1			T1	42		T2	28		T3	1731
valid_sources[0x3b]	553710	1			T1	40		T2	48		T3	1885
valid_sources[0x3c]	561253	1			T1	45		T2	37		T3	1795
valid_sources[0x3d]	597562	1			T1	34		T2	39		T3	1761
valid_sources[0x3e]	595648	1			T1	25		T2	35		T3	1867
valid_sources[0x3f]	659009	1			T1	34		T2	36		T3	1710
valid_sources[0x40]	1261106	1			T1	23		T2	30		T3	1751
valid_sources[0x41]	717474	1			T1	49		T2	37		T3	1767
valid_sources[0x42]	548575	1			T1	19		T2	36		T3	1809
valid_sources[0x43]	538575	1			T1	24		T2	39		T3	1827
valid_sources[0x44]	552773	1			T1	24		T2	37		T3	1786
valid_sources[0x45]	569334	1			T1	41		T2	50		T3	1778
valid_sources[0x46]	566079	1			T1	22		T2	37		T3	1684
valid_sources[0x47]	582397	1			T1	37		T2	42		T3	1855
valid_sources[0x48]	558261	1			T1	38		T2	42		T3	1880
valid_sources[0x49]	573496	1			T1	38		T2	56		T3	1799
valid_sources[0x4a]	554285	1			T1	20		T2	42		T3	1863
valid_sources[0x4b]	571356	1			T1	22		T2	39		T3	1776
valid_sources[0x4c]	549173	1			T1	27		T2	38		T3	1862
valid_sources[0x4d]	588893	1			T1	38		T2	36		T3	1723
valid_sources[0x4e]	583982	1			T1	29		T2	46		T3	1835
valid_sources[0x4f]	550772	1			T1	48		T2	32		T3	1805
valid_sources[0x50]	651265	1			T1	37		T2	46		T3	1865
valid_sources[0x51]	542238	1			T1	46		T2	36		T3	1815
valid_sources[0x52]	661106	1			T1	17		T2	31		T3	1803
valid_sources[0x53]	555825	1			T1	35		T2	39		T3	1818
valid_sources[0x54]	1762598	1			T1	28		T2	44		T3	1743
valid_sources[0x55]	567931	1			T1	39		T2	31		T3	1717
valid_sources[0x56]	579364	1			T1	44		T2	35		T3	1792
valid_sources[0x57]	540130	1			T1	39		T2	45		T3	1860
valid_sources[0x58]	540791	1			T1	37		T2	43		T3	1789
valid_sources[0x59]	566946	1			T1	35		T2	39		T3	1827
valid_sources[0x5a]	599488	1			T1	39		T2	46		T3	1789
valid_sources[0x5b]	742464	1			T1	30		T2	34		T3	1826
valid_sources[0x5c]	742332	1			T1	27		T2	47		T3	1803
valid_sources[0x5d]	541249	1			T1	42		T2	45		T3	1781
valid_sources[0x5e]	578623	1			T1	55		T2	42		T3	1810
valid_sources[0x5f]	539869	1			T1	53		T2	32		T3	1772
valid_sources[0x60]	603037	1			T1	38		T2	32		T3	1760
valid_sources[0x61]	550807	1			T1	43		T2	27		T3	1780
valid_sources[0x62]	539413	1			T1	12		T2	49		T3	1752
valid_sources[0x63]	569315	1			T1	19		T2	33		T3	1774
valid_sources[0x64]	1586430	1			T1	42		T2	43		T3	1748
valid_sources[0x65]	566176	1			T1	30		T2	49		T3	1813
valid_sources[0x66]	1295779	1			T1	41		T2	41		T3	1761
valid_sources[0x67]	546381	1			T1	20		T2	50		T3	1776
valid_sources[0x68]	577775	1			T1	40		T2	30		T3	1784
valid_sources[0x69]	618279	1			T1	39		T2	33		T3	1847
valid_sources[0x6a]	560878	1			T1	38		T2	39		T3	1772
valid_sources[0x6b]	547087	1			T1	54		T2	49		T3	1741
valid_sources[0x6c]	596657	1			T1	32		T2	51		T3	1829
valid_sources[0x6d]	548383	1			T1	35		T2	41		T3	1866
valid_sources[0x6e]	540218	1			T1	43		T2	48		T3	1777
valid_sources[0x6f]	1381567	1			T1	40		T2	29		T3	1837
valid_sources[0x70]	546113	1			T1	39		T2	40		T3	1792
valid_sources[0x71]	547701	1			T1	40		T2	43		T3	1829
valid_sources[0x72]	539876	1			T1	17		T2	42		T3	1770
valid_sources[0x73]	534899	1			T1	34		T2	32		T3	1771
valid_sources[0x74]	540058	1			T1	30		T2	42		T3	1837
valid_sources[0x75]	543772	1			T1	17		T2	36		T3	1801
valid_sources[0x76]	562416	1			T1	32		T2	40		T3	1827
valid_sources[0x77]	566895	1			T1	39		T2	32		T3	1780
valid_sources[0x78]	556034	1			T1	36		T2	45		T3	1858
valid_sources[0x79]	745929	1			T1	44		T2	31		T3	1817
valid_sources[0x7a]	564847	1			T1	18		T2	39		T3	1812
valid_sources[0x7b]	741738	1			T1	35		T2	31		T3	1764
valid_sources[0x7c]	551837	1			T1	42		T2	32		T3	1794
valid_sources[0x7d]	557863	1			T1	29		T2	35		T3	1748
valid_sources[0x7e]	667206	1			T1	36		T2	41		T3	1870
valid_sources[0x7f]	546284	1			T1	10		T2	45		T3	1874
valid_sources[0x80]	540475	1			T1	18		T2	32		T3	1709

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

75330982

1

T1

1494

T2

4099

T3

229376

values[0x0]

all_enables

biggest_size

38960956

1

T1

3438

T2

2029

T3

114928

values[0x1]

all_enables

biggest_size

38962314

1

T1

3491

T2

2094

T3

114448

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34808	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

140853

1

T1

3574

T3

1

T9

12

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	51393	1			T1	1001		T6	34		T13	10
values[0x0]	60024	1			T1	1348		T2	1		T3	3
values[0x1]	64244	1			T1	1488		T2	1		T3	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	26326	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

149335

1

T1

3718

T3

1

T9

16

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	746	1			T1	22		T9	25		T28	56
valid_sources[0x01]	941	1			T1	14		T55	1		T45	11
valid_sources[0x02]	578	1			T1	18		T6	1		T23	1
valid_sources[0x03]	785	1			T1	19		T27	117		T28	11
valid_sources[0x04]	744	1			T1	19		T28	22		T45	10
valid_sources[0x05]	802	1			T1	16		T14	1		T55	1
valid_sources[0x06]	496	1			T1	17		T43	1		T28	21
valid_sources[0x07]	492	1			T1	15		T27	1		T23	1
valid_sources[0x08]	690	1			T1	12		T23	2		T28	2
valid_sources[0x09]	619	1			T1	13		T27	1		T44	2
valid_sources[0x0a]	568	1			T1	14		T28	23		T45	8
valid_sources[0x0b]	620	1			T1	10		T6	9		T44	1
valid_sources[0x0c]	639	1			T1	16		T23	2		T45	8
valid_sources[0x0d]	999	1			T1	13		T27	1		T44	1
valid_sources[0x0e]	607	1			T1	13		T23	5		T28	47
valid_sources[0x0f]	768	1			T1	16		T13	1		T27	2
valid_sources[0x10]	525	1			T1	19		T28	21		T45	8
valid_sources[0x11]	625	1			T1	13		T23	3		T45	7
valid_sources[0x12]	737	1			T1	16		T14	1		T28	5
valid_sources[0x13]	611	1			T1	18		T55	1		T23	7
valid_sources[0x14]	564	1			T1	18		T6	5		T28	1
valid_sources[0x15]	881	1			T1	13		T13	2		T23	3
valid_sources[0x16]	778	1			T1	16		T28	26		T45	7
valid_sources[0x17]	917	1			T1	18		T6	1		T28	10
valid_sources[0x18]	735	1			T1	15		T27	1		T45	9
valid_sources[0x19]	460	1			T1	17		T27	5		T28	12
valid_sources[0x1a]	825	1			T1	17		T55	1		T23	1
valid_sources[0x1b]	607	1			T1	21		T45	15		T46	33
valid_sources[0x1c]	603	1			T1	15		T27	3		T28	7
valid_sources[0x1d]	995	1			T1	16		T6	2		T27	1
valid_sources[0x1e]	976	1			T1	12		T27	3		T43	5
valid_sources[0x1f]	728	1			T1	12		T66	1		T28	45
valid_sources[0x20]	640	1			T1	19		T14	1		T28	48
valid_sources[0x21]	1092	1			T1	13		T6	2		T45	4
valid_sources[0x22]	530	1			T1	9		T3	7		T23	1
valid_sources[0x23]	682	1			T1	14		T28	3		T45	6
valid_sources[0x24]	690	1			T1	6		T13	3		T28	14
valid_sources[0x25]	1069	1			T1	10		T27	1		T28	28
valid_sources[0x26]	683	1			T1	13		T11	2		T27	22
valid_sources[0x27]	590	1			T1	6		T28	29		T45	6
valid_sources[0x28]	841	1			T1	15		T6	2		T14	1
valid_sources[0x29]	657	1			T1	17		T13	1		T55	1
valid_sources[0x2a]	1005	1			T1	17		T12	1		T27	141
valid_sources[0x2b]	608	1			T1	19		T6	2		T55	1
valid_sources[0x2c]	594	1			T1	16		T55	1		T28	1
valid_sources[0x2d]	568	1			T1	9		T13	1		T27	2
valid_sources[0x2e]	487	1			T1	14		T27	1		T28	27
valid_sources[0x2f]	634	1			T1	17		T27	2		T55	1
valid_sources[0x30]	628	1			T1	16		T13	1		T28	1
valid_sources[0x31]	641	1			T1	18		T6	8		T28	20
valid_sources[0x32]	591	1			T1	25		T27	1		T17	1
valid_sources[0x33]	799	1			T1	10		T12	1		T27	1
valid_sources[0x34]	574	1			T1	24		T45	11		T46	10
valid_sources[0x35]	701	1			T1	16		T28	2		T45	6
valid_sources[0x36]	565	1			T1	17		T6	1		T28	11
valid_sources[0x37]	799	1			T1	16		T13	1		T27	3
valid_sources[0x38]	553	1			T1	14		T28	52		T45	8
valid_sources[0x39]	646	1			T1	10		T27	1		T28	5
valid_sources[0x3a]	700	1			T1	11		T9	1		T28	1
valid_sources[0x3b]	660	1			T1	14		T13	1		T27	46
valid_sources[0x3c]	649	1			T1	20		T27	1		T45	17
valid_sources[0x3d]	988	1			T1	21		T28	1		T45	13
valid_sources[0x3e]	623	1			T1	14		T6	1		T28	12
valid_sources[0x3f]	617	1			T1	16		T6	3		T13	4
valid_sources[0x40]	770	1			T1	19		T11	3		T27	2
valid_sources[0x41]	486	1			T1	6		T45	10		T46	39
valid_sources[0x42]	529	1			T1	22		T11	1		T28	9
valid_sources[0x43]	760	1			T1	24		T27	142		T28	10
valid_sources[0x44]	664	1			T1	20		T5	2		T45	18
valid_sources[0x45]	759	1			T1	11		T27	58		T23	14
valid_sources[0x46]	707	1			T1	12		T44	1		T28	2
valid_sources[0x47]	754	1			T1	13		T6	4		T27	1
valid_sources[0x48]	875	1			T1	16		T45	10		T46	24
valid_sources[0x49]	660	1			T1	9		T6	5		T13	2
valid_sources[0x4a]	470	1			T1	10		T28	3		T45	6
valid_sources[0x4b]	685	1			T1	16		T28	25		T45	8
valid_sources[0x4c]	766	1			T1	15		T23	16		T44	1
valid_sources[0x4d]	473	1			T1	22		T27	2		T28	2
valid_sources[0x4e]	577	1			T1	16		T6	1		T44	1
valid_sources[0x4f]	811	1			T1	12		T6	1		T14	1
valid_sources[0x50]	637	1			T1	15		T27	115		T23	2
valid_sources[0x51]	681	1			T1	13		T11	1		T28	15
valid_sources[0x52]	886	1			T1	19		T27	87		T28	1
valid_sources[0x53]	577	1			T1	13		T6	6		T28	15
valid_sources[0x54]	645	1			T1	10		T27	3		T14	1
valid_sources[0x55]	962	1			T1	16		T27	1		T28	20
valid_sources[0x56]	666	1			T1	8		T6	1		T45	16
valid_sources[0x57]	526	1			T1	9		T27	1		T23	3
valid_sources[0x58]	535	1			T1	15		T44	4		T28	2
valid_sources[0x59]	636	1			T1	11		T23	4		T28	4
valid_sources[0x5a]	547	1			T1	16		T6	7		T14	1
valid_sources[0x5b]	489	1			T1	15		T6	5		T17	1
valid_sources[0x5c]	505	1			T1	14		T28	7		T45	7
valid_sources[0x5d]	621	1			T1	11		T45	5		T91	1
valid_sources[0x5e]	698	1			T1	14		T28	20		T45	1
valid_sources[0x5f]	742	1			T1	12		T6	4		T17	2
valid_sources[0x60]	496	1			T1	23		T13	1		T27	1
valid_sources[0x61]	1019	1			T1	17		T27	110		T28	17
valid_sources[0x62]	531	1			T1	13		T28	8		T45	18
valid_sources[0x63]	711	1			T1	14		T15	17		T28	2
valid_sources[0x64]	467	1			T1	17		T6	2		T28	1
valid_sources[0x65]	846	1			T1	4		T27	143		T23	6
valid_sources[0x66]	618	1			T1	11		T27	1		T44	1
valid_sources[0x67]	691	1			T1	15		T27	91		T28	10
valid_sources[0x68]	581	1			T1	18		T27	10		T28	2
valid_sources[0x69]	729	1			T1	17		T17	1		T28	21
valid_sources[0x6a]	791	1			T1	12		T28	45		T45	4
valid_sources[0x6b]	636	1			T1	16		T13	2		T14	1
valid_sources[0x6c]	905	1			T1	12		T45	7		T46	25
valid_sources[0x6d]	775	1			T1	9		T6	5		T28	20
valid_sources[0x6e]	513	1			T1	12		T6	2		T27	3
valid_sources[0x6f]	771	1			T1	21		T27	1		T45	11
valid_sources[0x70]	532	1			T1	19		T28	9		T45	6
valid_sources[0x71]	856	1			T1	12		T11	1		T6	1
valid_sources[0x72]	629	1			T1	18		T28	41		T45	5
valid_sources[0x73]	475	1			T1	11		T27	1		T45	16
valid_sources[0x74]	858	1			T1	24		T14	1		T23	20
valid_sources[0x75]	611	1			T1	22		T28	21		T45	8
valid_sources[0x76]	590	1			T1	18		T45	8		T91	1
valid_sources[0x77]	564	1			T1	17		T13	1		T45	9
valid_sources[0x78]	440	1			T1	20		T55	1		T23	4
valid_sources[0x79]	828	1			T1	21		T27	2		T23	8
valid_sources[0x7a]	575	1			T1	17		T28	7		T45	15
valid_sources[0x7b]	764	1			T1	13		T28	10		T45	8
valid_sources[0x7c]	578	1			T1	23		T28	36		T45	1
valid_sources[0x7d]	535	1			T1	11		T28	9		T45	5
valid_sources[0x7e]	640	1			T1	14		T11	2		T43	1
valid_sources[0x7f]	850	1			T1	6		T45	14		T46	15
valid_sources[0x80]	809	1			T1	16		T27	6		T43	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

38943

1

T1

911

T6

12

T13

8

values[0x0]

all_enables

biggest_size

51996

1

T1

1338

T3

1

T9

9

values[0x1]

all_enables

biggest_size

49914

1

T1

1325

T9

3

T10

1