| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2237136688 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2128460759 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1095000377 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2833715461 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1931993580 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2576951051 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.654286467 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.991906139 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1636760468 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.268723216 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.4078982847 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.775825705 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2120549852 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2755784459 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.935381709 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3366312378 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.783273596 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3788467940 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.368278196 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3952799420 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2712243847 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3530314428 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.892706173 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2292496294 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2853966398 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1548621705 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1968872229 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3835317098 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.703969169 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3820101165 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1230070738 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2994641890 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3601862595 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1163178405 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2167320002 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2915026684 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2612704944 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1258984359 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2041670625 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3071521082 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1846879230 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1562274969 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1572426339 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.823087700 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2820366634 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4222103093 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.4171764869 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1809772886 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2002366263 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2097422402 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.640621459 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2517325046 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.145475783 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.966809326 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1664441672 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2792398765 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3685459924 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3137468458 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4171074482 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2226692627 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1045945627 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3437987093 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.365182880 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.802972583 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.4145690864 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1112555166 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4089132532 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3301122944 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1200333465 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.160655556 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4012560708 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3355406328 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2959569951 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.4063411898 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.73512722 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3264060351 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4137786181 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1647654301 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.283843978 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.556119286 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.418075975 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3717078913 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3472067296 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2420831805 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2812618266 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.459427271 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1399504426 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.453705538 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1717840411 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.250599924 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1109248284 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1510388058 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1787864841 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.568098759 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1030298496 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2746652440 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3006923187 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.707076846 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3968982379 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.54233386 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1386836489 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2163752531 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3850857901 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.819280122 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1727208593 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.368724418 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1071807822 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2498052283 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2574631518 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.254850298 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2604314871 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.49406589 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.86951418 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1065150648 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1646198786 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2699822780 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3443705318 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2793900468 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.201340612 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1455951094 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.316443993 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.427627503 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2928670621 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1308927798 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.371152079 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3107375982 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3887260368 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.132587353 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.545750974 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.326119832 |
| /workspace/coverage/default/0.sram_ctrl_bijection.4237101786 |
| /workspace/coverage/default/0.sram_ctrl_executable.2094951530 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.417689959 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.1450968558 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2421665254 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.103813150 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.659873691 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.2442396557 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4069166658 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.3255077678 |
| /workspace/coverage/default/0.sram_ctrl_regwen.3359431135 |
| /workspace/coverage/default/0.sram_ctrl_smoke.3241645113 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.733788807 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1210684987 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.316278920 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3412688770 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.628767255 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.3417643899 |
| /workspace/coverage/default/1.sram_ctrl_bijection.3683444445 |
| /workspace/coverage/default/1.sram_ctrl_executable.1712237071 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.867082055 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.4123835209 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1408394867 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.767845790 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.3800462559 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.1308500289 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.91514539 |
| /workspace/coverage/default/1.sram_ctrl_regwen.4153025151 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.4129684762 |
| /workspace/coverage/default/1.sram_ctrl_smoke.2189895960 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.4248822168 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1120104471 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2158436699 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.4200294409 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.1228111347 |
| /workspace/coverage/default/10.sram_ctrl_bijection.4183542252 |
| /workspace/coverage/default/10.sram_ctrl_executable.2903761973 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.1205505822 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.1690393683 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.3012253690 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.1942319257 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.3176981261 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.2912994761 |
| /workspace/coverage/default/10.sram_ctrl_regwen.1405716969 |
| /workspace/coverage/default/10.sram_ctrl_smoke.3514871269 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.21203687 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2109337340 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2958891314 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2709979787 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.82491680 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.3618656532 |
| /workspace/coverage/default/11.sram_ctrl_bijection.3855496863 |
| /workspace/coverage/default/11.sram_ctrl_executable.3668851158 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.548793127 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.1472628820 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1265227952 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.754381756 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.2978907290 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.1458652977 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3533992374 |
| /workspace/coverage/default/11.sram_ctrl_regwen.2958409298 |
| /workspace/coverage/default/11.sram_ctrl_smoke.1451623577 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.284372831 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.474450668 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1947210706 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3830904979 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.2184087342 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.3924129729 |
| /workspace/coverage/default/12.sram_ctrl_bijection.3345946263 |
| /workspace/coverage/default/12.sram_ctrl_executable.2125001683 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.1153998450 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.3806771154 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.3529894113 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.2157730553 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.1712009436 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.539812672 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.1226448077 |
| /workspace/coverage/default/12.sram_ctrl_regwen.806611907 |
| /workspace/coverage/default/12.sram_ctrl_smoke.231898172 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.2394920623 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1380989828 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3302118979 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3478802833 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.13284241 |
| /workspace/coverage/default/13.sram_ctrl_bijection.2945155174 |
| /workspace/coverage/default/13.sram_ctrl_executable.3616270264 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.3150714774 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.3688840044 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.3692461779 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.3257183358 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.3038105186 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.735105531 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.841478870 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.3361545871 |
| /workspace/coverage/default/13.sram_ctrl_regwen.4119951434 |
| /workspace/coverage/default/13.sram_ctrl_smoke.37829154 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.2783131667 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3733182249 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.681575387 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2959820236 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.3504183931 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.2147822454 |
| /workspace/coverage/default/14.sram_ctrl_bijection.643536659 |
| /workspace/coverage/default/14.sram_ctrl_executable.2250413719 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.4250599641 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.1429774177 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2378696323 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.384665644 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.3626155177 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.949606920 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3602986002 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.3527083099 |
| /workspace/coverage/default/14.sram_ctrl_regwen.3996222460 |
| /workspace/coverage/default/14.sram_ctrl_smoke.4111784330 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.2207003980 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.593700353 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.1006567456 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3171174544 |
| /workspace/coverage/default/15.sram_ctrl_access_during_key_req.1564593056 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.1436658916 |
| /workspace/coverage/default/15.sram_ctrl_bijection.1021329781 |
| /workspace/coverage/default/15.sram_ctrl_executable.651087512 |
| /workspace/coverage/default/15.sram_ctrl_lc_escalation.2171980465 |
| /workspace/coverage/default/15.sram_ctrl_max_throughput.1448680193 |
| /workspace/coverage/default/15.sram_ctrl_mem_partial_access.97378030 |
| /workspace/coverage/default/15.sram_ctrl_mem_walk.2754258676 |
| /workspace/coverage/default/15.sram_ctrl_multiple_keys.1133159283 |
| /workspace/coverage/default/15.sram_ctrl_partial_access.2885355154 |
| /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2414961390 |
| /workspace/coverage/default/15.sram_ctrl_ram_cfg.2962175599 |
| /workspace/coverage/default/15.sram_ctrl_regwen.487832970 |
| /workspace/coverage/default/15.sram_ctrl_smoke.2617582397 |
| /workspace/coverage/default/15.sram_ctrl_stress_all.3230734167 |
| /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1828017251 |
| /workspace/coverage/default/15.sram_ctrl_stress_pipeline.2239298512 |
| /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1224182464 |
| /workspace/coverage/default/16.sram_ctrl_access_during_key_req.3123893054 |
| /workspace/coverage/default/16.sram_ctrl_alert_test.2841197503 |
| /workspace/coverage/default/16.sram_ctrl_bijection.2348822127 |
| /workspace/coverage/default/16.sram_ctrl_executable.392816748 |
| /workspace/coverage/default/16.sram_ctrl_lc_escalation.1219331213 |
| /workspace/coverage/default/16.sram_ctrl_max_throughput.2214030577 |
| /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2356178085 |
| /workspace/coverage/default/16.sram_ctrl_mem_walk.3003150859 |
| /workspace/coverage/default/16.sram_ctrl_multiple_keys.3778748721 |
| /workspace/coverage/default/16.sram_ctrl_partial_access.1867347083 |
| /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.4235088383 |
| /workspace/coverage/default/16.sram_ctrl_ram_cfg.3402475222 |
| /workspace/coverage/default/16.sram_ctrl_regwen.3643391239 |
| /workspace/coverage/default/16.sram_ctrl_smoke.1121096988 |
| /workspace/coverage/default/16.sram_ctrl_stress_all.2335194213 |
| /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.561727958 |
| /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1303833647 |
| /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2360303458 |
| /workspace/coverage/default/17.sram_ctrl_access_during_key_req.455184498 |
| /workspace/coverage/default/17.sram_ctrl_alert_test.2927415168 |
| /workspace/coverage/default/17.sram_ctrl_bijection.894736932 |
| /workspace/coverage/default/17.sram_ctrl_executable.3319983974 |
| /workspace/coverage/default/17.sram_ctrl_lc_escalation.3797849986 |
| /workspace/coverage/default/17.sram_ctrl_max_throughput.1616672591 |
| /workspace/coverage/default/17.sram_ctrl_mem_partial_access.790280389 |
| /workspace/coverage/default/17.sram_ctrl_mem_walk.420864539 |
| /workspace/coverage/default/17.sram_ctrl_multiple_keys.206681079 |
| /workspace/coverage/default/17.sram_ctrl_partial_access.4155754923 |
| /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3113692063 |
| /workspace/coverage/default/17.sram_ctrl_ram_cfg.2128765766 |
| /workspace/coverage/default/17.sram_ctrl_regwen.2644389842 |
| /workspace/coverage/default/17.sram_ctrl_smoke.963616783 |
| /workspace/coverage/default/17.sram_ctrl_stress_all.3161233362 |
| /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1037529342 |
| /workspace/coverage/default/17.sram_ctrl_stress_pipeline.1156531223 |
| /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2031022739 |
| /workspace/coverage/default/18.sram_ctrl_access_during_key_req.518855909 |
| /workspace/coverage/default/18.sram_ctrl_alert_test.505931683 |
| /workspace/coverage/default/18.sram_ctrl_bijection.2495321627 |
| /workspace/coverage/default/18.sram_ctrl_executable.902858554 |
| /workspace/coverage/default/18.sram_ctrl_lc_escalation.2304906263 |
| /workspace/coverage/default/18.sram_ctrl_max_throughput.3631147850 |
| /workspace/coverage/default/18.sram_ctrl_mem_partial_access.4276942017 |
| /workspace/coverage/default/18.sram_ctrl_mem_walk.3205090148 |
| /workspace/coverage/default/18.sram_ctrl_multiple_keys.785504639 |
| /workspace/coverage/default/18.sram_ctrl_partial_access.3352846487 |
| /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3276667035 |
| /workspace/coverage/default/18.sram_ctrl_ram_cfg.1533144797 |
| /workspace/coverage/default/18.sram_ctrl_regwen.1696080898 |
| /workspace/coverage/default/18.sram_ctrl_smoke.1460401902 |
| /workspace/coverage/default/18.sram_ctrl_stress_all.2818728366 |
| /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3021552167 |
| /workspace/coverage/default/18.sram_ctrl_stress_pipeline.352088209 |
| /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3439098707 |
| /workspace/coverage/default/19.sram_ctrl_access_during_key_req.1919272693 |
| /workspace/coverage/default/19.sram_ctrl_alert_test.2490375852 |
| /workspace/coverage/default/19.sram_ctrl_bijection.739843437 |
| /workspace/coverage/default/19.sram_ctrl_executable.23823680 |
| /workspace/coverage/default/19.sram_ctrl_lc_escalation.607229931 |
| /workspace/coverage/default/19.sram_ctrl_max_throughput.1317569672 |
| /workspace/coverage/default/19.sram_ctrl_mem_partial_access.3871833925 |
| /workspace/coverage/default/19.sram_ctrl_mem_walk.4161390700 |
| /workspace/coverage/default/19.sram_ctrl_multiple_keys.2757723220 |
| /workspace/coverage/default/19.sram_ctrl_partial_access.2037068967 |
| /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3621574779 |
| /workspace/coverage/default/19.sram_ctrl_ram_cfg.3301897465 |
| /workspace/coverage/default/19.sram_ctrl_regwen.3612237247 |
| /workspace/coverage/default/19.sram_ctrl_smoke.881438351 |
| /workspace/coverage/default/19.sram_ctrl_stress_all.3529333757 |
| /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.775932019 |
| /workspace/coverage/default/19.sram_ctrl_stress_pipeline.3871221552 |
| /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1722354685 |
| /workspace/coverage/default/2.sram_ctrl_access_during_key_req.4077988622 |
| /workspace/coverage/default/2.sram_ctrl_alert_test.765838406 |
| /workspace/coverage/default/2.sram_ctrl_bijection.3629334245 |
| /workspace/coverage/default/2.sram_ctrl_executable.1987706839 |
| /workspace/coverage/default/2.sram_ctrl_lc_escalation.541362919 |
| /workspace/coverage/default/2.sram_ctrl_max_throughput.758608067 |
| /workspace/coverage/default/2.sram_ctrl_mem_partial_access.2198194025 |
| /workspace/coverage/default/2.sram_ctrl_mem_walk.917326062 |
| /workspace/coverage/default/2.sram_ctrl_multiple_keys.3464448315 |
| /workspace/coverage/default/2.sram_ctrl_partial_access.169162944 |
| /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1876840706 |
| /workspace/coverage/default/2.sram_ctrl_ram_cfg.3613632834 |
| /workspace/coverage/default/2.sram_ctrl_regwen.3607776383 |
| /workspace/coverage/default/2.sram_ctrl_sec_cm.51621383 |
| /workspace/coverage/default/2.sram_ctrl_smoke.3387755455 |
| /workspace/coverage/default/2.sram_ctrl_stress_all.162927283 |
| /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.4247312428 |
| /workspace/coverage/default/2.sram_ctrl_stress_pipeline.2217305503 |
| /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3755277733 |
| /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1731034935 |
| /workspace/coverage/default/20.sram_ctrl_alert_test.1874342038 |
| /workspace/coverage/default/20.sram_ctrl_bijection.4191998526 |
| /workspace/coverage/default/20.sram_ctrl_executable.3941298193 |
| /workspace/coverage/default/20.sram_ctrl_lc_escalation.3164054034 |
| /workspace/coverage/default/20.sram_ctrl_max_throughput.2330097305 |
| /workspace/coverage/default/20.sram_ctrl_mem_partial_access.616604000 |
| /workspace/coverage/default/20.sram_ctrl_mem_walk.2289852677 |
| /workspace/coverage/default/20.sram_ctrl_multiple_keys.275365124 |
| /workspace/coverage/default/20.sram_ctrl_partial_access.3449891420 |
| /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.743720266 |
| /workspace/coverage/default/20.sram_ctrl_ram_cfg.381743254 |
| /workspace/coverage/default/20.sram_ctrl_regwen.1497044679 |
| /workspace/coverage/default/20.sram_ctrl_smoke.3207166667 |
| /workspace/coverage/default/20.sram_ctrl_stress_all.2570246523 |
| /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.183368527 |
| /workspace/coverage/default/20.sram_ctrl_stress_pipeline.393090574 |
| /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.1416976021 |
| /workspace/coverage/default/21.sram_ctrl_access_during_key_req.4003957076 |
| /workspace/coverage/default/21.sram_ctrl_alert_test.3992858111 |
| /workspace/coverage/default/21.sram_ctrl_bijection.1251480102 |
| /workspace/coverage/default/21.sram_ctrl_executable.2586497045 |
| /workspace/coverage/default/21.sram_ctrl_lc_escalation.3137465658 |
| /workspace/coverage/default/21.sram_ctrl_max_throughput.3823786870 |
| /workspace/coverage/default/21.sram_ctrl_mem_partial_access.1707314615 |
| /workspace/coverage/default/21.sram_ctrl_mem_walk.2595389054 |
| /workspace/coverage/default/21.sram_ctrl_multiple_keys.984786202 |
| /workspace/coverage/default/21.sram_ctrl_partial_access.241498553 |
| /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1640379791 |
| /workspace/coverage/default/21.sram_ctrl_ram_cfg.4189068206 |
| /workspace/coverage/default/21.sram_ctrl_regwen.3399026243 |
| /workspace/coverage/default/21.sram_ctrl_smoke.1392606361 |
| /workspace/coverage/default/21.sram_ctrl_stress_all.2301807531 |
| /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2292273486 |
| /workspace/coverage/default/21.sram_ctrl_stress_pipeline.490551611 |
| /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.4141852200 |
| /workspace/coverage/default/22.sram_ctrl_access_during_key_req.61742345 |
| /workspace/coverage/default/22.sram_ctrl_alert_test.4190713396 |
| /workspace/coverage/default/22.sram_ctrl_bijection.270058749 |
| /workspace/coverage/default/22.sram_ctrl_executable.1050627009 |
| /workspace/coverage/default/22.sram_ctrl_lc_escalation.3755508337 |
| /workspace/coverage/default/22.sram_ctrl_max_throughput.928008198 |
| /workspace/coverage/default/22.sram_ctrl_mem_partial_access.2068094212 |
| /workspace/coverage/default/22.sram_ctrl_mem_walk.2082933438 |
| /workspace/coverage/default/22.sram_ctrl_multiple_keys.874392141 |
| /workspace/coverage/default/22.sram_ctrl_partial_access.438899052 |
| /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1900911366 |
| /workspace/coverage/default/22.sram_ctrl_ram_cfg.337585496 |
| /workspace/coverage/default/22.sram_ctrl_regwen.1035582963 |
| /workspace/coverage/default/22.sram_ctrl_smoke.3578991499 |
| /workspace/coverage/default/22.sram_ctrl_stress_all.802753074 |
| /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3401827722 |
| /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3522970042 |
| /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2296444271 |
| /workspace/coverage/default/23.sram_ctrl_access_during_key_req.1201255192 |
| /workspace/coverage/default/23.sram_ctrl_alert_test.4269952797 |
| /workspace/coverage/default/23.sram_ctrl_bijection.3581392370 |
| /workspace/coverage/default/23.sram_ctrl_executable.2261085554 |
| /workspace/coverage/default/23.sram_ctrl_lc_escalation.159470553 |
| /workspace/coverage/default/23.sram_ctrl_max_throughput.1701289767 |
| /workspace/coverage/default/23.sram_ctrl_mem_partial_access.990598439 |
| /workspace/coverage/default/23.sram_ctrl_mem_walk.447182838 |
| /workspace/coverage/default/23.sram_ctrl_multiple_keys.4274574416 |
| /workspace/coverage/default/23.sram_ctrl_partial_access.2880213413 |
| /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.2413183860 |
| /workspace/coverage/default/23.sram_ctrl_ram_cfg.1570147378 |
| /workspace/coverage/default/23.sram_ctrl_regwen.2566050615 |
| /workspace/coverage/default/23.sram_ctrl_smoke.1005311637 |
| /workspace/coverage/default/23.sram_ctrl_stress_all.4267755188 |
| /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2358345689 |
| /workspace/coverage/default/23.sram_ctrl_stress_pipeline.700655485 |
| /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2499690635 |
| /workspace/coverage/default/24.sram_ctrl_access_during_key_req.3880434545 |
| /workspace/coverage/default/24.sram_ctrl_alert_test.576632701 |
| /workspace/coverage/default/24.sram_ctrl_bijection.4014153613 |
| /workspace/coverage/default/24.sram_ctrl_executable.2857071348 |
| /workspace/coverage/default/24.sram_ctrl_lc_escalation.578940753 |
| /workspace/coverage/default/24.sram_ctrl_max_throughput.3617409781 |
| /workspace/coverage/default/24.sram_ctrl_mem_partial_access.1945404904 |
| /workspace/coverage/default/24.sram_ctrl_mem_walk.1704482085 |
| /workspace/coverage/default/24.sram_ctrl_multiple_keys.4115266823 |
| /workspace/coverage/default/24.sram_ctrl_partial_access.2967704591 |
| /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1142297637 |
| /workspace/coverage/default/24.sram_ctrl_ram_cfg.2435504747 |
| /workspace/coverage/default/24.sram_ctrl_regwen.1520388165 |
| /workspace/coverage/default/24.sram_ctrl_smoke.483621384 |
| /workspace/coverage/default/24.sram_ctrl_stress_all.4050782487 |
| /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1231169411 |
| /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1427664762 |
| /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1996173972 |
| /workspace/coverage/default/25.sram_ctrl_access_during_key_req.3204340858 |
| /workspace/coverage/default/25.sram_ctrl_alert_test.2943469904 |
| /workspace/coverage/default/25.sram_ctrl_bijection.127870268 |
| /workspace/coverage/default/25.sram_ctrl_executable.463474426 |
| /workspace/coverage/default/25.sram_ctrl_lc_escalation.688139854 |
| /workspace/coverage/default/25.sram_ctrl_max_throughput.2190671682 |
| /workspace/coverage/default/25.sram_ctrl_mem_partial_access.3109984553 |
| /workspace/coverage/default/25.sram_ctrl_mem_walk.1338220679 |
| /workspace/coverage/default/25.sram_ctrl_multiple_keys.995942041 |
| /workspace/coverage/default/25.sram_ctrl_partial_access.2396534820 |
| /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1995988802 |
| /workspace/coverage/default/25.sram_ctrl_ram_cfg.73421634 |
| /workspace/coverage/default/25.sram_ctrl_regwen.1663788233 |
| /workspace/coverage/default/25.sram_ctrl_smoke.4019881825 |
| /workspace/coverage/default/25.sram_ctrl_stress_all.1324868996 |
| /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1731993167 |
| /workspace/coverage/default/25.sram_ctrl_stress_pipeline.244057946 |
| /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.725759552 |
| /workspace/coverage/default/26.sram_ctrl_access_during_key_req.4149936808 |
| /workspace/coverage/default/26.sram_ctrl_alert_test.3566967734 |
| /workspace/coverage/default/26.sram_ctrl_bijection.2417202141 |
| /workspace/coverage/default/26.sram_ctrl_executable.2874248592 |
| /workspace/coverage/default/26.sram_ctrl_lc_escalation.2938973988 |
| /workspace/coverage/default/26.sram_ctrl_max_throughput.2693806663 |
| /workspace/coverage/default/26.sram_ctrl_mem_partial_access.3012863635 |
| /workspace/coverage/default/26.sram_ctrl_mem_walk.4126873765 |
| /workspace/coverage/default/26.sram_ctrl_multiple_keys.1725572129 |
| /workspace/coverage/default/26.sram_ctrl_partial_access.776835933 |
| /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1206510955 |
| /workspace/coverage/default/26.sram_ctrl_ram_cfg.2880155124 |
| /workspace/coverage/default/26.sram_ctrl_regwen.2336181506 |
| /workspace/coverage/default/26.sram_ctrl_smoke.3754503791 |
| /workspace/coverage/default/26.sram_ctrl_stress_all.2424473646 |
| /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.308034659 |
| /workspace/coverage/default/26.sram_ctrl_stress_pipeline.236225982 |
| /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.165682815 |
| /workspace/coverage/default/27.sram_ctrl_access_during_key_req.3202324543 |
| /workspace/coverage/default/27.sram_ctrl_alert_test.277717406 |
| /workspace/coverage/default/27.sram_ctrl_bijection.2345578024 |
| /workspace/coverage/default/27.sram_ctrl_executable.1901262462 |
| /workspace/coverage/default/27.sram_ctrl_lc_escalation.3983383912 |
| /workspace/coverage/default/27.sram_ctrl_max_throughput.1972264384 |
| /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2398878274 |
| /workspace/coverage/default/27.sram_ctrl_mem_walk.440026156 |
| /workspace/coverage/default/27.sram_ctrl_multiple_keys.1262897230 |
| /workspace/coverage/default/27.sram_ctrl_partial_access.2598008002 |
| /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3691983464 |
| /workspace/coverage/default/27.sram_ctrl_ram_cfg.465631891 |
| /workspace/coverage/default/27.sram_ctrl_regwen.860922077 |
| /workspace/coverage/default/27.sram_ctrl_smoke.1972525885 |
| /workspace/coverage/default/27.sram_ctrl_stress_all.659529174 |
| /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2996834001 |
| /workspace/coverage/default/27.sram_ctrl_stress_pipeline.3747407032 |
| /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.258591787 |
| /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1605652180 |
| /workspace/coverage/default/28.sram_ctrl_alert_test.3966426275 |
| /workspace/coverage/default/28.sram_ctrl_bijection.2855848638 |
| /workspace/coverage/default/28.sram_ctrl_executable.3580364691 |
| /workspace/coverage/default/28.sram_ctrl_lc_escalation.1333170724 |
| /workspace/coverage/default/28.sram_ctrl_max_throughput.71002185 |
| /workspace/coverage/default/28.sram_ctrl_mem_partial_access.2860262747 |
| /workspace/coverage/default/28.sram_ctrl_mem_walk.3058140027 |
| /workspace/coverage/default/28.sram_ctrl_multiple_keys.3967484009 |
| /workspace/coverage/default/28.sram_ctrl_partial_access.2366911103 |
| /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3659230216 |
| /workspace/coverage/default/28.sram_ctrl_ram_cfg.628701316 |
| /workspace/coverage/default/28.sram_ctrl_regwen.929612276 |
| /workspace/coverage/default/28.sram_ctrl_smoke.2107377463 |
| /workspace/coverage/default/28.sram_ctrl_stress_all.1047822293 |
| /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2668884924 |
| /workspace/coverage/default/28.sram_ctrl_stress_pipeline.1034281452 |
| /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3348151706 |
| /workspace/coverage/default/29.sram_ctrl_access_during_key_req.2533526365 |
| /workspace/coverage/default/29.sram_ctrl_alert_test.3372057343 |
| /workspace/coverage/default/29.sram_ctrl_bijection.832403969 |
| /workspace/coverage/default/29.sram_ctrl_executable.4077332817 |
| /workspace/coverage/default/29.sram_ctrl_lc_escalation.442112434 |
| /workspace/coverage/default/29.sram_ctrl_max_throughput.1610613960 |
| /workspace/coverage/default/29.sram_ctrl_mem_partial_access.1645934926 |
| /workspace/coverage/default/29.sram_ctrl_mem_walk.3968371640 |
| /workspace/coverage/default/29.sram_ctrl_multiple_keys.1582995559 |
| /workspace/coverage/default/29.sram_ctrl_partial_access.2039696970 |
| /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1545611182 |
| /workspace/coverage/default/29.sram_ctrl_ram_cfg.1423633693 |
| /workspace/coverage/default/29.sram_ctrl_regwen.3552905812 |
| /workspace/coverage/default/29.sram_ctrl_smoke.1418090034 |
| /workspace/coverage/default/29.sram_ctrl_stress_all.2702350955 |
| /workspace/coverage/default/29.sram_ctrl_stress_pipeline.3362614639 |
| /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3583144164 |
| /workspace/coverage/default/3.sram_ctrl_access_during_key_req.1226017202 |
| /workspace/coverage/default/3.sram_ctrl_alert_test.3071414754 |
| /workspace/coverage/default/3.sram_ctrl_bijection.1969602109 |
| /workspace/coverage/default/3.sram_ctrl_executable.862583315 |
| /workspace/coverage/default/3.sram_ctrl_lc_escalation.973429903 |
| /workspace/coverage/default/3.sram_ctrl_max_throughput.466096105 |
| /workspace/coverage/default/3.sram_ctrl_mem_partial_access.4226429934 |
| /workspace/coverage/default/3.sram_ctrl_mem_walk.1520519232 |
| /workspace/coverage/default/3.sram_ctrl_multiple_keys.2679813269 |
| /workspace/coverage/default/3.sram_ctrl_partial_access.1618862828 |
| /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3556666105 |
| /workspace/coverage/default/3.sram_ctrl_ram_cfg.2536899874 |
| /workspace/coverage/default/3.sram_ctrl_regwen.526304804 |
| /workspace/coverage/default/3.sram_ctrl_sec_cm.1841804087 |
| /workspace/coverage/default/3.sram_ctrl_smoke.641147827 |
| /workspace/coverage/default/3.sram_ctrl_stress_all.3732169111 |
| /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1246758521 |
| /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1527542539 |
| /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2231762151 |
| /workspace/coverage/default/30.sram_ctrl_access_during_key_req.2183076229 |
| /workspace/coverage/default/30.sram_ctrl_alert_test.3896094140 |
| /workspace/coverage/default/30.sram_ctrl_bijection.2534887337 |
| /workspace/coverage/default/30.sram_ctrl_executable.3691824267 |
| /workspace/coverage/default/30.sram_ctrl_lc_escalation.1680811572 |
| /workspace/coverage/default/30.sram_ctrl_max_throughput.1683911813 |
| /workspace/coverage/default/30.sram_ctrl_mem_partial_access.138930624 |
| /workspace/coverage/default/30.sram_ctrl_mem_walk.4214877540 |
| /workspace/coverage/default/30.sram_ctrl_multiple_keys.468741739 |
| /workspace/coverage/default/30.sram_ctrl_partial_access.1379192922 |
| /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.2612075955 |
| /workspace/coverage/default/30.sram_ctrl_ram_cfg.1533500946 |
| /workspace/coverage/default/30.sram_ctrl_regwen.3706844223 |
| /workspace/coverage/default/30.sram_ctrl_smoke.3227174646 |
| /workspace/coverage/default/30.sram_ctrl_stress_all.3178769354 |
| /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1374553946 |
| /workspace/coverage/default/30.sram_ctrl_stress_pipeline.1360666894 |
| /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3754340289 |
| /workspace/coverage/default/31.sram_ctrl_access_during_key_req.3237345510 |
| /workspace/coverage/default/31.sram_ctrl_alert_test.3951039711 |
| /workspace/coverage/default/31.sram_ctrl_bijection.2408680317 |
| /workspace/coverage/default/31.sram_ctrl_executable.2279616116 |
| /workspace/coverage/default/31.sram_ctrl_lc_escalation.613001761 |
| /workspace/coverage/default/31.sram_ctrl_max_throughput.2693055601 |
| /workspace/coverage/default/31.sram_ctrl_mem_partial_access.2065638785 |
| /workspace/coverage/default/31.sram_ctrl_mem_walk.3076342000 |
| /workspace/coverage/default/31.sram_ctrl_multiple_keys.4039069403 |
| /workspace/coverage/default/31.sram_ctrl_partial_access.3052646992 |
| /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2360789448 |
| /workspace/coverage/default/31.sram_ctrl_ram_cfg.3876506917 |
| /workspace/coverage/default/31.sram_ctrl_regwen.1089898857 |
| /workspace/coverage/default/31.sram_ctrl_smoke.3709122111 |
| /workspace/coverage/default/31.sram_ctrl_stress_all.2037843588 |
| /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.908763887 |
| /workspace/coverage/default/31.sram_ctrl_stress_pipeline.3978547893 |
| /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3640199310 |
| /workspace/coverage/default/32.sram_ctrl_alert_test.2460266405 |
| /workspace/coverage/default/32.sram_ctrl_bijection.1826871919 |
| /workspace/coverage/default/32.sram_ctrl_executable.1587569778 |
| /workspace/coverage/default/32.sram_ctrl_lc_escalation.2676331020 |
| /workspace/coverage/default/32.sram_ctrl_max_throughput.1272798545 |
| /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3771093059 |
| /workspace/coverage/default/32.sram_ctrl_mem_walk.568696527 |
| /workspace/coverage/default/32.sram_ctrl_multiple_keys.4246509286 |
| /workspace/coverage/default/32.sram_ctrl_partial_access.417504380 |
| /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1037071794 |
| /workspace/coverage/default/32.sram_ctrl_ram_cfg.2258852802 |
| /workspace/coverage/default/32.sram_ctrl_regwen.3107412966 |
| /workspace/coverage/default/32.sram_ctrl_smoke.1507081169 |
| /workspace/coverage/default/32.sram_ctrl_stress_all.2636909173 |
| /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3696674049 |
| /workspace/coverage/default/32.sram_ctrl_stress_pipeline.4202138064 |
| /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3733958445 |
| /workspace/coverage/default/33.sram_ctrl_access_during_key_req.959814940 |
| /workspace/coverage/default/33.sram_ctrl_alert_test.3268886797 |
| /workspace/coverage/default/33.sram_ctrl_bijection.2790909536 |
| /workspace/coverage/default/33.sram_ctrl_executable.3172047296 |
| /workspace/coverage/default/33.sram_ctrl_lc_escalation.3087408410 |
| /workspace/coverage/default/33.sram_ctrl_max_throughput.3143069410 |
| /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1787225800 |
| /workspace/coverage/default/33.sram_ctrl_mem_walk.3343386147 |
| /workspace/coverage/default/33.sram_ctrl_multiple_keys.3948040569 |
| /workspace/coverage/default/33.sram_ctrl_partial_access.4210593572 |
| /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1350400099 |
| /workspace/coverage/default/33.sram_ctrl_ram_cfg.3789381366 |
| /workspace/coverage/default/33.sram_ctrl_regwen.2807788669 |
| /workspace/coverage/default/33.sram_ctrl_smoke.3578497308 |
| /workspace/coverage/default/33.sram_ctrl_stress_all.3604568155 |
| /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1855907220 |
| /workspace/coverage/default/33.sram_ctrl_stress_pipeline.4186128719 |
| /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3294353363 |
| /workspace/coverage/default/34.sram_ctrl_access_during_key_req.1717521524 |
| /workspace/coverage/default/34.sram_ctrl_alert_test.1090674934 |
| /workspace/coverage/default/34.sram_ctrl_bijection.1026658472 |
| /workspace/coverage/default/34.sram_ctrl_executable.307954787 |
| /workspace/coverage/default/34.sram_ctrl_lc_escalation.3629951726 |
| /workspace/coverage/default/34.sram_ctrl_max_throughput.4200706029 |
| /workspace/coverage/default/34.sram_ctrl_mem_partial_access.321733557 |
| /workspace/coverage/default/34.sram_ctrl_mem_walk.3338415594 |
| /workspace/coverage/default/34.sram_ctrl_multiple_keys.840744949 |
| /workspace/coverage/default/34.sram_ctrl_partial_access.920810125 |
| /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1391869184 |
| /workspace/coverage/default/34.sram_ctrl_ram_cfg.2337929739 |
| /workspace/coverage/default/34.sram_ctrl_regwen.3552414902 |
| /workspace/coverage/default/34.sram_ctrl_smoke.2028961106 |
| /workspace/coverage/default/34.sram_ctrl_stress_all.1979538462 |
| /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3914207370 |
| /workspace/coverage/default/34.sram_ctrl_stress_pipeline.3236332094 |
| /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.669787286 |
| /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2791852422 |
| /workspace/coverage/default/35.sram_ctrl_alert_test.2177380827 |
| /workspace/coverage/default/35.sram_ctrl_bijection.1010086345 |
| /workspace/coverage/default/35.sram_ctrl_executable.3715460264 |
| /workspace/coverage/default/35.sram_ctrl_lc_escalation.1965475937 |
| /workspace/coverage/default/35.sram_ctrl_max_throughput.2453238540 |
| /workspace/coverage/default/35.sram_ctrl_mem_partial_access.1304387846 |
| /workspace/coverage/default/35.sram_ctrl_mem_walk.3186306617 |
| /workspace/coverage/default/35.sram_ctrl_multiple_keys.1821712683 |
| /workspace/coverage/default/35.sram_ctrl_partial_access.4064534861 |
| /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1895026626 |
| /workspace/coverage/default/35.sram_ctrl_ram_cfg.510031063 |
| /workspace/coverage/default/35.sram_ctrl_regwen.2039965307 |
| /workspace/coverage/default/35.sram_ctrl_smoke.2229323433 |
| /workspace/coverage/default/35.sram_ctrl_stress_all.2367718004 |
| /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.271105757 |
| /workspace/coverage/default/35.sram_ctrl_stress_pipeline.1667521152 |
| /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3579853649 |
| /workspace/coverage/default/36.sram_ctrl_access_during_key_req.654069295 |
| /workspace/coverage/default/36.sram_ctrl_alert_test.1201411803 |
| /workspace/coverage/default/36.sram_ctrl_bijection.1728327925 |
| /workspace/coverage/default/36.sram_ctrl_executable.796566656 |
| /workspace/coverage/default/36.sram_ctrl_lc_escalation.3872415173 |
| /workspace/coverage/default/36.sram_ctrl_max_throughput.3221290310 |
| /workspace/coverage/default/36.sram_ctrl_mem_partial_access.1429560508 |
| /workspace/coverage/default/36.sram_ctrl_mem_walk.2433710083 |
| /workspace/coverage/default/36.sram_ctrl_multiple_keys.1684356956 |
| /workspace/coverage/default/36.sram_ctrl_partial_access.3426079105 |
| /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2537385078 |
| /workspace/coverage/default/36.sram_ctrl_ram_cfg.359248285 |
| /workspace/coverage/default/36.sram_ctrl_regwen.3137806362 |
| /workspace/coverage/default/36.sram_ctrl_smoke.3723847339 |
| /workspace/coverage/default/36.sram_ctrl_stress_all.995467029 |
| /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.892502542 |
| /workspace/coverage/default/36.sram_ctrl_stress_pipeline.3448049586 |
| /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1275802410 |
| /workspace/coverage/default/37.sram_ctrl_access_during_key_req.494638594 |
| /workspace/coverage/default/37.sram_ctrl_alert_test.1825543206 |
| /workspace/coverage/default/37.sram_ctrl_bijection.2505052196 |
| /workspace/coverage/default/37.sram_ctrl_executable.2035385409 |
| /workspace/coverage/default/37.sram_ctrl_lc_escalation.2550165342 |
| /workspace/coverage/default/37.sram_ctrl_max_throughput.2941998698 |
| /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1635822544 |
| /workspace/coverage/default/37.sram_ctrl_mem_walk.2077526111 |
| /workspace/coverage/default/37.sram_ctrl_multiple_keys.2885061003 |
| /workspace/coverage/default/37.sram_ctrl_partial_access.3199187900 |
| /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3771980004 |
| /workspace/coverage/default/37.sram_ctrl_ram_cfg.4185679462 |
| /workspace/coverage/default/37.sram_ctrl_regwen.1455622029 |
| /workspace/coverage/default/37.sram_ctrl_smoke.4012135382 |
| /workspace/coverage/default/37.sram_ctrl_stress_all.3567131027 |
| /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2044482979 |
| /workspace/coverage/default/37.sram_ctrl_stress_pipeline.4268704096 |
| /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1780310143 |
| /workspace/coverage/default/38.sram_ctrl_access_during_key_req.2297175159 |
| /workspace/coverage/default/38.sram_ctrl_alert_test.632972258 |
| /workspace/coverage/default/38.sram_ctrl_bijection.902766786 |
| /workspace/coverage/default/38.sram_ctrl_executable.734232518 |
| /workspace/coverage/default/38.sram_ctrl_lc_escalation.1839446487 |
| /workspace/coverage/default/38.sram_ctrl_max_throughput.1333516997 |
| /workspace/coverage/default/38.sram_ctrl_mem_partial_access.494998232 |
| /workspace/coverage/default/38.sram_ctrl_mem_walk.2270191715 |
| /workspace/coverage/default/38.sram_ctrl_multiple_keys.3835814632 |
| /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2117776193 |
| /workspace/coverage/default/38.sram_ctrl_ram_cfg.2434691842 |
| /workspace/coverage/default/38.sram_ctrl_regwen.654584743 |
| /workspace/coverage/default/38.sram_ctrl_smoke.1964058136 |
| /workspace/coverage/default/38.sram_ctrl_stress_all.3445629531 |
| /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2980716639 |
| /workspace/coverage/default/38.sram_ctrl_stress_pipeline.2186690302 |
| /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2949729624 |
| /workspace/coverage/default/39.sram_ctrl_access_during_key_req.4294435468 |
| /workspace/coverage/default/39.sram_ctrl_alert_test.2045850805 |
| /workspace/coverage/default/39.sram_ctrl_bijection.2147548696 |
| /workspace/coverage/default/39.sram_ctrl_executable.1166438190 |
| /workspace/coverage/default/39.sram_ctrl_lc_escalation.4224291729 |
| /workspace/coverage/default/39.sram_ctrl_max_throughput.622411679 |
| /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3069406612 |
| /workspace/coverage/default/39.sram_ctrl_mem_walk.3411081176 |
| /workspace/coverage/default/39.sram_ctrl_multiple_keys.1102125206 |
| /workspace/coverage/default/39.sram_ctrl_partial_access.2628183677 |
| /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2760099095 |
| /workspace/coverage/default/39.sram_ctrl_ram_cfg.239031839 |
| /workspace/coverage/default/39.sram_ctrl_regwen.545755671 |
| /workspace/coverage/default/39.sram_ctrl_smoke.2457895072 |
| /workspace/coverage/default/39.sram_ctrl_stress_all.4206045719 |
| /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.622672032 |
| /workspace/coverage/default/39.sram_ctrl_stress_pipeline.1478096053 |
| /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3999164254 |
| /workspace/coverage/default/4.sram_ctrl_access_during_key_req.1958579951 |
| /workspace/coverage/default/4.sram_ctrl_alert_test.1302421289 |
| /workspace/coverage/default/4.sram_ctrl_bijection.1242350701 |
| /workspace/coverage/default/4.sram_ctrl_executable.2775635313 |
| /workspace/coverage/default/4.sram_ctrl_lc_escalation.2107429046 |
| /workspace/coverage/default/4.sram_ctrl_max_throughput.3334660780 |
| /workspace/coverage/default/4.sram_ctrl_mem_partial_access.1096176194 |
| /workspace/coverage/default/4.sram_ctrl_mem_walk.1856792108 |
| /workspace/coverage/default/4.sram_ctrl_multiple_keys.3936472115 |
| /workspace/coverage/default/4.sram_ctrl_partial_access.808460657 |
| /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1765848936 |
| /workspace/coverage/default/4.sram_ctrl_ram_cfg.465426189 |
| /workspace/coverage/default/4.sram_ctrl_regwen.2765975731 |
| /workspace/coverage/default/4.sram_ctrl_sec_cm.1275738232 |
| /workspace/coverage/default/4.sram_ctrl_smoke.3483665113 |
| /workspace/coverage/default/4.sram_ctrl_stress_all.1235752702 |
| /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1953971341 |
| /workspace/coverage/default/4.sram_ctrl_stress_pipeline.2874527929 |
| /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.133937874 |
| /workspace/coverage/default/40.sram_ctrl_access_during_key_req.315954572 |
| /workspace/coverage/default/40.sram_ctrl_alert_test.1379914288 |
| /workspace/coverage/default/40.sram_ctrl_bijection.913436965 |
| /workspace/coverage/default/40.sram_ctrl_executable.3104447967 |
| /workspace/coverage/default/40.sram_ctrl_lc_escalation.1864326659 |
| /workspace/coverage/default/40.sram_ctrl_max_throughput.1668078284 |
| /workspace/coverage/default/40.sram_ctrl_mem_partial_access.1151258755 |
| /workspace/coverage/default/40.sram_ctrl_mem_walk.859502848 |
| /workspace/coverage/default/40.sram_ctrl_multiple_keys.3186030712 |
| /workspace/coverage/default/40.sram_ctrl_partial_access.2828011821 |
| /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2376574338 |
| /workspace/coverage/default/40.sram_ctrl_ram_cfg.3212692055 |
| /workspace/coverage/default/40.sram_ctrl_regwen.197714244 |
| /workspace/coverage/default/40.sram_ctrl_smoke.3933080834 |
| /workspace/coverage/default/40.sram_ctrl_stress_all.4156738421 |
| /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1509375224 |
| /workspace/coverage/default/40.sram_ctrl_stress_pipeline.1828630914 |
| /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3105750974 |
| /workspace/coverage/default/41.sram_ctrl_access_during_key_req.1153484577 |
| /workspace/coverage/default/41.sram_ctrl_alert_test.1233881264 |
| /workspace/coverage/default/41.sram_ctrl_bijection.3433754300 |
| /workspace/coverage/default/41.sram_ctrl_executable.122156588 |
| /workspace/coverage/default/41.sram_ctrl_lc_escalation.3723743152 |
| /workspace/coverage/default/41.sram_ctrl_max_throughput.3900995224 |
| /workspace/coverage/default/41.sram_ctrl_mem_partial_access.2655563455 |
| /workspace/coverage/default/41.sram_ctrl_mem_walk.229870531 |
| /workspace/coverage/default/41.sram_ctrl_multiple_keys.1193605316 |
| /workspace/coverage/default/41.sram_ctrl_partial_access.2930052068 |
| /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2274583041 |
| /workspace/coverage/default/41.sram_ctrl_ram_cfg.1107476959 |
| /workspace/coverage/default/41.sram_ctrl_regwen.4292723808 |
| /workspace/coverage/default/41.sram_ctrl_smoke.1453143638 |
| /workspace/coverage/default/41.sram_ctrl_stress_all.1174586584 |
| /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2964232529 |
| /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2609972901 |
| /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.947228649 |
| /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1650176373 |
| /workspace/coverage/default/42.sram_ctrl_alert_test.85599609 |
| /workspace/coverage/default/42.sram_ctrl_bijection.2597974426 |
| /workspace/coverage/default/42.sram_ctrl_executable.3854439759 |
| /workspace/coverage/default/42.sram_ctrl_lc_escalation.2096526496 |
| /workspace/coverage/default/42.sram_ctrl_max_throughput.3036781862 |
| /workspace/coverage/default/42.sram_ctrl_mem_partial_access.763569249 |
| /workspace/coverage/default/42.sram_ctrl_mem_walk.274172837 |
| /workspace/coverage/default/42.sram_ctrl_multiple_keys.3534916618 |
| /workspace/coverage/default/42.sram_ctrl_partial_access.4065122407 |
| /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.979862293 |
| /workspace/coverage/default/42.sram_ctrl_ram_cfg.239994607 |
| /workspace/coverage/default/42.sram_ctrl_regwen.4288496365 |
| /workspace/coverage/default/42.sram_ctrl_smoke.2015339739 |
| /workspace/coverage/default/42.sram_ctrl_stress_all.2563138966 |
| /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3454836718 |
| /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1059923172 |
| /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2099287311 |
| /workspace/coverage/default/43.sram_ctrl_access_during_key_req.3542780355 |
| /workspace/coverage/default/43.sram_ctrl_alert_test.2101833220 |
| /workspace/coverage/default/43.sram_ctrl_bijection.4200052473 |
| /workspace/coverage/default/43.sram_ctrl_executable.2712723270 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.3280481580 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.2483272259 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2006649011 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.1861681505 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.1166180436 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.1384594413 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3724762212 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.3369642499 |
| /workspace/coverage/default/43.sram_ctrl_regwen.2822600281 |
| /workspace/coverage/default/43.sram_ctrl_smoke.3319751722 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.4217346254 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3619696840 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2520094700 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2608960616 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.2912165237 |
| /workspace/coverage/default/44.sram_ctrl_bijection.3183566138 |
| /workspace/coverage/default/44.sram_ctrl_executable.878528934 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.2786351220 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.3917556102 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2977231020 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.2015588651 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.323519631 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.2115435620 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1516045385 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.1728941932 |
| /workspace/coverage/default/44.sram_ctrl_regwen.4925406 |
| /workspace/coverage/default/44.sram_ctrl_smoke.4160146413 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.3202309815 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.441262123 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3516778422 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1393129082 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.2761947429 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.4113676774 |
| /workspace/coverage/default/45.sram_ctrl_bijection.1668402410 |
| /workspace/coverage/default/45.sram_ctrl_executable.3634849732 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.279657234 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.1214804346 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.2391347349 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.1690880303 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.3241888647 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1760651809 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3327430139 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.3566080389 |
| /workspace/coverage/default/45.sram_ctrl_regwen.2912698944 |
| /workspace/coverage/default/45.sram_ctrl_smoke.415528802 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.3322463706 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.47825960 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1761162454 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3697904417 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2057232115 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.2651668525 |
| /workspace/coverage/default/46.sram_ctrl_bijection.1062575562 |
| /workspace/coverage/default/46.sram_ctrl_executable.3951342236 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.1876225180 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.1551416248 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1659793999 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.960003831 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.3442865216 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.3003354527 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.847394799 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.1690354166 |
| /workspace/coverage/default/46.sram_ctrl_regwen.2601361796 |
| /workspace/coverage/default/46.sram_ctrl_smoke.162579165 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.938128306 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1823762043 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.526419942 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.428364960 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1806889393 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.3546862632 |
| /workspace/coverage/default/47.sram_ctrl_bijection.115647780 |
| /workspace/coverage/default/47.sram_ctrl_executable.1063225809 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.1447722893 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.3320731770 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3575073367 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.3953817204 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.1029410550 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.1921458241 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1203428501 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.1932932256 |
| /workspace/coverage/default/47.sram_ctrl_regwen.3524599465 |
| /workspace/coverage/default/47.sram_ctrl_smoke.3633162415 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.100236078 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.594059196 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.530120551 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3896776906 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.2980963188 |
| /workspace/coverage/default/48.sram_ctrl_bijection.3763656530 |
| /workspace/coverage/default/48.sram_ctrl_executable.3799814368 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.3477038039 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.2637117479 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2395795696 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.3109244309 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.1314983765 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.1797892046 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1491429995 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.3313204053 |
| /workspace/coverage/default/48.sram_ctrl_regwen.2453398571 |
| /workspace/coverage/default/48.sram_ctrl_smoke.2060337844 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.4262616447 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3457343865 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.1736738351 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1512825114 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.305661712 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.1398546229 |
| /workspace/coverage/default/49.sram_ctrl_bijection.3798277896 |
| /workspace/coverage/default/49.sram_ctrl_executable.1119123328 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.2856309257 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.1044124228 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1890833490 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.2006986878 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.2813645162 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.1712616215 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3604132301 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.1289808367 |
| /workspace/coverage/default/49.sram_ctrl_regwen.2952277778 |
| /workspace/coverage/default/49.sram_ctrl_smoke.3666302682 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.4203270591 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1156012822 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1086735335 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1413671963 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.642563268 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.1415708629 |
| /workspace/coverage/default/5.sram_ctrl_bijection.1537752390 |
| /workspace/coverage/default/5.sram_ctrl_executable.3388927986 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.111397282 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.1585446065 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3263023782 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.405933560 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.1092723534 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.402211991 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3196551218 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.2645934070 |
| /workspace/coverage/default/5.sram_ctrl_regwen.1351642136 |
| /workspace/coverage/default/5.sram_ctrl_smoke.903142381 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.3328213333 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1449609027 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.39087141 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1320237148 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.53799269 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.80002792 |
| /workspace/coverage/default/6.sram_ctrl_bijection.2448499556 |
| /workspace/coverage/default/6.sram_ctrl_executable.96271992 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.115634981 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.2439785491 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.3904074450 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.3409125131 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.3613120826 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.319211140 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2227335977 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.3638957060 |
| /workspace/coverage/default/6.sram_ctrl_regwen.2126398150 |
| /workspace/coverage/default/6.sram_ctrl_smoke.339596183 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.3953670857 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3252055420 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.898029964 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.183296680 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.225202677 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.2545827504 |
| /workspace/coverage/default/7.sram_ctrl_bijection.3544425875 |
| /workspace/coverage/default/7.sram_ctrl_executable.40079959 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.3657431989 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.4029286325 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1220424438 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.1892226642 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.3392218891 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.3074481759 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2282342874 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.3229499147 |
| /workspace/coverage/default/7.sram_ctrl_regwen.26350967 |
| /workspace/coverage/default/7.sram_ctrl_smoke.3629766453 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3080858260 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1281532845 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3098995021 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3762259612 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.1959202197 |
| /workspace/coverage/default/8.sram_ctrl_executable.1146597230 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.2185089318 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.23001695 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.3098614152 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.2389214460 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.3778609353 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.364603572 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.277961705 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.920405718 |
| /workspace/coverage/default/8.sram_ctrl_regwen.2036752723 |
| /workspace/coverage/default/8.sram_ctrl_smoke.1308565255 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.3190854492 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.572508620 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2601514749 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1714094267 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.769762118 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.3493243960 |
| /workspace/coverage/default/9.sram_ctrl_bijection.2596070888 |
| /workspace/coverage/default/9.sram_ctrl_executable.3238058556 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.791412188 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.3301535679 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.2948162902 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.631886084 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.4271059887 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.2375102168 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1250735245 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.3329104767 |
| /workspace/coverage/default/9.sram_ctrl_regwen.1792904743 |
| /workspace/coverage/default/9.sram_ctrl_smoke.1442061698 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.493975509 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2986724791 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1282801639 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3157895943 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3722782699 |
|
|
May 21 02:57:23 PM PDT 24 |
May 21 02:58:11 PM PDT 24 |
1650979580 ps |
| T2 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1320237148 |
|
|
May 21 02:57:39 PM PDT 24 |
May 21 03:00:12 PM PDT 24 |
808183545 ps |
| T3 |
/workspace/coverage/default/16.sram_ctrl_bijection.2348822127 |
|
|
May 21 02:58:10 PM PDT 24 |
May 21 03:10:41 PM PDT 24 |
648567444615 ps |
| T5 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.3900995224 |
|
|
May 21 03:01:37 PM PDT 24 |
May 21 03:03:39 PM PDT 24 |
8364299846 ps |
| T4 |
/workspace/coverage/default/16.sram_ctrl_partial_access.1867347083 |
|
|
May 21 02:58:06 PM PDT 24 |
May 21 02:58:21 PM PDT 24 |
382925328 ps |
| T9 |
/workspace/coverage/default/38.sram_ctrl_executable.734232518 |
|
|
May 21 03:01:09 PM PDT 24 |
May 21 03:21:20 PM PDT 24 |
39008281918 ps |
| T10 |
/workspace/coverage/default/32.sram_ctrl_alert_test.2460266405 |
|
|
May 21 03:00:09 PM PDT 24 |
May 21 03:00:13 PM PDT 24 |
28129876 ps |
| T11 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1226017202 |
|
|
May 21 02:57:29 PM PDT 24 |
May 21 03:01:34 PM PDT 24 |
5631148893 ps |
| T6 |
/workspace/coverage/default/43.sram_ctrl_stress_all.133125509 |
|
|
May 21 03:02:16 PM PDT 24 |
May 21 04:21:58 PM PDT 24 |
318110319366 ps |
| T12 |
/workspace/coverage/default/17.sram_ctrl_bijection.894736932 |
|
|
May 21 02:58:08 PM PDT 24 |
May 21 03:08:01 PM PDT 24 |
166055250628 ps |
| T13 |
/workspace/coverage/default/9.sram_ctrl_regwen.1792904743 |
|
|
May 21 02:57:52 PM PDT 24 |
May 21 03:10:24 PM PDT 24 |
42826110921 ps |
| T27 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.561727958 |
|
|
May 21 02:58:08 PM PDT 24 |
May 21 02:58:35 PM PDT 24 |
1068634917 ps |
| T14 |
/workspace/coverage/default/44.sram_ctrl_executable.878528934 |
|
|
May 21 03:02:13 PM PDT 24 |
May 21 03:32:47 PM PDT 24 |
20250081027 ps |
| T54 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.2483272259 |
|
|
May 21 03:02:02 PM PDT 24 |
May 21 03:04:16 PM PDT 24 |
1662257014 ps |
| T15 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.3967484009 |
|
|
May 21 02:59:26 PM PDT 24 |
May 21 03:19:37 PM PDT 24 |
21118583011 ps |
| T55 |
/workspace/coverage/default/27.sram_ctrl_bijection.2345578024 |
|
|
May 21 02:59:21 PM PDT 24 |
May 21 03:34:22 PM PDT 24 |
124258130075 ps |
| T16 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2757723220 |
|
|
May 21 02:58:21 PM PDT 24 |
May 21 02:58:52 PM PDT 24 |
701326553 ps |
| T17 |
/workspace/coverage/default/4.sram_ctrl_executable.2775635313 |
|
|
May 21 02:57:29 PM PDT 24 |
May 21 03:02:50 PM PDT 24 |
21985795221 ps |
| T43 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1919272693 |
|
|
May 21 02:58:19 PM PDT 24 |
May 21 03:24:04 PM PDT 24 |
13244945106 ps |
| T23 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1273765033 |
|
|
May 21 02:57:49 PM PDT 24 |
May 21 04:20:03 PM PDT 24 |
64292015586 ps |
| T66 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.1707314615 |
|
|
May 21 02:58:42 PM PDT 24 |
May 21 02:59:57 PM PDT 24 |
10882793652 ps |
| T44 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.1978494899 |
|
|
May 21 03:00:05 PM PDT 24 |
May 21 03:37:15 PM PDT 24 |
45838115333 ps |
| T28 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.775932019 |
|
|
May 21 02:58:25 PM PDT 24 |
May 21 02:59:11 PM PDT 24 |
6542265231 ps |
| T45 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2996834001 |
|
|
May 21 02:59:23 PM PDT 24 |
May 21 02:59:58 PM PDT 24 |
1294391555 ps |
| T146 |
/workspace/coverage/default/28.sram_ctrl_bijection.2855848638 |
|
|
May 21 02:59:28 PM PDT 24 |
May 21 03:26:31 PM PDT 24 |
332464655300 ps |
| T67 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.2885061003 |
|
|
May 21 03:00:54 PM PDT 24 |
May 21 03:11:26 PM PDT 24 |
10188276742 ps |
| T68 |
/workspace/coverage/default/33.sram_ctrl_executable.3172047296 |
|
|
May 21 03:00:18 PM PDT 24 |
May 21 03:04:28 PM PDT 24 |
14824198310 ps |
| T7 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3723743152 |
|
|
May 21 03:01:36 PM PDT 24 |
May 21 03:03:07 PM PDT 24 |
62484392420 ps |
| T91 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.898029964 |
|
|
May 21 02:57:39 PM PDT 24 |
May 21 03:00:16 PM PDT 24 |
3008951384 ps |
| T92 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3113692063 |
|
|
May 21 02:58:10 PM PDT 24 |
May 21 03:03:25 PM PDT 24 |
11148197864 ps |
| T93 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1690393683 |
|
|
May 21 02:57:46 PM PDT 24 |
May 21 02:59:00 PM PDT 24 |
2560813282 ps |
| T46 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3252055420 |
|
|
May 21 02:57:41 PM PDT 24 |
May 21 02:58:56 PM PDT 24 |
14419305447 ps |
| T76 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2948162902 |
|
|
May 21 02:57:51 PM PDT 24 |
May 21 03:00:31 PM PDT 24 |
9772514887 ps |
| T77 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.3012863635 |
|
|
May 21 02:59:16 PM PDT 24 |
May 21 03:00:34 PM PDT 24 |
9402401314 ps |
| T94 |
/workspace/coverage/default/30.sram_ctrl_partial_access.1379192922 |
|
|
May 21 02:59:46 PM PDT 24 |
May 21 03:00:11 PM PDT 24 |
1055873600 ps |
| T47 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.622672032 |
|
|
May 21 03:01:20 PM PDT 24 |
May 21 03:01:34 PM PDT 24 |
371593444 ps |
| T95 |
/workspace/coverage/default/39.sram_ctrl_bijection.2147548696 |
|
|
May 21 03:01:13 PM PDT 24 |
May 21 03:33:44 PM PDT 24 |
399000219851 ps |
| T29 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.73421634 |
|
|
May 21 02:59:13 PM PDT 24 |
May 21 02:59:19 PM PDT 24 |
706126259 ps |
| T124 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3105750974 |
|
|
May 21 03:01:26 PM PDT 24 |
May 21 03:02:16 PM PDT 24 |
1490849644 ps |
| T78 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1890833490 |
|
|
May 21 03:03:10 PM PDT 24 |
May 21 03:04:30 PM PDT 24 |
4865350138 ps |
| T104 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.2239298512 |
|
|
May 21 02:58:00 PM PDT 24 |
May 21 03:01:37 PM PDT 24 |
21446274851 ps |
| T105 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1953153967 |
|
|
May 21 02:57:26 PM PDT 24 |
May 21 03:00:10 PM PDT 24 |
3589130813 ps |
| T125 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2231762151 |
|
|
May 21 02:57:35 PM PDT 24 |
May 21 02:58:37 PM PDT 24 |
1511672990 ps |
| T126 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.2330097305 |
|
|
May 21 02:58:24 PM PDT 24 |
May 21 02:58:45 PM PDT 24 |
733351658 ps |
| T79 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1408394867 |
|
|
May 21 02:57:25 PM PDT 24 |
May 21 02:59:56 PM PDT 24 |
10344975965 ps |
| T147 |
/workspace/coverage/default/29.sram_ctrl_smoke.1418090034 |
|
|
May 21 02:59:27 PM PDT 24 |
May 21 02:59:49 PM PDT 24 |
2280685795 ps |
| T148 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.1684356956 |
|
|
May 21 03:00:46 PM PDT 24 |
May 21 03:13:29 PM PDT 24 |
33967033492 ps |
| T80 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.455184498 |
|
|
May 21 02:58:08 PM PDT 24 |
May 21 03:11:38 PM PDT 24 |
14039712605 ps |
| T81 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1265227952 |
|
|
May 21 02:57:47 PM PDT 24 |
May 21 03:00:30 PM PDT 24 |
8136893118 ps |
| T149 |
/workspace/coverage/default/7.sram_ctrl_smoke.3629766453 |
|
|
May 21 02:57:40 PM PDT 24 |
May 21 02:58:33 PM PDT 24 |
1010931895 ps |
| T48 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.271105757 |
|
|
May 21 03:00:50 PM PDT 24 |
May 21 03:01:15 PM PDT 24 |
3903326127 ps |
| T150 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1338220679 |
|
|
May 21 02:59:09 PM PDT 24 |
May 21 03:03:15 PM PDT 24 |
4991218589 ps |
| T21 |
/workspace/coverage/default/17.sram_ctrl_alert_test.2927415168 |
|
|
May 21 02:58:15 PM PDT 24 |
May 21 02:58:21 PM PDT 24 |
39214461 ps |
| T8 |
/workspace/coverage/default/16.sram_ctrl_stress_all.2335194213 |
|
|
May 21 02:58:07 PM PDT 24 |
May 21 03:43:48 PM PDT 24 |
54854779337 ps |
| T151 |
/workspace/coverage/default/3.sram_ctrl_smoke.641147827 |
|
|
May 21 02:57:29 PM PDT 24 |
May 21 02:57:58 PM PDT 24 |
2830022583 ps |
| T152 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.669787286 |
|
|
May 21 03:00:29 PM PDT 24 |
May 21 03:00:39 PM PDT 24 |
1365617963 ps |
| T153 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2389214460 |
|
|
May 21 02:57:49 PM PDT 24 |
May 21 03:03:04 PM PDT 24 |
21557510600 ps |
| T154 |
/workspace/coverage/default/29.sram_ctrl_partial_access.2039696970 |
|
|
May 21 02:59:34 PM PDT 24 |
May 21 03:00:05 PM PDT 24 |
1851168865 ps |
| T155 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1153998450 |
|
|
May 21 02:57:55 PM PDT 24 |
May 21 03:00:10 PM PDT 24 |
801676834 ps |
| T30 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.239031839 |
|
|
May 21 03:01:18 PM PDT 24 |
May 21 03:01:22 PM PDT 24 |
365261116 ps |
| T156 |
/workspace/coverage/default/36.sram_ctrl_executable.796566656 |
|
|
May 21 03:00:53 PM PDT 24 |
May 21 03:01:58 PM PDT 24 |
3586074908 ps |
| T157 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.97378030 |
|
|
May 21 02:58:09 PM PDT 24 |
May 21 03:00:37 PM PDT 24 |
4396866073 ps |
| T158 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2978907290 |
|
|
May 21 02:57:54 PM PDT 24 |
May 21 03:19:10 PM PDT 24 |
36982450566 ps |
| T24 |
/workspace/coverage/default/5.sram_ctrl_stress_all.3328213333 |
|
|
May 21 02:57:43 PM PDT 24 |
May 21 03:51:40 PM PDT 24 |
379300646930 ps |
| T159 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.1272798545 |
|
|
May 21 03:00:03 PM PDT 24 |
May 21 03:00:14 PM PDT 24 |
1421445918 ps |
| T160 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2214030577 |
|
|
May 21 02:58:04 PM PDT 24 |
May 21 02:59:49 PM PDT 24 |
3430396091 ps |
| T161 |
/workspace/coverage/default/32.sram_ctrl_partial_access.417504380 |
|
|
May 21 03:00:03 PM PDT 24 |
May 21 03:00:13 PM PDT 24 |
846405916 ps |
| T162 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.3204340858 |
|
|
May 21 02:59:11 PM PDT 24 |
May 21 03:13:04 PM PDT 24 |
10000325664 ps |
| T163 |
/workspace/coverage/default/4.sram_ctrl_smoke.3483665113 |
|
|
May 21 02:57:30 PM PDT 24 |
May 21 02:57:44 PM PDT 24 |
7035731509 ps |
| T164 |
/workspace/coverage/default/12.sram_ctrl_bijection.3345946263 |
|
|
May 21 02:57:48 PM PDT 24 |
May 21 03:08:53 PM PDT 24 |
116360218637 ps |
| T165 |
/workspace/coverage/default/11.sram_ctrl_bijection.3855496863 |
|
|
May 21 02:57:50 PM PDT 24 |
May 21 03:07:55 PM PDT 24 |
120495278119 ps |
| T49 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.183368527 |
|
|
May 21 02:58:32 PM PDT 24 |
May 21 02:58:54 PM PDT 24 |
492747260 ps |
| T166 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.2533526365 |
|
|
May 21 02:59:38 PM PDT 24 |
May 21 03:15:41 PM PDT 24 |
38044929194 ps |
| T167 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.326119832 |
|
|
May 21 02:57:17 PM PDT 24 |
May 21 03:10:43 PM PDT 24 |
53801910205 ps |
| T168 |
/workspace/coverage/default/43.sram_ctrl_partial_access.1384594413 |
|
|
May 21 03:01:57 PM PDT 24 |
May 21 03:02:09 PM PDT 24 |
1054827379 ps |
| T169 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.1193605316 |
|
|
May 21 03:01:35 PM PDT 24 |
May 21 03:19:32 PM PDT 24 |
8738157320 ps |
| T50 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3401827722 |
|
|
May 21 02:58:47 PM PDT 24 |
May 21 02:59:00 PM PDT 24 |
205917338 ps |
| T25 |
/workspace/coverage/default/18.sram_ctrl_stress_all.2818728366 |
|
|
May 21 02:58:20 PM PDT 24 |
May 21 03:05:40 PM PDT 24 |
12885136589 ps |
| T106 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1895026626 |
|
|
May 21 03:00:33 PM PDT 24 |
May 21 03:07:27 PM PDT 24 |
22653115015 ps |
| T170 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.61742345 |
|
|
May 21 02:58:46 PM PDT 24 |
May 21 03:10:32 PM PDT 24 |
11758270275 ps |
| T171 |
/workspace/coverage/default/14.sram_ctrl_partial_access.949606920 |
|
|
May 21 02:57:54 PM PDT 24 |
May 21 02:58:24 PM PDT 24 |
1220628453 ps |
| T22 |
/workspace/coverage/default/42.sram_ctrl_alert_test.85599609 |
|
|
May 21 03:01:58 PM PDT 24 |
May 21 03:02:00 PM PDT 24 |
31498736 ps |
| T172 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.1551416248 |
|
|
May 21 03:02:38 PM PDT 24 |
May 21 03:04:42 PM PDT 24 |
4501742685 ps |
| T173 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.4115266823 |
|
|
May 21 02:58:59 PM PDT 24 |
May 21 03:11:01 PM PDT 24 |
22969035958 ps |
| T174 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3036781862 |
|
|
May 21 03:01:51 PM PDT 24 |
May 21 03:03:37 PM PDT 24 |
1581592951 ps |
| T175 |
/workspace/coverage/default/30.sram_ctrl_bijection.2534887337 |
|
|
May 21 02:59:39 PM PDT 24 |
May 21 03:44:07 PM PDT 24 |
480271798079 ps |
| T107 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.277961705 |
|
|
May 21 02:57:42 PM PDT 24 |
May 21 03:05:25 PM PDT 24 |
7929185855 ps |
| T108 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2117776193 |
|
|
May 21 03:01:12 PM PDT 24 |
May 21 03:08:31 PM PDT 24 |
11288001203 ps |
| T52 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.4224291729 |
|
|
May 21 03:01:21 PM PDT 24 |
May 21 03:02:41 PM PDT 24 |
24588575671 ps |
| T31 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.4189068206 |
|
|
May 21 02:58:31 PM PDT 24 |
May 21 02:58:36 PM PDT 24 |
370973669 ps |
| T26 |
/workspace/coverage/default/31.sram_ctrl_stress_all.2037843588 |
|
|
May 21 02:59:56 PM PDT 24 |
May 21 03:30:24 PM PDT 24 |
21146145550 ps |
| T53 |
/workspace/coverage/default/10.sram_ctrl_stress_all.21203687 |
|
|
May 21 02:57:50 PM PDT 24 |
May 21 04:12:50 PM PDT 24 |
1031580049355 ps |
| T176 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3789381366 |
|
|
May 21 03:00:14 PM PDT 24 |
May 21 03:00:19 PM PDT 24 |
355178442 ps |
| T177 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3294353363 |
|
|
May 21 03:00:16 PM PDT 24 |
May 21 03:00:35 PM PDT 24 |
1461274915 ps |
| T178 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2828011821 |
|
|
May 21 03:01:25 PM PDT 24 |
May 21 03:01:44 PM PDT 24 |
3019755327 ps |
| T179 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.3504183931 |
|
|
May 21 02:57:58 PM PDT 24 |
May 21 03:22:12 PM PDT 24 |
15701552363 ps |
| T180 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.2337929739 |
|
|
May 21 03:00:28 PM PDT 24 |
May 21 03:00:32 PM PDT 24 |
1531606735 ps |
| T181 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.1821712683 |
|
|
May 21 03:00:38 PM PDT 24 |
May 21 03:17:36 PM PDT 24 |
55581316906 ps |
| T182 |
/workspace/coverage/default/19.sram_ctrl_stress_all.3529333757 |
|
|
May 21 02:58:24 PM PDT 24 |
May 21 03:26:56 PM PDT 24 |
127829729134 ps |
| T183 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2360303458 |
|
|
May 21 02:58:06 PM PDT 24 |
May 21 03:00:29 PM PDT 24 |
1597230778 ps |
| T184 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.2434691842 |
|
|
May 21 03:01:05 PM PDT 24 |
May 21 03:01:10 PM PDT 24 |
1404312677 ps |
| T185 |
/workspace/coverage/default/36.sram_ctrl_alert_test.1201411803 |
|
|
May 21 03:00:52 PM PDT 24 |
May 21 03:00:57 PM PDT 24 |
53879022 ps |
| T186 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3546862632 |
|
|
May 21 03:02:54 PM PDT 24 |
May 21 03:02:56 PM PDT 24 |
19996725 ps |
| T187 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1728941932 |
|
|
May 21 03:02:16 PM PDT 24 |
May 21 03:02:22 PM PDT 24 |
356252648 ps |
| T188 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3150714774 |
|
|
May 21 02:57:57 PM PDT 24 |
May 21 02:58:28 PM PDT 24 |
4537618719 ps |
| T51 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2044482979 |
|
|
May 21 03:00:58 PM PDT 24 |
May 21 03:01:36 PM PDT 24 |
2238171595 ps |
| T189 |
/workspace/coverage/default/34.sram_ctrl_executable.307954787 |
|
|
May 21 03:00:28 PM PDT 24 |
May 21 03:19:01 PM PDT 24 |
216082059712 ps |
| T109 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2068094212 |
|
|
May 21 02:58:46 PM PDT 24 |
May 21 03:00:46 PM PDT 24 |
9661723221 ps |
| T110 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.3522970042 |
|
|
May 21 02:58:41 PM PDT 24 |
May 21 03:02:22 PM PDT 24 |
3977772864 ps |
| T190 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.3361545871 |
|
|
May 21 02:57:56 PM PDT 24 |
May 21 02:58:09 PM PDT 24 |
1472446604 ps |
| T191 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2024096165 |
|
|
May 21 02:57:50 PM PDT 24 |
May 21 02:58:01 PM PDT 24 |
2115309598 ps |
| T192 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3771980004 |
|
|
May 21 03:00:53 PM PDT 24 |
May 21 03:04:30 PM PDT 24 |
4245808214 ps |
| T193 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.3221290310 |
|
|
May 21 03:00:46 PM PDT 24 |
May 21 03:00:58 PM PDT 24 |
685800699 ps |
| T194 |
/workspace/coverage/default/2.sram_ctrl_stress_all.162927283 |
|
|
May 21 02:57:30 PM PDT 24 |
May 21 05:02:30 PM PDT 24 |
3348564822689 ps |
| T195 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3621574779 |
|
|
May 21 02:58:19 PM PDT 24 |
May 21 03:06:16 PM PDT 24 |
9023631355 ps |
| T196 |
/workspace/coverage/default/39.sram_ctrl_executable.1166438190 |
|
|
May 21 03:01:20 PM PDT 24 |
May 21 03:26:19 PM PDT 24 |
7620865680 ps |
| T197 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1374553946 |
|
|
May 21 02:59:45 PM PDT 24 |
May 21 03:03:20 PM PDT 24 |
4731599613 ps |
| T198 |
/workspace/coverage/default/33.sram_ctrl_alert_test.3268886797 |
|
|
May 21 03:00:17 PM PDT 24 |
May 21 03:00:19 PM PDT 24 |
19907051 ps |
| T199 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2395795696 |
|
|
May 21 03:03:04 PM PDT 24 |
May 21 03:04:18 PM PDT 24 |
2356815107 ps |
| T200 |
/workspace/coverage/default/27.sram_ctrl_partial_access.2598008002 |
|
|
May 21 02:59:22 PM PDT 24 |
May 21 02:59:36 PM PDT 24 |
775804701 ps |
| T201 |
/workspace/coverage/default/38.sram_ctrl_bijection.902766786 |
|
|
May 21 03:01:04 PM PDT 24 |
May 21 03:11:48 PM PDT 24 |
9713475208 ps |
| T202 |
/workspace/coverage/default/45.sram_ctrl_smoke.415528802 |
|
|
May 21 03:02:19 PM PDT 24 |
May 21 03:03:09 PM PDT 24 |
2942206698 ps |
| T203 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.4202138064 |
|
|
May 21 03:00:03 PM PDT 24 |
May 21 03:02:54 PM PDT 24 |
8009869189 ps |
| T204 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1205505822 |
|
|
May 21 02:57:49 PM PDT 24 |
May 21 02:58:24 PM PDT 24 |
7274744615 ps |
| T205 |
/workspace/coverage/default/41.sram_ctrl_smoke.1453143638 |
|
|
May 21 03:01:37 PM PDT 24 |
May 21 03:01:49 PM PDT 24 |
461294900 ps |
| T206 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1458652977 |
|
|
May 21 02:57:54 PM PDT 24 |
May 21 02:58:23 PM PDT 24 |
1413517492 ps |
| T207 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.53799269 |
|
|
May 21 02:57:36 PM PDT 24 |
May 21 03:04:45 PM PDT 24 |
6015746039 ps |
| T208 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3657431989 |
|
|
May 21 02:57:37 PM PDT 24 |
May 21 02:58:37 PM PDT 24 |
8812766719 ps |
| T209 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3691983464 |
|
|
May 21 02:59:22 PM PDT 24 |
May 21 03:02:23 PM PDT 24 |
16702462155 ps |
| T210 |
/workspace/coverage/default/13.sram_ctrl_bijection.2945155174 |
|
|
May 21 02:57:54 PM PDT 24 |
May 21 03:27:43 PM PDT 24 |
199039521738 ps |
| T211 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.1704482085 |
|
|
May 21 02:59:04 PM PDT 24 |
May 21 03:01:10 PM PDT 24 |
2022687570 ps |
| T212 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.1533144797 |
|
|
May 21 02:58:18 PM PDT 24 |
May 21 02:58:26 PM PDT 24 |
361505984 ps |
| T213 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.1333516997 |
|
|
May 21 03:01:04 PM PDT 24 |
May 21 03:02:18 PM PDT 24 |
8274759432 ps |
| T214 |
/workspace/coverage/default/17.sram_ctrl_partial_access.4155754923 |
|
|
May 21 02:58:06 PM PDT 24 |
May 21 02:58:37 PM PDT 24 |
15441649408 ps |
| T215 |
/workspace/coverage/default/0.sram_ctrl_alert_test.670373111 |
|
|
May 21 02:57:25 PM PDT 24 |
May 21 02:57:32 PM PDT 24 |
25213067 ps |
| T216 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.3338415594 |
|
|
May 21 03:00:28 PM PDT 24 |
May 21 03:04:32 PM PDT 24 |
4150693165 ps |
| T217 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3604132301 |
|
|
May 21 03:03:09 PM PDT 24 |
May 21 03:10:58 PM PDT 24 |
19373529122 ps |
| T140 |
/workspace/coverage/default/20.sram_ctrl_stress_all.2570246523 |
|
|
May 21 02:58:31 PM PDT 24 |
May 21 05:44:58 PM PDT 24 |
582219487579 ps |
| T218 |
/workspace/coverage/default/37.sram_ctrl_alert_test.1825543206 |
|
|
May 21 03:01:00 PM PDT 24 |
May 21 03:01:02 PM PDT 24 |
16873419 ps |
| T219 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1996173972 |
|
|
May 21 02:58:59 PM PDT 24 |
May 21 02:59:27 PM PDT 24 |
4214643467 ps |
| T220 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.441262123 |
|
|
May 21 03:02:20 PM PDT 24 |
May 21 03:02:31 PM PDT 24 |
278798773 ps |
| T221 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1092723534 |
|
|
May 21 02:57:29 PM PDT 24 |
May 21 03:12:34 PM PDT 24 |
27232390457 ps |
| T222 |
/workspace/coverage/default/6.sram_ctrl_executable.96271992 |
|
|
May 21 02:57:36 PM PDT 24 |
May 21 03:19:53 PM PDT 24 |
68730450046 ps |
| T144 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2977231020 |
|
|
May 21 03:02:20 PM PDT 24 |
May 21 03:04:44 PM PDT 24 |
5094421930 ps |
| T223 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.607229931 |
|
|
May 21 02:58:22 PM PDT 24 |
May 21 03:00:15 PM PDT 24 |
37266494968 ps |
| T224 |
/workspace/coverage/default/2.sram_ctrl_executable.1987706839 |
|
|
May 21 02:57:31 PM PDT 24 |
May 21 02:58:18 PM PDT 24 |
2965443379 ps |
| T225 |
/workspace/coverage/default/10.sram_ctrl_smoke.3514871269 |
|
|
May 21 02:57:56 PM PDT 24 |
May 21 02:58:15 PM PDT 24 |
868106645 ps |
| T226 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.3968371640 |
|
|
May 21 02:59:34 PM PDT 24 |
May 21 03:01:55 PM PDT 24 |
10436609097 ps |
| T143 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3771093059 |
|
|
May 21 03:00:07 PM PDT 24 |
May 21 03:02:35 PM PDT 24 |
20745594800 ps |
| T227 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.2297175159 |
|
|
May 21 03:01:04 PM PDT 24 |
May 21 03:04:05 PM PDT 24 |
18820720961 ps |
| T228 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.2439785491 |
|
|
May 21 02:57:33 PM PDT 24 |
May 21 02:57:52 PM PDT 24 |
2869637200 ps |
| T229 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.1856792108 |
|
|
May 21 02:57:34 PM PDT 24 |
May 21 02:59:40 PM PDT 24 |
4118224860 ps |
| T230 |
/workspace/coverage/default/42.sram_ctrl_stress_all.2563138966 |
|
|
May 21 03:01:56 PM PDT 24 |
May 21 03:27:42 PM PDT 24 |
114058429721 ps |
| T231 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.3205090148 |
|
|
May 21 02:58:20 PM PDT 24 |
May 21 03:02:26 PM PDT 24 |
3986646458 ps |
| T232 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1780310143 |
|
|
May 21 03:00:59 PM PDT 24 |
May 21 03:02:03 PM PDT 24 |
776065357 ps |
| T233 |
/workspace/coverage/default/36.sram_ctrl_regwen.3137806362 |
|
|
May 21 03:00:52 PM PDT 24 |
May 21 03:02:01 PM PDT 24 |
1351320146 ps |
| T234 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.1107476959 |
|
|
May 21 03:01:44 PM PDT 24 |
May 21 03:01:48 PM PDT 24 |
358433805 ps |
| T235 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1415708629 |
|
|
May 21 02:57:36 PM PDT 24 |
May 21 02:57:45 PM PDT 24 |
20156527 ps |
| T236 |
/workspace/coverage/default/42.sram_ctrl_regwen.4288496365 |
|
|
May 21 03:01:51 PM PDT 24 |
May 21 03:15:45 PM PDT 24 |
14698411056 ps |
| T237 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.3917556102 |
|
|
May 21 03:02:13 PM PDT 24 |
May 21 03:02:40 PM PDT 24 |
2948753631 ps |
| T238 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.1317569672 |
|
|
May 21 02:58:22 PM PDT 24 |
May 21 02:58:56 PM PDT 24 |
2866668393 ps |
| T239 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2296444271 |
|
|
May 21 02:58:41 PM PDT 24 |
May 21 03:00:17 PM PDT 24 |
4463340252 ps |
| T240 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.3613632834 |
|
|
May 21 02:57:24 PM PDT 24 |
May 21 02:57:34 PM PDT 24 |
348014034 ps |
| T241 |
/workspace/coverage/default/24.sram_ctrl_smoke.483621384 |
|
|
May 21 02:59:00 PM PDT 24 |
May 21 02:59:20 PM PDT 24 |
1160202059 ps |
| T242 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.2270191715 |
|
|
May 21 03:01:05 PM PDT 24 |
May 21 03:05:22 PM PDT 24 |
3942622655 ps |
| T141 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2760099095 |
|
|
May 21 03:01:15 PM PDT 24 |
May 21 03:06:24 PM PDT 24 |
14230151266 ps |
| T243 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3257183358 |
|
|
May 21 02:57:53 PM PDT 24 |
May 21 03:00:22 PM PDT 24 |
7329544848 ps |
| T244 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1282801639 |
|
|
May 21 02:57:44 PM PDT 24 |
May 21 03:02:41 PM PDT 24 |
4994398554 ps |
| T245 |
/workspace/coverage/default/26.sram_ctrl_regwen.2336181506 |
|
|
May 21 02:59:14 PM PDT 24 |
May 21 03:09:45 PM PDT 24 |
25726667014 ps |
| T246 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.4029286325 |
|
|
May 21 02:57:36 PM PDT 24 |
May 21 02:57:55 PM PDT 24 |
1373350771 ps |
| T247 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3533992374 |
|
|
May 21 02:57:47 PM PDT 24 |
May 21 03:05:06 PM PDT 24 |
14490879029 ps |
| T248 |
/workspace/coverage/default/19.sram_ctrl_bijection.739843437 |
|
|
May 21 02:58:22 PM PDT 24 |
May 21 03:24:06 PM PDT 24 |
100685816562 ps |
| T249 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1303833647 |
|
|
May 21 02:58:03 PM PDT 24 |
May 21 03:01:28 PM PDT 24 |
7849755035 ps |
| T115 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3454836718 |
|
|
May 21 03:01:56 PM PDT 24 |
May 21 03:02:14 PM PDT 24 |
651559153 ps |
| T250 |
/workspace/coverage/default/0.sram_ctrl_bijection.4237101786 |
|
|
May 21 02:57:23 PM PDT 24 |
May 21 03:14:16 PM PDT 24 |
112688720473 ps |
| T251 |
/workspace/coverage/default/31.sram_ctrl_regwen.1089898857 |
|
|
May 21 02:59:59 PM PDT 24 |
May 21 03:02:26 PM PDT 24 |
1023968941 ps |
| T252 |
/workspace/coverage/default/25.sram_ctrl_executable.463474426 |
|
|
May 21 02:59:10 PM PDT 24 |
May 21 03:19:35 PM PDT 24 |
172956679842 ps |
| T253 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3171174544 |
|
|
May 21 02:57:56 PM PDT 24 |
May 21 02:58:21 PM PDT 24 |
2956905175 ps |
| T254 |
/workspace/coverage/default/23.sram_ctrl_partial_access.2880213413 |
|
|
May 21 02:58:52 PM PDT 24 |
May 21 02:59:02 PM PDT 24 |
13706817943 ps |
| T255 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2158436699 |
|
|
May 21 02:57:26 PM PDT 24 |
May 21 02:57:40 PM PDT 24 |
1356395129 ps |
| T256 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.2289852677 |
|
|
May 21 02:58:26 PM PDT 24 |
May 21 03:00:56 PM PDT 24 |
23746609355 ps |
| T142 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3724762212 |
|
|
May 21 03:01:55 PM PDT 24 |
May 21 03:11:26 PM PDT 24 |
27707479479 ps |
| T257 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.47825960 |
|
|
May 21 03:02:39 PM PDT 24 |
May 21 03:03:13 PM PDT 24 |
13189682255 ps |
| T258 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.229870531 |
|
|
May 21 03:01:43 PM PDT 24 |
May 21 03:06:49 PM PDT 24 |
28085807027 ps |
| T259 |
/workspace/coverage/default/18.sram_ctrl_alert_test.505931683 |
|
|
May 21 02:58:19 PM PDT 24 |
May 21 02:58:26 PM PDT 24 |
16314245 ps |
| T260 |
/workspace/coverage/default/31.sram_ctrl_partial_access.3052646992 |
|
|
May 21 02:59:51 PM PDT 24 |
May 21 03:00:50 PM PDT 24 |
1660433570 ps |
| T261 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1545611182 |
|
|
May 21 02:59:35 PM PDT 24 |
May 21 03:03:12 PM PDT 24 |
15532680628 ps |
| T262 |
/workspace/coverage/default/28.sram_ctrl_executable.3580364691 |
|
|
May 21 02:59:30 PM PDT 24 |
May 21 03:05:16 PM PDT 24 |
23597094966 ps |
| T263 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.1201255192 |
|
|
May 21 02:58:56 PM PDT 24 |
May 21 03:03:54 PM PDT 24 |
18467756998 ps |
| T264 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.2874527929 |
|
|
May 21 02:57:28 PM PDT 24 |
May 21 03:00:57 PM PDT 24 |
3736969533 ps |
| T265 |
/workspace/coverage/default/19.sram_ctrl_regwen.3612237247 |
|
|
May 21 02:58:19 PM PDT 24 |
May 21 03:01:23 PM PDT 24 |
6961692006 ps |
| T266 |
/workspace/coverage/default/45.sram_ctrl_alert_test.4113676774 |
|
|
May 21 03:02:32 PM PDT 24 |
May 21 03:02:34 PM PDT 24 |
22360449 ps |
| T267 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1308500289 |
|
|
May 21 02:57:23 PM PDT 24 |
May 21 02:57:51 PM PDT 24 |
2761425104 ps |
| T268 |
/workspace/coverage/default/3.sram_ctrl_alert_test.3071414754 |
|
|
May 21 02:57:31 PM PDT 24 |
May 21 02:57:38 PM PDT 24 |
20466209 ps |
| T269 |
/workspace/coverage/default/23.sram_ctrl_bijection.3581392370 |
|
|
May 21 02:58:50 PM PDT 24 |
May 21 03:28:37 PM PDT 24 |
81641567078 ps |
| T270 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1823762043 |
|
|
May 21 03:02:43 PM PDT 24 |
May 21 03:02:51 PM PDT 24 |
148847627 ps |
| T271 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.239994607 |
|
|
May 21 03:01:51 PM PDT 24 |
May 21 03:01:56 PM PDT 24 |
712152905 ps |
| T272 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.3629951726 |
|
|
May 21 03:00:28 PM PDT 24 |
May 21 03:01:38 PM PDT 24 |
42715352513 ps |
| T273 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2912994761 |
|
|
May 21 02:57:48 PM PDT 24 |
May 21 02:58:00 PM PDT 24 |
1091426005 ps |
| T274 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.3534916618 |
|
|
May 21 03:01:45 PM PDT 24 |
May 21 03:35:52 PM PDT 24 |
109084716807 ps |
| T275 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.2860262747 |
|
|
May 21 02:59:28 PM PDT 24 |
May 21 03:00:45 PM PDT 24 |
9065701453 ps |
| T276 |
/workspace/coverage/default/22.sram_ctrl_regwen.1035582963 |
|
|
May 21 02:58:48 PM PDT 24 |
May 21 03:18:15 PM PDT 24 |
18085035680 ps |
| T277 |
/workspace/coverage/default/27.sram_ctrl_regwen.860922077 |
|
|
May 21 02:59:23 PM PDT 24 |
May 21 03:17:51 PM PDT 24 |
11558626121 ps |
| T278 |
/workspace/coverage/default/4.sram_ctrl_bijection.1242350701 |
|
|
May 21 02:57:30 PM PDT 24 |
May 21 03:33:26 PM PDT 24 |
414209356732 ps |
| T279 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1436658916 |
|
|
May 21 02:58:01 PM PDT 24 |
May 21 02:58:11 PM PDT 24 |
15499250 ps |
| T280 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1044124228 |
|
|
May 21 03:03:05 PM PDT 24 |
May 21 03:03:38 PM PDT 24 |
765864181 ps |
| T281 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.225202677 |
|
|
May 21 02:57:37 PM PDT 24 |
May 21 03:19:10 PM PDT 24 |
52614216324 ps |
| T282 |
/workspace/coverage/default/4.sram_ctrl_alert_test.1302421289 |
|
|
May 21 02:57:29 PM PDT 24 |
May 21 02:57:37 PM PDT 24 |
42431754 ps |
| T18 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.4129684762 |
|
|
May 21 02:57:22 PM PDT 24 |
May 21 02:57:31 PM PDT 24 |
337259989 ps |
| T34 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2398878274 |
|
|
May 21 02:59:25 PM PDT 24 |
May 21 03:00:38 PM PDT 24 |
20147398970 ps |
| T35 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.631886084 |
|
|
May 21 02:57:51 PM PDT 24 |
May 21 03:00:20 PM PDT 24 |
7164881759 ps |
| T36 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1151258755 |
|
|
May 21 03:01:30 PM PDT 24 |
May 21 03:02:39 PM PDT 24 |
3186524594 ps |
| T37 |
/workspace/coverage/default/2.sram_ctrl_regwen.3607776383 |
|
|
May 21 02:57:28 PM PDT 24 |
May 21 03:11:35 PM PDT 24 |
40760979648 ps |
| T38 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.1214804346 |
|
|
May 21 03:02:28 PM PDT 24 |
May 21 03:03:08 PM PDT 24 |
725889141 ps |
| T39 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3012253690 |
|
|
May 21 02:57:45 PM PDT 24 |
May 21 02:59:50 PM PDT 24 |
3404555680 ps |
| T40 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1874342038 |
|
|
May 21 02:58:32 PM PDT 24 |
May 21 02:58:35 PM PDT 24 |
41481039 ps |
| T41 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.1582995559 |
|
|
May 21 02:59:33 PM PDT 24 |
May 21 03:13:59 PM PDT 24 |
156683418765 ps |
| T42 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3080858260 |
|
|
May 21 02:57:36 PM PDT 24 |
May 21 02:58:18 PM PDT 24 |
4051720030 ps |
| T283 |
/workspace/coverage/default/25.sram_ctrl_bijection.127870268 |
|
|
May 21 02:59:03 PM PDT 24 |
May 21 03:12:53 PM PDT 24 |
832180266690 ps |
| T284 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.1429774177 |
|
|
May 21 02:57:53 PM PDT 24 |
May 21 02:58:52 PM PDT 24 |
1865293600 ps |
| T285 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.474450668 |
|
|
May 21 02:57:48 PM PDT 24 |
May 21 03:00:22 PM PDT 24 |
2952139520 ps |
| T286 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3953817204 |
|
|
May 21 03:02:56 PM PDT 24 |
May 21 03:05:24 PM PDT 24 |
114788917828 ps |
| T287 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.3343386147 |
|
|
May 21 03:00:17 PM PDT 24 |
May 21 03:02:46 PM PDT 24 |
6900913950 ps |
| T288 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2520094700 |
|
|
May 21 03:02:04 PM PDT 24 |
May 21 03:03:35 PM PDT 24 |
3384588771 ps |
| T289 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.91514539 |
|
|
May 21 02:57:24 PM PDT 24 |
May 21 02:57:34 PM PDT 24 |
696592303 ps |
| T290 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2031022739 |
|
|
May 21 02:58:07 PM PDT 24 |
May 21 02:58:28 PM PDT 24 |
1377120163 ps |
| T291 |
/workspace/coverage/default/39.sram_ctrl_alert_test.2045850805 |
|
|
May 21 03:01:20 PM PDT 24 |
May 21 03:01:22 PM PDT 24 |
43821359 ps |
| T292 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1797892046 |
|
|
May 21 03:02:55 PM PDT 24 |
May 21 03:03:09 PM PDT 24 |
4625837750 ps |
| T293 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3733958445 |
|
|
May 21 03:00:04 PM PDT 24 |
May 21 03:01:54 PM PDT 24 |
780097710 ps |
| T294 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2207003980 |
|
|
May 21 02:58:00 PM PDT 24 |
May 21 03:22:07 PM PDT 24 |
280296266458 ps |
| T295 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.494998232 |
|
|
May 21 03:01:14 PM PDT 24 |
May 21 03:02:30 PM PDT 24 |
2670309413 ps |
| T296 |
/workspace/coverage/default/28.sram_ctrl_alert_test.3966426275 |
|
|
May 21 02:59:29 PM PDT 24 |
May 21 02:59:31 PM PDT 24 |
45159249 ps |
| T297 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.959814940 |
|
|
May 21 03:00:22 PM PDT 24 |
May 21 03:16:17 PM PDT 24 |
62090299091 ps |
| T298 |
/workspace/coverage/default/37.sram_ctrl_executable.2035385409 |
|
|
May 21 03:01:00 PM PDT 24 |
May 21 03:15:02 PM PDT 24 |
28217369532 ps |
| T299 |
/workspace/coverage/default/22.sram_ctrl_bijection.270058749 |
|
|
May 21 02:58:40 PM PDT 24 |
May 21 03:09:53 PM PDT 24 |
39637420232 ps |
| T300 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.815968635 |
|
|
May 21 02:57:55 PM PDT 24 |
May 21 02:58:51 PM PDT 24 |
8638925985 ps |
| T301 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.518855909 |
|
|
May 21 02:58:17 PM PDT 24 |
May 21 03:15:52 PM PDT 24 |
60532875349 ps |
| T302 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.1156531223 |
|
|
May 21 02:58:08 PM PDT 24 |
May 21 03:02:08 PM PDT 24 |
11932867077 ps |
| T303 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.1427664762 |
|
|
May 21 02:58:58 PM PDT 24 |
May 21 03:02:33 PM PDT 24 |
14198847174 ps |
| T116 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1855907220 |
|
|
May 21 03:00:14 PM PDT 24 |
May 21 03:00:42 PM PDT 24 |
9718736618 ps |
| T304 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1235752702 |
|
|
May 21 02:57:29 PM PDT 24 |
May 21 04:14:53 PM PDT 24 |
249431069476 ps |
| T305 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2304906263 |
|
|
May 21 02:58:11 PM PDT 24 |
May 21 02:59:25 PM PDT 24 |
43612758664 ps |
| T306 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1449609027 |
|
|
May 21 02:57:38 PM PDT 24 |
May 21 02:57:57 PM PDT 24 |
895129509 ps |
| T307 |
/workspace/coverage/default/17.sram_ctrl_executable.3319983974 |
|
|
May 21 02:58:06 PM PDT 24 |
May 21 03:12:54 PM PDT 24 |
23217096507 ps |
| T308 |
/workspace/coverage/default/25.sram_ctrl_smoke.4019881825 |
|
|
May 21 02:59:03 PM PDT 24 |
May 21 03:01:13 PM PDT 24 |
1553975677 ps |
| T309 |
/workspace/coverage/default/43.sram_ctrl_executable.2712723270 |
|
|
May 21 03:02:01 PM PDT 24 |
May 21 03:14:00 PM PDT 24 |
17922653034 ps |
| T310 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2274583041 |
|
|
May 21 03:01:37 PM PDT 24 |
May 21 03:06:41 PM PDT 24 |
6020325881 ps |
| T311 |
/workspace/coverage/default/47.sram_ctrl_stress_all.100236078 |
|
|
May 21 03:02:57 PM PDT 24 |
May 21 03:51:29 PM PDT 24 |
48220214886 ps |
| T312 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.4126873765 |
|
|
May 21 02:59:18 PM PDT 24 |
May 21 03:02:01 PM PDT 24 |
22980319250 ps |
| T313 |
/workspace/coverage/default/48.sram_ctrl_smoke.2060337844 |
|
|
May 21 03:02:56 PM PDT 24 |
May 21 03:03:11 PM PDT 24 |
2186081640 ps |