Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13307025	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

87110504

1

T1

5618

T2

1578

T3

8972

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	49015725	1			T1	2777		T2	4125		T3	4393
values[0x0]	24382254	1			T1	1470		T2	1413		T3	2210
values[0x1]	27019550	1			T1	1371		T2	2808		T3	2369

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6793100	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

93624429

1

T1

5618

T2

4984

T3

8972

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	361635	1			T2	23		T3	44		T6	6
valid_sources[0x01]	367223	1			T2	26		T3	38		T6	4
valid_sources[0x02]	349798	1			T2	29		T3	42		T6	5
valid_sources[0x03]	344601	1			T2	24		T3	37		T6	3
valid_sources[0x04]	352683	1			T2	32		T3	43		T6	13
valid_sources[0x05]	330772	1			T2	21		T3	40		T6	6
valid_sources[0x06]	343700	1			T2	32		T3	36		T6	3
valid_sources[0x07]	343928	1			T2	29		T3	32		T6	6
valid_sources[0x08]	335728	1			T2	29		T3	27		T6	2
valid_sources[0x09]	338905	1			T2	47		T3	19		T6	10
valid_sources[0x0a]	329551	1			T2	25		T3	31		T6	3
valid_sources[0x0b]	334431	1			T2	38		T3	36		T6	5
valid_sources[0x0c]	334636	1			T2	26		T3	34		T6	1
valid_sources[0x0d]	375897	1			T2	37		T3	48		T6	5
valid_sources[0x0e]	343655	1			T2	39		T3	24		T6	5
valid_sources[0x0f]	1608586	1			T2	39		T3	43		T6	2
valid_sources[0x10]	366461	1			T2	29		T3	40		T6	6
valid_sources[0x11]	334310	1			T2	38		T3	31		T6	4
valid_sources[0x12]	339619	1			T2	27		T3	30		T6	1
valid_sources[0x13]	336351	1			T2	28		T3	40		T6	6
valid_sources[0x14]	331934	1			T2	26		T3	28		T6	9
valid_sources[0x15]	346795	1			T2	36		T3	29		T6	4
valid_sources[0x16]	334092	1			T2	28		T3	31		T6	1
valid_sources[0x17]	333305	1			T2	35		T3	29		T6	1
valid_sources[0x18]	358564	1			T2	28		T3	38		T6	11
valid_sources[0x19]	344620	1			T2	18		T3	32		T6	13
valid_sources[0x1a]	336405	1			T2	36		T3	39		T6	2
valid_sources[0x1b]	394535	1			T2	30		T3	35		T6	2
valid_sources[0x1c]	355595	1			T2	27		T3	31		T6	3
valid_sources[0x1d]	332257	1			T2	26		T3	55		T6	2
valid_sources[0x1e]	562383	1			T2	40		T3	36		T6	8
valid_sources[0x1f]	329078	1			T2	40		T3	23		T6	8
valid_sources[0x20]	370676	1			T2	51		T3	28		T6	3
valid_sources[0x21]	331179	1			T2	41		T3	28		T6	6
valid_sources[0x22]	329946	1			T2	32		T3	30		T6	2
valid_sources[0x23]	1236152	1			T2	20		T3	41		T6	7
valid_sources[0x24]	367451	1			T2	24		T3	39		T6	5
valid_sources[0x25]	336475	1			T2	33		T3	43		T6	5
valid_sources[0x26]	359083	1			T2	32		T3	22		T6	2
valid_sources[0x27]	341425	1			T2	37		T3	32		T6	4
valid_sources[0x28]	341199	1			T2	37		T3	26		T6	2
valid_sources[0x29]	333931	1			T2	51		T3	30		T6	5
valid_sources[0x2a]	355614	1			T2	31		T3	18		T6	7
valid_sources[0x2b]	334386	1			T2	28		T3	41		T6	4
valid_sources[0x2c]	331137	1			T2	28		T3	26		T6	7
valid_sources[0x2d]	350111	1			T2	39		T3	26		T6	4
valid_sources[0x2e]	331449	1			T2	29		T3	32		T6	4
valid_sources[0x2f]	335197	1			T2	36		T3	41		T6	4
valid_sources[0x30]	390116	1			T2	27		T3	26		T6	6
valid_sources[0x31]	340625	1			T2	36		T3	38		T6	10
valid_sources[0x32]	373168	1			T1	2809		T2	29		T3	44
valid_sources[0x33]	332839	1			T2	34		T3	42		T6	2
valid_sources[0x34]	342323	1			T2	36		T3	46		T6	3
valid_sources[0x35]	334168	1			T2	36		T3	39		T6	7
valid_sources[0x36]	355281	1			T2	31		T3	31		T6	3
valid_sources[0x37]	334495	1			T2	22		T3	34		T6	2
valid_sources[0x38]	335258	1			T2	44		T3	30		T6	6
valid_sources[0x39]	336164	1			T2	23		T3	41		T4	823
valid_sources[0x3a]	332315	1			T2	31		T3	30		T6	5
valid_sources[0x3b]	352953	1			T2	33		T3	36		T4	704
valid_sources[0x3c]	372273	1			T2	38		T3	33		T6	8
valid_sources[0x3d]	331320	1			T2	33		T3	29		T6	4
valid_sources[0x3e]	344587	1			T2	29		T3	25		T6	3
valid_sources[0x3f]	332451	1			T2	31		T3	33		T6	4
valid_sources[0x40]	335412	1			T2	40		T3	46		T4	716
valid_sources[0x41]	358469	1			T2	35		T3	31		T6	5
valid_sources[0x42]	335054	1			T2	36		T3	45		T6	1
valid_sources[0x43]	349222	1			T2	26		T3	41		T6	6
valid_sources[0x44]	334307	1			T2	36		T3	30		T6	10
valid_sources[0x45]	347604	1			T2	24		T3	29		T6	4
valid_sources[0x46]	342867	1			T2	40		T3	42		T6	2
valid_sources[0x47]	381305	1			T2	41		T3	48		T6	3
valid_sources[0x48]	423628	1			T2	36		T3	31		T6	5
valid_sources[0x49]	359133	1			T2	27		T3	58		T6	2
valid_sources[0x4a]	330330	1			T2	30		T3	30		T6	5
valid_sources[0x4b]	360929	1			T2	30		T3	34		T6	5
valid_sources[0x4c]	330810	1			T2	25		T3	28		T6	6
valid_sources[0x4d]	359542	1			T2	26		T3	40		T6	16
valid_sources[0x4e]	340612	1			T2	27		T3	37		T6	2
valid_sources[0x4f]	341496	1			T2	43		T3	33		T6	4
valid_sources[0x50]	373920	1			T2	28		T3	42		T6	8
valid_sources[0x51]	331185	1			T2	30		T3	34		T6	7
valid_sources[0x52]	380776	1			T2	31		T3	26		T6	4
valid_sources[0x53]	444207	1			T2	35		T3	37		T6	2
valid_sources[0x54]	370082	1			T2	20		T3	37		T6	6
valid_sources[0x55]	333501	1			T2	33		T3	32		T6	3
valid_sources[0x56]	346593	1			T2	32		T3	25		T6	11
valid_sources[0x57]	397815	1			T2	44		T3	24		T6	4
valid_sources[0x58]	353902	1			T2	41		T3	36		T6	1
valid_sources[0x59]	330977	1			T2	35		T3	23		T6	1
valid_sources[0x5a]	334941	1			T2	42		T3	46		T6	4
valid_sources[0x5b]	335567	1			T2	35		T3	41		T6	5
valid_sources[0x5c]	345952	1			T2	31		T3	39		T6	2
valid_sources[0x5d]	350105	1			T2	29		T3	41		T6	5
valid_sources[0x5e]	336771	1			T2	38		T3	38		T6	3
valid_sources[0x5f]	332729	1			T2	44		T3	33		T6	5
valid_sources[0x60]	331661	1			T2	31		T3	55		T6	5
valid_sources[0x61]	1153676	1			T2	25		T3	30		T6	4
valid_sources[0x62]	335845	1			T2	31		T3	33		T6	3
valid_sources[0x63]	534838	1			T2	30		T3	40		T6	4
valid_sources[0x64]	576682	1			T2	41		T3	30		T6	5
valid_sources[0x65]	338687	1			T2	38		T3	38		T6	5
valid_sources[0x66]	355346	1			T2	30		T3	44		T6	5
valid_sources[0x67]	341413	1			T2	28		T3	39		T6	6
valid_sources[0x68]	350992	1			T2	21		T3	35		T6	10
valid_sources[0x69]	329636	1			T2	26		T3	35		T6	2
valid_sources[0x6a]	353321	1			T2	26		T3	58		T6	8
valid_sources[0x6b]	368319	1			T2	29		T3	48		T6	4
valid_sources[0x6c]	337951	1			T2	24		T3	33		T6	3
valid_sources[0x6d]	370285	1			T2	34		T3	29		T6	2
valid_sources[0x6e]	338815	1			T2	26		T3	36		T6	11
valid_sources[0x6f]	343862	1			T2	40		T3	46		T6	7
valid_sources[0x70]	339470	1			T2	46		T3	29		T6	9
valid_sources[0x71]	342155	1			T2	39		T3	25		T6	4
valid_sources[0x72]	338953	1			T2	42		T3	41		T6	7
valid_sources[0x73]	344316	1			T2	25		T3	31		T6	3
valid_sources[0x74]	350596	1			T2	20		T3	34		T6	13
valid_sources[0x75]	339870	1			T2	40		T3	31		T6	7
valid_sources[0x76]	351992	1			T2	31		T3	19		T6	3
valid_sources[0x77]	369621	1			T2	45		T3	34		T6	3
valid_sources[0x78]	339304	1			T2	34		T3	47		T6	2
valid_sources[0x79]	341891	1			T2	31		T3	38		T6	11
valid_sources[0x7a]	336472	1			T2	27		T3	39		T6	12
valid_sources[0x7b]	464152	1			T2	35		T3	27		T6	6
valid_sources[0x7c]	405338	1			T2	40		T3	36		T6	2
valid_sources[0x7d]	333680	1			T2	31		T3	41		T6	8
valid_sources[0x7e]	401304	1			T2	35		T3	20		T6	2
valid_sources[0x7f]	338300	1			T2	28		T3	24		T6	4
valid_sources[0x80]	389628	1			T2	33		T3	31		T6	13

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

42317844

1

T1

2777

T2

804

T3

4393

values[0x0]

all_enables

biggest_size

22402950

1

T1

1470

T2

388

T3

2210

values[0x1]

all_enables

biggest_size

22389710

1

T1

1371

T2

386

T3

2369

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	128567	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

93971

1

T2

3

T3

1

T4

67

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	26596	1			T8	32		T12	6		T30	455
values[0x0]	97008	1			T1	1		T2	6		T3	1
values[0x1]	98934	1			T1	1		T2	6		T3	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	111667	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

110871

1

T2

4

T3

1

T4

86

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	843	1			T5	4		T12	2		T23	5
valid_sources[0x01]	648	1			T5	1		T12	1		T30	1
valid_sources[0x02]	3111	1			T12	1		T23	2		T50	1
valid_sources[0x03]	741	1			T12	1		T23	5		T31	64
valid_sources[0x04]	681	1			T5	3		T23	2		T50	1
valid_sources[0x05]	741	1			T5	6		T23	5		T24	6
valid_sources[0x06]	1112	1			T5	3		T12	2		T23	5
valid_sources[0x07]	733	1			T23	5		T50	1		T24	1
valid_sources[0x08]	793	1			T5	1		T23	5		T31	3
valid_sources[0x09]	1218	1			T5	1		T30	1		T23	1
valid_sources[0x0a]	827	1			T5	2		T7	12		T8	27
valid_sources[0x0b]	1003	1			T5	1		T23	6		T24	6
valid_sources[0x0c]	712	1			T5	1		T23	3		T50	2
valid_sources[0x0d]	713	1			T5	3		T23	5		T24	4
valid_sources[0x0e]	881	1			T5	1		T12	2		T23	2
valid_sources[0x0f]	726	1			T30	1		T23	5		T24	5
valid_sources[0x10]	684	1			T5	1		T12	1		T23	6
valid_sources[0x11]	972	1			T5	1		T23	2		T31	169
valid_sources[0x12]	1055	1			T6	1		T5	1		T23	4
valid_sources[0x13]	2760	1			T5	1		T23	4		T50	1
valid_sources[0x14]	794	1			T5	1		T23	5		T24	4
valid_sources[0x15]	845	1			T5	2		T15	24		T30	2
valid_sources[0x16]	717	1			T5	1		T12	1		T30	4
valid_sources[0x17]	841	1			T5	2		T23	8		T31	1
valid_sources[0x18]	714	1			T12	2		T23	3		T50	2
valid_sources[0x19]	911	1			T5	1		T23	6		T31	1
valid_sources[0x1a]	698	1			T5	1		T12	1		T23	4
valid_sources[0x1b]	819	1			T5	3		T23	2		T24	5
valid_sources[0x1c]	788	1			T23	8		T50	1		T31	3
valid_sources[0x1d]	928	1			T5	2		T30	58		T23	2
valid_sources[0x1e]	782	1			T5	4		T23	5		T24	1
valid_sources[0x1f]	668	1			T12	1		T23	3		T50	1
valid_sources[0x20]	758	1			T5	1		T12	2		T23	4
valid_sources[0x21]	925	1			T5	3		T11	199		T23	6
valid_sources[0x22]	713	1			T23	2		T24	1		T67	2
valid_sources[0x23]	740	1			T12	3		T23	5		T24	1
valid_sources[0x24]	689	1			T5	2		T15	2		T23	3
valid_sources[0x25]	1305	1			T13	187		T23	4		T24	1
valid_sources[0x26]	950	1			T23	2		T31	17		T24	3
valid_sources[0x27]	717	1			T5	5		T23	4		T24	1
valid_sources[0x28]	732	1			T5	3		T23	5		T24	4
valid_sources[0x29]	828	1			T5	1		T23	1		T31	123
valid_sources[0x2a]	825	1			T23	6		T31	75		T24	3
valid_sources[0x2b]	743	1			T5	4		T23	3		T24	3
valid_sources[0x2c]	1069	1			T5	2		T15	5		T23	4
valid_sources[0x2d]	708	1			T23	4		T24	4		T14	3
valid_sources[0x2e]	745	1			T23	3		T14	1		T137	2
valid_sources[0x2f]	800	1			T5	4		T23	5		T31	1
valid_sources[0x30]	1143	1			T5	2		T30	75		T23	7
valid_sources[0x31]	680	1			T5	1		T23	4		T24	8
valid_sources[0x32]	719	1			T5	1		T23	7		T31	4
valid_sources[0x33]	669	1			T5	3		T23	6		T31	3
valid_sources[0x34]	743	1			T30	92		T23	5		T24	2
valid_sources[0x35]	719	1			T5	1		T23	5		T31	6
valid_sources[0x36]	855	1			T5	2		T23	5		T31	14
valid_sources[0x37]	1078	1			T12	1		T23	2		T50	1
valid_sources[0x38]	1075	1			T5	2		T12	1		T23	7
valid_sources[0x39]	804	1			T5	1		T12	1		T23	7
valid_sources[0x3a]	845	1			T5	1		T30	6		T23	4
valid_sources[0x3b]	710	1			T5	2		T23	4		T24	9
valid_sources[0x3c]	837	1			T5	2		T12	2		T23	3
valid_sources[0x3d]	992	1			T5	1		T23	5		T50	1
valid_sources[0x3e]	2106	1			T5	1		T23	3		T31	85
valid_sources[0x3f]	906	1			T5	1		T12	1		T23	3
valid_sources[0x40]	824	1			T23	3		T50	1		T31	108
valid_sources[0x41]	1260	1			T3	2		T5	2		T30	232
valid_sources[0x42]	788	1			T12	1		T23	2		T24	2
valid_sources[0x43]	671	1			T12	2		T30	1		T23	3
valid_sources[0x44]	996	1			T5	3		T12	2		T23	5
valid_sources[0x45]	1003	1			T5	1		T23	6		T31	1
valid_sources[0x46]	850	1			T5	2		T23	3		T24	1
valid_sources[0x47]	743	1			T23	9		T31	3		T24	1
valid_sources[0x48]	827	1			T5	1		T23	3		T24	2
valid_sources[0x49]	932	1			T5	3		T30	100		T23	4
valid_sources[0x4a]	954	1			T5	4		T12	1		T23	5
valid_sources[0x4b]	701	1			T5	2		T24	2		T137	1
valid_sources[0x4c]	855	1			T5	1		T23	2		T24	7
valid_sources[0x4d]	713	1			T5	2		T23	8		T50	3
valid_sources[0x4e]	662	1			T5	2		T23	6		T24	6
valid_sources[0x4f]	841	1			T5	2		T12	2		T31	170
valid_sources[0x50]	706	1			T12	1		T23	6		T24	2
valid_sources[0x51]	1023	1			T5	4		T23	6		T87	5
valid_sources[0x52]	1135	1			T5	1		T12	2		T23	3
valid_sources[0x53]	699	1			T23	2		T24	1		T14	4
valid_sources[0x54]	990	1			T23	5		T50	1		T31	1
valid_sources[0x55]	2067	1			T5	5		T23	6		T24	2
valid_sources[0x56]	788	1			T5	1		T23	5		T31	1
valid_sources[0x57]	991	1			T30	93		T23	4		T31	125
valid_sources[0x58]	852	1			T5	2		T30	2		T23	5
valid_sources[0x59]	641	1			T5	1		T23	6		T50	1
valid_sources[0x5a]	650	1			T5	1		T23	5		T50	2
valid_sources[0x5b]	687	1			T5	3		T23	2		T31	2
valid_sources[0x5c]	697	1			T5	1		T23	5		T24	4
valid_sources[0x5d]	715	1			T5	1		T23	5		T24	1
valid_sources[0x5e]	768	1			T23	4		T14	8		T72	1
valid_sources[0x5f]	963	1			T5	1		T23	1		T31	180
valid_sources[0x60]	767	1			T5	3		T23	5		T24	5
valid_sources[0x61]	925	1			T5	3		T23	3		T24	1
valid_sources[0x62]	833	1			T5	3		T30	3		T23	4
valid_sources[0x63]	1009	1			T5	2		T23	6		T24	3
valid_sources[0x64]	613	1			T5	1		T23	4		T50	2
valid_sources[0x65]	703	1			T5	1		T12	2		T23	5
valid_sources[0x66]	1119	1			T5	1		T12	1		T30	239
valid_sources[0x67]	776	1			T12	1		T23	4		T50	1
valid_sources[0x68]	982	1			T5	4		T30	110		T23	5
valid_sources[0x69]	742	1			T5	1		T23	3		T31	1
valid_sources[0x6a]	652	1			T5	1		T23	3		T24	2
valid_sources[0x6b]	644	1			T5	1		T23	14		T24	1
valid_sources[0x6c]	899	1			T23	4		T31	76		T24	4
valid_sources[0x6d]	865	1			T12	3		T30	3		T23	3
valid_sources[0x6e]	744	1			T5	1		T23	5		T24	1
valid_sources[0x6f]	875	1			T5	4		T23	10		T50	1
valid_sources[0x70]	905	1			T5	3		T30	4		T23	4
valid_sources[0x71]	775	1			T30	4		T23	2		T50	1
valid_sources[0x72]	717	1			T5	1		T24	9		T137	4
valid_sources[0x73]	767	1			T23	3		T137	3		T80	1
valid_sources[0x74]	665	1			T5	2		T23	1		T31	1
valid_sources[0x75]	1369	1			T5	1		T8	208		T23	7
valid_sources[0x76]	727	1			T5	1		T23	1		T24	5
valid_sources[0x77]	820	1			T12	2		T15	11		T23	3
valid_sources[0x78]	853	1			T12	1		T23	2		T24	2
valid_sources[0x79]	778	1			T5	2		T12	1		T23	5
valid_sources[0x7a]	664	1			T5	2		T23	5		T31	1
valid_sources[0x7b]	674	1			T5	1		T30	6		T23	1
valid_sources[0x7c]	655	1			T5	4		T30	1		T23	3
valid_sources[0x7d]	845	1			T5	1		T30	2		T23	3
valid_sources[0x7e]	943	1			T5	1		T12	1		T23	4
valid_sources[0x7f]	913	1			T5	1		T23	3		T50	4
valid_sources[0x80]	733	1			T5	4		T23	4		T24	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

17449

1

T8

19

T12

3

T30

421

values[0x0]

all_enables

biggest_size

44715

1

T2

3

T3

1

T4

41

values[0x1]

all_enables

biggest_size

31807

1

T4

26

T5

22

T8

22