Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4248727890 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1091732870 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2407739303 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4198034008 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.960690333 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3827899479 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2337150861 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.4154653977 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1372483058 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3825493110 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2905835252 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.170377521 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.776053279 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.396564 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2371518415 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3778864545 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4057864879 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3923998289 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1703835645 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.759030741 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2530780624 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.500851013 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.4094822367 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2499796018 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3981433838 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3066155638 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.85369286 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2996846805 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3833246881 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1426615635 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2586547663 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.102768613 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4267057221 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4012328562 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.955340571 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.476096201 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1768911172 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.215879890 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.4180884116 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3532013829 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1460153821 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.978257566 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3643285649 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3875411331 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.709269599 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2428225901 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2561064992 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3670263250 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2834906194 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.339770511 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2951906042 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.212356685 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1326321356 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1635505982 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2779768553 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3954272243 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2368371183 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2224716823 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3663953654 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3469609636 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.106772629 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.809741128 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1898659788 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.886248696 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2699108590 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1580358193 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.953112784 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2900996473 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2627355701 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2626939124 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.964911440 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2318651002 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3179517523 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1013311843 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.517388746 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.5574524 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2520869048 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1193377962 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3561837972 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1702140556 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3276212954 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.301659724 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1614344438 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2739030320 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2112617436 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.410470196 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.36334398 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1045325665 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.543243494 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1343034803 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2962849622 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1882903541 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.226497801 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2783406047 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.623234746 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3779232296 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1858904957 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3558691395 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.77231572 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.195091781 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3060763483 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3949084955 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4233890789 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1577289484 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3355759025 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2345833242 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3631260525 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.262540750 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.4064545237 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2652892912 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1926953796 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4122531339 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1533392761 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.242525174 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1680943350 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3104067748 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.4116055520 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1678282744 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1530237439 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.4293280003 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1222877547 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1087854306 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.695935206 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3276533259 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1730781019 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.654692038 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2437840195 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.870749664 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1962183888 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1835862967 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1794161711 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1104855912 |
/workspace/coverage/default/0.sram_ctrl_bijection.469782544 |
/workspace/coverage/default/0.sram_ctrl_executable.3268989740 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.479604274 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1019924272 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3892650401 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3453031474 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.472700036 |
/workspace/coverage/default/0.sram_ctrl_partial_access.173298012 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3491081766 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2461675423 |
/workspace/coverage/default/0.sram_ctrl_regwen.2531089957 |
/workspace/coverage/default/0.sram_ctrl_smoke.851195420 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2053748226 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.544525873 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.737739419 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3213095600 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1732917064 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2786990128 |
/workspace/coverage/default/1.sram_ctrl_bijection.1450387119 |
/workspace/coverage/default/1.sram_ctrl_executable.3955604960 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3863754257 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3632488255 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1723643065 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3508066600 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1248422342 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3597119262 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1510196257 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2551246506 |
/workspace/coverage/default/1.sram_ctrl_regwen.821230198 |
/workspace/coverage/default/1.sram_ctrl_smoke.1352390198 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2236502016 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1138634627 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3095159461 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.14960627 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1771076286 |
/workspace/coverage/default/10.sram_ctrl_bijection.1517138775 |
/workspace/coverage/default/10.sram_ctrl_executable.3872000307 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1035404662 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.3482804758 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1669264831 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3143684078 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1832550682 |
/workspace/coverage/default/10.sram_ctrl_partial_access.1242666359 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.187606601 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.27762440 |
/workspace/coverage/default/10.sram_ctrl_regwen.2993117223 |
/workspace/coverage/default/10.sram_ctrl_smoke.779212402 |
/workspace/coverage/default/10.sram_ctrl_stress_all.1139693153 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2307685099 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.395568886 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2669817771 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2389816911 |
/workspace/coverage/default/11.sram_ctrl_bijection.953399831 |
/workspace/coverage/default/11.sram_ctrl_executable.3474738342 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2582853727 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2982899180 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1404592032 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.2467094615 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2783185907 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3230396499 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2878717854 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.4229077532 |
/workspace/coverage/default/11.sram_ctrl_regwen.2980075916 |
/workspace/coverage/default/11.sram_ctrl_smoke.3569594591 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2618142942 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.722759053 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1284027062 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2696774985 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1147788359 |
/workspace/coverage/default/12.sram_ctrl_bijection.310825674 |
/workspace/coverage/default/12.sram_ctrl_executable.1346782732 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.629916129 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.656886625 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2726154693 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3655179428 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3577604864 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4237338331 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.985586498 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1030255724 |
/workspace/coverage/default/12.sram_ctrl_regwen.3521198105 |
/workspace/coverage/default/12.sram_ctrl_smoke.2129288925 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1238584405 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2585453514 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3276106469 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2309840662 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3543227632 |
/workspace/coverage/default/13.sram_ctrl_alert_test.1611192005 |
/workspace/coverage/default/13.sram_ctrl_bijection.1509466391 |
/workspace/coverage/default/13.sram_ctrl_executable.2948822104 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3298286898 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.2314791113 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2061657496 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3813867230 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3456672095 |
/workspace/coverage/default/13.sram_ctrl_partial_access.3977557675 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3199013406 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2148756238 |
/workspace/coverage/default/13.sram_ctrl_regwen.4136296478 |
/workspace/coverage/default/13.sram_ctrl_smoke.1854609103 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3553165016 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2358568020 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3661620898 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2342967657 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1938054148 |
/workspace/coverage/default/14.sram_ctrl_alert_test.1049726665 |
/workspace/coverage/default/14.sram_ctrl_bijection.140372507 |
/workspace/coverage/default/14.sram_ctrl_executable.3593088244 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.4107028882 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2580653835 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2799479499 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.417459790 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.3293635362 |
/workspace/coverage/default/14.sram_ctrl_partial_access.735323138 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2900244082 |
/workspace/coverage/default/14.sram_ctrl_regwen.2776174483 |
/workspace/coverage/default/14.sram_ctrl_smoke.4103136462 |
/workspace/coverage/default/14.sram_ctrl_stress_all.4205526049 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3736731628 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1961760372 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3485215361 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1038564633 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1218078178 |
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/workspace/coverage/default/44.sram_ctrl_executable.339384272 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.228495867 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.1466928440 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2697747258 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.1608936931 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1900160726 |
/workspace/coverage/default/44.sram_ctrl_partial_access.4098033822 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1118946780 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1224172191 |
/workspace/coverage/default/44.sram_ctrl_regwen.40591808 |
/workspace/coverage/default/44.sram_ctrl_smoke.577302887 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.390935833 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3215531494 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3112735738 |
/workspace/coverage/default/45.sram_ctrl_alert_test.890702962 |
/workspace/coverage/default/45.sram_ctrl_bijection.417694623 |
/workspace/coverage/default/45.sram_ctrl_executable.284643240 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1841526720 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.21735231 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3252160423 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.681400110 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1989967527 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1349640407 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2554747008 |
/workspace/coverage/default/45.sram_ctrl_regwen.2619194243 |
/workspace/coverage/default/45.sram_ctrl_smoke.4122434516 |
/workspace/coverage/default/45.sram_ctrl_stress_all.4278158775 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2406507031 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1310212032 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2746938005 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1651153972 |
/workspace/coverage/default/46.sram_ctrl_alert_test.3737856921 |
/workspace/coverage/default/46.sram_ctrl_bijection.4202939718 |
/workspace/coverage/default/46.sram_ctrl_executable.903067528 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.478215796 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.506218587 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3016568685 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.333218313 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2417628170 |
/workspace/coverage/default/46.sram_ctrl_partial_access.4277429125 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3328311489 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3278895033 |
/workspace/coverage/default/46.sram_ctrl_regwen.3636395537 |
/workspace/coverage/default/46.sram_ctrl_smoke.604939347 |
/workspace/coverage/default/46.sram_ctrl_stress_all.1582517105 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1409567667 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2388735246 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3022628654 |
/workspace/coverage/default/47.sram_ctrl_alert_test.1057854792 |
/workspace/coverage/default/47.sram_ctrl_bijection.4146665773 |
/workspace/coverage/default/47.sram_ctrl_executable.2967059270 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2790695341 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1192467874 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2541183517 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.765894898 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3808590652 |
/workspace/coverage/default/47.sram_ctrl_partial_access.662883986 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3849823113 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3221451997 |
/workspace/coverage/default/47.sram_ctrl_regwen.63061505 |
/workspace/coverage/default/47.sram_ctrl_smoke.526611208 |
/workspace/coverage/default/47.sram_ctrl_stress_all.822070061 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3439245145 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.407306379 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2970298026 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1441972531 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3458241560 |
/workspace/coverage/default/48.sram_ctrl_bijection.4028363517 |
/workspace/coverage/default/48.sram_ctrl_executable.1138462061 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1623996123 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2964387556 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.209455800 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.370205352 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.205631633 |
/workspace/coverage/default/48.sram_ctrl_partial_access.668110686 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1154630025 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3965454304 |
/workspace/coverage/default/48.sram_ctrl_regwen.2419364083 |
/workspace/coverage/default/48.sram_ctrl_smoke.3080862645 |
/workspace/coverage/default/48.sram_ctrl_stress_all.2973041940 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3721575359 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.153120353 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2681116865 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2855356234 |
/workspace/coverage/default/49.sram_ctrl_alert_test.2284869949 |
/workspace/coverage/default/49.sram_ctrl_bijection.1628579154 |
/workspace/coverage/default/49.sram_ctrl_executable.528166484 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3547178077 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1362888529 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1013929671 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.331012888 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2409659661 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3316415986 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2779405538 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.469885246 |
/workspace/coverage/default/49.sram_ctrl_regwen.3392207578 |
/workspace/coverage/default/49.sram_ctrl_smoke.2806416732 |
/workspace/coverage/default/49.sram_ctrl_stress_all.100851619 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.724285146 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.37334963 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3674671171 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3332715474 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2412407747 |
/workspace/coverage/default/5.sram_ctrl_bijection.2225931034 |
/workspace/coverage/default/5.sram_ctrl_executable.3884690240 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3480916041 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3063149997 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.957617620 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1986177133 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3239899677 |
/workspace/coverage/default/5.sram_ctrl_partial_access.4149751179 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2663596241 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1362412429 |
/workspace/coverage/default/5.sram_ctrl_regwen.2183371134 |
/workspace/coverage/default/5.sram_ctrl_smoke.2016448540 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2735388083 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.863090503 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3543240100 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1479233261 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3942256039 |
/workspace/coverage/default/6.sram_ctrl_alert_test.332430977 |
/workspace/coverage/default/6.sram_ctrl_bijection.4055137630 |
/workspace/coverage/default/6.sram_ctrl_executable.9439466 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3779652688 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.3354064043 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.355649270 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.3304262797 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2754666365 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2395463537 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.990099149 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2569896473 |
/workspace/coverage/default/6.sram_ctrl_regwen.1415288135 |
/workspace/coverage/default/6.sram_ctrl_smoke.3989284749 |
/workspace/coverage/default/6.sram_ctrl_stress_all.462747286 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3555009938 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1719480952 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3635936687 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2010450816 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3681908266 |
/workspace/coverage/default/7.sram_ctrl_bijection.2137689144 |
/workspace/coverage/default/7.sram_ctrl_executable.4249082290 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3013988655 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.599775113 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1151212005 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2543582414 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4034419569 |
/workspace/coverage/default/7.sram_ctrl_partial_access.770739426 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2876239375 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1572313156 |
/workspace/coverage/default/7.sram_ctrl_regwen.3148059735 |
/workspace/coverage/default/7.sram_ctrl_smoke.3442893812 |
/workspace/coverage/default/7.sram_ctrl_stress_all.2990084139 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3822591202 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1271152977 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3620883738 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.878646086 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3640185927 |
/workspace/coverage/default/8.sram_ctrl_bijection.86149264 |
/workspace/coverage/default/8.sram_ctrl_executable.3360610177 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1784862481 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.325449210 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3632818561 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.337189041 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.868609970 |
/workspace/coverage/default/8.sram_ctrl_partial_access.44071004 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.582300391 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2631973376 |
/workspace/coverage/default/8.sram_ctrl_regwen.831677731 |
/workspace/coverage/default/8.sram_ctrl_smoke.4068409474 |
/workspace/coverage/default/8.sram_ctrl_stress_all.123094180 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2201462080 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.307017864 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2657219730 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.242574729 |
/workspace/coverage/default/9.sram_ctrl_alert_test.4263900853 |
/workspace/coverage/default/9.sram_ctrl_bijection.580775051 |
/workspace/coverage/default/9.sram_ctrl_executable.396569232 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.406172544 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.4282592991 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3828850643 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.132615526 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2219910715 |
/workspace/coverage/default/9.sram_ctrl_partial_access.176770863 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1534461465 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1733364904 |
/workspace/coverage/default/9.sram_ctrl_regwen.3679403887 |
/workspace/coverage/default/9.sram_ctrl_smoke.1090219226 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1471385270 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2051326932 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.568658406 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/44.sram_ctrl_stress_all.816236824 |
|
|
Jun 06 01:42:50 PM PDT 24 |
Jun 06 02:52:31 PM PDT 24 |
74932057993 ps |
T2 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.950887100 |
|
|
Jun 06 01:40:18 PM PDT 24 |
Jun 06 01:40:58 PM PDT 24 |
5082782277 ps |
T3 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1344309314 |
|
|
Jun 06 01:40:18 PM PDT 24 |
Jun 06 01:40:31 PM PDT 24 |
644325398 ps |
T6 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.2682830907 |
|
|
Jun 06 01:41:15 PM PDT 24 |
Jun 06 02:07:29 PM PDT 24 |
64957050647 ps |
T7 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2278153652 |
|
|
Jun 06 01:40:57 PM PDT 24 |
Jun 06 01:41:13 PM PDT 24 |
951244130 ps |
T4 |
/workspace/coverage/default/9.sram_ctrl_stress_all.791918752 |
|
|
Jun 06 01:38:39 PM PDT 24 |
Jun 06 02:20:40 PM PDT 24 |
197186688608 ps |
T8 |
/workspace/coverage/default/16.sram_ctrl_bijection.1176611965 |
|
|
Jun 06 01:39:05 PM PDT 24 |
Jun 06 01:54:58 PM PDT 24 |
113064723933 ps |
T9 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.2449919895 |
|
|
Jun 06 01:39:09 PM PDT 24 |
Jun 06 01:44:06 PM PDT 24 |
4819751515 ps |
T10 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.681400110 |
|
|
Jun 06 01:43:01 PM PDT 24 |
Jun 06 01:48:57 PM PDT 24 |
18910074973 ps |
T11 |
/workspace/coverage/default/10.sram_ctrl_regwen.2993117223 |
|
|
Jun 06 01:38:49 PM PDT 24 |
Jun 06 01:54:12 PM PDT 24 |
7263037327 ps |
T15 |
/workspace/coverage/default/46.sram_ctrl_stress_all.1582517105 |
|
|
Jun 06 01:43:10 PM PDT 24 |
Jun 06 02:15:59 PM PDT 24 |
59002484231 ps |
T16 |
/workspace/coverage/default/25.sram_ctrl_regwen.3112009879 |
|
|
Jun 06 01:40:01 PM PDT 24 |
Jun 06 01:53:20 PM PDT 24 |
97859319937 ps |
T23 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3548455079 |
|
|
Jun 06 01:39:27 PM PDT 24 |
Jun 06 01:43:00 PM PDT 24 |
10326622233 ps |
T24 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2281054830 |
|
|
Jun 06 01:39:50 PM PDT 24 |
Jun 06 01:40:01 PM PDT 24 |
1962120630 ps |
T38 |
/workspace/coverage/default/35.sram_ctrl_regwen.2741054777 |
|
|
Jun 06 01:41:16 PM PDT 24 |
Jun 06 02:01:22 PM PDT 24 |
15439751776 ps |
T42 |
/workspace/coverage/default/26.sram_ctrl_executable.99835840 |
|
|
Jun 06 01:40:13 PM PDT 24 |
Jun 06 01:56:54 PM PDT 24 |
37258957064 ps |
T25 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.3910805498 |
|
|
Jun 06 01:40:30 PM PDT 24 |
Jun 06 01:50:49 PM PDT 24 |
26031944416 ps |
T43 |
/workspace/coverage/default/47.sram_ctrl_bijection.4146665773 |
|
|
Jun 06 01:43:15 PM PDT 24 |
Jun 06 01:54:06 PM PDT 24 |
27914556145 ps |
T73 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2697747258 |
|
|
Jun 06 01:42:41 PM PDT 24 |
Jun 06 01:43:49 PM PDT 24 |
1879922248 ps |
T130 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3553848099 |
|
|
Jun 06 01:42:33 PM PDT 24 |
Jun 06 01:45:23 PM PDT 24 |
3132358152 ps |
T74 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.355675579 |
|
|
Jun 06 01:40:50 PM PDT 24 |
Jun 06 02:04:57 PM PDT 24 |
21981696985 ps |
T131 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3230396499 |
|
|
Jun 06 01:38:47 PM PDT 24 |
Jun 06 01:38:56 PM PDT 24 |
1726778784 ps |
T5 |
/workspace/coverage/default/27.sram_ctrl_stress_all.3298918933 |
|
|
Jun 06 01:40:19 PM PDT 24 |
Jun 06 02:57:49 PM PDT 24 |
109919520699 ps |
T17 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.1780246998 |
|
|
Jun 06 01:41:07 PM PDT 24 |
Jun 06 01:41:41 PM PDT 24 |
5725638735 ps |
T132 |
/workspace/coverage/default/30.sram_ctrl_smoke.2511365036 |
|
|
Jun 06 01:40:27 PM PDT 24 |
Jun 06 01:40:43 PM PDT 24 |
843586445 ps |
T133 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.3785970495 |
|
|
Jun 06 01:41:09 PM PDT 24 |
Jun 06 01:41:23 PM PDT 24 |
2873894000 ps |
T134 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.3981584733 |
|
|
Jun 06 01:39:39 PM PDT 24 |
Jun 06 01:44:02 PM PDT 24 |
8049657159 ps |
T63 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.2378338934 |
|
|
Jun 06 01:40:57 PM PDT 24 |
Jun 06 01:41:51 PM PDT 24 |
10653439129 ps |
T26 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1441972531 |
|
|
Jun 06 01:43:35 PM PDT 24 |
Jun 06 01:49:32 PM PDT 24 |
14508397046 ps |
T129 |
/workspace/coverage/default/33.sram_ctrl_executable.2561383765 |
|
|
Jun 06 01:41:11 PM PDT 24 |
Jun 06 01:52:06 PM PDT 24 |
15854382770 ps |
T135 |
/workspace/coverage/default/8.sram_ctrl_partial_access.44071004 |
|
|
Jun 06 01:38:37 PM PDT 24 |
Jun 06 01:38:43 PM PDT 24 |
1166933323 ps |
T136 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2022694526 |
|
|
Jun 06 01:39:14 PM PDT 24 |
Jun 06 01:41:03 PM PDT 24 |
837684412 ps |
T83 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.1556069939 |
|
|
Jun 06 01:40:02 PM PDT 24 |
Jun 06 01:41:27 PM PDT 24 |
13812040522 ps |
T18 |
/workspace/coverage/default/9.sram_ctrl_regwen.3679403887 |
|
|
Jun 06 01:38:39 PM PDT 24 |
Jun 06 01:54:14 PM PDT 24 |
7661473699 ps |
T27 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.3506303899 |
|
|
Jun 06 01:40:10 PM PDT 24 |
Jun 06 01:45:58 PM PDT 24 |
57587954445 ps |
T96 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1534461465 |
|
|
Jun 06 01:38:38 PM PDT 24 |
Jun 06 01:45:05 PM PDT 24 |
20360209786 ps |
T128 |
/workspace/coverage/default/11.sram_ctrl_stress_all.88118150 |
|
|
Jun 06 01:38:51 PM PDT 24 |
Jun 06 02:06:03 PM PDT 24 |
117368365847 ps |
T97 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.187606601 |
|
|
Jun 06 01:38:37 PM PDT 24 |
Jun 06 01:43:36 PM PDT 24 |
20079510423 ps |
T98 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3199013406 |
|
|
Jun 06 01:38:48 PM PDT 24 |
Jun 06 01:47:45 PM PDT 24 |
36837920050 ps |
T126 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.467373309 |
|
|
Jun 06 01:40:02 PM PDT 24 |
Jun 06 01:41:02 PM PDT 24 |
10281568981 ps |
T137 |
/workspace/coverage/default/33.sram_ctrl_partial_access.298129872 |
|
|
Jun 06 01:40:57 PM PDT 24 |
Jun 06 01:41:23 PM PDT 24 |
6649422548 ps |
T138 |
/workspace/coverage/default/12.sram_ctrl_smoke.2129288925 |
|
|
Jun 06 01:38:50 PM PDT 24 |
Jun 06 01:39:02 PM PDT 24 |
1503746865 ps |
T99 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1138634627 |
|
|
Jun 06 01:38:09 PM PDT 24 |
Jun 06 01:43:31 PM PDT 24 |
5205568394 ps |
T29 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2040052301 |
|
|
Jun 06 01:43:02 PM PDT 24 |
Jun 06 01:54:07 PM PDT 24 |
101872356684 ps |
T12 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2583177591 |
|
|
Jun 06 01:40:01 PM PDT 24 |
Jun 06 01:40:02 PM PDT 24 |
33950828 ps |
T100 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.1081452165 |
|
|
Jun 06 01:39:40 PM PDT 24 |
Jun 06 01:42:58 PM PDT 24 |
3437547213 ps |
T139 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2388735246 |
|
|
Jun 06 01:43:09 PM PDT 24 |
Jun 06 01:43:16 PM PDT 24 |
1447900853 ps |
T140 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.506218587 |
|
|
Jun 06 01:43:09 PM PDT 24 |
Jun 06 01:45:13 PM PDT 24 |
9537836475 ps |
T20 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.79498426 |
|
|
Jun 06 01:41:07 PM PDT 24 |
Jun 06 01:41:12 PM PDT 24 |
1174083128 ps |
T21 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.214048912 |
|
|
Jun 06 01:39:59 PM PDT 24 |
Jun 06 01:40:03 PM PDT 24 |
517412595 ps |
T13 |
/workspace/coverage/default/30.sram_ctrl_alert_test.2557215669 |
|
|
Jun 06 01:40:43 PM PDT 24 |
Jun 06 01:40:44 PM PDT 24 |
50940051 ps |
T84 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2541183517 |
|
|
Jun 06 01:43:16 PM PDT 24 |
Jun 06 01:44:32 PM PDT 24 |
2732466279 ps |
T101 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4124392041 |
|
|
Jun 06 01:40:47 PM PDT 24 |
Jun 06 01:43:55 PM PDT 24 |
54731693538 ps |
T141 |
/workspace/coverage/default/28.sram_ctrl_partial_access.3488237717 |
|
|
Jun 06 01:40:23 PM PDT 24 |
Jun 06 01:40:31 PM PDT 24 |
544107690 ps |
T28 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.1952464817 |
|
|
Jun 06 01:41:46 PM PDT 24 |
Jun 06 01:47:19 PM PDT 24 |
37485934404 ps |
T142 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3345651656 |
|
|
Jun 06 01:39:48 PM PDT 24 |
Jun 06 01:39:58 PM PDT 24 |
3397031390 ps |
T39 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.1486646921 |
|
|
Jun 06 01:42:41 PM PDT 24 |
Jun 06 01:45:25 PM PDT 24 |
7357798762 ps |
T127 |
/workspace/coverage/default/48.sram_ctrl_regwen.2419364083 |
|
|
Jun 06 01:43:34 PM PDT 24 |
Jun 06 02:04:23 PM PDT 24 |
13435907142 ps |
T109 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3758906338 |
|
|
Jun 06 01:39:39 PM PDT 24 |
Jun 06 01:40:20 PM PDT 24 |
5782306527 ps |
T22 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.3520293843 |
|
|
Jun 06 01:41:48 PM PDT 24 |
Jun 06 01:41:52 PM PDT 24 |
346186677 ps |
T143 |
/workspace/coverage/default/8.sram_ctrl_smoke.4068409474 |
|
|
Jun 06 01:38:37 PM PDT 24 |
Jun 06 01:39:52 PM PDT 24 |
1532613264 ps |
T144 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.4195420759 |
|
|
Jun 06 01:40:27 PM PDT 24 |
Jun 06 01:45:49 PM PDT 24 |
22987260692 ps |
T145 |
/workspace/coverage/default/44.sram_ctrl_bijection.3559734647 |
|
|
Jun 06 01:42:45 PM PDT 24 |
Jun 06 02:23:11 PM PDT 24 |
63684584353 ps |
T33 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.620326288 |
|
|
Jun 06 01:38:09 PM PDT 24 |
Jun 06 01:44:06 PM PDT 24 |
2721861546 ps |
T47 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.3678165810 |
|
|
Jun 06 01:39:49 PM PDT 24 |
Jun 06 01:48:59 PM PDT 24 |
7212547320 ps |
T48 |
/workspace/coverage/default/16.sram_ctrl_partial_access.2267686165 |
|
|
Jun 06 01:39:05 PM PDT 24 |
Jun 06 01:39:26 PM PDT 24 |
1097626382 ps |
T49 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1777197376 |
|
|
Jun 06 01:38:17 PM PDT 24 |
Jun 06 02:45:50 PM PDT 24 |
444025289332 ps |
T40 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.3189666940 |
|
|
Jun 06 01:40:09 PM PDT 24 |
Jun 06 01:42:48 PM PDT 24 |
10961671193 ps |
T50 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.970572472 |
|
|
Jun 06 01:41:16 PM PDT 24 |
Jun 06 01:41:41 PM PDT 24 |
494777631 ps |
T51 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2799479499 |
|
|
Jun 06 01:38:57 PM PDT 24 |
Jun 06 01:41:36 PM PDT 24 |
22383172606 ps |
T52 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1791188024 |
|
|
Jun 06 01:41:58 PM PDT 24 |
Jun 06 01:44:32 PM PDT 24 |
9088918811 ps |
T53 |
/workspace/coverage/default/8.sram_ctrl_stress_all.123094180 |
|
|
Jun 06 01:38:42 PM PDT 24 |
Jun 06 02:27:25 PM PDT 24 |
51994349056 ps |
T54 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.577504320 |
|
|
Jun 06 01:39:18 PM PDT 24 |
Jun 06 01:39:46 PM PDT 24 |
8096045718 ps |
T30 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1606414910 |
|
|
Jun 06 01:42:45 PM PDT 24 |
Jun 06 01:43:19 PM PDT 24 |
10337701240 ps |
T146 |
/workspace/coverage/default/35.sram_ctrl_executable.1002531274 |
|
|
Jun 06 01:41:16 PM PDT 24 |
Jun 06 01:57:31 PM PDT 24 |
9128532498 ps |
T34 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3376310651 |
|
|
Jun 06 01:39:16 PM PDT 24 |
Jun 06 01:41:44 PM PDT 24 |
10131456567 ps |
T147 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.78738484 |
|
|
Jun 06 01:41:57 PM PDT 24 |
Jun 06 01:52:57 PM PDT 24 |
12078211504 ps |
T148 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3013988655 |
|
|
Jun 06 01:38:35 PM PDT 24 |
Jun 06 01:39:20 PM PDT 24 |
13994384252 ps |
T35 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3439245145 |
|
|
Jun 06 01:43:27 PM PDT 24 |
Jun 06 01:49:05 PM PDT 24 |
3562082275 ps |
T149 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.1426848477 |
|
|
Jun 06 01:39:10 PM PDT 24 |
Jun 06 01:40:01 PM PDT 24 |
1496544361 ps |
T41 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2201462080 |
|
|
Jun 06 01:38:37 PM PDT 24 |
Jun 06 01:41:32 PM PDT 24 |
11168091678 ps |
T150 |
/workspace/coverage/default/26.sram_ctrl_smoke.3833210843 |
|
|
Jun 06 01:39:58 PM PDT 24 |
Jun 06 01:41:37 PM PDT 24 |
3297361854 ps |
T61 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2135422112 |
|
|
Jun 06 01:41:45 PM PDT 24 |
Jun 06 01:41:56 PM PDT 24 |
490898989 ps |
T19 |
/workspace/coverage/default/8.sram_ctrl_regwen.831677731 |
|
|
Jun 06 01:38:39 PM PDT 24 |
Jun 06 02:06:40 PM PDT 24 |
35565681999 ps |
T151 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.4092703702 |
|
|
Jun 06 01:42:12 PM PDT 24 |
Jun 06 01:42:20 PM PDT 24 |
2481688278 ps |
T152 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.2949385900 |
|
|
Jun 06 01:40:28 PM PDT 24 |
Jun 06 01:40:33 PM PDT 24 |
684242767 ps |
T153 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.27989464 |
|
|
Jun 06 01:41:37 PM PDT 24 |
Jun 06 01:42:52 PM PDT 24 |
31867575692 ps |
T154 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.1873538567 |
|
|
Jun 06 01:38:58 PM PDT 24 |
Jun 06 01:39:03 PM PDT 24 |
1354385277 ps |
T155 |
/workspace/coverage/default/14.sram_ctrl_bijection.140372507 |
|
|
Jun 06 01:38:56 PM PDT 24 |
Jun 06 02:10:56 PM PDT 24 |
55362979959 ps |
T156 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1850948303 |
|
|
Jun 06 01:42:05 PM PDT 24 |
Jun 06 01:44:35 PM PDT 24 |
5485247239 ps |
T157 |
/workspace/coverage/default/48.sram_ctrl_executable.1138462061 |
|
|
Jun 06 01:43:35 PM PDT 24 |
Jun 06 02:05:46 PM PDT 24 |
70981471681 ps |
T158 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.307017864 |
|
|
Jun 06 01:38:40 PM PDT 24 |
Jun 06 01:41:41 PM PDT 24 |
3193002489 ps |
T159 |
/workspace/coverage/default/33.sram_ctrl_smoke.3881415568 |
|
|
Jun 06 01:40:57 PM PDT 24 |
Jun 06 01:41:15 PM PDT 24 |
2023248388 ps |
T14 |
/workspace/coverage/default/40.sram_ctrl_alert_test.1925360282 |
|
|
Jun 06 01:42:12 PM PDT 24 |
Jun 06 01:42:14 PM PDT 24 |
22203212 ps |
T123 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1959620932 |
|
|
Jun 06 01:41:06 PM PDT 24 |
Jun 06 01:49:01 PM PDT 24 |
19079925173 ps |
T160 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.1304082302 |
|
|
Jun 06 01:40:19 PM PDT 24 |
Jun 06 01:55:52 PM PDT 24 |
100331856421 ps |
T85 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2445453849 |
|
|
Jun 06 01:43:00 PM PDT 24 |
Jun 06 01:48:45 PM PDT 24 |
11543967943 ps |
T161 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3022628654 |
|
|
Jun 06 01:43:16 PM PDT 24 |
Jun 06 01:56:56 PM PDT 24 |
7254949071 ps |
T162 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2859346491 |
|
|
Jun 06 01:41:47 PM PDT 24 |
Jun 06 01:42:55 PM PDT 24 |
1000323299 ps |
T163 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2219910715 |
|
|
Jun 06 01:38:40 PM PDT 24 |
Jun 06 01:51:19 PM PDT 24 |
12222335685 ps |
T164 |
/workspace/coverage/default/23.sram_ctrl_bijection.962960019 |
|
|
Jun 06 01:39:54 PM PDT 24 |
Jun 06 02:02:43 PM PDT 24 |
156385981975 ps |
T165 |
/workspace/coverage/default/44.sram_ctrl_executable.339384272 |
|
|
Jun 06 01:42:41 PM PDT 24 |
Jun 06 01:52:57 PM PDT 24 |
11210544626 ps |
T166 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.974385313 |
|
|
Jun 06 01:38:19 PM PDT 24 |
Jun 06 01:42:40 PM PDT 24 |
5431176220 ps |
T167 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2186503923 |
|
|
Jun 06 01:40:50 PM PDT 24 |
Jun 06 01:40:52 PM PDT 24 |
26806116 ps |
T122 |
/workspace/coverage/default/30.sram_ctrl_executable.2801284266 |
|
|
Jun 06 01:40:37 PM PDT 24 |
Jun 06 01:47:41 PM PDT 24 |
25350246400 ps |
T168 |
/workspace/coverage/default/19.sram_ctrl_partial_access.1944667155 |
|
|
Jun 06 01:39:27 PM PDT 24 |
Jun 06 01:42:01 PM PDT 24 |
8653485545 ps |
T169 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.490631969 |
|
|
Jun 06 01:40:57 PM PDT 24 |
Jun 06 02:09:10 PM PDT 24 |
422585968656 ps |
T170 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1939602409 |
|
|
Jun 06 01:38:13 PM PDT 24 |
Jun 06 01:45:03 PM PDT 24 |
7314430090 ps |
T171 |
/workspace/coverage/default/18.sram_ctrl_bijection.3804222973 |
|
|
Jun 06 01:39:16 PM PDT 24 |
Jun 06 01:58:54 PM PDT 24 |
16404613375 ps |
T172 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.469885246 |
|
|
Jun 06 01:43:37 PM PDT 24 |
Jun 06 01:43:41 PM PDT 24 |
381586357 ps |
T173 |
/workspace/coverage/default/17.sram_ctrl_stress_all.1702678290 |
|
|
Jun 06 01:39:19 PM PDT 24 |
Jun 06 04:10:43 PM PDT 24 |
1179902905894 ps |
T174 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.599775113 |
|
|
Jun 06 01:38:43 PM PDT 24 |
Jun 06 01:41:07 PM PDT 24 |
3321747518 ps |
T175 |
/workspace/coverage/default/11.sram_ctrl_executable.3474738342 |
|
|
Jun 06 01:38:49 PM PDT 24 |
Jun 06 01:58:36 PM PDT 24 |
71894674200 ps |
T176 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.3187996627 |
|
|
Jun 06 01:41:28 PM PDT 24 |
Jun 06 01:41:32 PM PDT 24 |
348752823 ps |
T177 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.1725863998 |
|
|
Jun 06 01:39:17 PM PDT 24 |
Jun 06 01:39:38 PM PDT 24 |
3704322356 ps |
T178 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1755333300 |
|
|
Jun 06 01:40:38 PM PDT 24 |
Jun 06 01:44:42 PM PDT 24 |
24694124628 ps |
T179 |
/workspace/coverage/default/9.sram_ctrl_executable.396569232 |
|
|
Jun 06 01:38:38 PM PDT 24 |
Jun 06 01:52:16 PM PDT 24 |
33581368137 ps |
T180 |
/workspace/coverage/default/35.sram_ctrl_partial_access.1575613451 |
|
|
Jun 06 01:41:18 PM PDT 24 |
Jun 06 01:41:29 PM PDT 24 |
880813968 ps |
T181 |
/workspace/coverage/default/13.sram_ctrl_bijection.1509466391 |
|
|
Jun 06 01:38:48 PM PDT 24 |
Jun 06 02:15:11 PM PDT 24 |
92775774700 ps |
T182 |
/workspace/coverage/default/25.sram_ctrl_stress_all.3045426727 |
|
|
Jun 06 01:39:59 PM PDT 24 |
Jun 06 02:42:28 PM PDT 24 |
204301155501 ps |
T183 |
/workspace/coverage/default/26.sram_ctrl_bijection.3004464808 |
|
|
Jun 06 01:40:02 PM PDT 24 |
Jun 06 01:50:12 PM PDT 24 |
43174562550 ps |
T62 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2618142942 |
|
|
Jun 06 01:38:47 PM PDT 24 |
Jun 06 01:39:01 PM PDT 24 |
360079242 ps |
T184 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2348600346 |
|
|
Jun 06 01:42:25 PM PDT 24 |
Jun 06 01:49:59 PM PDT 24 |
6447829912 ps |
T185 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.3211322761 |
|
|
Jun 06 01:39:30 PM PDT 24 |
Jun 06 01:40:00 PM PDT 24 |
737741697 ps |
T186 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.3617648799 |
|
|
Jun 06 01:41:57 PM PDT 24 |
Jun 06 01:42:44 PM PDT 24 |
26420248642 ps |
T187 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.258797781 |
|
|
Jun 06 01:39:58 PM PDT 24 |
Jun 06 01:46:42 PM PDT 24 |
11412416153 ps |
T188 |
/workspace/coverage/default/41.sram_ctrl_smoke.3150210006 |
|
|
Jun 06 01:42:13 PM PDT 24 |
Jun 06 01:43:49 PM PDT 24 |
4705809866 ps |
T189 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1841526720 |
|
|
Jun 06 01:43:02 PM PDT 24 |
Jun 06 01:44:09 PM PDT 24 |
10729768384 ps |
T190 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.120200559 |
|
|
Jun 06 01:42:06 PM PDT 24 |
Jun 06 01:45:06 PM PDT 24 |
3126257372 ps |
T191 |
/workspace/coverage/default/33.sram_ctrl_bijection.630862417 |
|
|
Jun 06 01:40:58 PM PDT 24 |
Jun 06 01:50:43 PM PDT 24 |
34161955490 ps |
T192 |
/workspace/coverage/default/26.sram_ctrl_partial_access.3945456443 |
|
|
Jun 06 01:39:58 PM PDT 24 |
Jun 06 01:42:40 PM PDT 24 |
896488785 ps |
T193 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.3414371833 |
|
|
Jun 06 01:39:58 PM PDT 24 |
Jun 06 01:43:36 PM PDT 24 |
14186304824 ps |
T194 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.2061662408 |
|
|
Jun 06 01:39:57 PM PDT 24 |
Jun 06 01:41:36 PM PDT 24 |
83987578322 ps |
T195 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.2942442847 |
|
|
Jun 06 01:38:56 PM PDT 24 |
Jun 06 01:40:29 PM PDT 24 |
193267362166 ps |
T196 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1974069178 |
|
|
Jun 06 01:41:46 PM PDT 24 |
Jun 06 01:51:12 PM PDT 24 |
37612862498 ps |
T197 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1479233261 |
|
|
Jun 06 01:38:19 PM PDT 24 |
Jun 06 01:38:26 PM PDT 24 |
3194790910 ps |
T198 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.1910830215 |
|
|
Jun 06 01:41:17 PM PDT 24 |
Jun 06 01:42:21 PM PDT 24 |
731921297 ps |
T199 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3063149997 |
|
|
Jun 06 01:38:18 PM PDT 24 |
Jun 06 01:38:26 PM PDT 24 |
1408054309 ps |
T200 |
/workspace/coverage/default/18.sram_ctrl_smoke.4237354976 |
|
|
Jun 06 01:39:17 PM PDT 24 |
Jun 06 01:41:10 PM PDT 24 |
4427485995 ps |
T31 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2406507031 |
|
|
Jun 06 01:43:03 PM PDT 24 |
Jun 06 01:43:52 PM PDT 24 |
1770114603 ps |
T201 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.37334963 |
|
|
Jun 06 01:43:33 PM PDT 24 |
Jun 06 01:47:23 PM PDT 24 |
3539548866 ps |
T202 |
/workspace/coverage/default/16.sram_ctrl_alert_test.1735118864 |
|
|
Jun 06 01:39:07 PM PDT 24 |
Jun 06 01:39:08 PM PDT 24 |
50514677 ps |
T203 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1572313156 |
|
|
Jun 06 01:38:40 PM PDT 24 |
Jun 06 01:38:44 PM PDT 24 |
362654576 ps |
T204 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.2265453582 |
|
|
Jun 06 01:42:12 PM PDT 24 |
Jun 06 01:50:01 PM PDT 24 |
14295272795 ps |
T205 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.497650458 |
|
|
Jun 06 01:42:51 PM PDT 24 |
Jun 06 01:43:56 PM PDT 24 |
37176051031 ps |
T206 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2786990128 |
|
|
Jun 06 01:38:10 PM PDT 24 |
Jun 06 01:38:12 PM PDT 24 |
65570098 ps |
T207 |
/workspace/coverage/default/34.sram_ctrl_bijection.2026440507 |
|
|
Jun 06 01:41:05 PM PDT 24 |
Jun 06 02:06:17 PM PDT 24 |
40846839061 ps |
T208 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.661825844 |
|
|
Jun 06 01:40:27 PM PDT 24 |
Jun 06 02:01:40 PM PDT 24 |
43088651356 ps |
T209 |
/workspace/coverage/default/2.sram_ctrl_alert_test.1498134285 |
|
|
Jun 06 01:38:13 PM PDT 24 |
Jun 06 01:38:14 PM PDT 24 |
41930752 ps |
T210 |
/workspace/coverage/default/17.sram_ctrl_regwen.4008269968 |
|
|
Jun 06 01:39:17 PM PDT 24 |
Jun 06 01:57:39 PM PDT 24 |
17660642917 ps |
T211 |
/workspace/coverage/default/6.sram_ctrl_executable.9439466 |
|
|
Jun 06 01:38:27 PM PDT 24 |
Jun 06 01:43:46 PM PDT 24 |
20277145607 ps |
T212 |
/workspace/coverage/default/42.sram_ctrl_bijection.3866928494 |
|
|
Jun 06 01:42:22 PM PDT 24 |
Jun 06 02:12:57 PM PDT 24 |
334813989234 ps |
T213 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.2335768698 |
|
|
Jun 06 01:39:16 PM PDT 24 |
Jun 06 01:39:21 PM PDT 24 |
1406632791 ps |
T214 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2796292230 |
|
|
Jun 06 01:39:18 PM PDT 24 |
Jun 06 01:43:48 PM PDT 24 |
24636061890 ps |
T215 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3332715474 |
|
|
Jun 06 01:38:15 PM PDT 24 |
Jun 06 01:42:54 PM PDT 24 |
8353629665 ps |
T216 |
/workspace/coverage/default/32.sram_ctrl_alert_test.3461655618 |
|
|
Jun 06 01:40:57 PM PDT 24 |
Jun 06 01:40:59 PM PDT 24 |
17189746 ps |
T217 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.1371954490 |
|
|
Jun 06 01:41:57 PM PDT 24 |
Jun 06 01:42:01 PM PDT 24 |
356330423 ps |
T218 |
/workspace/coverage/default/23.sram_ctrl_smoke.3380690598 |
|
|
Jun 06 01:39:49 PM PDT 24 |
Jun 06 01:40:05 PM PDT 24 |
786185669 ps |
T219 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3961220455 |
|
|
Jun 06 01:39:50 PM PDT 24 |
Jun 06 01:47:33 PM PDT 24 |
6512446916 ps |
T220 |
/workspace/coverage/default/16.sram_ctrl_regwen.174156775 |
|
|
Jun 06 01:39:09 PM PDT 24 |
Jun 06 01:49:06 PM PDT 24 |
4985970942 ps |
T221 |
/workspace/coverage/default/5.sram_ctrl_regwen.2183371134 |
|
|
Jun 06 01:38:23 PM PDT 24 |
Jun 06 02:13:14 PM PDT 24 |
25216489644 ps |
T222 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1030255724 |
|
|
Jun 06 01:38:47 PM PDT 24 |
Jun 06 01:38:51 PM PDT 24 |
6680998335 ps |
T223 |
/workspace/coverage/default/21.sram_ctrl_partial_access.755492663 |
|
|
Jun 06 01:39:44 PM PDT 24 |
Jun 06 01:40:58 PM PDT 24 |
1171221685 ps |
T224 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3808590652 |
|
|
Jun 06 01:43:16 PM PDT 24 |
Jun 06 01:59:44 PM PDT 24 |
18966343692 ps |
T225 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1471385270 |
|
|
Jun 06 01:38:39 PM PDT 24 |
Jun 06 01:39:38 PM PDT 24 |
4250684707 ps |
T226 |
/workspace/coverage/default/1.sram_ctrl_smoke.1352390198 |
|
|
Jun 06 01:38:08 PM PDT 24 |
Jun 06 01:38:26 PM PDT 24 |
833426687 ps |
T227 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.2563909822 |
|
|
Jun 06 01:39:07 PM PDT 24 |
Jun 06 01:39:11 PM PDT 24 |
1403041868 ps |
T228 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.142396540 |
|
|
Jun 06 01:40:10 PM PDT 24 |
Jun 06 01:49:23 PM PDT 24 |
11925673228 ps |
T229 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2551246506 |
|
|
Jun 06 01:38:10 PM PDT 24 |
Jun 06 01:38:14 PM PDT 24 |
1214970768 ps |
T230 |
/workspace/coverage/default/42.sram_ctrl_alert_test.2484391441 |
|
|
Jun 06 01:42:31 PM PDT 24 |
Jun 06 01:42:32 PM PDT 24 |
151050708 ps |
T231 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3389312744 |
|
|
Jun 06 01:39:50 PM PDT 24 |
Jun 06 01:41:13 PM PDT 24 |
8371540101 ps |
T124 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1832550682 |
|
|
Jun 06 01:38:41 PM PDT 24 |
Jun 06 01:52:08 PM PDT 24 |
68293302576 ps |
T232 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.4096809019 |
|
|
Jun 06 01:41:16 PM PDT 24 |
Jun 06 01:45:42 PM PDT 24 |
9071164843 ps |
T233 |
/workspace/coverage/default/27.sram_ctrl_bijection.888644547 |
|
|
Jun 06 01:40:09 PM PDT 24 |
Jun 06 02:16:26 PM PDT 24 |
61017522498 ps |
T234 |
/workspace/coverage/default/15.sram_ctrl_bijection.2838766640 |
|
|
Jun 06 01:38:56 PM PDT 24 |
Jun 06 02:17:04 PM PDT 24 |
267643586476 ps |
T235 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3456672095 |
|
|
Jun 06 01:38:53 PM PDT 24 |
Jun 06 01:42:38 PM PDT 24 |
3004193742 ps |
T236 |
/workspace/coverage/default/46.sram_ctrl_regwen.3636395537 |
|
|
Jun 06 01:43:11 PM PDT 24 |
Jun 06 02:00:07 PM PDT 24 |
54328158818 ps |
T237 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.115798613 |
|
|
Jun 06 01:39:27 PM PDT 24 |
Jun 06 01:40:22 PM PDT 24 |
774909168 ps |
T125 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3790161150 |
|
|
Jun 06 01:38:11 PM PDT 24 |
Jun 06 01:43:17 PM PDT 24 |
66993371075 ps |
T238 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3892650401 |
|
|
Jun 06 01:38:03 PM PDT 24 |
Jun 06 01:39:23 PM PDT 24 |
5109655111 ps |
T239 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.1165496089 |
|
|
Jun 06 01:39:31 PM PDT 24 |
Jun 06 01:42:15 PM PDT 24 |
4918757589 ps |
T240 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2351135887 |
|
|
Jun 06 01:42:01 PM PDT 24 |
Jun 06 01:45:05 PM PDT 24 |
49237540087 ps |
T241 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1208223699 |
|
|
Jun 06 01:41:37 PM PDT 24 |
Jun 06 01:46:53 PM PDT 24 |
9292265703 ps |
T242 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.2822934373 |
|
|
Jun 06 01:42:12 PM PDT 24 |
Jun 06 01:42:27 PM PDT 24 |
13557628694 ps |
T243 |
/workspace/coverage/default/17.sram_ctrl_smoke.3843269558 |
|
|
Jun 06 01:39:08 PM PDT 24 |
Jun 06 01:39:32 PM PDT 24 |
1263742962 ps |
T244 |
/workspace/coverage/default/26.sram_ctrl_regwen.2218802193 |
|
|
Jun 06 01:40:10 PM PDT 24 |
Jun 06 02:04:28 PM PDT 24 |
24378225560 ps |
T245 |
/workspace/coverage/default/41.sram_ctrl_alert_test.1611785417 |
|
|
Jun 06 01:42:28 PM PDT 24 |
Jun 06 01:42:29 PM PDT 24 |
18058824 ps |
T246 |
/workspace/coverage/default/29.sram_ctrl_smoke.4213497604 |
|
|
Jun 06 01:40:19 PM PDT 24 |
Jun 06 01:40:33 PM PDT 24 |
2036218728 ps |
T247 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3321114419 |
|
|
Jun 06 01:38:20 PM PDT 24 |
Jun 06 01:54:46 PM PDT 24 |
203827538347 ps |
T248 |
/workspace/coverage/default/29.sram_ctrl_executable.3927809490 |
|
|
Jun 06 01:40:30 PM PDT 24 |
Jun 06 01:58:58 PM PDT 24 |
16594844695 ps |
T36 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3945846964 |
|
|
Jun 06 01:43:09 PM PDT 24 |
Jun 06 01:44:58 PM PDT 24 |
10536351814 ps |
T249 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2486208718 |
|
|
Jun 06 01:41:08 PM PDT 24 |
Jun 06 01:50:48 PM PDT 24 |
10794092638 ps |
T250 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1961760372 |
|
|
Jun 06 01:38:57 PM PDT 24 |
Jun 06 01:42:21 PM PDT 24 |
17278408769 ps |
T251 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.1204067356 |
|
|
Jun 06 01:39:49 PM PDT 24 |
Jun 06 01:41:23 PM PDT 24 |
59397780099 ps |
T252 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1104855912 |
|
|
Jun 06 01:38:08 PM PDT 24 |
Jun 06 01:38:10 PM PDT 24 |
13326685 ps |
T253 |
/workspace/coverage/default/43.sram_ctrl_executable.3844518505 |
|
|
Jun 06 01:42:31 PM PDT 24 |
Jun 06 01:45:51 PM PDT 24 |
3530097946 ps |
T254 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1223766817 |
|
|
Jun 06 01:42:01 PM PDT 24 |
Jun 06 01:47:06 PM PDT 24 |
24032119669 ps |
T255 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2580653835 |
|
|
Jun 06 01:38:56 PM PDT 24 |
Jun 06 01:39:07 PM PDT 24 |
3088247494 ps |
T256 |
/workspace/coverage/default/44.sram_ctrl_regwen.40591808 |
|
|
Jun 06 01:42:39 PM PDT 24 |
Jun 06 01:56:03 PM PDT 24 |
25849033704 ps |
T257 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1362888529 |
|
|
Jun 06 01:43:36 PM PDT 24 |
Jun 06 01:43:43 PM PDT 24 |
1398020926 ps |
T258 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.574755370 |
|
|
Jun 06 01:40:08 PM PDT 24 |
Jun 06 01:42:23 PM PDT 24 |
1628242075 ps |
T259 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3265167243 |
|
|
Jun 06 01:42:35 PM PDT 24 |
Jun 06 01:43:03 PM PDT 24 |
715374559 ps |
T260 |
/workspace/coverage/default/42.sram_ctrl_executable.3144175027 |
|
|
Jun 06 01:42:21 PM PDT 24 |
Jun 06 02:09:58 PM PDT 24 |
36097158739 ps |
T261 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3148827249 |
|
|
Jun 06 01:42:00 PM PDT 24 |
Jun 06 01:44:24 PM PDT 24 |
803903279 ps |
T262 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.3445077076 |
|
|
Jun 06 01:42:12 PM PDT 24 |
Jun 06 01:43:39 PM PDT 24 |
61356335768 ps |
T263 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2389816911 |
|
|
Jun 06 01:38:50 PM PDT 24 |
Jun 06 01:38:51 PM PDT 24 |
39673426 ps |
T264 |
/workspace/coverage/default/18.sram_ctrl_stress_all.327012287 |
|
|
Jun 06 01:39:29 PM PDT 24 |
Jun 06 02:47:44 PM PDT 24 |
321069425155 ps |
T265 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3828850643 |
|
|
Jun 06 01:38:40 PM PDT 24 |
Jun 06 01:40:06 PM PDT 24 |
9064879607 ps |
T266 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.3482804758 |
|
|
Jun 06 01:38:38 PM PDT 24 |
Jun 06 01:38:56 PM PDT 24 |
2809330201 ps |
T267 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.860879749 |
|
|
Jun 06 01:40:17 PM PDT 24 |
Jun 06 01:40:42 PM PDT 24 |
1583232035 ps |
T268 |
/workspace/coverage/default/33.sram_ctrl_alert_test.694850275 |
|
|
Jun 06 01:41:06 PM PDT 24 |
Jun 06 01:41:07 PM PDT 24 |
97082016 ps |
T269 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2681116865 |
|
|
Jun 06 01:43:27 PM PDT 24 |
Jun 06 01:44:01 PM PDT 24 |
3119866455 ps |
T270 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.2018543384 |
|
|
Jun 06 01:39:28 PM PDT 24 |
Jun 06 01:44:06 PM PDT 24 |
15472606769 ps |
T271 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.2938444992 |
|
|
Jun 06 01:42:13 PM PDT 24 |
Jun 06 01:45:59 PM PDT 24 |
7234891861 ps |
T272 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3491081766 |
|
|
Jun 06 01:38:00 PM PDT 24 |
Jun 06 01:46:20 PM PDT 24 |
108425084745 ps |
T273 |
/workspace/coverage/default/25.sram_ctrl_executable.856946815 |
|
|
Jun 06 01:40:00 PM PDT 24 |
Jun 06 01:40:21 PM PDT 24 |
3942524919 ps |
T44 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2061657496 |
|
|
Jun 06 01:38:58 PM PDT 24 |
Jun 06 01:41:37 PM PDT 24 |
4667417890 ps |
T274 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1911982111 |
|
|
Jun 06 01:41:35 PM PDT 24 |
Jun 06 02:34:05 PM PDT 24 |
51419801003 ps |
T275 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.132615526 |
|
|
Jun 06 01:38:42 PM PDT 24 |
Jun 06 01:44:34 PM PDT 24 |
36631371019 ps |
T276 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.765402859 |
|
|
Jun 06 01:40:39 PM PDT 24 |
Jun 06 01:41:50 PM PDT 24 |
3020177602 ps |
T277 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.1279571784 |
|
|
Jun 06 01:39:15 PM PDT 24 |
Jun 06 01:41:52 PM PDT 24 |
28849846191 ps |
T278 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3316415986 |
|
|
Jun 06 01:43:38 PM PDT 24 |
Jun 06 01:44:55 PM PDT 24 |
1283089517 ps |
T279 |
/workspace/coverage/default/44.sram_ctrl_partial_access.4098033822 |
|
|
Jun 06 01:42:41 PM PDT 24 |
Jun 06 01:44:35 PM PDT 24 |
16509571663 ps |
T280 |
/workspace/coverage/default/36.sram_ctrl_executable.1624008609 |
|
|
Jun 06 01:41:25 PM PDT 24 |
Jun 06 01:54:41 PM PDT 24 |
7214809399 ps |
T281 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3849823113 |
|
|
Jun 06 01:43:15 PM PDT 24 |
Jun 06 01:49:44 PM PDT 24 |
18051329242 ps |
T282 |
/workspace/coverage/default/27.sram_ctrl_alert_test.1632904207 |
|
|
Jun 06 01:40:19 PM PDT 24 |
Jun 06 01:40:21 PM PDT 24 |
21490955 ps |
T283 |
/workspace/coverage/default/27.sram_ctrl_executable.2749525220 |
|
|
Jun 06 01:40:10 PM PDT 24 |
Jun 06 01:59:20 PM PDT 24 |
122974883854 ps |
T37 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1723643065 |
|
|
Jun 06 01:38:07 PM PDT 24 |
Jun 06 01:39:34 PM PDT 24 |
3071932694 ps |
T284 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.2620317110 |
|
|
Jun 06 01:41:47 PM PDT 24 |
Jun 06 01:54:11 PM PDT 24 |
24643634648 ps |
T285 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1784862481 |
|
|
Jun 06 01:38:37 PM PDT 24 |
Jun 06 01:40:34 PM PDT 24 |
62101383096 ps |
T286 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.242574729 |
|
|
Jun 06 01:38:39 PM PDT 24 |
Jun 06 01:54:15 PM PDT 24 |
12489734182 ps |
T287 |
/workspace/coverage/default/29.sram_ctrl_alert_test.2031689822 |
|
|
Jun 06 01:40:27 PM PDT 24 |
Jun 06 01:40:28 PM PDT 24 |
23774034 ps |
T288 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2726154693 |
|
|
Jun 06 01:38:45 PM PDT 24 |
Jun 06 01:40:55 PM PDT 24 |
1581910925 ps |
T289 |
/workspace/coverage/default/2.sram_ctrl_regwen.3982166956 |
|
|
Jun 06 01:38:10 PM PDT 24 |
Jun 06 01:46:34 PM PDT 24 |
14195280427 ps |
T290 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3553165016 |
|
|
Jun 06 01:38:57 PM PDT 24 |
Jun 06 02:21:56 PM PDT 24 |
69575347623 ps |
T291 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.3068987741 |
|
|
Jun 06 01:41:24 PM PDT 24 |
Jun 06 01:41:43 PM PDT 24 |
4119045099 ps |
T292 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.582300391 |
|
|
Jun 06 01:38:40 PM PDT 24 |
Jun 06 01:43:31 PM PDT 24 |
29146520561 ps |
T293 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.765894898 |
|
|
Jun 06 01:43:16 PM PDT 24 |
Jun 06 01:50:06 PM PDT 24 |
82653210470 ps |
T294 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3095159461 |
|
|
Jun 06 01:38:08 PM PDT 24 |
Jun 06 01:38:18 PM PDT 24 |
1361561844 ps |
T295 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.2693471263 |
|
|
Jun 06 01:38:09 PM PDT 24 |
Jun 06 01:55:54 PM PDT 24 |
46626184172 ps |
T296 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.295567747 |
|
|
Jun 06 01:40:27 PM PDT 24 |
Jun 06 01:41:12 PM PDT 24 |
4904166101 ps |
T297 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2537841474 |
|
|
Jun 06 01:42:13 PM PDT 24 |
Jun 06 01:43:23 PM PDT 24 |
13776667551 ps |
T103 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3156567332 |
|
|
Jun 06 01:40:00 PM PDT 24 |
Jun 06 01:40:15 PM PDT 24 |
1248792867 ps |
T298 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1238584405 |
|
|
Jun 06 01:38:46 PM PDT 24 |
Jun 06 03:37:07 PM PDT 24 |
1198149086262 ps |
T299 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3031971743 |
|
|
Jun 06 01:40:49 PM PDT 24 |
Jun 06 01:41:59 PM PDT 24 |
181273336327 ps |
T300 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.2949443924 |
|
|
Jun 06 01:41:09 PM PDT 24 |
Jun 06 01:59:25 PM PDT 24 |
207139790236 ps |
T301 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2880370844 |
|
|
Jun 06 01:39:41 PM PDT 24 |
Jun 06 01:48:45 PM PDT 24 |
45500577866 ps |
T302 |
/workspace/coverage/default/47.sram_ctrl_partial_access.662883986 |
|
|
Jun 06 01:43:16 PM PDT 24 |
Jun 06 01:43:35 PM PDT 24 |
871510077 ps |
T303 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.679869762 |
|
|
Jun 06 01:40:38 PM PDT 24 |
Jun 06 01:45:35 PM PDT 24 |
5059645388 ps |
T304 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.413924048 |
|
|
Jun 06 01:39:32 PM PDT 24 |
Jun 06 01:41:49 PM PDT 24 |
1977183823 ps |