| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4266982575 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3465314651 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3359999136 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.908195987 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2378616052 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1366315982 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1743087893 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1173940752 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2101679336 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1120067905 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2931187499 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1144008284 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2063916731 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3525468510 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1819281669 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3298383958 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4134104893 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.741505481 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3102124754 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1129331652 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2898561852 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3125279931 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1161744231 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3639598147 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2332315812 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2114954102 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3988951925 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1181335694 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1704945027 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.589808149 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3579549511 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1776855153 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1033806952 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.232342756 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3975383694 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3860975701 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2291649243 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1776322433 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3579678301 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2759800810 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2562350569 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.770655967 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3672918817 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2286162739 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4241079867 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.210346050 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.33520671 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1623569410 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1163222202 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.294942466 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.515102634 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1557314487 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3768672288 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2747783414 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.4157735013 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1485048976 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2831480907 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.682290759 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3523938737 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3338243861 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4266973008 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.809519875 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.868215865 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3638363969 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3524931495 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.816716402 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3305389091 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1595438302 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2377149789 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2809678206 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.683489206 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.30524776 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1807702176 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.86583280 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.375526137 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3196663584 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3185992364 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.750582035 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1454222742 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3318892087 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1907392746 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.250365020 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1931125365 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3503343856 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3957480696 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3205689816 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3994182172 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2689574975 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4022503091 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.142551076 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1584092220 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.914378821 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2548628750 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3599519294 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.4074635988 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2732792233 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1673473139 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3669474150 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2338457730 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1883037234 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.717381576 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.328600621 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3201086435 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.395090582 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1060059046 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1444017759 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.833165093 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.825828141 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.498530227 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3460898621 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3594957394 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1935289760 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3276673006 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2037613356 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2350700164 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2277543510 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.745115843 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1528677055 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.739483843 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.46217137 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2904075459 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1610363139 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2044545930 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3078197277 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1039188349 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2274321116 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1660108167 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.108266061 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3198768633 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.863748826 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.801766588 |
| /workspace/coverage/default/0.sram_ctrl_bijection.2352940111 |
| /workspace/coverage/default/0.sram_ctrl_executable.3498951330 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.3426641616 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.777014605 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2805117688 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.2056600886 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.3609762357 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.1258027205 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4034383484 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.3558103457 |
| /workspace/coverage/default/0.sram_ctrl_regwen.2244493745 |
| /workspace/coverage/default/0.sram_ctrl_smoke.1667366357 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.645631561 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.3481757632 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3175020948 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1670325673 |
| /workspace/coverage/default/1.sram_ctrl_bijection.3798568175 |
| /workspace/coverage/default/1.sram_ctrl_executable.2042565822 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.1957868590 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.3533242028 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1127431591 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.2267397384 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.2996100516 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.1687266495 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1543585405 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.2188259131 |
| /workspace/coverage/default/1.sram_ctrl_regwen.1429951707 |
| /workspace/coverage/default/1.sram_ctrl_smoke.2251229981 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.2667548949 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3708732411 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.2788942881 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2478001437 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.1685939540 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.1927570514 |
| /workspace/coverage/default/10.sram_ctrl_bijection.3748857645 |
| /workspace/coverage/default/10.sram_ctrl_executable.942160967 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.4031181114 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.2066110539 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2557228940 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.2210856396 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.4257871646 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.1561663238 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4193321973 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.3487617592 |
| /workspace/coverage/default/10.sram_ctrl_regwen.324088224 |
| /workspace/coverage/default/10.sram_ctrl_smoke.2155517652 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.1193493092 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.583711026 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.3405376625 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.690703874 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.1905055262 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.2384709138 |
| /workspace/coverage/default/11.sram_ctrl_bijection.246928775 |
| /workspace/coverage/default/11.sram_ctrl_executable.264360287 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.931234733 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.3574591491 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3095394031 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.4120220385 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.1868574969 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.635116424 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1204119834 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.1934973603 |
| /workspace/coverage/default/11.sram_ctrl_regwen.1815966267 |
| /workspace/coverage/default/11.sram_ctrl_smoke.1507402053 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.2821532034 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3373817363 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.2963776876 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1621873233 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1915535162 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.1963023714 |
| /workspace/coverage/default/12.sram_ctrl_bijection.1486085591 |
| /workspace/coverage/default/12.sram_ctrl_executable.70638101 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.2955086868 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.1637958832 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.3568800889 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.3939007274 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.2000127209 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.874632241 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3543773530 |
| /workspace/coverage/default/12.sram_ctrl_regwen.3020517766 |
| /workspace/coverage/default/12.sram_ctrl_smoke.2217180553 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.2327587571 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1162359152 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.3794552923 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1516583876 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2885952027 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.3874369260 |
| /workspace/coverage/default/13.sram_ctrl_bijection.2583473045 |
| /workspace/coverage/default/13.sram_ctrl_executable.1574057017 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.1692576930 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.763126853 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1262516608 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.71075823 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.1590187953 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.959849462 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2300214469 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.4072803752 |
| /workspace/coverage/default/13.sram_ctrl_regwen.3643070460 |
| /workspace/coverage/default/13.sram_ctrl_smoke.2469826379 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.4134865439 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.4142632444 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1577251602 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1236295164 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.913390232 |
| /workspace/coverage/default/14.sram_ctrl_bijection.933893822 |
| /workspace/coverage/default/14.sram_ctrl_executable.2491331700 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.3652913242 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.775140936 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1749061029 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.2923939210 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.1797180118 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.3781720999 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.3141240181 |
| /workspace/coverage/default/14.sram_ctrl_regwen.2662984876 |
| /workspace/coverage/default/14.sram_ctrl_smoke.964062336 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.1196834190 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.907486979 |
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| /workspace/coverage/default/43.sram_ctrl_multiple_keys.3295958855 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.2059917676 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.733693049 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.3125620110 |
| /workspace/coverage/default/43.sram_ctrl_regwen.3824952104 |
| /workspace/coverage/default/43.sram_ctrl_smoke.582654171 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.3642895624 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3811537268 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2884941255 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.141620521 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.111832614 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.4204988189 |
| /workspace/coverage/default/44.sram_ctrl_bijection.2008448179 |
| /workspace/coverage/default/44.sram_ctrl_executable.3365965684 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.429262875 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.1508838377 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2343281740 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.1119825513 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.2456770166 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.54487030 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1323355475 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.2221094756 |
| /workspace/coverage/default/44.sram_ctrl_regwen.1014999397 |
| /workspace/coverage/default/44.sram_ctrl_smoke.3087654771 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.2603014285 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1894744020 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3675565734 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1522633765 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.2877985322 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.2095523496 |
| /workspace/coverage/default/45.sram_ctrl_bijection.4266977283 |
| /workspace/coverage/default/45.sram_ctrl_executable.2233557077 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.570402388 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.3115644359 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1885326590 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.3784558288 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.2968170016 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1649114533 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2125193169 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.1696606715 |
| /workspace/coverage/default/45.sram_ctrl_regwen.361885254 |
| /workspace/coverage/default/45.sram_ctrl_smoke.1838465432 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.3182882736 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4125769441 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.3472699235 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2379088697 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.896859018 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.2749660763 |
| /workspace/coverage/default/46.sram_ctrl_bijection.534091884 |
| /workspace/coverage/default/46.sram_ctrl_executable.1214290313 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.2162791531 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.2890787971 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1612127368 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.116568828 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.150691280 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.3587293523 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.410754351 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.1773059046 |
| /workspace/coverage/default/46.sram_ctrl_regwen.811578903 |
| /workspace/coverage/default/46.sram_ctrl_smoke.3857564194 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.4086206682 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3615703146 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.919875513 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3038194091 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1324389959 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.1179081758 |
| /workspace/coverage/default/47.sram_ctrl_bijection.1528991780 |
| /workspace/coverage/default/47.sram_ctrl_executable.3135719651 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.726986566 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.291282957 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.4166705180 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.3075076128 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.611148853 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.1032276048 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.220002367 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.1105085285 |
| /workspace/coverage/default/47.sram_ctrl_regwen.1359354178 |
| /workspace/coverage/default/47.sram_ctrl_smoke.2959129487 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3246984536 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3587117605 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3795595841 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1672524685 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.167461501 |
| /workspace/coverage/default/48.sram_ctrl_bijection.2788918394 |
| /workspace/coverage/default/48.sram_ctrl_executable.1790839306 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.1918438129 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.3478206805 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3951259558 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.377958890 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.642861181 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.783523088 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2279074363 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.1204107315 |
| /workspace/coverage/default/48.sram_ctrl_regwen.2248411960 |
| /workspace/coverage/default/48.sram_ctrl_smoke.4120229513 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.2046812264 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.781375473 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.1788381181 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3607978881 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.2325773062 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.1531037251 |
| /workspace/coverage/default/49.sram_ctrl_bijection.4005653356 |
| /workspace/coverage/default/49.sram_ctrl_executable.1016059620 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.2663920491 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.1008231216 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.3752776057 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.2099354094 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.3510621413 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.1428846982 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3582962416 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.893498353 |
| /workspace/coverage/default/49.sram_ctrl_regwen.944977767 |
| /workspace/coverage/default/49.sram_ctrl_smoke.1641675554 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3073765338 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1480703288 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.946332417 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.3053048938 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.2118903758 |
| /workspace/coverage/default/5.sram_ctrl_bijection.2841869230 |
| /workspace/coverage/default/5.sram_ctrl_executable.332849069 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.796929861 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.534598019 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3150070312 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.110436041 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.4181662794 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.1368866329 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3914888117 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.330069027 |
| /workspace/coverage/default/5.sram_ctrl_regwen.1788212210 |
| /workspace/coverage/default/5.sram_ctrl_smoke.3985222464 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.108913836 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.73470642 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3663105771 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3014046713 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.4037004874 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.3727484285 |
| /workspace/coverage/default/6.sram_ctrl_bijection.2346680468 |
| /workspace/coverage/default/6.sram_ctrl_executable.1176403245 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.751611590 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.3269652672 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2931934593 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.3908949811 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1251009590 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.1205621436 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.757937369 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.3682981371 |
| /workspace/coverage/default/6.sram_ctrl_regwen.2840556617 |
| /workspace/coverage/default/6.sram_ctrl_smoke.2945058919 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.3793134300 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.344982481 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3922594385 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1604878437 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3471713191 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.1691410216 |
| /workspace/coverage/default/7.sram_ctrl_bijection.1265897656 |
| /workspace/coverage/default/7.sram_ctrl_executable.3108459389 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.2649874490 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.1574288793 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3560744791 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.1181898259 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.679558580 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.1349605611 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4053980746 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.3788840379 |
| /workspace/coverage/default/7.sram_ctrl_regwen.3835194519 |
| /workspace/coverage/default/7.sram_ctrl_smoke.2821489034 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.3259486990 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2592485184 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1462734243 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2137315226 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.2699122537 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.1232950278 |
| /workspace/coverage/default/8.sram_ctrl_bijection.3011783138 |
| /workspace/coverage/default/8.sram_ctrl_executable.645605971 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.116736865 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.3366588101 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.3421968341 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.1678420826 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.4068373358 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.2195934107 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2429594239 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.3837963602 |
| /workspace/coverage/default/8.sram_ctrl_regwen.3550372051 |
| /workspace/coverage/default/8.sram_ctrl_smoke.1962769914 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.2050260314 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3184650048 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.1784044657 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.438099731 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.4075625514 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.1120106287 |
| /workspace/coverage/default/9.sram_ctrl_bijection.2323128084 |
| /workspace/coverage/default/9.sram_ctrl_executable.2810721978 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.180056246 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.3595104926 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.2851217109 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.542263296 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.2155844899 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.2178951327 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2050023152 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.1257806401 |
| /workspace/coverage/default/9.sram_ctrl_regwen.688550031 |
| /workspace/coverage/default/9.sram_ctrl_smoke.1241350418 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.1780726056 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3819260435 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1672175581 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1108438912 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3038194091 |
|
|
Jun 09 01:03:47 PM PDT 24 |
Jun 09 01:04:38 PM PDT 24 |
774268587 ps |
| T2 |
/workspace/coverage/default/16.sram_ctrl_partial_access.4119001974 |
|
|
Jun 09 12:58:09 PM PDT 24 |
Jun 09 12:59:03 PM PDT 24 |
481594409 ps |
| T3 |
/workspace/coverage/default/22.sram_ctrl_regwen.813383738 |
|
|
Jun 09 12:59:19 PM PDT 24 |
Jun 09 01:03:35 PM PDT 24 |
35466320843 ps |
| T9 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.3612486498 |
|
|
Jun 09 01:00:22 PM PDT 24 |
Jun 09 01:05:45 PM PDT 24 |
28272401216 ps |
| T10 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1144446564 |
|
|
Jun 09 01:02:20 PM PDT 24 |
Jun 09 01:04:58 PM PDT 24 |
3552813348 ps |
| T11 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.962559669 |
|
|
Jun 09 01:02:19 PM PDT 24 |
Jun 09 01:11:39 PM PDT 24 |
32880711469 ps |
| T4 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.254688057 |
|
|
Jun 09 01:00:53 PM PDT 24 |
Jun 09 01:03:25 PM PDT 24 |
3102611744 ps |
| T5 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.2614230509 |
|
|
Jun 09 12:58:26 PM PDT 24 |
Jun 09 01:04:06 PM PDT 24 |
105506630117 ps |
| T12 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2474433020 |
|
|
Jun 09 12:59:35 PM PDT 24 |
Jun 09 01:19:19 PM PDT 24 |
33119895041 ps |
| T13 |
/workspace/coverage/default/4.sram_ctrl_partial_access.313031981 |
|
|
Jun 09 12:56:59 PM PDT 24 |
Jun 09 12:57:15 PM PDT 24 |
3239671638 ps |
| T21 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.328970823 |
|
|
Jun 09 01:00:41 PM PDT 24 |
Jun 09 01:03:23 PM PDT 24 |
14152256586 ps |
| T31 |
/workspace/coverage/default/21.sram_ctrl_partial_access.985407259 |
|
|
Jun 09 12:59:10 PM PDT 24 |
Jun 09 12:59:29 PM PDT 24 |
1086468056 ps |
| T32 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.2894816310 |
|
|
Jun 09 01:02:12 PM PDT 24 |
Jun 09 01:02:16 PM PDT 24 |
370233990 ps |
| T14 |
/workspace/coverage/default/5.sram_ctrl_stress_all.108913836 |
|
|
Jun 09 12:57:01 PM PDT 24 |
Jun 09 02:04:28 PM PDT 24 |
344892654870 ps |
| T26 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4251058251 |
|
|
Jun 09 12:57:50 PM PDT 24 |
Jun 09 01:02:20 PM PDT 24 |
42391287871 ps |
| T27 |
/workspace/coverage/default/30.sram_ctrl_smoke.1903339586 |
|
|
Jun 09 01:00:34 PM PDT 24 |
Jun 09 01:00:54 PM PDT 24 |
5109075707 ps |
| T15 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2570359876 |
|
|
Jun 09 12:56:40 PM PDT 24 |
Jun 09 12:58:09 PM PDT 24 |
7066534956 ps |
| T48 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1516583876 |
|
|
Jun 09 12:57:41 PM PDT 24 |
Jun 09 12:58:15 PM PDT 24 |
3070369396 ps |
| T17 |
/workspace/coverage/default/1.sram_ctrl_alert_test.103300722 |
|
|
Jun 09 12:56:46 PM PDT 24 |
Jun 09 12:56:47 PM PDT 24 |
38366238 ps |
| T49 |
/workspace/coverage/default/48.sram_ctrl_partial_access.783523088 |
|
|
Jun 09 01:04:11 PM PDT 24 |
Jun 09 01:05:42 PM PDT 24 |
2295075654 ps |
| T50 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.3366588101 |
|
|
Jun 09 12:57:14 PM PDT 24 |
Jun 09 12:57:21 PM PDT 24 |
706156353 ps |
| T41 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1789305611 |
|
|
Jun 09 01:02:45 PM PDT 24 |
Jun 09 01:08:28 PM PDT 24 |
5308415233 ps |
| T16 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.583711026 |
|
|
Jun 09 12:57:32 PM PDT 24 |
Jun 09 12:57:52 PM PDT 24 |
2214882713 ps |
| T51 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.3269652672 |
|
|
Jun 09 12:57:07 PM PDT 24 |
Jun 09 12:57:29 PM PDT 24 |
2817504879 ps |
| T38 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.670135052 |
|
|
Jun 09 12:58:47 PM PDT 24 |
Jun 09 01:01:16 PM PDT 24 |
10625040886 ps |
| T52 |
/workspace/coverage/default/22.sram_ctrl_smoke.2444201441 |
|
|
Jun 09 12:59:15 PM PDT 24 |
Jun 09 12:59:22 PM PDT 24 |
4787905546 ps |
| T89 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2636228546 |
|
|
Jun 09 01:00:14 PM PDT 24 |
Jun 09 01:07:08 PM PDT 24 |
6760360791 ps |
| T39 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3432510224 |
|
|
Jun 09 12:59:39 PM PDT 24 |
Jun 09 01:02:28 PM PDT 24 |
9765415733 ps |
| T129 |
/workspace/coverage/default/47.sram_ctrl_smoke.2959129487 |
|
|
Jun 09 01:04:01 PM PDT 24 |
Jun 09 01:04:21 PM PDT 24 |
3407623134 ps |
| T130 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2178951327 |
|
|
Jun 09 12:57:13 PM PDT 24 |
Jun 09 12:57:32 PM PDT 24 |
2312200167 ps |
| T40 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.4132138427 |
|
|
Jun 09 12:58:12 PM PDT 24 |
Jun 09 01:04:20 PM PDT 24 |
82694435316 ps |
| T56 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3799140671 |
|
|
Jun 09 12:58:47 PM PDT 24 |
Jun 09 01:05:46 PM PDT 24 |
94166187707 ps |
| T18 |
/workspace/coverage/default/40.sram_ctrl_alert_test.3548715006 |
|
|
Jun 09 01:02:53 PM PDT 24 |
Jun 09 01:02:54 PM PDT 24 |
22665213 ps |
| T131 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2745958035 |
|
|
Jun 09 12:59:36 PM PDT 24 |
Jun 09 01:01:29 PM PDT 24 |
3092103770 ps |
| T28 |
/workspace/coverage/default/30.sram_ctrl_executable.2160327703 |
|
|
Jun 09 01:00:36 PM PDT 24 |
Jun 09 01:33:05 PM PDT 24 |
15463872046 ps |
| T73 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1784044657 |
|
|
Jun 09 12:57:14 PM PDT 24 |
Jun 09 01:03:34 PM PDT 24 |
5925867375 ps |
| T29 |
/workspace/coverage/default/26.sram_ctrl_executable.1349133761 |
|
|
Jun 09 12:59:59 PM PDT 24 |
Jun 09 01:12:38 PM PDT 24 |
17962016106 ps |
| T132 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.2985188910 |
|
|
Jun 09 01:00:21 PM PDT 24 |
Jun 09 01:18:54 PM PDT 24 |
76837912921 ps |
| T133 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1687266495 |
|
|
Jun 09 12:56:39 PM PDT 24 |
Jun 09 12:56:44 PM PDT 24 |
1551559432 ps |
| T22 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.685737703 |
|
|
Jun 09 01:02:13 PM PDT 24 |
Jun 09 01:03:07 PM PDT 24 |
1849526996 ps |
| T42 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.907593720 |
|
|
Jun 09 12:59:58 PM PDT 24 |
Jun 09 01:03:02 PM PDT 24 |
11494747859 ps |
| T134 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3999088269 |
|
|
Jun 09 01:01:04 PM PDT 24 |
Jun 09 01:13:04 PM PDT 24 |
24109948372 ps |
| T79 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.2132725344 |
|
|
Jun 09 01:01:10 PM PDT 24 |
Jun 09 01:02:30 PM PDT 24 |
4761890195 ps |
| T135 |
/workspace/coverage/default/12.sram_ctrl_partial_access.874632241 |
|
|
Jun 09 12:57:42 PM PDT 24 |
Jun 09 12:58:35 PM PDT 24 |
3212761502 ps |
| T23 |
/workspace/coverage/default/0.sram_ctrl_bijection.2352940111 |
|
|
Jun 09 12:56:35 PM PDT 24 |
Jun 09 01:15:27 PM PDT 24 |
229641000593 ps |
| T30 |
/workspace/coverage/default/24.sram_ctrl_executable.2762473021 |
|
|
Jun 09 12:59:40 PM PDT 24 |
Jun 09 01:10:28 PM PDT 24 |
59121750634 ps |
| T33 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.3997820695 |
|
|
Jun 09 01:00:31 PM PDT 24 |
Jun 09 01:00:35 PM PDT 24 |
1249188196 ps |
| T20 |
/workspace/coverage/default/31.sram_ctrl_stress_all.1717392312 |
|
|
Jun 09 01:00:59 PM PDT 24 |
Jun 09 01:20:23 PM PDT 24 |
91935606442 ps |
| T59 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3073765338 |
|
|
Jun 09 01:04:39 PM PDT 24 |
Jun 09 01:04:53 PM PDT 24 |
390783996 ps |
| T6 |
/workspace/coverage/default/41.sram_ctrl_stress_all.3980627750 |
|
|
Jun 09 01:02:58 PM PDT 24 |
Jun 09 02:32:57 PM PDT 24 |
156643993580 ps |
| T60 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3909860576 |
|
|
Jun 09 12:59:52 PM PDT 24 |
Jun 09 01:00:37 PM PDT 24 |
6013612464 ps |
| T136 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2636670713 |
|
|
Jun 09 01:02:30 PM PDT 24 |
Jun 09 01:02:46 PM PDT 24 |
927040418 ps |
| T137 |
/workspace/coverage/default/23.sram_ctrl_bijection.3324849184 |
|
|
Jun 09 12:59:23 PM PDT 24 |
Jun 09 01:09:13 PM PDT 24 |
144771301702 ps |
| T123 |
/workspace/coverage/default/44.sram_ctrl_executable.3365965684 |
|
|
Jun 09 01:03:33 PM PDT 24 |
Jun 09 01:04:59 PM PDT 24 |
3977482848 ps |
| T138 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.1682725538 |
|
|
Jun 09 12:58:58 PM PDT 24 |
Jun 09 12:59:20 PM PDT 24 |
2850218325 ps |
| T7 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1918438129 |
|
|
Jun 09 01:04:13 PM PDT 24 |
Jun 09 01:04:57 PM PDT 24 |
7094086844 ps |
| T139 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.3605628618 |
|
|
Jun 09 01:00:09 PM PDT 24 |
Jun 09 01:04:24 PM PDT 24 |
8214986471 ps |
| T90 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2407687538 |
|
|
Jun 09 01:01:36 PM PDT 24 |
Jun 09 01:05:41 PM PDT 24 |
5601801529 ps |
| T19 |
/workspace/coverage/default/34.sram_ctrl_alert_test.201527319 |
|
|
Jun 09 01:01:32 PM PDT 24 |
Jun 09 01:01:33 PM PDT 24 |
105454226 ps |
| T140 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.609159583 |
|
|
Jun 09 12:59:10 PM PDT 24 |
Jun 09 01:14:38 PM PDT 24 |
60302069339 ps |
| T119 |
/workspace/coverage/default/20.sram_ctrl_stress_all.2611884200 |
|
|
Jun 09 12:59:09 PM PDT 24 |
Jun 09 03:39:58 PM PDT 24 |
862521428055 ps |
| T91 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4193321973 |
|
|
Jun 09 12:57:24 PM PDT 24 |
Jun 09 01:01:34 PM PDT 24 |
10003664224 ps |
| T24 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.4232771209 |
|
|
Jun 09 12:56:59 PM PDT 24 |
Jun 09 12:59:43 PM PDT 24 |
13289774196 ps |
| T141 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1678420826 |
|
|
Jun 09 12:57:13 PM PDT 24 |
Jun 09 12:59:22 PM PDT 24 |
8232391760 ps |
| T8 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3330343888 |
|
|
Jun 09 12:58:03 PM PDT 24 |
Jun 09 02:30:23 PM PDT 24 |
397681300109 ps |
| T142 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.1867255140 |
|
|
Jun 09 12:56:59 PM PDT 24 |
Jun 09 01:12:36 PM PDT 24 |
23940668222 ps |
| T143 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.750438205 |
|
|
Jun 09 12:59:36 PM PDT 24 |
Jun 09 01:00:29 PM PDT 24 |
2754380496 ps |
| T144 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.2885045085 |
|
|
Jun 09 12:56:58 PM PDT 24 |
Jun 09 12:59:45 PM PDT 24 |
6920464449 ps |
| T92 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3877550474 |
|
|
Jun 09 12:59:35 PM PDT 24 |
Jun 09 01:02:25 PM PDT 24 |
3033981482 ps |
| T145 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1251009590 |
|
|
Jun 09 12:57:14 PM PDT 24 |
Jun 09 01:12:15 PM PDT 24 |
28757442443 ps |
| T34 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.330069027 |
|
|
Jun 09 12:57:03 PM PDT 24 |
Jun 09 12:57:07 PM PDT 24 |
356346676 ps |
| T146 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1257806401 |
|
|
Jun 09 12:57:26 PM PDT 24 |
Jun 09 12:57:30 PM PDT 24 |
1343553928 ps |
| T147 |
/workspace/coverage/default/34.sram_ctrl_partial_access.3003548434 |
|
|
Jun 09 01:01:27 PM PDT 24 |
Jun 09 01:02:47 PM PDT 24 |
942514691 ps |
| T118 |
/workspace/coverage/default/39.sram_ctrl_executable.2629916644 |
|
|
Jun 09 01:02:24 PM PDT 24 |
Jun 09 01:31:04 PM PDT 24 |
24898914371 ps |
| T148 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2195934107 |
|
|
Jun 09 12:57:14 PM PDT 24 |
Jun 09 12:57:29 PM PDT 24 |
917280179 ps |
| T149 |
/workspace/coverage/default/22.sram_ctrl_bijection.922007334 |
|
|
Jun 09 12:59:13 PM PDT 24 |
Jun 09 01:33:06 PM PDT 24 |
111459240540 ps |
| T62 |
/workspace/coverage/default/33.sram_ctrl_regwen.1412052752 |
|
|
Jun 09 01:01:14 PM PDT 24 |
Jun 09 01:29:06 PM PDT 24 |
39994937281 ps |
| T150 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1834113807 |
|
|
Jun 09 12:58:20 PM PDT 24 |
Jun 09 01:01:08 PM PDT 24 |
3979944414 ps |
| T151 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2855740787 |
|
|
Jun 09 12:59:53 PM PDT 24 |
Jun 09 12:59:54 PM PDT 24 |
18890968 ps |
| T93 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2555519 |
|
|
Jun 09 12:59:26 PM PDT 24 |
Jun 09 01:05:29 PM PDT 24 |
10167575504 ps |
| T63 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.726986566 |
|
|
Jun 09 01:04:02 PM PDT 24 |
Jun 09 01:04:43 PM PDT 24 |
8038312795 ps |
| T94 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2779486363 |
|
|
Jun 09 01:01:26 PM PDT 24 |
Jun 09 01:04:12 PM PDT 24 |
2838532097 ps |
| T152 |
/workspace/coverage/default/49.sram_ctrl_partial_access.1428846982 |
|
|
Jun 09 01:04:24 PM PDT 24 |
Jun 09 01:04:50 PM PDT 24 |
738047370 ps |
| T95 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.2698063891 |
|
|
Jun 09 12:56:52 PM PDT 24 |
Jun 09 01:00:28 PM PDT 24 |
11253626324 ps |
| T153 |
/workspace/coverage/default/33.sram_ctrl_partial_access.3288053524 |
|
|
Jun 09 01:01:16 PM PDT 24 |
Jun 09 01:03:17 PM PDT 24 |
3359157340 ps |
| T154 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2221094756 |
|
|
Jun 09 01:03:32 PM PDT 24 |
Jun 09 01:03:36 PM PDT 24 |
707138335 ps |
| T155 |
/workspace/coverage/default/29.sram_ctrl_executable.3992625594 |
|
|
Jun 09 01:00:31 PM PDT 24 |
Jun 09 01:25:41 PM PDT 24 |
70820967957 ps |
| T25 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3426641616 |
|
|
Jun 09 12:56:39 PM PDT 24 |
Jun 09 12:57:52 PM PDT 24 |
35904323762 ps |
| T64 |
/workspace/coverage/default/5.sram_ctrl_regwen.1788212210 |
|
|
Jun 09 12:57:06 PM PDT 24 |
Jun 09 01:00:48 PM PDT 24 |
1193226027 ps |
| T156 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.542263296 |
|
|
Jun 09 12:57:21 PM PDT 24 |
Jun 09 12:59:56 PM PDT 24 |
7049741272 ps |
| T43 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2974345901 |
|
|
Jun 09 01:01:13 PM PDT 24 |
Jun 09 01:02:52 PM PDT 24 |
5532454501 ps |
| T157 |
/workspace/coverage/default/29.sram_ctrl_partial_access.4012724704 |
|
|
Jun 09 01:00:26 PM PDT 24 |
Jun 09 01:02:29 PM PDT 24 |
1058021873 ps |
| T158 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.769723686 |
|
|
Jun 09 12:56:46 PM PDT 24 |
Jun 09 12:57:27 PM PDT 24 |
33743774424 ps |
| T159 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.2500768901 |
|
|
Jun 09 12:58:46 PM PDT 24 |
Jun 09 12:59:29 PM PDT 24 |
1508426962 ps |
| T160 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.3672762125 |
|
|
Jun 09 01:03:06 PM PDT 24 |
Jun 09 01:05:59 PM PDT 24 |
28831607105 ps |
| T161 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2790431626 |
|
|
Jun 09 12:57:44 PM PDT 24 |
Jun 09 12:57:48 PM PDT 24 |
1254530720 ps |
| T162 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3914888117 |
|
|
Jun 09 12:57:13 PM PDT 24 |
Jun 09 01:00:17 PM PDT 24 |
18896061979 ps |
| T121 |
/workspace/coverage/default/38.sram_ctrl_regwen.252365529 |
|
|
Jun 09 01:02:14 PM PDT 24 |
Jun 09 01:13:44 PM PDT 24 |
3515447368 ps |
| T35 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.604611738 |
|
|
Jun 09 01:00:30 PM PDT 24 |
Jun 09 01:17:11 PM PDT 24 |
58721787125 ps |
| T163 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1146167701 |
|
|
Jun 09 12:59:39 PM PDT 24 |
Jun 09 01:00:03 PM PDT 24 |
737688829 ps |
| T164 |
/workspace/coverage/default/47.sram_ctrl_bijection.1528991780 |
|
|
Jun 09 01:04:03 PM PDT 24 |
Jun 09 01:44:48 PM PDT 24 |
478469612380 ps |
| T165 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.4055205583 |
|
|
Jun 09 12:58:56 PM PDT 24 |
Jun 09 01:05:19 PM PDT 24 |
12662371683 ps |
| T80 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2805117688 |
|
|
Jun 09 12:56:41 PM PDT 24 |
Jun 09 12:58:54 PM PDT 24 |
1627941015 ps |
| T166 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.1759123659 |
|
|
Jun 09 12:58:31 PM PDT 24 |
Jun 09 12:58:49 PM PDT 24 |
2810202877 ps |
| T167 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3607978881 |
|
|
Jun 09 01:04:12 PM PDT 24 |
Jun 09 01:04:40 PM PDT 24 |
3571618715 ps |
| T168 |
/workspace/coverage/default/31.sram_ctrl_regwen.384506725 |
|
|
Jun 09 01:01:00 PM PDT 24 |
Jun 09 01:05:57 PM PDT 24 |
6333604756 ps |
| T169 |
/workspace/coverage/default/20.sram_ctrl_bijection.1804254232 |
|
|
Jun 09 12:58:54 PM PDT 24 |
Jun 09 01:18:04 PM PDT 24 |
276586364307 ps |
| T170 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3919730579 |
|
|
Jun 09 01:01:15 PM PDT 24 |
Jun 09 01:01:18 PM PDT 24 |
359308127 ps |
| T171 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.95829404 |
|
|
Jun 09 12:58:08 PM PDT 24 |
Jun 09 01:03:49 PM PDT 24 |
23078847347 ps |
| T128 |
/workspace/coverage/default/41.sram_ctrl_executable.1553290518 |
|
|
Jun 09 01:02:56 PM PDT 24 |
Jun 09 01:23:33 PM PDT 24 |
65718007558 ps |
| T172 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.3946576222 |
|
|
Jun 09 12:56:47 PM PDT 24 |
Jun 09 12:58:03 PM PDT 24 |
4619802174 ps |
| T173 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4053980746 |
|
|
Jun 09 12:57:11 PM PDT 24 |
Jun 09 01:04:08 PM PDT 24 |
223894178773 ps |
| T174 |
/workspace/coverage/default/10.sram_ctrl_bijection.3748857645 |
|
|
Jun 09 12:57:24 PM PDT 24 |
Jun 09 01:39:23 PM PDT 24 |
574824699497 ps |
| T175 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.14972461 |
|
|
Jun 09 12:58:47 PM PDT 24 |
Jun 09 12:59:32 PM PDT 24 |
2732454560 ps |
| T176 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3837963602 |
|
|
Jun 09 12:57:12 PM PDT 24 |
Jun 09 12:57:16 PM PDT 24 |
3746959335 ps |
| T177 |
/workspace/coverage/default/12.sram_ctrl_regwen.3020517766 |
|
|
Jun 09 12:57:44 PM PDT 24 |
Jun 09 01:04:13 PM PDT 24 |
5424382445 ps |
| T178 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.2509917616 |
|
|
Jun 09 01:00:58 PM PDT 24 |
Jun 09 01:04:01 PM PDT 24 |
13847672467 ps |
| T179 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.834411088 |
|
|
Jun 09 01:01:10 PM PDT 24 |
Jun 09 01:01:14 PM PDT 24 |
348459690 ps |
| T180 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2384709138 |
|
|
Jun 09 12:57:41 PM PDT 24 |
Jun 09 12:57:42 PM PDT 24 |
29735919 ps |
| T36 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.1318616107 |
|
|
Jun 09 12:59:58 PM PDT 24 |
Jun 09 01:26:44 PM PDT 24 |
17613800962 ps |
| T181 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.611148853 |
|
|
Jun 09 01:04:00 PM PDT 24 |
Jun 09 01:09:49 PM PDT 24 |
3685818190 ps |
| T122 |
/workspace/coverage/default/32.sram_ctrl_executable.1087959194 |
|
|
Jun 09 01:01:04 PM PDT 24 |
Jun 09 01:06:32 PM PDT 24 |
43053789875 ps |
| T182 |
/workspace/coverage/default/3.sram_ctrl_alert_test.310832641 |
|
|
Jun 09 12:56:57 PM PDT 24 |
Jun 09 12:56:58 PM PDT 24 |
22187817 ps |
| T183 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.3579745623 |
|
|
Jun 09 12:58:11 PM PDT 24 |
Jun 09 01:16:29 PM PDT 24 |
29406001430 ps |
| T184 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.341961872 |
|
|
Jun 09 12:58:41 PM PDT 24 |
Jun 09 01:01:14 PM PDT 24 |
7956916018 ps |
| T185 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.679558580 |
|
|
Jun 09 12:57:08 PM PDT 24 |
Jun 09 01:10:02 PM PDT 24 |
20324747097 ps |
| T186 |
/workspace/coverage/default/44.sram_ctrl_regwen.1014999397 |
|
|
Jun 09 01:03:32 PM PDT 24 |
Jun 09 01:14:32 PM PDT 24 |
11746168979 ps |
| T187 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1637958832 |
|
|
Jun 09 12:57:40 PM PDT 24 |
Jun 09 12:57:47 PM PDT 24 |
711071144 ps |
| T188 |
/workspace/coverage/default/35.sram_ctrl_executable.2565996060 |
|
|
Jun 09 01:01:32 PM PDT 24 |
Jun 09 01:15:59 PM PDT 24 |
40889401682 ps |
| T189 |
/workspace/coverage/default/21.sram_ctrl_stress_all.2026754125 |
|
|
Jun 09 12:59:15 PM PDT 24 |
Jun 09 02:04:59 PM PDT 24 |
76850034665 ps |
| T61 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2107268408 |
|
|
Jun 09 01:00:59 PM PDT 24 |
Jun 09 01:01:31 PM PDT 24 |
678639623 ps |
| T190 |
/workspace/coverage/default/19.sram_ctrl_alert_test.3475927947 |
|
|
Jun 09 12:58:55 PM PDT 24 |
Jun 09 12:58:55 PM PDT 24 |
27135405 ps |
| T44 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.1868834855 |
|
|
Jun 09 01:02:03 PM PDT 24 |
Jun 09 01:04:00 PM PDT 24 |
6766327519 ps |
| T191 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3939007274 |
|
|
Jun 09 12:57:42 PM PDT 24 |
Jun 09 01:00:30 PM PDT 24 |
14584086385 ps |
| T192 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.3908949811 |
|
|
Jun 09 12:57:08 PM PDT 24 |
Jun 09 12:59:59 PM PDT 24 |
28847349759 ps |
| T193 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.2653766242 |
|
|
Jun 09 01:00:31 PM PDT 24 |
Jun 09 01:00:37 PM PDT 24 |
1387790123 ps |
| T194 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2805492204 |
|
|
Jun 09 01:02:57 PM PDT 24 |
Jun 09 01:07:15 PM PDT 24 |
3902237343 ps |
| T195 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.4282322698 |
|
|
Jun 09 01:02:02 PM PDT 24 |
Jun 09 01:04:54 PM PDT 24 |
10796912171 ps |
| T45 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.1812554142 |
|
|
Jun 09 01:01:27 PM PDT 24 |
Jun 09 01:02:57 PM PDT 24 |
2681850295 ps |
| T196 |
/workspace/coverage/default/18.sram_ctrl_bijection.2393227440 |
|
|
Jun 09 12:58:31 PM PDT 24 |
Jun 09 01:29:05 PM PDT 24 |
100963300741 ps |
| T197 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.700937380 |
|
|
Jun 09 12:59:29 PM PDT 24 |
Jun 09 01:01:12 PM PDT 24 |
33084648407 ps |
| T198 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.70837680 |
|
|
Jun 09 12:59:09 PM PDT 24 |
Jun 09 01:04:31 PM PDT 24 |
6008513207 ps |
| T199 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.964754168 |
|
|
Jun 09 01:00:14 PM PDT 24 |
Jun 09 01:04:31 PM PDT 24 |
4137975909 ps |
| T200 |
/workspace/coverage/default/6.sram_ctrl_smoke.2945058919 |
|
|
Jun 09 12:57:02 PM PDT 24 |
Jun 09 12:59:02 PM PDT 24 |
476897254 ps |
| T201 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3510621413 |
|
|
Jun 09 01:04:24 PM PDT 24 |
Jun 09 01:18:13 PM PDT 24 |
44937610970 ps |
| T202 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1522633765 |
|
|
Jun 09 01:03:25 PM PDT 24 |
Jun 09 01:04:55 PM PDT 24 |
3072116272 ps |
| T203 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3595104926 |
|
|
Jun 09 12:57:14 PM PDT 24 |
Jun 09 12:57:31 PM PDT 24 |
2788437729 ps |
| T81 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3471713191 |
|
|
Jun 09 12:57:08 PM PDT 24 |
Jun 09 01:20:38 PM PDT 24 |
50294803726 ps |
| T204 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2968170016 |
|
|
Jun 09 01:03:38 PM PDT 24 |
Jun 09 01:04:01 PM PDT 24 |
3140458140 ps |
| T82 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.375110766 |
|
|
Jun 09 01:03:22 PM PDT 24 |
Jun 09 01:04:34 PM PDT 24 |
1956937840 ps |
| T205 |
/workspace/coverage/default/34.sram_ctrl_regwen.2544254041 |
|
|
Jun 09 01:01:28 PM PDT 24 |
Jun 09 01:10:08 PM PDT 24 |
9724280548 ps |
| T206 |
/workspace/coverage/default/12.sram_ctrl_smoke.2217180553 |
|
|
Jun 09 12:57:45 PM PDT 24 |
Jun 09 12:57:50 PM PDT 24 |
717619561 ps |
| T207 |
/workspace/coverage/default/25.sram_ctrl_regwen.4010738083 |
|
|
Jun 09 12:59:50 PM PDT 24 |
Jun 09 01:10:28 PM PDT 24 |
28450862762 ps |
| T208 |
/workspace/coverage/default/11.sram_ctrl_regwen.1815966267 |
|
|
Jun 09 12:57:35 PM PDT 24 |
Jun 09 01:30:01 PM PDT 24 |
4643105329 ps |
| T209 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.415160493 |
|
|
Jun 09 01:02:53 PM PDT 24 |
Jun 09 01:02:59 PM PDT 24 |
1391502799 ps |
| T210 |
/workspace/coverage/default/27.sram_ctrl_executable.1246289073 |
|
|
Jun 09 01:00:07 PM PDT 24 |
Jun 09 01:06:06 PM PDT 24 |
18375639946 ps |
| T211 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3795595841 |
|
|
Jun 09 01:04:00 PM PDT 24 |
Jun 09 01:04:29 PM PDT 24 |
7895824530 ps |
| T212 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2267397384 |
|
|
Jun 09 12:56:46 PM PDT 24 |
Jun 09 12:59:53 PM PDT 24 |
43156112279 ps |
| T213 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1158129353 |
|
|
Jun 09 12:58:10 PM PDT 24 |
Jun 09 12:58:11 PM PDT 24 |
67606014 ps |
| T214 |
/workspace/coverage/default/14.sram_ctrl_smoke.964062336 |
|
|
Jun 09 12:57:52 PM PDT 24 |
Jun 09 12:58:03 PM PDT 24 |
3244739272 ps |
| T215 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.4037004874 |
|
|
Jun 09 12:57:14 PM PDT 24 |
Jun 09 01:07:56 PM PDT 24 |
8444564228 ps |
| T216 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.1883087197 |
|
|
Jun 09 01:01:16 PM PDT 24 |
Jun 09 01:05:06 PM PDT 24 |
6248646347 ps |
| T217 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.3726442114 |
|
|
Jun 09 12:58:20 PM PDT 24 |
Jun 09 01:00:17 PM PDT 24 |
2826441492 ps |
| T218 |
/workspace/coverage/default/2.sram_ctrl_regwen.70531365 |
|
|
Jun 09 12:56:54 PM PDT 24 |
Jun 09 01:16:32 PM PDT 24 |
24266083267 ps |
| T219 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3014046713 |
|
|
Jun 09 12:57:02 PM PDT 24 |
Jun 09 12:57:51 PM PDT 24 |
3116219686 ps |
| T220 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1897505349 |
|
|
Jun 09 12:59:52 PM PDT 24 |
Jun 09 01:00:26 PM PDT 24 |
3033366407 ps |
| T221 |
/workspace/coverage/default/31.sram_ctrl_executable.50943440 |
|
|
Jun 09 01:00:54 PM PDT 24 |
Jun 09 01:30:43 PM PDT 24 |
17912152111 ps |
| T222 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.2885952027 |
|
|
Jun 09 12:57:48 PM PDT 24 |
Jun 09 01:14:23 PM PDT 24 |
100899973593 ps |
| T223 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3075076128 |
|
|
Jun 09 01:04:06 PM PDT 24 |
Jun 09 01:09:16 PM PDT 24 |
10507940343 ps |
| T224 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.1412310006 |
|
|
Jun 09 01:01:38 PM PDT 24 |
Jun 09 01:04:19 PM PDT 24 |
14107411217 ps |
| T46 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.839278932 |
|
|
Jun 09 01:03:11 PM PDT 24 |
Jun 09 01:04:40 PM PDT 24 |
8314069637 ps |
| T47 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1749061029 |
|
|
Jun 09 12:57:57 PM PDT 24 |
Jun 09 01:00:59 PM PDT 24 |
26654724590 ps |
| T225 |
/workspace/coverage/default/25.sram_ctrl_partial_access.4212673084 |
|
|
Jun 09 12:59:46 PM PDT 24 |
Jun 09 12:59:56 PM PDT 24 |
734175501 ps |
| T226 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.110436041 |
|
|
Jun 09 12:57:02 PM PDT 24 |
Jun 09 01:03:04 PM PDT 24 |
224373845544 ps |
| T227 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.2736483450 |
|
|
Jun 09 12:59:20 PM PDT 24 |
Jun 09 01:10:36 PM PDT 24 |
33599002535 ps |
| T228 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2890787971 |
|
|
Jun 09 01:03:48 PM PDT 24 |
Jun 09 01:04:42 PM PDT 24 |
1467286752 ps |
| T229 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.3459469714 |
|
|
Jun 09 01:00:48 PM PDT 24 |
Jun 09 01:03:39 PM PDT 24 |
5932310298 ps |
| T230 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1439502153 |
|
|
Jun 09 12:56:49 PM PDT 24 |
Jun 09 12:59:26 PM PDT 24 |
10172392862 ps |
| T231 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3663105771 |
|
|
Jun 09 12:57:07 PM PDT 24 |
Jun 09 01:03:28 PM PDT 24 |
5311414453 ps |
| T232 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1204107315 |
|
|
Jun 09 01:04:19 PM PDT 24 |
Jun 09 01:04:23 PM PDT 24 |
1347204699 ps |
| T233 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2569013003 |
|
|
Jun 09 01:02:45 PM PDT 24 |
Jun 09 01:02:54 PM PDT 24 |
949556625 ps |
| T103 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2649874490 |
|
|
Jun 09 12:57:08 PM PDT 24 |
Jun 09 12:57:43 PM PDT 24 |
12051485015 ps |
| T234 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.3344692754 |
|
|
Jun 09 01:02:13 PM PDT 24 |
Jun 09 01:07:08 PM PDT 24 |
4089072647 ps |
| T104 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.796929861 |
|
|
Jun 09 12:57:05 PM PDT 24 |
Jun 09 12:58:17 PM PDT 24 |
12358381726 ps |
| T235 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.1760425715 |
|
|
Jun 09 12:59:23 PM PDT 24 |
Jun 09 01:00:31 PM PDT 24 |
9409104008 ps |
| T236 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1885326590 |
|
|
Jun 09 01:03:44 PM PDT 24 |
Jun 09 01:05:53 PM PDT 24 |
3198785604 ps |
| T237 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.639600133 |
|
|
Jun 09 01:01:05 PM PDT 24 |
Jun 09 01:02:10 PM PDT 24 |
20083801572 ps |
| T37 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1894744020 |
|
|
Jun 09 01:03:33 PM PDT 24 |
Jun 09 01:04:37 PM PDT 24 |
2652353307 ps |
| T238 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3182430303 |
|
|
Jun 09 12:59:15 PM PDT 24 |
Jun 09 12:59:49 PM PDT 24 |
9807928345 ps |
| T239 |
/workspace/coverage/default/29.sram_ctrl_bijection.354224305 |
|
|
Jun 09 01:00:22 PM PDT 24 |
Jun 09 01:26:22 PM PDT 24 |
69240561114 ps |
| T240 |
/workspace/coverage/default/24.sram_ctrl_bijection.3171698259 |
|
|
Jun 09 12:59:40 PM PDT 24 |
Jun 09 01:19:09 PM PDT 24 |
545009669709 ps |
| T241 |
/workspace/coverage/default/17.sram_ctrl_smoke.2044589546 |
|
|
Jun 09 12:58:15 PM PDT 24 |
Jun 09 12:58:40 PM PDT 24 |
1859281524 ps |
| T242 |
/workspace/coverage/default/40.sram_ctrl_stress_all.2311077321 |
|
|
Jun 09 01:02:46 PM PDT 24 |
Jun 09 02:09:23 PM PDT 24 |
65057518907 ps |
| T243 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1621873233 |
|
|
Jun 09 12:57:37 PM PDT 24 |
Jun 09 12:58:59 PM PDT 24 |
1733964114 ps |
| T244 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.775140936 |
|
|
Jun 09 12:57:55 PM PDT 24 |
Jun 09 12:58:05 PM PDT 24 |
694839346 ps |
| T245 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3405376625 |
|
|
Jun 09 12:57:25 PM PDT 24 |
Jun 09 01:00:31 PM PDT 24 |
12530053364 ps |
| T246 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.4245911620 |
|
|
Jun 09 01:02:47 PM PDT 24 |
Jun 09 01:04:00 PM PDT 24 |
2889395134 ps |
| T120 |
/workspace/coverage/default/28.sram_ctrl_stress_all.3838291100 |
|
|
Jun 09 01:00:21 PM PDT 24 |
Jun 09 01:38:49 PM PDT 24 |
66194999650 ps |
| T247 |
/workspace/coverage/default/1.sram_ctrl_smoke.2251229981 |
|
|
Jun 09 12:56:41 PM PDT 24 |
Jun 09 12:57:19 PM PDT 24 |
1198536013 ps |
| T248 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.1111158900 |
|
|
Jun 09 12:58:56 PM PDT 24 |
Jun 09 12:59:14 PM PDT 24 |
10836618702 ps |
| T249 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2050023152 |
|
|
Jun 09 12:57:16 PM PDT 24 |
Jun 09 01:04:02 PM PDT 24 |
63294346588 ps |
| T250 |
/workspace/coverage/default/39.sram_ctrl_bijection.2282880178 |
|
|
Jun 09 01:02:20 PM PDT 24 |
Jun 09 01:15:03 PM PDT 24 |
135335851460 ps |
| T251 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.3481190733 |
|
|
Jun 09 01:00:19 PM PDT 24 |
Jun 09 01:00:24 PM PDT 24 |
4190982331 ps |
| T252 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3095394031 |
|
|
Jun 09 12:57:36 PM PDT 24 |
Jun 09 12:59:07 PM PDT 24 |
2730544837 ps |
| T253 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1359250859 |
|
|
Jun 09 01:00:31 PM PDT 24 |
Jun 09 01:00:53 PM PDT 24 |
1459278480 ps |
| T254 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.1193923176 |
|
|
Jun 09 12:59:13 PM PDT 24 |
Jun 09 01:02:22 PM PDT 24 |
11630073689 ps |
| T127 |
/workspace/coverage/default/25.sram_ctrl_stress_all.3342823710 |
|
|
Jun 09 12:59:52 PM PDT 24 |
Jun 09 01:53:19 PM PDT 24 |
112992174380 ps |
| T255 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3543773530 |
|
|
Jun 09 12:57:45 PM PDT 24 |
Jun 09 01:02:08 PM PDT 24 |
19993272315 ps |
| T256 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1297224080 |
|
|
Jun 09 12:56:52 PM PDT 24 |
Jun 09 12:56:56 PM PDT 24 |
657242773 ps |
| T257 |
/workspace/coverage/default/28.sram_ctrl_alert_test.3409538254 |
|
|
Jun 09 01:00:19 PM PDT 24 |
Jun 09 01:00:20 PM PDT 24 |
42444761 ps |
| T258 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.4245402947 |
|
|
Jun 09 12:57:00 PM PDT 24 |
Jun 09 01:16:24 PM PDT 24 |
34558303179 ps |
| T259 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.4012559991 |
|
|
Jun 09 01:00:43 PM PDT 24 |
Jun 09 01:00:48 PM PDT 24 |
4206213354 ps |
| T260 |
/workspace/coverage/default/16.sram_ctrl_regwen.3107820730 |
|
|
Jun 09 12:58:18 PM PDT 24 |
Jun 09 12:59:17 PM PDT 24 |
8088035293 ps |
| T261 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1901040400 |
|
|
Jun 09 01:01:04 PM PDT 24 |
Jun 09 01:02:16 PM PDT 24 |
15629588385 ps |
| T262 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.1154721145 |
|
|
Jun 09 01:01:18 PM PDT 24 |
Jun 09 01:23:42 PM PDT 24 |
112468528224 ps |
| T263 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4068373358 |
|
|
Jun 09 12:57:07 PM PDT 24 |
Jun 09 01:10:13 PM PDT 24 |
12419243657 ps |
| T264 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3390708357 |
|
|
Jun 09 01:00:54 PM PDT 24 |
Jun 09 01:01:43 PM PDT 24 |
938074132 ps |
| T265 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.4138490476 |
|
|
Jun 09 12:58:45 PM PDT 24 |
Jun 09 12:58:48 PM PDT 24 |
367089484 ps |
| T266 |
/workspace/coverage/default/15.sram_ctrl_regwen.3288468114 |
|
|
Jun 09 12:58:05 PM PDT 24 |
Jun 09 01:11:08 PM PDT 24 |
261793246171 ps |
| T267 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3752776057 |
|
|
Jun 09 01:04:34 PM PDT 24 |
Jun 09 01:06:53 PM PDT 24 |
1681229466 ps |
| T268 |
/workspace/coverage/default/4.sram_ctrl_stress_all.2483004140 |
|
|
Jun 09 12:57:04 PM PDT 24 |
Jun 09 01:44:16 PM PDT 24 |
19592211044 ps |
| T269 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3533242028 |
|
|
Jun 09 12:56:42 PM PDT 24 |
Jun 09 12:58:36 PM PDT 24 |
3158280061 ps |
| T124 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.733693049 |
|
|
Jun 09 01:03:14 PM PDT 24 |
Jun 09 01:11:22 PM PDT 24 |
44612780775 ps |
| T270 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.4192553954 |
|
|
Jun 09 12:59:19 PM PDT 24 |
Jun 09 01:03:37 PM PDT 24 |
4028302708 ps |
| T271 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.1015002680 |
|
|
Jun 09 01:00:54 PM PDT 24 |
Jun 09 01:06:38 PM PDT 24 |
6645101557 ps |
| T272 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.62714039 |
|
|
Jun 09 12:59:51 PM PDT 24 |
Jun 09 12:59:55 PM PDT 24 |
364966514 ps |
| T273 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3794552923 |
|
|
Jun 09 12:57:40 PM PDT 24 |
Jun 09 01:01:07 PM PDT 24 |
3412931303 ps |
| T274 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1670325673 |
|
|
Jun 09 12:56:41 PM PDT 24 |
Jun 09 01:11:14 PM PDT 24 |
67961157618 ps |
| T275 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.1094767402 |
|
|
Jun 09 12:58:37 PM PDT 24 |
Jun 09 12:58:40 PM PDT 24 |
1208166499 ps |
| T276 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1531037251 |
|
|
Jun 09 01:04:40 PM PDT 24 |
Jun 09 01:04:41 PM PDT 24 |
17041113 ps |
| T277 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.698941569 |
|
|
Jun 09 12:59:40 PM PDT 24 |
Jun 09 12:59:43 PM PDT 24 |
1343606965 ps |
| T278 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1127431591 |
|
|
Jun 09 12:56:47 PM PDT 24 |
Jun 09 12:58:06 PM PDT 24 |
2354211288 ps |
| T279 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.2916654892 |
|
|
Jun 09 12:59:21 PM PDT 24 |
Jun 09 12:59:36 PM PDT 24 |
11529379082 ps |
| T280 |
/workspace/coverage/default/35.sram_ctrl_stress_all.182153379 |
|
|
Jun 09 01:01:37 PM PDT 24 |
Jun 09 01:24:15 PM PDT 24 |
95705233760 ps |
| T281 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.579557237 |
|
|
Jun 09 12:58:15 PM PDT 24 |
Jun 09 12:59:33 PM PDT 24 |
5820479259 ps |
| T282 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2788942881 |
|
|
Jun 09 12:56:40 PM PDT 24 |
Jun 09 01:03:14 PM PDT 24 |
6095070973 ps |
| T283 |
/workspace/coverage/default/45.sram_ctrl_bijection.4266977283 |
|
|
Jun 09 01:03:38 PM PDT 24 |
Jun 09 01:16:19 PM PDT 24 |
129703276891 ps |
| T284 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3400823707 |
|
|
Jun 09 01:00:26 PM PDT 24 |
Jun 09 01:01:55 PM PDT 24 |
17595155483 ps |
| T285 |
/workspace/coverage/default/10.sram_ctrl_smoke.2155517652 |
|
|
Jun 09 12:57:29 PM PDT 24 |
Jun 09 12:57:39 PM PDT 24 |
429973673 ps |
| T286 |
/workspace/coverage/default/12.sram_ctrl_stress_all.2327587571 |
|
|
Jun 09 12:57:47 PM PDT 24 |
Jun 09 02:57:52 PM PDT 24 |
459362794453 ps |
| T287 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.2029014802 |
|
|
Jun 09 01:00:35 PM PDT 24 |
Jun 09 01:05:59 PM PDT 24 |
9355648920 ps |
| T288 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1934973603 |
|
|
Jun 09 12:57:35 PM PDT 24 |
Jun 09 12:57:39 PM PDT 24 |
362623904 ps |
| T289 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1120106287 |
|
|
Jun 09 12:57:24 PM PDT 24 |
Jun 09 12:57:24 PM PDT 24 |
35685948 ps |
| T290 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1788381181 |
|
|
Jun 09 01:04:13 PM PDT 24 |
Jun 09 01:08:59 PM PDT 24 |
13172379329 ps |
| T291 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1692576930 |
|
|
Jun 09 12:57:47 PM PDT 24 |
Jun 09 12:59:11 PM PDT 24 |
85111405001 ps |
| T292 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.291282957 |
|
|
Jun 09 01:04:01 PM PDT 24 |
Jun 09 01:05:04 PM PDT 24 |
3060218294 ps |
| T293 |
/workspace/coverage/default/34.sram_ctrl_bijection.3854037327 |
|
|
Jun 09 01:01:27 PM PDT 24 |
Jun 09 01:35:20 PM PDT 24 |
89195192546 ps |
| T294 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3706741176 |
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|
Jun 09 12:59:20 PM PDT 24 |
Jun 09 01:00:31 PM PDT 24 |
777949300 ps |
| T295 |
/workspace/coverage/default/41.sram_ctrl_smoke.3347342347 |
|
|
Jun 09 01:02:54 PM PDT 24 |
Jun 09 01:03:09 PM PDT 24 |
15069344844 ps |
| T296 |
/workspace/coverage/default/17.sram_ctrl_executable.2639070561 |
|
|
Jun 09 12:58:28 PM PDT 24 |
Jun 09 01:11:31 PM PDT 24 |
11538383433 ps |