Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16737651	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

152281209

1

T1

1002

T2

1295

T3

3208

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	83153163	1			T1	2738		T2	680		T3	31732
values[0x0]	41270213	1			T1	881		T2	364		T3	10160
values[0x1]	44595484	1			T1	1805		T2	373		T3	22000

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8518476	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

160500384

1

T1

3213

T2

1354

T3

28957

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	526479	1			T1	17		T3	216		T5	204
valid_sources[0x01]	538010	1			T1	16		T2	11		T3	243
valid_sources[0x02]	556911	1			T1	4		T3	238		T5	207
valid_sources[0x03]	564734	1			T1	26		T3	269		T5	184
valid_sources[0x04]	537068	1			T1	20		T3	276		T5	183
valid_sources[0x05]	545943	1			T1	33		T3	224		T5	153
valid_sources[0x06]	618078	1			T1	19		T3	224		T5	156
valid_sources[0x07]	540226	1			T1	21		T3	281		T5	162
valid_sources[0x08]	603315	1			T1	26		T2	87		T3	266
valid_sources[0x09]	548612	1			T1	24		T3	246		T5	188
valid_sources[0x0a]	534038	1			T1	13		T3	241		T5	237
valid_sources[0x0b]	630869	1			T1	21		T3	238		T5	151
valid_sources[0x0c]	527578	1			T1	10		T3	249		T5	162
valid_sources[0x0d]	1223724	1			T1	25		T3	248		T5	230
valid_sources[0x0e]	580551	1			T1	7		T3	270		T5	188
valid_sources[0x0f]	576844	1			T1	6		T3	297		T5	209
valid_sources[0x10]	590508	1			T1	26		T3	243		T5	188
valid_sources[0x11]	645983	1			T1	14		T3	266		T5	172
valid_sources[0x12]	585383	1			T1	23		T3	258		T5	196
valid_sources[0x13]	1933557	1			T1	24		T3	238		T5	197
valid_sources[0x14]	581480	1			T1	6		T3	280		T4	85
valid_sources[0x15]	525383	1			T1	22		T2	18		T3	253
valid_sources[0x16]	536477	1			T1	23		T3	266		T5	159
valid_sources[0x17]	581983	1			T1	28		T3	252		T4	8
valid_sources[0x18]	556687	1			T1	28		T3	229		T5	144
valid_sources[0x19]	552081	1			T1	23		T3	235		T5	163
valid_sources[0x1a]	577207	1			T1	20		T3	245		T5	175
valid_sources[0x1b]	540791	1			T1	14		T3	227		T5	170
valid_sources[0x1c]	541320	1			T1	16		T3	252		T5	180
valid_sources[0x1d]	533677	1			T1	15		T2	104		T3	231
valid_sources[0x1e]	632930	1			T1	15		T3	271		T5	161
valid_sources[0x1f]	812882	1			T1	21		T3	245		T5	176
valid_sources[0x20]	526032	1			T1	16		T2	95		T3	241
valid_sources[0x21]	569788	1			T1	10		T3	240		T5	192
valid_sources[0x22]	557376	1			T1	14		T3	291		T5	185
valid_sources[0x23]	558791	1			T1	22		T3	217		T5	193
valid_sources[0x24]	571209	1			T1	20		T3	218		T5	182
valid_sources[0x25]	572111	1			T1	21		T3	256		T4	34
valid_sources[0x26]	535302	1			T1	43		T3	242		T4	80
valid_sources[0x27]	590036	1			T1	12		T3	256		T5	171
valid_sources[0x28]	533270	1			T1	32		T2	36		T3	238
valid_sources[0x29]	551689	1			T1	19		T3	251		T5	175
valid_sources[0x2a]	535169	1			T1	25		T3	267		T5	169
valid_sources[0x2b]	568899	1			T1	21		T3	207		T5	192
valid_sources[0x2c]	581706	1			T1	13		T3	223		T4	45
valid_sources[0x2d]	645372	1			T1	23		T3	249		T5	172
valid_sources[0x2e]	564756	1			T1	15		T3	214		T5	192
valid_sources[0x2f]	525277	1			T1	20		T3	228		T5	203
valid_sources[0x30]	571254	1			T1	29		T3	263		T5	209
valid_sources[0x31]	536860	1			T1	41		T3	242		T5	167
valid_sources[0x32]	598193	1			T1	20		T3	260		T5	185
valid_sources[0x33]	541848	1			T1	23		T3	247		T4	97
valid_sources[0x34]	595942	1			T1	15		T3	276		T5	160
valid_sources[0x35]	531517	1			T1	27		T3	268		T5	174
valid_sources[0x36]	561079	1			T1	15		T3	221		T5	213
valid_sources[0x37]	609748	1			T1	26		T3	235		T5	191
valid_sources[0x38]	652994	1			T1	23		T3	245		T4	7
valid_sources[0x39]	565034	1			T1	29		T3	268		T5	172
valid_sources[0x3a]	550078	1			T1	23		T3	222		T5	165
valid_sources[0x3b]	1216407	1			T1	6		T3	246		T5	205
valid_sources[0x3c]	1426253	1			T1	25		T3	262		T5	173
valid_sources[0x3d]	661770	1			T1	18		T2	9		T3	264
valid_sources[0x3e]	560861	1			T1	22		T3	228		T5	186
valid_sources[0x3f]	524804	1			T1	25		T3	218		T5	144
valid_sources[0x40]	628605	1			T1	25		T3	283		T4	167
valid_sources[0x41]	515288	1			T1	16		T3	232		T5	211
valid_sources[0x42]	556016	1			T1	17		T3	255		T4	126
valid_sources[0x43]	572315	1			T1	11		T3	203		T5	186
valid_sources[0x44]	729442	1			T1	8		T3	244		T5	209
valid_sources[0x45]	525833	1			T1	21		T3	262		T5	212
valid_sources[0x46]	603622	1			T1	29		T3	247		T5	186
valid_sources[0x47]	2262528	1			T1	11		T3	228		T5	183
valid_sources[0x48]	1156093	1			T1	25		T3	233		T4	7
valid_sources[0x49]	518996	1			T1	27		T3	286		T4	8
valid_sources[0x4a]	566089	1			T1	32		T3	270		T5	164
valid_sources[0x4b]	539454	1			T1	24		T3	250		T5	198
valid_sources[0x4c]	1056099	1			T1	17		T3	246		T5	192
valid_sources[0x4d]	521423	1			T1	40		T3	232		T5	198
valid_sources[0x4e]	1016056	1			T1	23		T3	262		T4	46
valid_sources[0x4f]	533153	1			T1	21		T2	31		T3	259
valid_sources[0x50]	599229	1			T1	21		T2	22		T3	230
valid_sources[0x51]	561891	1			T1	10		T2	49		T3	220
valid_sources[0x52]	550905	1			T1	9		T3	277		T5	168
valid_sources[0x53]	2463355	1			T1	6		T2	81		T3	267
valid_sources[0x54]	553904	1			T1	23		T3	229		T5	157
valid_sources[0x55]	734463	1			T1	20		T3	251		T4	270
valid_sources[0x56]	556343	1			T1	33		T3	243		T4	74
valid_sources[0x57]	557461	1			T1	36		T3	272		T4	31
valid_sources[0x58]	576926	1			T1	44		T3	241		T5	198
valid_sources[0x59]	535161	1			T1	28		T3	273		T5	211
valid_sources[0x5a]	606619	1			T1	31		T3	237		T5	180
valid_sources[0x5b]	577325	1			T1	15		T3	267		T5	196
valid_sources[0x5c]	570239	1			T1	31		T3	273		T5	180
valid_sources[0x5d]	572871	1			T1	22		T2	247		T3	241
valid_sources[0x5e]	608743	1			T1	18		T3	272		T5	185
valid_sources[0x5f]	518863	1			T1	24		T3	287		T4	36
valid_sources[0x60]	537967	1			T1	11		T3	238		T5	170
valid_sources[0x61]	521546	1			T1	24		T3	271		T5	177
valid_sources[0x62]	520614	1			T1	6		T3	272		T5	181
valid_sources[0x63]	1194683	1			T1	27		T3	242		T5	170
valid_sources[0x64]	567742	1			T1	37		T3	230		T5	164
valid_sources[0x65]	576584	1			T1	13		T3	289		T5	155
valid_sources[0x66]	555644	1			T1	41		T3	246		T5	192
valid_sources[0x67]	731415	1			T1	13		T3	259		T5	217
valid_sources[0x68]	611711	1			T1	16		T3	284		T5	161
valid_sources[0x69]	564924	1			T1	30		T3	225		T5	155
valid_sources[0x6a]	516804	1			T1	18		T3	244		T5	204
valid_sources[0x6b]	520547	1			T1	19		T3	211		T4	134
valid_sources[0x6c]	547238	1			T1	15		T3	249		T4	31
valid_sources[0x6d]	594211	1			T1	20		T3	219		T5	177
valid_sources[0x6e]	570246	1			T1	34		T3	276		T4	15
valid_sources[0x6f]	591148	1			T1	20		T3	229		T5	181
valid_sources[0x70]	532790	1			T1	17		T3	214		T5	202
valid_sources[0x71]	590631	1			T1	7		T3	256		T5	161
valid_sources[0x72]	542464	1			T1	22		T3	254		T5	158
valid_sources[0x73]	543186	1			T1	19		T2	37		T3	218
valid_sources[0x74]	2084280	1			T1	26		T3	241		T4	45
valid_sources[0x75]	611094	1			T1	22		T3	247		T4	87
valid_sources[0x76]	2764258	1			T1	20		T3	228		T4	31
valid_sources[0x77]	523921	1			T1	17		T3	245		T4	51
valid_sources[0x78]	532105	1			T1	13		T3	237		T5	186
valid_sources[0x79]	595290	1			T1	31		T3	265		T4	34
valid_sources[0x7a]	533840	1			T1	33		T3	247		T4	47
valid_sources[0x7b]	558348	1			T1	22		T3	265		T4	8
valid_sources[0x7c]	517548	1			T1	17		T3	253		T5	150
valid_sources[0x7d]	524990	1			T1	24		T3	225		T4	20
valid_sources[0x7e]	528100	1			T1	31		T3	241		T5	174
valid_sources[0x7f]	535012	1			T1	25		T3	272		T5	176
valid_sources[0x80]	524803	1			T1	28		T3	249		T5	219

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

74739729

1

T1

493

T2

629

T3

279

values[0x0]

all_enables

biggest_size

38772363

1

T1

251

T2

341

T3

1506

values[0x1]

all_enables

biggest_size

38769117

1

T1

258

T2

325

T3

1423

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45015	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

153415

1

T1

1

T2

11

T3

2

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	54223	1			T2	15		T4	24		T21	11
values[0x0]	69639	1			T1	2		T2	11		T3	2
values[0x1]	74568	1			T2	9		T3	1		T4	12

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34867	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

163563

1

T1

1

T2

15

T3

2

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	962	1			T6	1		T23	1		T19	3
valid_sources[0x01]	620	1			T23	6		T149	2		T19	1
valid_sources[0x02]	961	1			T9	1		T22	2		T23	6
valid_sources[0x03]	639	1			T23	7		T24	17		T139	2
valid_sources[0x04]	978	1			T23	11		T24	6		T150	2
valid_sources[0x05]	929	1			T23	6		T24	11		T86	2
valid_sources[0x06]	561	1			T23	8		T24	9		T139	1
valid_sources[0x07]	826	1			T21	1		T6	1		T23	7
valid_sources[0x08]	729	1			T22	2		T23	4		T24	12
valid_sources[0x09]	701	1			T6	2		T23	7		T42	1
valid_sources[0x0a]	619	1			T23	5		T70	1		T24	14
valid_sources[0x0b]	687	1			T22	2		T44	1		T23	10
valid_sources[0x0c]	590	1			T22	7		T44	1		T18	1
valid_sources[0x0d]	724	1			T23	3		T24	22		T25	12
valid_sources[0x0e]	590	1			T151	2		T23	7		T19	2
valid_sources[0x0f]	624	1			T41	1		T6	1		T18	5
valid_sources[0x10]	590	1			T22	2		T23	9		T24	10
valid_sources[0x11]	1079	1			T18	2		T23	9		T24	11
valid_sources[0x12]	1140	1			T22	2		T6	1		T23	9
valid_sources[0x13]	803	1			T23	3		T83	1		T24	13
valid_sources[0x14]	648	1			T18	13		T23	17		T24	12
valid_sources[0x15]	1252	1			T6	2		T23	4		T24	12
valid_sources[0x16]	1046	1			T23	7		T24	9		T139	5
valid_sources[0x17]	804	1			T22	6		T23	3		T81	2
valid_sources[0x18]	728	1			T23	8		T19	5		T24	14
valid_sources[0x19]	670	1			T23	7		T24	12		T86	1
valid_sources[0x1a]	859	1			T23	7		T24	14		T25	7
valid_sources[0x1b]	770	1			T27	1		T6	1		T18	1
valid_sources[0x1c]	1007	1			T18	2		T23	8		T24	16
valid_sources[0x1d]	634	1			T21	1		T44	1		T23	6
valid_sources[0x1e]	804	1			T23	7		T24	16		T13	1
valid_sources[0x1f]	835	1			T22	6		T18	5		T23	7
valid_sources[0x20]	659	1			T22	3		T23	9		T70	1
valid_sources[0x21]	865	1			T44	2		T23	9		T70	1
valid_sources[0x22]	693	1			T23	3		T76	4		T83	1
valid_sources[0x23]	669	1			T6	1		T18	2		T23	10
valid_sources[0x24]	1139	1			T21	2		T44	2		T23	16
valid_sources[0x25]	647	1			T21	1		T6	1		T23	12
valid_sources[0x26]	621	1			T23	4		T24	12		T152	1
valid_sources[0x27]	901	1			T22	2		T6	1		T18	2
valid_sources[0x28]	557	1			T23	8		T19	1		T24	16
valid_sources[0x29]	754	1			T44	1		T6	1		T23	9
valid_sources[0x2a]	737	1			T9	1		T22	1		T21	1
valid_sources[0x2b]	899	1			T23	2		T42	1		T24	8
valid_sources[0x2c]	607	1			T22	1		T23	6		T24	9
valid_sources[0x2d]	633	1			T23	9		T24	14		T25	5
valid_sources[0x2e]	772	1			T10	1		T23	7		T42	1
valid_sources[0x2f]	740	1			T21	1		T6	1		T23	3
valid_sources[0x30]	731	1			T23	10		T24	8		T54	8
valid_sources[0x31]	906	1			T23	11		T76	4		T153	1
valid_sources[0x32]	699	1			T22	2		T44	1		T18	6
valid_sources[0x33]	767	1			T22	1		T6	1		T23	9
valid_sources[0x34]	770	1			T21	3		T6	2		T23	9
valid_sources[0x35]	752	1			T6	1		T23	12		T83	1
valid_sources[0x36]	695	1			T18	5		T23	7		T24	7
valid_sources[0x37]	798	1			T23	9		T24	12		T86	1
valid_sources[0x38]	587	1			T23	8		T24	15		T25	3
valid_sources[0x39]	660	1			T23	6		T24	15		T25	1
valid_sources[0x3a]	558	1			T3	2		T44	1		T18	6
valid_sources[0x3b]	756	1			T23	6		T24	11		T150	1
valid_sources[0x3c]	688	1			T5	14		T6	2		T18	5
valid_sources[0x3d]	570	1			T23	7		T70	1		T149	3
valid_sources[0x3e]	680	1			T18	3		T23	8		T76	4
valid_sources[0x3f]	862	1			T11	1		T22	7		T23	5
valid_sources[0x40]	599	1			T22	1		T18	2		T23	7
valid_sources[0x41]	861	1			T6	1		T23	9		T19	2
valid_sources[0x42]	853	1			T6	1		T23	8		T70	1
valid_sources[0x43]	757	1			T6	1		T23	5		T24	10
valid_sources[0x44]	773	1			T41	1		T23	8		T154	1
valid_sources[0x45]	764	1			T22	1		T23	11		T24	6
valid_sources[0x46]	627	1			T18	2		T23	6		T24	6
valid_sources[0x47]	519	1			T23	8		T24	7		T13	1
valid_sources[0x48]	719	1			T21	1		T23	6		T24	19
valid_sources[0x49]	744	1			T21	1		T23	10		T24	14
valid_sources[0x4a]	801	1			T22	1		T6	2		T23	11
valid_sources[0x4b]	1086	1			T41	1		T23	10		T83	1
valid_sources[0x4c]	658	1			T21	2		T95	7		T23	9
valid_sources[0x4d]	594	1			T44	1		T18	5		T23	10
valid_sources[0x4e]	498	1			T23	6		T70	1		T24	11
valid_sources[0x4f]	551	1			T23	10		T24	6		T150	4
valid_sources[0x50]	818	1			T4	47		T23	4		T24	14
valid_sources[0x51]	746	1			T23	8		T24	8		T25	3
valid_sources[0x52]	724	1			T21	1		T23	6		T19	1
valid_sources[0x53]	578	1			T22	2		T6	1		T155	14
valid_sources[0x54]	867	1			T22	7		T23	7		T24	13
valid_sources[0x55]	979	1			T22	3		T23	14		T76	2
valid_sources[0x56]	740	1			T22	10		T44	2		T23	8
valid_sources[0x57]	667	1			T23	11		T24	14		T12	1
valid_sources[0x58]	776	1			T23	14		T70	1		T24	18
valid_sources[0x59]	586	1			T23	7		T24	16		T139	1
valid_sources[0x5a]	1067	1			T6	1		T23	10		T24	14
valid_sources[0x5b]	1224	1			T9	2		T22	1		T23	7
valid_sources[0x5c]	643	1			T22	3		T23	7		T24	12
valid_sources[0x5d]	873	1			T23	3		T24	10		T139	3
valid_sources[0x5e]	560	1			T22	2		T23	3		T24	9
valid_sources[0x5f]	791	1			T6	1		T23	5		T19	1
valid_sources[0x60]	1322	1			T23	6		T24	8		T25	14
valid_sources[0x61]	933	1			T44	1		T23	8		T71	1
valid_sources[0x62]	935	1			T22	1		T21	1		T23	5
valid_sources[0x63]	808	1			T22	3		T23	8		T24	13
valid_sources[0x64]	1017	1			T23	9		T24	11		T25	5
valid_sources[0x65]	1072	1			T18	1		T23	4		T76	2
valid_sources[0x66]	841	1			T23	7		T149	1		T24	13
valid_sources[0x67]	668	1			T21	3		T44	2		T6	1
valid_sources[0x68]	932	1			T22	12		T23	11		T24	11
valid_sources[0x69]	615	1			T22	1		T23	8		T24	6
valid_sources[0x6a]	991	1			T22	3		T21	2		T23	8
valid_sources[0x6b]	815	1			T23	6		T24	14		T139	2
valid_sources[0x6c]	631	1			T2	35		T23	10		T24	15
valid_sources[0x6d]	644	1			T18	5		T23	8		T24	6
valid_sources[0x6e]	823	1			T18	8		T23	7		T70	1
valid_sources[0x6f]	861	1			T22	1		T21	1		T6	2
valid_sources[0x70]	1021	1			T44	1		T23	13		T24	11
valid_sources[0x71]	973	1			T23	8		T42	1		T24	12
valid_sources[0x72]	675	1			T22	2		T23	7		T19	2
valid_sources[0x73]	657	1			T21	1		T23	11		T24	9
valid_sources[0x74]	759	1			T22	8		T23	6		T24	11
valid_sources[0x75]	722	1			T22	2		T6	1		T23	5
valid_sources[0x76]	978	1			T23	3		T24	9		T25	11
valid_sources[0x77]	540	1			T18	4		T23	9		T24	9
valid_sources[0x78]	672	1			T6	1		T23	4		T24	20
valid_sources[0x79]	567	1			T22	8		T23	7		T24	13
valid_sources[0x7a]	687	1			T23	10		T76	1		T83	1
valid_sources[0x7b]	739	1			T23	4		T24	10		T139	2
valid_sources[0x7c]	866	1			T9	1		T11	1		T23	4
valid_sources[0x7d]	639	1			T6	1		T23	13		T76	1
valid_sources[0x7e]	1120	1			T6	1		T23	3		T24	12
valid_sources[0x7f]	805	1			T22	4		T23	4		T83	1
valid_sources[0x80]	776	1			T41	1		T21	1		T23	10

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

41104

1

T2

8

T4

12

T21

6

values[0x0]

all_enables

biggest_size

57625

1

T1

1

T2

1

T3

2

values[0x1]

all_enables

biggest_size

54686

1

T2

2

T4

2

T5

1