Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1035
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
70.70 70.70 91.17 91.17 72.27 72.27 89.81 89.81 23.81 23.81 80.09 80.09 93.13 93.13 44.61 44.61 /workspace/coverage/default/39.sram_ctrl_executable.1489824287
81.12 10.42 93.87 2.70 81.87 9.60 93.56 3.75 38.10 14.29 85.55 5.45 95.03 1.90 79.89 35.28 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3448123421
88.26 7.13 96.16 2.29 82.70 0.83 93.56 0.00 80.95 42.86 88.63 3.08 95.91 0.88 79.89 0.00 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1315639700
91.70 3.44 97.38 1.23 86.49 3.79 96.07 2.51 90.48 9.52 91.71 3.08 96.20 0.29 83.55 3.66 /workspace/coverage/default/28.sram_ctrl_stress_all.1713874055
93.60 1.91 98.20 0.82 86.97 0.47 97.25 1.17 100.00 9.52 92.89 1.18 96.20 0.00 83.73 0.18 /workspace/coverage/default/25.sram_ctrl_mem_walk.2438697421
94.55 0.94 98.36 0.16 87.56 0.59 97.45 0.21 100.00 0.00 93.60 0.71 96.20 0.00 88.67 4.94 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2982964114
95.24 0.69 98.53 0.16 89.34 1.78 98.14 0.69 100.00 0.00 94.31 0.71 96.78 0.58 89.58 0.91 /workspace/coverage/default/3.sram_ctrl_sec_cm.3535172086
95.80 0.56 99.02 0.49 89.45 0.12 98.55 0.41 100.00 0.00 95.26 0.95 96.93 0.15 91.41 1.83 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1598854208
96.19 0.39 99.10 0.08 90.28 0.83 98.62 0.07 100.00 0.00 95.73 0.47 96.93 0.00 92.69 1.28 /workspace/coverage/default/22.sram_ctrl_regwen.1588075983
96.48 0.29 99.10 0.00 90.28 0.00 98.62 0.00 100.00 0.00 95.73 0.00 96.93 0.00 94.70 2.01 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4083915268
96.71 0.23 99.10 0.00 90.52 0.24 98.69 0.07 100.00 0.00 95.73 0.00 98.25 1.32 94.70 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.771218511
96.87 0.16 99.10 0.00 90.52 0.00 98.69 0.00 100.00 0.00 95.73 0.00 98.25 0.00 95.80 1.10 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.966040103
97.00 0.13 99.18 0.08 90.52 0.00 99.52 0.83 100.00 0.00 95.73 0.00 98.25 0.00 95.80 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.3003405316
97.12 0.13 99.18 0.00 90.52 0.00 99.52 0.00 100.00 0.00 95.73 0.00 99.12 0.88 95.80 0.00 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.1125872943
97.24 0.11 99.18 0.00 90.52 0.00 99.59 0.07 100.00 0.00 95.73 0.00 99.12 0.00 96.53 0.73 /workspace/coverage/default/3.sram_ctrl_stress_all.217211429
97.32 0.08 99.18 0.00 90.64 0.12 99.59 0.00 100.00 0.00 96.21 0.47 99.12 0.00 96.53 0.00 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.916104740
97.38 0.06 99.18 0.00 91.00 0.36 99.66 0.07 100.00 0.00 96.21 0.00 99.12 0.00 96.53 0.00 /workspace/coverage/default/1.sram_ctrl_alert_test.2583467973
97.44 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3498956818
97.49 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.37 /workspace/coverage/default/11.sram_ctrl_stress_all.2009960912
97.52 0.03 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/12.sram_ctrl_regwen.1985371357
97.52 0.01 99.18 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/default/0.sram_ctrl_sec_cm.464829797

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2781202169
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2353099831
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.560598151
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1177825262
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3253110833
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.25148735
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2661069537
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3893614555
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.4162105947
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2733241705
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.4059052734
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3047452312
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2609726301
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3181430501
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.355059895
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4273128007
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.469418014
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2748647467
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2220148182
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1851375489
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.73194592
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1219360904
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.4225241324
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.4158094141
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.706989421
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.154414324
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.19657063
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1026964292
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3270451515
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.454797458
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.219575100
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.364070353
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3214997304
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.80669894
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4033008646
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1074519646
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2891227370
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3475098734
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1067846547
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2635559797
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1744594428
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.4244755895
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2604337825
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.869248601
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2767824969
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3903890442
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3510810856
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2537501929
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2013716041
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1871048504
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3949040409
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1315602206
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2816993188
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.170926467
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1221012151
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2980988432
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.32316118
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3800760338
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1343267780
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1402048723
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3702589228
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.770662344
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.535648098
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2327477928
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.843511891
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4153121003
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2707950700
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2096167443
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4204339827
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1416850621
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2174863766
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.786609021
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3779301121
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.17266298
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2374712200
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1910447452
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4139149685
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1717074753
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1789575029
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3152137467
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2515725339
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.4034099711
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.719046856
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.525797879
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2529899867
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.432201223
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.743500713
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2874442561
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1434902154
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3789149942
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3247983172
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1954249125
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1140714253
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2694259905
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4019687205
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3402806749
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1908239154
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.115380953
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2388879741
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2586112117
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1922897661
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3366163410
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3079325948
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3588920141
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2928143830
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3828637646
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.66529168
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.562342254
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1345038171
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.854810844
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2853709697
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2927363703
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2193176665
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.443045282
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2310760329
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1788669256
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2032912782
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3219303246
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3341263353
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3827984093
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1093078914
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3748143387
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1551655616
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2205598107
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3435026024
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1994453375
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2323608449
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.205207785
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.379195579
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.83189669
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1563605777
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.109220759
/workspace/coverage/default/0.sram_ctrl_alert_test.375208105
/workspace/coverage/default/0.sram_ctrl_bijection.4179918966
/workspace/coverage/default/0.sram_ctrl_executable.1136371423
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2346522661
/workspace/coverage/default/0.sram_ctrl_max_throughput.962937868
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2237690972
/workspace/coverage/default/0.sram_ctrl_mem_walk.1526425744
/workspace/coverage/default/0.sram_ctrl_multiple_keys.712306308
/workspace/coverage/default/0.sram_ctrl_partial_access.2103950087
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1386530864
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3766477687
/workspace/coverage/default/0.sram_ctrl_regwen.2716498133
/workspace/coverage/default/0.sram_ctrl_smoke.1908501268
/workspace/coverage/default/0.sram_ctrl_stress_all.3028616799
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2401210701
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2608462569
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2430698319
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.655834504
/workspace/coverage/default/1.sram_ctrl_bijection.1025081823
/workspace/coverage/default/1.sram_ctrl_executable.2992669155
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1321221044
/workspace/coverage/default/1.sram_ctrl_max_throughput.1676760536
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.457342538
/workspace/coverage/default/1.sram_ctrl_mem_walk.3689520280
/workspace/coverage/default/1.sram_ctrl_multiple_keys.919202479
/workspace/coverage/default/1.sram_ctrl_partial_access.384463121
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4138127299
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2069064920
/workspace/coverage/default/1.sram_ctrl_regwen.90969419
/workspace/coverage/default/1.sram_ctrl_sec_cm.2481618936
/workspace/coverage/default/1.sram_ctrl_smoke.3404305095
/workspace/coverage/default/1.sram_ctrl_stress_all.1076582689
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2970128783
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2499518004
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1626785319
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.900561232
/workspace/coverage/default/10.sram_ctrl_alert_test.1667161810
/workspace/coverage/default/10.sram_ctrl_bijection.2232263972
/workspace/coverage/default/10.sram_ctrl_executable.4104355517
/workspace/coverage/default/10.sram_ctrl_lc_escalation.4108488497
/workspace/coverage/default/10.sram_ctrl_max_throughput.418289972
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2201184163
/workspace/coverage/default/10.sram_ctrl_mem_walk.1113897879
/workspace/coverage/default/10.sram_ctrl_multiple_keys.720635433
/workspace/coverage/default/10.sram_ctrl_partial_access.2967797877
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.500338876
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1200334046
/workspace/coverage/default/10.sram_ctrl_regwen.2650750497
/workspace/coverage/default/10.sram_ctrl_smoke.1876766395
/workspace/coverage/default/10.sram_ctrl_stress_all.2296889001
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.623891816
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2543184501
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2964510810
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.4064530854
/workspace/coverage/default/11.sram_ctrl_alert_test.3942115718
/workspace/coverage/default/11.sram_ctrl_bijection.230327681
/workspace/coverage/default/11.sram_ctrl_executable.4189030062
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2750690162
/workspace/coverage/default/11.sram_ctrl_max_throughput.3297585335
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3632503268
/workspace/coverage/default/11.sram_ctrl_mem_walk.4030020395
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2147848173
/workspace/coverage/default/11.sram_ctrl_partial_access.3568318192
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3358895367
/workspace/coverage/default/11.sram_ctrl_regwen.4176939948
/workspace/coverage/default/11.sram_ctrl_smoke.162488263
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3007197
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.606397261
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/workspace/coverage/default/42.sram_ctrl_regwen.2916941348
/workspace/coverage/default/42.sram_ctrl_smoke.1665403587
/workspace/coverage/default/42.sram_ctrl_stress_all.3517364401
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1498131332
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.278161073
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3988702294
/workspace/coverage/default/43.sram_ctrl_alert_test.2730258205
/workspace/coverage/default/43.sram_ctrl_bijection.49369591
/workspace/coverage/default/43.sram_ctrl_executable.161800252
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3363970831
/workspace/coverage/default/43.sram_ctrl_max_throughput.4074359866
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.4286510928
/workspace/coverage/default/43.sram_ctrl_mem_walk.2930352990
/workspace/coverage/default/43.sram_ctrl_multiple_keys.654533397
/workspace/coverage/default/43.sram_ctrl_partial_access.253756098
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2596440059
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2175767421
/workspace/coverage/default/43.sram_ctrl_regwen.3693938336
/workspace/coverage/default/43.sram_ctrl_smoke.1101781686
/workspace/coverage/default/43.sram_ctrl_stress_all.3054675139
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2609229382
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3156043586
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2585980583
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2614914812
/workspace/coverage/default/44.sram_ctrl_alert_test.2891582610
/workspace/coverage/default/44.sram_ctrl_bijection.2950435364
/workspace/coverage/default/44.sram_ctrl_executable.3148552953
/workspace/coverage/default/44.sram_ctrl_lc_escalation.4205830103
/workspace/coverage/default/44.sram_ctrl_max_throughput.4072018095
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3542127043
/workspace/coverage/default/44.sram_ctrl_mem_walk.1756268444
/workspace/coverage/default/44.sram_ctrl_multiple_keys.693153465
/workspace/coverage/default/44.sram_ctrl_partial_access.3378172932
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1221706718
/workspace/coverage/default/44.sram_ctrl_ram_cfg.646180528
/workspace/coverage/default/44.sram_ctrl_regwen.4237081556
/workspace/coverage/default/44.sram_ctrl_smoke.3400209577
/workspace/coverage/default/44.sram_ctrl_stress_all.3955846641
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1474126128
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4288589565
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2485249235
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1041623755
/workspace/coverage/default/45.sram_ctrl_alert_test.61684640
/workspace/coverage/default/45.sram_ctrl_bijection.727455171
/workspace/coverage/default/45.sram_ctrl_executable.4010391480
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2141628312
/workspace/coverage/default/45.sram_ctrl_max_throughput.219103604
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.358271873
/workspace/coverage/default/45.sram_ctrl_mem_walk.2029693253
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2265169542
/workspace/coverage/default/45.sram_ctrl_partial_access.4107833489
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1192292243
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3864441613
/workspace/coverage/default/45.sram_ctrl_regwen.3569437424
/workspace/coverage/default/45.sram_ctrl_smoke.1246369323
/workspace/coverage/default/45.sram_ctrl_stress_all.3663046004
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2548827574
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4146552881
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3177740714
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1467632437
/workspace/coverage/default/46.sram_ctrl_alert_test.71932343
/workspace/coverage/default/46.sram_ctrl_bijection.1091801126
/workspace/coverage/default/46.sram_ctrl_executable.3946369092
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1475289727
/workspace/coverage/default/46.sram_ctrl_max_throughput.4190013642
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3217666088
/workspace/coverage/default/46.sram_ctrl_mem_walk.1014666683
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3498206766
/workspace/coverage/default/46.sram_ctrl_partial_access.3557837909
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1883620404
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1490938466
/workspace/coverage/default/46.sram_ctrl_regwen.4032332346
/workspace/coverage/default/46.sram_ctrl_smoke.4277160716
/workspace/coverage/default/46.sram_ctrl_stress_all.1020661354
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2811917612
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1802281312
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1642663291
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.28353273
/workspace/coverage/default/47.sram_ctrl_alert_test.2740800972
/workspace/coverage/default/47.sram_ctrl_bijection.1350307879
/workspace/coverage/default/47.sram_ctrl_executable.3884877274
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2470518214
/workspace/coverage/default/47.sram_ctrl_max_throughput.1204874033
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.386336191
/workspace/coverage/default/47.sram_ctrl_mem_walk.1063201452
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1389342196
/workspace/coverage/default/47.sram_ctrl_partial_access.1150391967
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2446873165
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1309493166
/workspace/coverage/default/47.sram_ctrl_regwen.3916001248
/workspace/coverage/default/47.sram_ctrl_smoke.1851853366
/workspace/coverage/default/47.sram_ctrl_stress_all.3313049952
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3846136641
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2186799807
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3377448042
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4114787788
/workspace/coverage/default/48.sram_ctrl_alert_test.3041951639
/workspace/coverage/default/48.sram_ctrl_bijection.3643233190
/workspace/coverage/default/48.sram_ctrl_executable.523154626
/workspace/coverage/default/48.sram_ctrl_lc_escalation.845417650
/workspace/coverage/default/48.sram_ctrl_max_throughput.125334924
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1978439945
/workspace/coverage/default/48.sram_ctrl_mem_walk.3033144172
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1932281160
/workspace/coverage/default/48.sram_ctrl_partial_access.48323036
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2197715345
/workspace/coverage/default/48.sram_ctrl_ram_cfg.245666251
/workspace/coverage/default/48.sram_ctrl_regwen.1600104960
/workspace/coverage/default/48.sram_ctrl_smoke.3945481998
/workspace/coverage/default/48.sram_ctrl_stress_all.3279631216
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1572661692
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1832320500
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.4159766169
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.527289263
/workspace/coverage/default/49.sram_ctrl_alert_test.419808548
/workspace/coverage/default/49.sram_ctrl_bijection.3030052065
/workspace/coverage/default/49.sram_ctrl_executable.116588200
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4077516292
/workspace/coverage/default/49.sram_ctrl_max_throughput.3179239702
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.259629715
/workspace/coverage/default/49.sram_ctrl_mem_walk.2937033527
/workspace/coverage/default/49.sram_ctrl_multiple_keys.4237221583
/workspace/coverage/default/49.sram_ctrl_partial_access.3000400764
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4072643950
/workspace/coverage/default/49.sram_ctrl_regwen.762454180
/workspace/coverage/default/49.sram_ctrl_smoke.2722589417
/workspace/coverage/default/49.sram_ctrl_stress_all.3797527852
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1267658930
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2692511909
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2779054068
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.918263994
/workspace/coverage/default/5.sram_ctrl_alert_test.3546558959
/workspace/coverage/default/5.sram_ctrl_bijection.1355411441
/workspace/coverage/default/5.sram_ctrl_executable.1976226507
/workspace/coverage/default/5.sram_ctrl_lc_escalation.964710831
/workspace/coverage/default/5.sram_ctrl_max_throughput.562000880
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1292277919
/workspace/coverage/default/5.sram_ctrl_mem_walk.1836662818
/workspace/coverage/default/5.sram_ctrl_multiple_keys.577341999
/workspace/coverage/default/5.sram_ctrl_partial_access.1638770640
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1852493052
/workspace/coverage/default/5.sram_ctrl_ram_cfg.787402374
/workspace/coverage/default/5.sram_ctrl_regwen.3493716423
/workspace/coverage/default/5.sram_ctrl_smoke.1204243606
/workspace/coverage/default/5.sram_ctrl_stress_all.3380227924
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2541545886
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.351812628
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3313038485
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2885592809
/workspace/coverage/default/6.sram_ctrl_alert_test.1704861630
/workspace/coverage/default/6.sram_ctrl_bijection.119820081
/workspace/coverage/default/6.sram_ctrl_executable.58115095
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2093904485
/workspace/coverage/default/6.sram_ctrl_max_throughput.3935512468
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2681855722
/workspace/coverage/default/6.sram_ctrl_mem_walk.3888588174
/workspace/coverage/default/6.sram_ctrl_multiple_keys.102200789
/workspace/coverage/default/6.sram_ctrl_partial_access.1933902127
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2952712583
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2102118067
/workspace/coverage/default/6.sram_ctrl_regwen.3959323945
/workspace/coverage/default/6.sram_ctrl_smoke.2233497191
/workspace/coverage/default/6.sram_ctrl_stress_all.1649600184
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1909435388
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1337786353
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1524150840
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.523531980
/workspace/coverage/default/7.sram_ctrl_alert_test.2467218508
/workspace/coverage/default/7.sram_ctrl_bijection.1435158146
/workspace/coverage/default/7.sram_ctrl_executable.3711683660
/workspace/coverage/default/7.sram_ctrl_lc_escalation.4261337574
/workspace/coverage/default/7.sram_ctrl_max_throughput.2129936308
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3552158552
/workspace/coverage/default/7.sram_ctrl_mem_walk.121190118
/workspace/coverage/default/7.sram_ctrl_multiple_keys.967902065
/workspace/coverage/default/7.sram_ctrl_partial_access.273857952
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2468693231
/workspace/coverage/default/7.sram_ctrl_ram_cfg.331495162
/workspace/coverage/default/7.sram_ctrl_regwen.1202398558
/workspace/coverage/default/7.sram_ctrl_smoke.2978547099
/workspace/coverage/default/7.sram_ctrl_stress_all.1084699831
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.724764280
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3209425117
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2971716081
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2123235667
/workspace/coverage/default/8.sram_ctrl_alert_test.545165691
/workspace/coverage/default/8.sram_ctrl_bijection.2660636395
/workspace/coverage/default/8.sram_ctrl_executable.3461704143
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4041783408
/workspace/coverage/default/8.sram_ctrl_max_throughput.237048501
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.924449980
/workspace/coverage/default/8.sram_ctrl_mem_walk.1389583576
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1439409600
/workspace/coverage/default/8.sram_ctrl_partial_access.1663450970
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.844870203
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1070551237
/workspace/coverage/default/8.sram_ctrl_regwen.2731694961
/workspace/coverage/default/8.sram_ctrl_smoke.703385089
/workspace/coverage/default/8.sram_ctrl_stress_all.1326811609
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3134935873
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2446810707
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2122786059
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3958118161
/workspace/coverage/default/9.sram_ctrl_alert_test.2446193554
/workspace/coverage/default/9.sram_ctrl_bijection.2011693059
/workspace/coverage/default/9.sram_ctrl_executable.2449275418
/workspace/coverage/default/9.sram_ctrl_lc_escalation.644792164
/workspace/coverage/default/9.sram_ctrl_max_throughput.1644569118
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1028303505
/workspace/coverage/default/9.sram_ctrl_mem_walk.2179967407
/workspace/coverage/default/9.sram_ctrl_multiple_keys.409352876
/workspace/coverage/default/9.sram_ctrl_partial_access.3013322793
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3045616637
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2382796220
/workspace/coverage/default/9.sram_ctrl_regwen.830591314
/workspace/coverage/default/9.sram_ctrl_smoke.954970564
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2558612462
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1885763833
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3541379547



Total test records in report: 1035
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/28.sram_ctrl_partial_access.3820348064 Jun 21 06:32:41 PM PDT 24 Jun 21 06:33:33 PM PDT 24 1040317343 ps
T2 /workspace/coverage/default/4.sram_ctrl_lc_escalation.451289075 Jun 21 06:31:06 PM PDT 24 Jun 21 06:31:46 PM PDT 24 8142352920 ps
T3 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.4286510928 Jun 21 06:34:56 PM PDT 24 Jun 21 06:37:12 PM PDT 24 15938112639 ps
T4 /workspace/coverage/default/25.sram_ctrl_lc_escalation.2416817997 Jun 21 06:32:16 PM PDT 24 Jun 21 06:33:19 PM PDT 24 32796127677 ps
T5 /workspace/coverage/default/39.sram_ctrl_executable.1489824287 Jun 21 06:34:12 PM PDT 24 Jun 21 06:39:27 PM PDT 24 26296642821 ps
T7 /workspace/coverage/default/6.sram_ctrl_mem_walk.3888588174 Jun 21 06:31:11 PM PDT 24 Jun 21 06:33:57 PM PDT 24 7298741177 ps
T8 /workspace/coverage/default/27.sram_ctrl_mem_walk.4067187285 Jun 21 06:32:31 PM PDT 24 Jun 21 06:38:18 PM PDT 24 138477703628 ps
T9 /workspace/coverage/default/36.sram_ctrl_multiple_keys.2184186109 Jun 21 06:33:35 PM PDT 24 Jun 21 06:45:07 PM PDT 24 59657466193 ps
T10 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1598854208 Jun 21 06:33:43 PM PDT 24 Jun 21 06:38:10 PM PDT 24 4719699043 ps
T11 /workspace/coverage/default/49.sram_ctrl_max_throughput.3179239702 Jun 21 06:35:45 PM PDT 24 Jun 21 06:36:04 PM PDT 24 1409445717 ps
T41 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.4064530854 Jun 21 06:31:22 PM PDT 24 Jun 21 06:32:22 PM PDT 24 2529031844 ps
T26 /workspace/coverage/default/43.sram_ctrl_executable.161800252 Jun 21 06:34:58 PM PDT 24 Jun 21 07:03:04 PM PDT 24 72146794692 ps
T22 /workspace/coverage/default/25.sram_ctrl_mem_walk.2438697421 Jun 21 06:32:18 PM PDT 24 Jun 21 06:37:59 PM PDT 24 27116977372 ps
T21 /workspace/coverage/default/2.sram_ctrl_stress_all.1269527289 Jun 21 06:31:05 PM PDT 24 Jun 21 06:50:36 PM PDT 24 3937502354 ps
T27 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3442509619 Jun 21 06:32:45 PM PDT 24 Jun 21 06:32:49 PM PDT 24 354342617 ps
T44 /workspace/coverage/default/47.sram_ctrl_regwen.3916001248 Jun 21 06:35:29 PM PDT 24 Jun 21 06:44:08 PM PDT 24 25699969035 ps
T6 /workspace/coverage/default/45.sram_ctrl_lc_escalation.2141628312 Jun 21 06:35:14 PM PDT 24 Jun 21 06:36:41 PM PDT 24 53205347443 ps
T155 /workspace/coverage/default/20.sram_ctrl_bijection.2460100737 Jun 21 06:31:45 PM PDT 24 Jun 21 06:53:53 PM PDT 24 19558304724 ps
T18 /workspace/coverage/default/28.sram_ctrl_stress_all.1713874055 Jun 21 06:32:45 PM PDT 24 Jun 21 06:54:56 PM PDT 24 42205541326 ps
T130 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1285591504 Jun 21 06:31:35 PM PDT 24 Jun 21 06:31:46 PM PDT 24 6192719121 ps
T95 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.380116128 Jun 21 06:32:07 PM PDT 24 Jun 21 06:39:19 PM PDT 24 14975269538 ps
T151 /workspace/coverage/default/5.sram_ctrl_max_throughput.562000880 Jun 21 06:31:05 PM PDT 24 Jun 21 06:33:02 PM PDT 24 3156768019 ps
T156 /workspace/coverage/default/27.sram_ctrl_smoke.3153936097 Jun 21 06:32:31 PM PDT 24 Jun 21 06:32:47 PM PDT 24 830419197 ps
T23 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2520769210 Jun 21 06:33:43 PM PDT 24 Jun 21 06:34:03 PM PDT 24 2329383705 ps
T76 /workspace/coverage/default/47.sram_ctrl_lc_escalation.2470518214 Jun 21 06:35:31 PM PDT 24 Jun 21 06:36:23 PM PDT 24 68802368139 ps
T81 /workspace/coverage/default/19.sram_ctrl_smoke.1172958559 Jun 21 06:31:41 PM PDT 24 Jun 21 06:33:54 PM PDT 24 1299834477 ps
T82 /workspace/coverage/default/8.sram_ctrl_smoke.703385089 Jun 21 06:31:09 PM PDT 24 Jun 21 06:31:21 PM PDT 24 3863563679 ps
T71 /workspace/coverage/default/24.sram_ctrl_partial_access.1852240001 Jun 21 06:32:08 PM PDT 24 Jun 21 06:34:07 PM PDT 24 3543475760 ps
T83 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.4288589565 Jun 21 06:35:05 PM PDT 24 Jun 21 06:40:13 PM PDT 24 23057808218 ps
T28 /workspace/coverage/default/11.sram_ctrl_ram_cfg.3003405316 Jun 21 06:31:26 PM PDT 24 Jun 21 06:31:31 PM PDT 24 2099217504 ps
T84 /workspace/coverage/default/17.sram_ctrl_bijection.1484768356 Jun 21 06:31:37 PM PDT 24 Jun 21 06:57:29 PM PDT 24 974776570850 ps
T70 /workspace/coverage/default/9.sram_ctrl_multiple_keys.409352876 Jun 21 06:31:12 PM PDT 24 Jun 21 06:55:34 PM PDT 24 41444604708 ps
T53 /workspace/coverage/default/30.sram_ctrl_mem_walk.1073656214 Jun 21 06:32:52 PM PDT 24 Jun 21 06:38:29 PM PDT 24 30087346965 ps
T153 /workspace/coverage/default/4.sram_ctrl_max_throughput.2452580253 Jun 21 06:31:06 PM PDT 24 Jun 21 06:31:57 PM PDT 24 2910519475 ps
T157 /workspace/coverage/default/42.sram_ctrl_smoke.1665403587 Jun 21 06:34:40 PM PDT 24 Jun 21 06:36:48 PM PDT 24 838047502 ps
T149 /workspace/coverage/default/37.sram_ctrl_mem_walk.1389583962 Jun 21 06:33:55 PM PDT 24 Jun 21 06:36:05 PM PDT 24 2062374916 ps
T29 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1807737074 Jun 21 06:32:24 PM PDT 24 Jun 21 06:32:28 PM PDT 24 1411554438 ps
T154 /workspace/coverage/default/49.sram_ctrl_partial_access.3000400764 Jun 21 06:35:45 PM PDT 24 Jun 21 06:37:23 PM PDT 24 1076758743 ps
T19 /workspace/coverage/default/12.sram_ctrl_regwen.1985371357 Jun 21 06:31:24 PM PDT 24 Jun 21 06:41:49 PM PDT 24 42734176865 ps
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T119 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.344618707 Jun 21 06:32:32 PM PDT 24 Jun 21 06:38:05 PM PDT 24 5025224271 ps
T120 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1883620404 Jun 21 06:35:20 PM PDT 24 Jun 21 06:43:11 PM PDT 24 18236522474 ps
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T43 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.109220759 Jun 21 06:30:56 PM PDT 24 Jun 21 06:48:34 PM PDT 24 15986870070 ps
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T159 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2779054068 Jun 21 06:35:45 PM PDT 24 Jun 21 06:38:22 PM PDT 24 812022659 ps
T150 /workspace/coverage/default/36.sram_ctrl_lc_escalation.4137977644 Jun 21 06:33:44 PM PDT 24 Jun 21 06:35:05 PM PDT 24 30303666486 ps
T47 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.1942201829 Jun 21 06:31:56 PM PDT 24 Jun 21 06:34:24 PM PDT 24 10126305817 ps
T61 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3541379547 Jun 21 06:31:11 PM PDT 24 Jun 21 06:31:20 PM PDT 24 4782814151 ps
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T25 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1580390536 Jun 21 06:33:11 PM PDT 24 Jun 21 06:33:21 PM PDT 24 301715209 ps
T54 /workspace/coverage/default/48.sram_ctrl_mem_walk.3033144172 Jun 21 06:35:37 PM PDT 24 Jun 21 06:40:49 PM PDT 24 28777773568 ps
T63 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.918263994 Jun 21 06:30:58 PM PDT 24 Jun 21 06:46:08 PM PDT 24 11608619448 ps
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T65 /workspace/coverage/default/36.sram_ctrl_bijection.888629724 Jun 21 06:33:34 PM PDT 24 Jun 21 07:18:27 PM PDT 24 143291955848 ps
T48 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.1125872943 Jun 21 06:31:45 PM PDT 24 Jun 21 06:34:30 PM PDT 24 5136632015 ps
T66 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.4019315921 Jun 21 06:32:58 PM PDT 24 Jun 21 06:44:31 PM PDT 24 9528602873 ps
T128 /workspace/coverage/default/23.sram_ctrl_smoke.3090185778 Jun 21 06:31:53 PM PDT 24 Jun 21 06:32:13 PM PDT 24 850255629 ps
T49 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.358271873 Jun 21 06:35:16 PM PDT 24 Jun 21 06:36:52 PM PDT 24 10297709202 ps
T20 /workspace/coverage/default/39.sram_ctrl_stress_all.2828533231 Jun 21 06:34:11 PM PDT 24 Jun 21 07:43:42 PM PDT 24 199757462012 ps
T160 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1062359892 Jun 21 06:31:26 PM PDT 24 Jun 21 06:31:33 PM PDT 24 688987913 ps
T101 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.2575638524 Jun 21 06:33:46 PM PDT 24 Jun 21 06:46:32 PM PDT 24 36817220433 ps
T161 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2952712583 Jun 21 06:31:12 PM PDT 24 Jun 21 06:37:37 PM PDT 24 56668003671 ps
T148 /workspace/coverage/default/7.sram_ctrl_lc_escalation.4261337574 Jun 21 06:31:01 PM PDT 24 Jun 21 06:31:37 PM PDT 24 22625600290 ps
T110 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.1467632437 Jun 21 06:35:20 PM PDT 24 Jun 21 06:42:30 PM PDT 24 6540049986 ps
T162 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.3542395200 Jun 21 06:32:44 PM PDT 24 Jun 21 06:42:43 PM PDT 24 14668221858 ps
T163 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.3871388701 Jun 21 06:33:25 PM PDT 24 Jun 21 06:35:45 PM PDT 24 3921888570 ps
T164 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.1337786353 Jun 21 06:31:04 PM PDT 24 Jun 21 06:34:49 PM PDT 24 13037199892 ps
T111 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.3898840408 Jun 21 06:31:52 PM PDT 24 Jun 21 06:34:35 PM PDT 24 3355196963 ps
T165 /workspace/coverage/default/15.sram_ctrl_multiple_keys.2074192208 Jun 21 06:31:38 PM PDT 24 Jun 21 06:55:12 PM PDT 24 23714575258 ps
T51 /workspace/coverage/default/28.sram_ctrl_mem_walk.3992684381 Jun 21 06:32:38 PM PDT 24 Jun 21 06:38:38 PM PDT 24 76563214756 ps
T166 /workspace/coverage/default/30.sram_ctrl_bijection.3862405671 Jun 21 06:32:53 PM PDT 24 Jun 21 06:52:41 PM PDT 24 141217134971 ps
T167 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1615692723 Jun 21 06:31:03 PM PDT 24 Jun 21 06:38:31 PM PDT 24 6998770029 ps
T14 /workspace/coverage/default/14.sram_ctrl_alert_test.1062634002 Jun 21 06:31:27 PM PDT 24 Jun 21 06:31:29 PM PDT 24 37977767 ps
T168 /workspace/coverage/default/19.sram_ctrl_mem_walk.892354145 Jun 21 06:31:41 PM PDT 24 Jun 21 06:34:07 PM PDT 24 5364426428 ps
T72 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2275380812 Jun 21 06:34:21 PM PDT 24 Jun 21 06:35:36 PM PDT 24 2412919060 ps
T112 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1241540231 Jun 21 06:31:50 PM PDT 24 Jun 21 06:39:47 PM PDT 24 10654892377 ps
T169 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3602798852 Jun 21 06:32:31 PM PDT 24 Jun 21 06:36:58 PM PDT 24 12468621001 ps
T52 /workspace/coverage/default/15.sram_ctrl_mem_walk.1920176569 Jun 21 06:31:41 PM PDT 24 Jun 21 06:37:24 PM PDT 24 79582564545 ps
T170 /workspace/coverage/default/49.sram_ctrl_regwen.762454180 Jun 21 06:35:48 PM PDT 24 Jun 21 06:38:07 PM PDT 24 6303284186 ps
T171 /workspace/coverage/default/22.sram_ctrl_mem_walk.2620445347 Jun 21 06:31:55 PM PDT 24 Jun 21 06:36:45 PM PDT 24 5418410735 ps
T172 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.91449849 Jun 21 06:31:48 PM PDT 24 Jun 21 06:32:13 PM PDT 24 2747305939 ps
T113 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.1700367356 Jun 21 06:31:33 PM PDT 24 Jun 21 06:33:52 PM PDT 24 8298111356 ps
T173 /workspace/coverage/default/7.sram_ctrl_partial_access.273857952 Jun 21 06:31:07 PM PDT 24 Jun 21 06:31:16 PM PDT 24 4347386000 ps
T143 /workspace/coverage/default/22.sram_ctrl_regwen.1588075983 Jun 21 06:31:56 PM PDT 24 Jun 21 06:47:49 PM PDT 24 3489217061 ps
T174 /workspace/coverage/default/47.sram_ctrl_smoke.1851853366 Jun 21 06:35:29 PM PDT 24 Jun 21 06:37:43 PM PDT 24 4891442649 ps
T175 /workspace/coverage/default/43.sram_ctrl_smoke.1101781686 Jun 21 06:34:58 PM PDT 24 Jun 21 06:35:28 PM PDT 24 7524510773 ps
T176 /workspace/coverage/default/39.sram_ctrl_max_throughput.1302521824 Jun 21 06:34:11 PM PDT 24 Jun 21 06:34:37 PM PDT 24 670952097 ps
T177 /workspace/coverage/default/5.sram_ctrl_multiple_keys.577341999 Jun 21 06:30:59 PM PDT 24 Jun 21 06:56:27 PM PDT 24 55825089776 ps
T178 /workspace/coverage/default/14.sram_ctrl_bijection.878164337 Jun 21 06:31:30 PM PDT 24 Jun 21 07:09:41 PM PDT 24 322420494115 ps
T179 /workspace/coverage/default/44.sram_ctrl_partial_access.3378172932 Jun 21 06:35:04 PM PDT 24 Jun 21 06:35:16 PM PDT 24 3008457042 ps
T180 /workspace/coverage/default/35.sram_ctrl_bijection.1879751798 Jun 21 06:33:27 PM PDT 24 Jun 21 06:49:35 PM PDT 24 13864501482 ps
T77 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.623891816 Jun 21 06:31:25 PM PDT 24 Jun 21 06:31:39 PM PDT 24 1625549690 ps
T181 /workspace/coverage/default/49.sram_ctrl_alert_test.419808548 Jun 21 06:35:56 PM PDT 24 Jun 21 06:35:58 PM PDT 24 39568821 ps
T182 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3177740714 Jun 21 06:35:12 PM PDT 24 Jun 21 06:36:28 PM PDT 24 830548733 ps
T183 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.860527905 Jun 21 06:33:14 PM PDT 24 Jun 21 06:57:37 PM PDT 24 16455472145 ps
T50 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.639545165 Jun 21 06:34:22 PM PDT 24 Jun 21 06:36:22 PM PDT 24 10933932279 ps
T129 /workspace/coverage/default/16.sram_ctrl_lc_escalation.553541455 Jun 21 06:31:38 PM PDT 24 Jun 21 06:32:22 PM PDT 24 7429761426 ps
T184 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.351812628 Jun 21 06:31:03 PM PDT 24 Jun 21 06:34:15 PM PDT 24 2832720356 ps
T185 /workspace/coverage/default/38.sram_ctrl_max_throughput.3081333747 Jun 21 06:34:06 PM PDT 24 Jun 21 06:36:46 PM PDT 24 1692838338 ps
T141 /workspace/coverage/default/23.sram_ctrl_executable.1328182459 Jun 21 06:32:03 PM PDT 24 Jun 21 06:45:33 PM PDT 24 16239542463 ps
T186 /workspace/coverage/default/3.sram_ctrl_mem_walk.2277931813 Jun 21 06:30:52 PM PDT 24 Jun 21 06:33:43 PM PDT 24 28777402438 ps
T140 /workspace/coverage/default/28.sram_ctrl_regwen.3474316456 Jun 21 06:32:44 PM PDT 24 Jun 21 06:43:04 PM PDT 24 45212867980 ps
T187 /workspace/coverage/default/4.sram_ctrl_alert_test.1691558059 Jun 21 06:31:10 PM PDT 24 Jun 21 06:31:13 PM PDT 24 11878950 ps
T188 /workspace/coverage/default/25.sram_ctrl_max_throughput.3806202046 Jun 21 06:32:15 PM PDT 24 Jun 21 06:33:26 PM PDT 24 737898939 ps
T189 /workspace/coverage/default/23.sram_ctrl_ram_cfg.532941201 Jun 21 06:32:02 PM PDT 24 Jun 21 06:32:07 PM PDT 24 355479553 ps
T190 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3992076163 Jun 21 06:31:25 PM PDT 24 Jun 21 06:38:53 PM PDT 24 7239191255 ps
T191 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3175136124 Jun 21 06:33:55 PM PDT 24 Jun 21 06:34:00 PM PDT 24 354303195 ps
T147 /workspace/coverage/default/46.sram_ctrl_regwen.4032332346 Jun 21 06:35:21 PM PDT 24 Jun 21 06:51:13 PM PDT 24 9438697672 ps
T192 /workspace/coverage/default/9.sram_ctrl_ram_cfg.2382796220 Jun 21 06:31:08 PM PDT 24 Jun 21 06:31:13 PM PDT 24 353397218 ps
T193 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3313038485 Jun 21 06:31:05 PM PDT 24 Jun 21 06:32:16 PM PDT 24 750370357 ps
T194 /workspace/coverage/default/46.sram_ctrl_max_throughput.4190013642 Jun 21 06:35:23 PM PDT 24 Jun 21 06:37:44 PM PDT 24 3059766956 ps
T195 /workspace/coverage/default/1.sram_ctrl_alert_test.2583467973 Jun 21 06:30:56 PM PDT 24 Jun 21 06:30:58 PM PDT 24 20674818 ps
T55 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2558612462 Jun 21 06:31:13 PM PDT 24 Jun 21 06:32:11 PM PDT 24 2065284821 ps
T196 /workspace/coverage/default/41.sram_ctrl_alert_test.3952175838 Jun 21 06:34:34 PM PDT 24 Jun 21 06:34:55 PM PDT 24 42006122 ps
T197 /workspace/coverage/default/35.sram_ctrl_multiple_keys.1627511191 Jun 21 06:33:28 PM PDT 24 Jun 21 06:40:20 PM PDT 24 6049895541 ps
T45 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.155806432 Jun 21 06:33:29 PM PDT 24 Jun 21 06:35:55 PM PDT 24 11245071112 ps
T198 /workspace/coverage/default/17.sram_ctrl_alert_test.2934936086 Jun 21 06:31:40 PM PDT 24 Jun 21 06:31:41 PM PDT 24 20211253 ps
T199 /workspace/coverage/default/36.sram_ctrl_executable.3082413532 Jun 21 06:33:41 PM PDT 24 Jun 21 06:43:58 PM PDT 24 23513227140 ps
T200 /workspace/coverage/default/21.sram_ctrl_multiple_keys.1309345744 Jun 21 06:31:48 PM PDT 24 Jun 21 06:33:03 PM PDT 24 7456516270 ps
T201 /workspace/coverage/default/15.sram_ctrl_smoke.4244344148 Jun 21 06:31:32 PM PDT 24 Jun 21 06:32:26 PM PDT 24 1692438271 ps
T202 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3409565387 Jun 21 06:32:58 PM PDT 24 Jun 21 06:33:28 PM PDT 24 3068469565 ps
T203 /workspace/coverage/default/14.sram_ctrl_stress_all.4253590836 Jun 21 06:31:32 PM PDT 24 Jun 21 07:27:02 PM PDT 24 137127566783 ps
T204 /workspace/coverage/default/28.sram_ctrl_lc_escalation.635060472 Jun 21 06:32:37 PM PDT 24 Jun 21 06:33:48 PM PDT 24 45752183749 ps
T142 /workspace/coverage/default/22.sram_ctrl_stress_all.4008706223 Jun 21 06:31:54 PM PDT 24 Jun 21 07:40:04 PM PDT 24 53702832529 ps
T205 /workspace/coverage/default/18.sram_ctrl_stress_all.2438922271 Jun 21 06:31:44 PM PDT 24 Jun 21 08:34:30 PM PDT 24 1004922683094 ps
T15 /workspace/coverage/default/3.sram_ctrl_sec_cm.3535172086 Jun 21 06:31:05 PM PDT 24 Jun 21 06:31:07 PM PDT 24 116780702 ps
T32 /workspace/coverage/default/24.sram_ctrl_mem_walk.1556964919 Jun 21 06:32:07 PM PDT 24 Jun 21 06:34:11 PM PDT 24 3948851442 ps
T33 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1524150840 Jun 21 06:31:07 PM PDT 24 Jun 21 06:32:14 PM PDT 24 2663307103 ps
T34 /workspace/coverage/default/38.sram_ctrl_multiple_keys.2146498518 Jun 21 06:33:54 PM PDT 24 Jun 21 06:43:10 PM PDT 24 14306727791 ps
T35 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.212813619 Jun 21 06:34:22 PM PDT 24 Jun 21 06:53:51 PM PDT 24 35510588595 ps
T36 /workspace/coverage/default/31.sram_ctrl_multiple_keys.1163563058 Jun 21 06:32:51 PM PDT 24 Jun 21 06:53:16 PM PDT 24 23060214319 ps
T37 /workspace/coverage/default/22.sram_ctrl_multiple_keys.2731930138 Jun 21 06:31:57 PM PDT 24 Jun 21 06:42:35 PM PDT 24 9044112326 ps
T38 /workspace/coverage/default/31.sram_ctrl_executable.2694962610 Jun 21 06:32:58 PM PDT 24 Jun 21 06:42:01 PM PDT 24 9773447439 ps
T39 /workspace/coverage/default/24.sram_ctrl_alert_test.3833509307 Jun 21 06:32:16 PM PDT 24 Jun 21 06:32:18 PM PDT 24 48330375 ps
T40 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.2885592809 Jun 21 06:31:04 PM PDT 24 Jun 21 06:42:03 PM PDT 24 28568462602 ps
T206 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.2004885218 Jun 21 06:34:34 PM PDT 24 Jun 21 06:56:21 PM PDT 24 30845561332 ps
T207 /workspace/coverage/default/10.sram_ctrl_alert_test.1667161810 Jun 21 06:31:25 PM PDT 24 Jun 21 06:31:27 PM PDT 24 33830096 ps
T208 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3542127043 Jun 21 06:35:12 PM PDT 24 Jun 21 06:37:21 PM PDT 24 6369392569 ps
T209 /workspace/coverage/default/7.sram_ctrl_multiple_keys.967902065 Jun 21 06:31:12 PM PDT 24 Jun 21 06:32:15 PM PDT 24 2242213315 ps
T210 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2238565834 Jun 21 06:31:22 PM PDT 24 Jun 21 06:35:49 PM PDT 24 3840360653 ps
T211 /workspace/coverage/default/19.sram_ctrl_regwen.1144107265 Jun 21 06:31:44 PM PDT 24 Jun 21 06:37:06 PM PDT 24 7428953748 ps
T212 /workspace/coverage/default/30.sram_ctrl_alert_test.3412221831 Jun 21 06:32:52 PM PDT 24 Jun 21 06:32:54 PM PDT 24 22070823 ps
T213 /workspace/coverage/default/35.sram_ctrl_max_throughput.636152055 Jun 21 06:33:27 PM PDT 24 Jun 21 06:35:31 PM PDT 24 2372677860 ps
T214 /workspace/coverage/default/9.sram_ctrl_partial_access.3013322793 Jun 21 06:31:08 PM PDT 24 Jun 21 06:31:20 PM PDT 24 1312477197 ps
T215 /workspace/coverage/default/40.sram_ctrl_mem_walk.2346146134 Jun 21 06:34:25 PM PDT 24 Jun 21 06:37:26 PM PDT 24 28847072231 ps
T78 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2192391732 Jun 21 06:32:52 PM PDT 24 Jun 21 06:33:14 PM PDT 24 5522544382 ps
T216 /workspace/coverage/default/6.sram_ctrl_smoke.2233497191 Jun 21 06:31:09 PM PDT 24 Jun 21 06:31:28 PM PDT 24 1137283481 ps
T217 /workspace/coverage/default/27.sram_ctrl_alert_test.2135390197 Jun 21 06:32:37 PM PDT 24 Jun 21 06:32:39 PM PDT 24 21160759 ps
T218 /workspace/coverage/default/15.sram_ctrl_regwen.2565561233 Jun 21 06:31:32 PM PDT 24 Jun 21 06:41:05 PM PDT 24 18277714411 ps
T219 /workspace/coverage/default/12.sram_ctrl_executable.1234900755 Jun 21 06:31:23 PM PDT 24 Jun 21 06:36:15 PM PDT 24 5391179683 ps
T220 /workspace/coverage/default/36.sram_ctrl_alert_test.2522043547 Jun 21 06:33:44 PM PDT 24 Jun 21 06:33:48 PM PDT 24 19820984 ps
T56 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3719860053 Jun 21 06:33:34 PM PDT 24 Jun 21 06:35:04 PM PDT 24 2740657335 ps
T221 /workspace/coverage/default/46.sram_ctrl_executable.3946369092 Jun 21 06:35:20 PM PDT 24 Jun 21 06:50:07 PM PDT 24 26907494274 ps
T222 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.1452666774 Jun 21 06:31:32 PM PDT 24 Jun 21 06:38:43 PM PDT 24 36333886455 ps
T223 /workspace/coverage/default/17.sram_ctrl_executable.99898836 Jun 21 06:31:38 PM PDT 24 Jun 21 06:45:36 PM PDT 24 21450358244 ps
T79 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3956927241 Jun 21 06:31:38 PM PDT 24 Jun 21 06:31:45 PM PDT 24 452053830 ps
T224 /workspace/coverage/default/38.sram_ctrl_executable.2817736817 Jun 21 06:34:02 PM PDT 24 Jun 21 06:47:58 PM PDT 24 32543184540 ps
T225 /workspace/coverage/default/35.sram_ctrl_mem_walk.2811448628 Jun 21 06:33:34 PM PDT 24 Jun 21 06:39:05 PM PDT 24 55234712058 ps
T226 /workspace/coverage/default/41.sram_ctrl_smoke.4116231608 Jun 21 06:34:22 PM PDT 24 Jun 21 06:35:11 PM PDT 24 1069531691 ps
T227 /workspace/coverage/default/26.sram_ctrl_max_throughput.3739065735 Jun 21 06:32:22 PM PDT 24 Jun 21 06:33:30 PM PDT 24 1455943935 ps
T228 /workspace/coverage/default/37.sram_ctrl_lc_escalation.3497845661 Jun 21 06:33:42 PM PDT 24 Jun 21 06:34:38 PM PDT 24 55807768491 ps
T229 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.348797127 Jun 21 06:31:17 PM PDT 24 Jun 21 06:31:31 PM PDT 24 1376144494 ps
T230 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.3207118657 Jun 21 06:33:19 PM PDT 24 Jun 21 06:36:39 PM PDT 24 13401019027 ps
T231 /workspace/coverage/default/9.sram_ctrl_alert_test.2446193554 Jun 21 06:31:23 PM PDT 24 Jun 21 06:31:25 PM PDT 24 101720412 ps
T232 /workspace/coverage/default/39.sram_ctrl_regwen.864834257 Jun 21 06:34:15 PM PDT 24 Jun 21 06:39:49 PM PDT 24 14329747660 ps
T233 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3108846412 Jun 21 06:33:06 PM PDT 24 Jun 21 06:33:13 PM PDT 24 2394832740 ps
T234 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.614945049 Jun 21 06:31:55 PM PDT 24 Jun 21 06:34:10 PM PDT 24 17659806514 ps
T144 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2513704822 Jun 21 06:34:42 PM PDT 24 Jun 21 07:01:02 PM PDT 24 89687373555 ps
T235 /workspace/coverage/default/48.sram_ctrl_lc_escalation.845417650 Jun 21 06:35:38 PM PDT 24 Jun 21 06:35:56 PM PDT 24 7296569498 ps
T236 /workspace/coverage/default/27.sram_ctrl_executable.1281601044 Jun 21 06:32:30 PM PDT 24 Jun 21 06:37:48 PM PDT 24 8520053293 ps
T237 /workspace/coverage/default/10.sram_ctrl_multiple_keys.720635433 Jun 21 06:31:17 PM PDT 24 Jun 21 06:43:25 PM PDT 24 5326940821 ps
T238 /workspace/coverage/default/45.sram_ctrl_mem_walk.2029693253 Jun 21 06:35:12 PM PDT 24 Jun 21 06:40:01 PM PDT 24 5365426956 ps
T239 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.4130908234 Jun 21 06:31:39 PM PDT 24 Jun 21 06:31:55 PM PDT 24 2910110125 ps
T240 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.3248876348 Jun 21 06:31:54 PM PDT 24 Jun 21 06:50:09 PM PDT 24 13066368020 ps
T241 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2826379041 Jun 21 06:34:23 PM PDT 24 Jun 21 06:43:16 PM PDT 24 111477339847 ps
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T243 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.176775273 Jun 21 06:31:31 PM PDT 24 Jun 21 06:34:08 PM PDT 24 4384249053 ps
T244 /workspace/coverage/default/22.sram_ctrl_max_throughput.2959759138 Jun 21 06:32:01 PM PDT 24 Jun 21 06:32:48 PM PDT 24 755150737 ps
T245 /workspace/coverage/default/6.sram_ctrl_multiple_keys.102200789 Jun 21 06:31:12 PM PDT 24 Jun 21 06:43:07 PM PDT 24 146063151218 ps
T246 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.2123235667 Jun 21 06:31:12 PM PDT 24 Jun 21 06:44:39 PM PDT 24 39324000199 ps
T80 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.42355148 Jun 21 06:34:05 PM PDT 24 Jun 21 06:34:22 PM PDT 24 853129926 ps
T247 /workspace/coverage/default/2.sram_ctrl_ram_cfg.3038802873 Jun 21 06:31:02 PM PDT 24 Jun 21 06:31:07 PM PDT 24 706936110 ps
T248 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3206312284 Jun 21 06:32:55 PM PDT 24 Jun 21 06:35:00 PM PDT 24 126446553284 ps
T249 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3054085873 Jun 21 06:30:51 PM PDT 24 Jun 21 06:30:59 PM PDT 24 1916113592 ps
T250 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2543184501 Jun 21 06:31:14 PM PDT 24 Jun 21 06:36:01 PM PDT 24 3736854182 ps
T145 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4083915268 Jun 21 06:35:45 PM PDT 24 Jun 21 06:41:45 PM PDT 24 30747119444 ps
T251 /workspace/coverage/default/5.sram_ctrl_smoke.1204243606 Jun 21 06:31:08 PM PDT 24 Jun 21 06:31:33 PM PDT 24 5309884536 ps
T252 /workspace/coverage/default/30.sram_ctrl_regwen.3365504446 Jun 21 06:32:51 PM PDT 24 Jun 21 06:35:54 PM PDT 24 2656310199 ps
T253 /workspace/coverage/default/17.sram_ctrl_max_throughput.3744654429 Jun 21 06:31:38 PM PDT 24 Jun 21 06:31:50 PM PDT 24 1110385448 ps
T254 /workspace/coverage/default/5.sram_ctrl_ram_cfg.787402374 Jun 21 06:31:00 PM PDT 24 Jun 21 06:31:05 PM PDT 24 353142417 ps
T57 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3822234298 Jun 21 06:31:34 PM PDT 24 Jun 21 06:31:55 PM PDT 24 632578595 ps
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T255 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1300304386 Jun 21 06:32:52 PM PDT 24 Jun 21 06:35:39 PM PDT 24 18075264274 ps
T256 /workspace/coverage/default/39.sram_ctrl_ram_cfg.859383769 Jun 21 06:34:12 PM PDT 24 Jun 21 06:34:39 PM PDT 24 711047089 ps
T257 /workspace/coverage/default/23.sram_ctrl_multiple_keys.102808523 Jun 21 06:32:01 PM PDT 24 Jun 21 06:40:09 PM PDT 24 33971058899 ps
T258 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3377448042 Jun 21 06:35:32 PM PDT 24 Jun 21 06:36:20 PM PDT 24 3088482346 ps
T259 /workspace/coverage/default/28.sram_ctrl_executable.367557874 Jun 21 06:32:41 PM PDT 24 Jun 21 06:53:20 PM PDT 24 23662780182 ps
T59 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1315639700 Jun 21 06:31:47 PM PDT 24 Jun 21 06:32:04 PM PDT 24 1199615528 ps
T260 /workspace/coverage/default/49.sram_ctrl_ram_cfg.4072643950 Jun 21 06:35:45 PM PDT 24 Jun 21 06:35:54 PM PDT 24 708831679 ps
T261 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1802281312 Jun 21 06:35:20 PM PDT 24 Jun 21 06:40:49 PM PDT 24 17836410299 ps
T262 /workspace/coverage/default/25.sram_ctrl_partial_access.3720919202 Jun 21 06:32:15 PM PDT 24 Jun 21 06:32:32 PM PDT 24 889062827 ps
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T264 /workspace/coverage/default/8.sram_ctrl_stress_all.1326811609 Jun 21 06:31:03 PM PDT 24 Jun 21 07:55:36 PM PDT 24 673651955047 ps
T265 /workspace/coverage/default/41.sram_ctrl_partial_access.369759967 Jun 21 06:34:34 PM PDT 24 Jun 21 06:35:00 PM PDT 24 1479682466 ps
T266 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.1041623755 Jun 21 06:35:14 PM PDT 24 Jun 21 06:38:36 PM PDT 24 13730593423 ps
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T269 /workspace/coverage/default/6.sram_ctrl_partial_access.1933902127 Jun 21 06:31:08 PM PDT 24 Jun 21 06:31:17 PM PDT 24 1527412152 ps
T270 /workspace/coverage/default/25.sram_ctrl_alert_test.3977846163 Jun 21 06:32:23 PM PDT 24 Jun 21 06:32:25 PM PDT 24 18123990 ps
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T272 /workspace/coverage/default/4.sram_ctrl_ram_cfg.1359981135 Jun 21 06:30:57 PM PDT 24 Jun 21 06:31:03 PM PDT 24 2247889279 ps
T273 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1151857158 Jun 21 06:31:55 PM PDT 24 Jun 21 06:32:07 PM PDT 24 1502578231 ps
T274 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1761297619 Jun 21 06:32:08 PM PDT 24 Jun 21 06:32:32 PM PDT 24 3246252927 ps
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T277 /workspace/coverage/default/43.sram_ctrl_partial_access.253756098 Jun 21 06:34:55 PM PDT 24 Jun 21 06:35:51 PM PDT 24 1136871334 ps
T278 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3738648162 Jun 21 06:32:36 PM PDT 24 Jun 21 06:33:03 PM PDT 24 904027902 ps
T279 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1103668962 Jun 21 06:31:26 PM PDT 24 Jun 21 06:38:09 PM PDT 24 56426438769 ps
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T281 /workspace/coverage/default/21.sram_ctrl_bijection.4002684226 Jun 21 06:31:48 PM PDT 24 Jun 21 06:51:53 PM PDT 24 105800811047 ps
T146 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2446873165 Jun 21 06:35:29 PM PDT 24 Jun 21 06:43:17 PM PDT 24 74245342754 ps
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T283 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3244905256 Jun 21 06:33:14 PM PDT 24 Jun 21 06:33:19 PM PDT 24 1532473870 ps
T284 /workspace/coverage/default/18.sram_ctrl_lc_escalation.739817102 Jun 21 06:31:44 PM PDT 24 Jun 21 06:32:40 PM PDT 24 15907075687 ps
T285 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.2993014457 Jun 21 06:32:02 PM PDT 24 Jun 21 06:34:31 PM PDT 24 19655685297 ps
T286 /workspace/coverage/default/42.sram_ctrl_stress_all.3517364401 Jun 21 06:34:56 PM PDT 24 Jun 21 07:59:52 PM PDT 24 238165127051 ps
T287 /workspace/coverage/default/45.sram_ctrl_ram_cfg.3864441613 Jun 21 06:35:14 PM PDT 24 Jun 21 06:35:21 PM PDT 24 696627196 ps
T288 /workspace/coverage/default/11.sram_ctrl_stress_all.2009960912 Jun 21 06:31:25 PM PDT 24 Jun 21 06:36:28 PM PDT 24 29879862561 ps
T289 /workspace/coverage/default/21.sram_ctrl_alert_test.35586019 Jun 21 06:31:54 PM PDT 24 Jun 21 06:31:56 PM PDT 24 13823913 ps
T123 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1598948078 Jun 21 06:33:36 PM PDT 24 Jun 21 06:35:41 PM PDT 24 1417686777 ps
T290 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2279621069 Jun 21 06:34:33 PM PDT 24 Jun 21 06:35:13 PM PDT 24 794498206 ps
T291 /workspace/coverage/default/24.sram_ctrl_regwen.1320113650 Jun 21 06:32:08 PM PDT 24 Jun 21 06:39:49 PM PDT 24 77368021584 ps
T292 /workspace/coverage/default/17.sram_ctrl_ram_cfg.968905547 Jun 21 06:31:37 PM PDT 24 Jun 21 06:31:42 PM PDT 24 1402927481 ps
T293 /workspace/coverage/default/30.sram_ctrl_max_throughput.2852523050 Jun 21 06:32:53 PM PDT 24 Jun 21 06:33:19 PM PDT 24 2826817488 ps
T294 /workspace/coverage/default/3.sram_ctrl_multiple_keys.479433038 Jun 21 06:30:52 PM PDT 24 Jun 21 06:46:37 PM PDT 24 53019097498 ps
T295 /workspace/coverage/default/21.sram_ctrl_partial_access.1963519631 Jun 21 06:31:51 PM PDT 24 Jun 21 06:32:13 PM PDT 24 2670267893 ps
T296 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3209425117 Jun 21 06:31:09 PM PDT 24 Jun 21 06:36:41 PM PDT 24 4882317976 ps
T297 /workspace/coverage/default/49.sram_ctrl_lc_escalation.4077516292 Jun 21 06:35:46 PM PDT 24 Jun 21 06:36:37 PM PDT 24 12299437747 ps
T298 /workspace/coverage/default/45.sram_ctrl_multiple_keys.2265169542 Jun 21 06:35:12 PM PDT 24 Jun 21 06:53:40 PM PDT 24 43385938575 ps
T299 /workspace/coverage/default/5.sram_ctrl_lc_escalation.964710831 Jun 21 06:31:08 PM PDT 24 Jun 21 06:32:01 PM PDT 24 16181290599 ps
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