Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.94 99.19 94.27 99.72 100.00 96.03 99.12 97.26


Total tests in report: 1034
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
71.98 71.98 95.58 95.58 66.94 66.94 40.53 40.53 85.71 85.71 85.55 85.55 94.44 94.44 35.10 35.10 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1700366983
86.84 14.86 96.89 1.31 81.99 15.05 92.32 51.79 85.71 0.00 88.15 2.61 96.05 1.61 66.73 31.63 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.488504955
91.15 4.31 98.28 1.39 84.83 2.84 92.91 0.59 100.00 14.29 92.18 4.03 96.35 0.29 73.49 6.76 /workspace/coverage/default/14.sram_ctrl_lc_escalation.696216355
93.33 2.18 98.53 0.25 87.80 2.96 93.94 1.03 100.00 0.00 94.08 1.90 96.35 0.00 82.63 9.14 /workspace/coverage/default/2.sram_ctrl_stress_all.3815365125
94.35 1.02 98.86 0.33 89.81 2.01 95.80 1.86 100.00 0.00 95.50 1.42 96.93 0.58 83.55 0.91 /workspace/coverage/default/2.sram_ctrl_sec_cm.2422522217
95.16 0.81 98.86 0.00 89.81 0.00 98.00 2.20 100.00 0.00 95.50 0.00 97.66 0.73 86.29 2.74 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1494137993
95.94 0.78 98.86 0.00 90.17 0.36 98.00 0.00 100.00 0.00 95.50 0.00 97.66 0.00 91.41 5.12 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2300600221
96.59 0.65 99.10 0.25 90.17 0.00 98.62 0.62 100.00 0.00 95.73 0.24 97.81 0.15 94.70 3.29 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.885812518
96.80 0.21 99.10 0.00 90.40 0.24 98.69 0.07 100.00 0.00 95.73 0.00 98.98 1.17 94.70 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3766113829
96.96 0.16 99.10 0.00 90.40 0.00 98.69 0.00 100.00 0.00 95.73 0.00 98.98 0.00 95.80 1.10 /workspace/coverage/default/15.sram_ctrl_stress_all.780125731
97.09 0.13 99.10 0.00 90.40 0.00 98.69 0.00 100.00 0.00 95.73 0.00 98.98 0.00 96.71 0.91 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2837271726
97.22 0.13 99.18 0.08 90.40 0.00 99.52 0.83 100.00 0.00 95.73 0.00 98.98 0.00 96.71 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.789374297
97.30 0.08 99.18 0.00 90.52 0.12 99.52 0.00 100.00 0.00 96.21 0.47 98.98 0.00 96.71 0.00 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1681881225
97.36 0.06 99.18 0.00 90.88 0.36 99.59 0.07 100.00 0.00 96.21 0.00 98.98 0.00 96.71 0.00 /workspace/coverage/default/10.sram_ctrl_alert_test.2829319335
97.42 0.05 99.18 0.00 90.88 0.00 99.59 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.07 0.37 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3325812969
97.44 0.03 99.18 0.00 90.88 0.00 99.59 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1020585961
97.46 0.02 99.18 0.00 90.88 0.00 99.59 0.00 100.00 0.00 96.21 0.00 99.12 0.15 97.26 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2281639465
97.48 0.02 99.18 0.00 90.88 0.00 99.72 0.14 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.00 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3486330988
97.50 0.02 99.18 0.00 91.00 0.12 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.00 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3823199475


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2419418404
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1431359312
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1315144562
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3658164085
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.499365219
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2899134208
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2074234042
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.304810864
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2293006364
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2715076215
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.205332528
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1028671273
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.199239524
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2997291299
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.65281696
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2657956012
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3213753045
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.795668760
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2355296813
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2793155123
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4260186711
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.828404711
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1563982806
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.331197925
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.784181465
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1233165142
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4171527527
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3732189094
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1556794438
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3528886377
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3750097830
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4085248093
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3164046672
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1065995763
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.133242739
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.943200054
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2405928384
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3521523837
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2913672735
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3301396356
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2807450653
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3284137471
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3504185070
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3019108812
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1104374898
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3237242100
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3849407424
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3541672533
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3068154299
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2031494768
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3582178685
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3503516506
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3419801895
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.834970580
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.4232960421
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3615503268
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2472068521
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1546065316
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.360003051
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2879410379
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3645316208
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3144301789
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3690154051
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2633079376
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1040628611
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3936261685
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3623968203
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1901782420
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.664887142
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1761445232
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3288001504
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2698888502
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1470162773
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.14753753
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1595385201
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3559552573
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2890952204
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1199992664
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3489146881
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.988702776
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2889025190
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1820005285
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1694946150
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3852998836
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2501669539
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3940978904
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1741595224
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.280528455
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1975563174
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2160035044
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2498654857
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2217006694
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.4251408063
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1808244777
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2364320125
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3714995183
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2131025852
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1337927050
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3462191048
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2282459191
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.260340592
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3017349860
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3318037078
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2085347856
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.4145916385
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.4057248782
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2311065015
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1262592662
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3319783589
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3627636734
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.963386903
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2608208803
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.142849677
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2894479117
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3431332457
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3796671170
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3930914140
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1266015604
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.915628434
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1337050058
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.573598378
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.732998743
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3681231236
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3702144331
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2988324687
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.192195257
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.157072852
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.86948501
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1130166786
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2501990903
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2919350112
/workspace/coverage/default/0.sram_ctrl_alert_test.403573737
/workspace/coverage/default/0.sram_ctrl_bijection.2126289398
/workspace/coverage/default/0.sram_ctrl_executable.616849291
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3441270680
/workspace/coverage/default/0.sram_ctrl_max_throughput.4166979751
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.4157416428
/workspace/coverage/default/0.sram_ctrl_mem_walk.1972962867
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3524373364
/workspace/coverage/default/0.sram_ctrl_partial_access.471755601
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.277691769
/workspace/coverage/default/0.sram_ctrl_regwen.1272781743
/workspace/coverage/default/0.sram_ctrl_sec_cm.4263783391
/workspace/coverage/default/0.sram_ctrl_smoke.4044923346
/workspace/coverage/default/0.sram_ctrl_stress_all.1419525860
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.192998313
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.828499850
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.743523301
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2990118850
/workspace/coverage/default/1.sram_ctrl_alert_test.404049145
/workspace/coverage/default/1.sram_ctrl_bijection.361549659
/workspace/coverage/default/1.sram_ctrl_executable.3725113602
/workspace/coverage/default/1.sram_ctrl_max_throughput.3745323165
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1438613446
/workspace/coverage/default/1.sram_ctrl_mem_walk.271063495
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1946551185
/workspace/coverage/default/1.sram_ctrl_partial_access.2869832511
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2756992628
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2556406554
/workspace/coverage/default/1.sram_ctrl_regwen.3537490050
/workspace/coverage/default/1.sram_ctrl_sec_cm.1428523422
/workspace/coverage/default/1.sram_ctrl_smoke.1076141337
/workspace/coverage/default/1.sram_ctrl_stress_all.3695129034
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1536639928
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.13247565
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1462158048
/workspace/coverage/default/10.sram_ctrl_bijection.381360805
/workspace/coverage/default/10.sram_ctrl_executable.287597308
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3816136305
/workspace/coverage/default/10.sram_ctrl_max_throughput.2564285464
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1581072313
/workspace/coverage/default/10.sram_ctrl_mem_walk.3961272362
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1759777836
/workspace/coverage/default/10.sram_ctrl_partial_access.3845389836
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.574501514
/workspace/coverage/default/10.sram_ctrl_ram_cfg.523649011
/workspace/coverage/default/10.sram_ctrl_regwen.2116854702
/workspace/coverage/default/10.sram_ctrl_smoke.1218740195
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1262064280
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.4109781504
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2665960264
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3291507802
/workspace/coverage/default/11.sram_ctrl_alert_test.2530966654
/workspace/coverage/default/11.sram_ctrl_bijection.1063914044
/workspace/coverage/default/11.sram_ctrl_executable.4198462275
/workspace/coverage/default/11.sram_ctrl_lc_escalation.190032348
/workspace/coverage/default/11.sram_ctrl_max_throughput.2854558139
/workspace/coverage/default/11.sram_ctrl_mem_walk.3236753056
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4168203050
/workspace/coverage/default/11.sram_ctrl_partial_access.1513791891
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.908969619
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2623970788
/workspace/coverage/default/11.sram_ctrl_regwen.1198346610
/workspace/coverage/default/11.sram_ctrl_smoke.2677752176
/workspace/coverage/default/11.sram_ctrl_stress_all.2039452991
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.804647757
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2242667231
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2432413726
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.765695963
/workspace/coverage/default/12.sram_ctrl_alert_test.658743261
/workspace/coverage/default/12.sram_ctrl_bijection.1112931213
/workspace/coverage/default/12.sram_ctrl_executable.1292366184
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2521531005
/workspace/coverage/default/12.sram_ctrl_max_throughput.2852034571
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2331486492
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/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2618513102
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1944424240
/workspace/coverage/default/43.sram_ctrl_alert_test.1977276079
/workspace/coverage/default/43.sram_ctrl_bijection.2601058961
/workspace/coverage/default/43.sram_ctrl_executable.315824431
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1530078887
/workspace/coverage/default/43.sram_ctrl_max_throughput.1398404217
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2049882597
/workspace/coverage/default/43.sram_ctrl_mem_walk.3234278116
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1291464468
/workspace/coverage/default/43.sram_ctrl_partial_access.1497459132
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2638869478
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1918205645
/workspace/coverage/default/43.sram_ctrl_regwen.3658410932
/workspace/coverage/default/43.sram_ctrl_smoke.1351608109
/workspace/coverage/default/43.sram_ctrl_stress_all.1046372947
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2580074460
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3668116949
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2362169638
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2491318031
/workspace/coverage/default/44.sram_ctrl_alert_test.1472382339
/workspace/coverage/default/44.sram_ctrl_bijection.549783179
/workspace/coverage/default/44.sram_ctrl_executable.1065859079
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1072505132
/workspace/coverage/default/44.sram_ctrl_max_throughput.2836126731
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3828966234
/workspace/coverage/default/44.sram_ctrl_mem_walk.3184280995
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3505533382
/workspace/coverage/default/44.sram_ctrl_partial_access.529817866
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2722808339
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2799091765
/workspace/coverage/default/44.sram_ctrl_regwen.3440901330
/workspace/coverage/default/44.sram_ctrl_smoke.3874715289
/workspace/coverage/default/44.sram_ctrl_stress_all.2525060202
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.837186117
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3039131409
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.290213632
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1932305608
/workspace/coverage/default/45.sram_ctrl_alert_test.1807548442
/workspace/coverage/default/45.sram_ctrl_bijection.1037979543
/workspace/coverage/default/45.sram_ctrl_executable.2152268356
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2362151273
/workspace/coverage/default/45.sram_ctrl_max_throughput.3011017727
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1885098262
/workspace/coverage/default/45.sram_ctrl_mem_walk.636520836
/workspace/coverage/default/45.sram_ctrl_multiple_keys.985397793
/workspace/coverage/default/45.sram_ctrl_partial_access.2934173984
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2421007150
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1890512955
/workspace/coverage/default/45.sram_ctrl_regwen.2957912486
/workspace/coverage/default/45.sram_ctrl_smoke.1793465028
/workspace/coverage/default/45.sram_ctrl_stress_all.974281812
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2220792381
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2449016911
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3133902606
/workspace/coverage/default/46.sram_ctrl_alert_test.3712973878
/workspace/coverage/default/46.sram_ctrl_bijection.2248023913
/workspace/coverage/default/46.sram_ctrl_executable.2398675990
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4200636158
/workspace/coverage/default/46.sram_ctrl_max_throughput.3125830451
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2827805249
/workspace/coverage/default/46.sram_ctrl_mem_walk.797651893
/workspace/coverage/default/46.sram_ctrl_multiple_keys.416715904
/workspace/coverage/default/46.sram_ctrl_partial_access.2778830611
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2091502975
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2719926287
/workspace/coverage/default/46.sram_ctrl_regwen.2282070400
/workspace/coverage/default/46.sram_ctrl_smoke.2593202157
/workspace/coverage/default/46.sram_ctrl_stress_all.1598508527
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.350357359
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2696978419
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.471348398
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2953286154
/workspace/coverage/default/47.sram_ctrl_alert_test.111420924
/workspace/coverage/default/47.sram_ctrl_bijection.981714969
/workspace/coverage/default/47.sram_ctrl_executable.3944253450
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1765321302
/workspace/coverage/default/47.sram_ctrl_max_throughput.3284978356
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.929335606
/workspace/coverage/default/47.sram_ctrl_mem_walk.3934161919
/workspace/coverage/default/47.sram_ctrl_multiple_keys.691599849
/workspace/coverage/default/47.sram_ctrl_partial_access.2102100055
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1139175462
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4021135640
/workspace/coverage/default/47.sram_ctrl_regwen.346115615
/workspace/coverage/default/47.sram_ctrl_smoke.2926439105
/workspace/coverage/default/47.sram_ctrl_stress_all.1117715694
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.89495651
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3467472835
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.402439739
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4246302622
/workspace/coverage/default/48.sram_ctrl_alert_test.1279412915
/workspace/coverage/default/48.sram_ctrl_bijection.4039949714
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3456042560
/workspace/coverage/default/48.sram_ctrl_max_throughput.1591220105
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.853240312
/workspace/coverage/default/48.sram_ctrl_mem_walk.3443314053
/workspace/coverage/default/48.sram_ctrl_multiple_keys.360093612
/workspace/coverage/default/48.sram_ctrl_partial_access.2203614074
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1598620682
/workspace/coverage/default/48.sram_ctrl_ram_cfg.66516576
/workspace/coverage/default/48.sram_ctrl_regwen.3602423510
/workspace/coverage/default/48.sram_ctrl_smoke.2313132605
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2828880901
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2342667816
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3239883098
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.691053903
/workspace/coverage/default/49.sram_ctrl_alert_test.1698533987
/workspace/coverage/default/49.sram_ctrl_bijection.247196918
/workspace/coverage/default/49.sram_ctrl_executable.2068346302
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2974392237
/workspace/coverage/default/49.sram_ctrl_max_throughput.2865497035
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3777551153
/workspace/coverage/default/49.sram_ctrl_mem_walk.2382328801
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1818486749
/workspace/coverage/default/49.sram_ctrl_partial_access.162630885
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2604799069
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2270823924
/workspace/coverage/default/49.sram_ctrl_regwen.2166877558
/workspace/coverage/default/49.sram_ctrl_smoke.2281526138
/workspace/coverage/default/49.sram_ctrl_stress_all.2901049918
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.426051759
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2511089495
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2080816864
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1930395629
/workspace/coverage/default/5.sram_ctrl_alert_test.1242939310
/workspace/coverage/default/5.sram_ctrl_bijection.3450586476
/workspace/coverage/default/5.sram_ctrl_executable.3882264858
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1121687138
/workspace/coverage/default/5.sram_ctrl_max_throughput.2131892703
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.940793877
/workspace/coverage/default/5.sram_ctrl_mem_walk.526446849
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1791140919
/workspace/coverage/default/5.sram_ctrl_partial_access.3899534754
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2517198400
/workspace/coverage/default/5.sram_ctrl_ram_cfg.697222699
/workspace/coverage/default/5.sram_ctrl_regwen.410701006
/workspace/coverage/default/5.sram_ctrl_smoke.636414202
/workspace/coverage/default/5.sram_ctrl_stress_all.1034379272
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2298141093
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1141164530
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2843853450
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1467166823
/workspace/coverage/default/6.sram_ctrl_alert_test.594361666
/workspace/coverage/default/6.sram_ctrl_bijection.732205702
/workspace/coverage/default/6.sram_ctrl_executable.2298669895
/workspace/coverage/default/6.sram_ctrl_lc_escalation.554304473
/workspace/coverage/default/6.sram_ctrl_max_throughput.390130445
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3585095234
/workspace/coverage/default/6.sram_ctrl_mem_walk.514399722
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1920155216
/workspace/coverage/default/6.sram_ctrl_partial_access.2062224010
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3810814210
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1201438969
/workspace/coverage/default/6.sram_ctrl_regwen.2863926392
/workspace/coverage/default/6.sram_ctrl_smoke.1209689707
/workspace/coverage/default/6.sram_ctrl_stress_all.3446133135
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3047331260
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3303180883
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4277223528
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1207989844
/workspace/coverage/default/7.sram_ctrl_alert_test.1428521258
/workspace/coverage/default/7.sram_ctrl_bijection.1884998337
/workspace/coverage/default/7.sram_ctrl_executable.1170664771
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3998961454
/workspace/coverage/default/7.sram_ctrl_max_throughput.1157675663
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4112977156
/workspace/coverage/default/7.sram_ctrl_mem_walk.2340879221
/workspace/coverage/default/7.sram_ctrl_multiple_keys.324763089
/workspace/coverage/default/7.sram_ctrl_partial_access.3858215059
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3921986538
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1285440780
/workspace/coverage/default/7.sram_ctrl_regwen.1641527274
/workspace/coverage/default/7.sram_ctrl_smoke.1102016992
/workspace/coverage/default/7.sram_ctrl_stress_all.3766483651
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2257087532
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1310906193
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.335768373
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.525867663
/workspace/coverage/default/8.sram_ctrl_alert_test.1789329215
/workspace/coverage/default/8.sram_ctrl_bijection.2877626938
/workspace/coverage/default/8.sram_ctrl_executable.2658771420
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3108852770
/workspace/coverage/default/8.sram_ctrl_max_throughput.1946600064
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1701023857
/workspace/coverage/default/8.sram_ctrl_mem_walk.3869282819
/workspace/coverage/default/8.sram_ctrl_multiple_keys.454486979
/workspace/coverage/default/8.sram_ctrl_partial_access.2221076597
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2624704881
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1594964539
/workspace/coverage/default/8.sram_ctrl_regwen.410875390
/workspace/coverage/default/8.sram_ctrl_smoke.2862885806
/workspace/coverage/default/8.sram_ctrl_stress_all.719161060
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1426392469
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1439623750
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.879098927
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.713005668
/workspace/coverage/default/9.sram_ctrl_alert_test.1914857326
/workspace/coverage/default/9.sram_ctrl_bijection.343079156
/workspace/coverage/default/9.sram_ctrl_executable.1031764002
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3567768742
/workspace/coverage/default/9.sram_ctrl_max_throughput.2142125940
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.4222053137
/workspace/coverage/default/9.sram_ctrl_mem_walk.1607066887
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1674871245
/workspace/coverage/default/9.sram_ctrl_partial_access.1413722782
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3367626307
/workspace/coverage/default/9.sram_ctrl_ram_cfg.629127974
/workspace/coverage/default/9.sram_ctrl_regwen.3696584847
/workspace/coverage/default/9.sram_ctrl_smoke.3932661881
/workspace/coverage/default/9.sram_ctrl_stress_all.2665488774
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2401906025
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2267510954
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.762377162




Total test records in report: 1034
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/8.sram_ctrl_executable.2658771420 Jun 23 06:07:36 PM PDT 24 Jun 23 06:24:31 PM PDT 24 46273449698 ps
T2 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.983703120 Jun 23 06:08:56 PM PDT 24 Jun 23 06:19:32 PM PDT 24 6773419166 ps
T3 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.488504955 Jun 23 06:09:38 PM PDT 24 Jun 23 06:09:55 PM PDT 24 558769683 ps
T4 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.940793877 Jun 23 06:07:32 PM PDT 24 Jun 23 06:08:56 PM PDT 24 9742267773 ps
T5 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1700366983 Jun 23 06:07:25 PM PDT 24 Jun 23 06:10:15 PM PDT 24 24132670546 ps
T9 /workspace/coverage/default/32.sram_ctrl_max_throughput.2261314069 Jun 23 06:10:33 PM PDT 24 Jun 23 06:12:01 PM PDT 24 786974962 ps
T6 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3007215411 Jun 23 06:07:27 PM PDT 24 Jun 23 06:08:25 PM PDT 24 28009523703 ps
T10 /workspace/coverage/default/38.sram_ctrl_partial_access.4157280026 Jun 23 06:11:29 PM PDT 24 Jun 23 06:13:14 PM PDT 24 1233177426 ps
T11 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3486330988 Jun 23 06:07:50 PM PDT 24 Jun 23 06:09:06 PM PDT 24 2460106458 ps
T12 /workspace/coverage/default/19.sram_ctrl_mem_walk.3712071426 Jun 23 06:08:31 PM PDT 24 Jun 23 06:12:52 PM PDT 24 15758645359 ps
T28 /workspace/coverage/default/41.sram_ctrl_ram_cfg.1198848718 Jun 23 06:12:07 PM PDT 24 Jun 23 06:12:11 PM PDT 24 346333351 ps
T40 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.890274232 Jun 23 06:07:29 PM PDT 24 Jun 23 06:11:18 PM PDT 24 7714970673 ps
T19 /workspace/coverage/default/12.sram_ctrl_bijection.1112931213 Jun 23 06:07:45 PM PDT 24 Jun 23 06:34:03 PM PDT 24 43493703108 ps
T67 /workspace/coverage/default/14.sram_ctrl_mem_walk.571910315 Jun 23 06:07:58 PM PDT 24 Jun 23 06:10:02 PM PDT 24 6806488786 ps
T25 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1505321630 Jun 23 06:08:46 PM PDT 24 Jun 23 06:09:07 PM PDT 24 806625891 ps
T7 /workspace/coverage/default/14.sram_ctrl_lc_escalation.696216355 Jun 23 06:07:56 PM PDT 24 Jun 23 06:09:23 PM PDT 24 49051943934 ps
T41 /workspace/coverage/default/27.sram_ctrl_mem_walk.3888207038 Jun 23 06:09:44 PM PDT 24 Jun 23 06:14:40 PM PDT 24 21000604661 ps
T8 /workspace/coverage/default/46.sram_ctrl_lc_escalation.4200636158 Jun 23 06:13:03 PM PDT 24 Jun 23 06:13:25 PM PDT 24 12500761535 ps
T26 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3248681021 Jun 23 06:08:31 PM PDT 24 Jun 23 06:09:42 PM PDT 24 5272128844 ps
T20 /workspace/coverage/default/2.sram_ctrl_stress_all.3815365125 Jun 23 06:07:25 PM PDT 24 Jun 23 07:28:38 PM PDT 24 269230770672 ps
T21 /workspace/coverage/default/49.sram_ctrl_regwen.2166877558 Jun 23 06:13:43 PM PDT 24 Jun 23 06:14:02 PM PDT 24 1051480027 ps
T145 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.537216603 Jun 23 06:08:05 PM PDT 24 Jun 23 06:11:09 PM PDT 24 3134583453 ps
T13 /workspace/coverage/default/41.sram_ctrl_alert_test.1934099353 Jun 23 06:12:05 PM PDT 24 Jun 23 06:12:06 PM PDT 24 41957762 ps
T27 /workspace/coverage/default/26.sram_ctrl_executable.2215196644 Jun 23 06:09:35 PM PDT 24 Jun 23 06:33:17 PM PDT 24 104811234736 ps
T42 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2491318031 Jun 23 06:12:37 PM PDT 24 Jun 23 06:15:11 PM PDT 24 3997882346 ps
T62 /workspace/coverage/default/24.sram_ctrl_regwen.2827709526 Jun 23 06:09:20 PM PDT 24 Jun 23 06:31:50 PM PDT 24 6042203192 ps
T146 /workspace/coverage/default/49.sram_ctrl_smoke.2281526138 Jun 23 06:13:28 PM PDT 24 Jun 23 06:13:54 PM PDT 24 924044128 ps
T14 /workspace/coverage/default/23.sram_ctrl_alert_test.3272685815 Jun 23 06:09:10 PM PDT 24 Jun 23 06:09:11 PM PDT 24 15619917 ps
T16 /workspace/coverage/default/2.sram_ctrl_sec_cm.2422522217 Jun 23 06:07:23 PM PDT 24 Jun 23 06:07:26 PM PDT 24 471840679 ps
T22 /workspace/coverage/default/25.sram_ctrl_regwen.3500547550 Jun 23 06:09:27 PM PDT 24 Jun 23 06:18:39 PM PDT 24 1746721847 ps
T33 /workspace/coverage/default/14.sram_ctrl_bijection.3252938729 Jun 23 06:07:56 PM PDT 24 Jun 23 06:35:23 PM PDT 24 276822716422 ps
T34 /workspace/coverage/default/43.sram_ctrl_multiple_keys.1291464468 Jun 23 06:12:14 PM PDT 24 Jun 23 06:25:51 PM PDT 24 16036927821 ps
T35 /workspace/coverage/default/8.sram_ctrl_smoke.2862885806 Jun 23 06:07:37 PM PDT 24 Jun 23 06:08:48 PM PDT 24 1153856548 ps
T23 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3823199475 Jun 23 06:07:24 PM PDT 24 Jun 23 06:08:01 PM PDT 24 6082062849 ps
T36 /workspace/coverage/default/25.sram_ctrl_bijection.2372259398 Jun 23 06:09:26 PM PDT 24 Jun 23 06:48:59 PM PDT 24 574822181429 ps
T37 /workspace/coverage/default/18.sram_ctrl_regwen.1380014647 Jun 23 06:08:26 PM PDT 24 Jun 23 06:28:16 PM PDT 24 14728597412 ps
T38 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.885812518 Jun 23 06:07:30 PM PDT 24 Jun 23 06:14:23 PM PDT 24 33483759169 ps
T39 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.1141164530 Jun 23 06:07:30 PM PDT 24 Jun 23 06:12:19 PM PDT 24 16830181444 ps
T47 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3665282163 Jun 23 06:11:04 PM PDT 24 Jun 23 06:12:29 PM PDT 24 3105408101 ps
T48 /workspace/coverage/default/39.sram_ctrl_mem_walk.383920885 Jun 23 06:11:44 PM PDT 24 Jun 23 06:17:32 PM PDT 24 41386275558 ps
T147 /workspace/coverage/default/3.sram_ctrl_max_throughput.3624688781 Jun 23 06:07:28 PM PDT 24 Jun 23 06:08:46 PM PDT 24 6775990955 ps
T15 /workspace/coverage/default/39.sram_ctrl_alert_test.2848799896 Jun 23 06:11:43 PM PDT 24 Jun 23 06:11:44 PM PDT 24 35230782 ps
T148 /workspace/coverage/default/41.sram_ctrl_multiple_keys.4204630261 Jun 23 06:12:00 PM PDT 24 Jun 23 06:30:23 PM PDT 24 26218671947 ps
T149 /workspace/coverage/default/28.sram_ctrl_max_throughput.439046774 Jun 23 06:09:52 PM PDT 24 Jun 23 06:10:55 PM PDT 24 1567037369 ps
T150 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3239883098 Jun 23 06:13:24 PM PDT 24 Jun 23 06:13:59 PM PDT 24 1479397822 ps
T29 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2229542044 Jun 23 06:08:52 PM PDT 24 Jun 23 06:08:56 PM PDT 24 5611999820 ps
T140 /workspace/coverage/default/17.sram_ctrl_multiple_keys.743131402 Jun 23 06:08:11 PM PDT 24 Jun 23 06:30:18 PM PDT 24 82696733321 ps
T138 /workspace/coverage/default/30.sram_ctrl_executable.81818684 Jun 23 06:10:19 PM PDT 24 Jun 23 06:26:02 PM PDT 24 6439892211 ps
T151 /workspace/coverage/default/0.sram_ctrl_bijection.2126289398 Jun 23 06:07:16 PM PDT 24 Jun 23 06:49:40 PM PDT 24 211633204965 ps
T152 /workspace/coverage/default/42.sram_ctrl_bijection.4200838762 Jun 23 06:12:09 PM PDT 24 Jun 23 06:40:37 PM PDT 24 73761131701 ps
T49 /workspace/coverage/default/30.sram_ctrl_mem_walk.2392104037 Jun 23 06:10:20 PM PDT 24 Jun 23 06:15:19 PM PDT 24 5255134724 ps
T153 /workspace/coverage/default/1.sram_ctrl_smoke.1076141337 Jun 23 06:07:14 PM PDT 24 Jun 23 06:07:23 PM PDT 24 481224792 ps
T50 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1494137993 Jun 23 06:07:35 PM PDT 24 Jun 23 06:08:08 PM PDT 24 1182010177 ps
T121 /workspace/coverage/default/10.sram_ctrl_regwen.2116854702 Jun 23 06:07:49 PM PDT 24 Jun 23 06:25:57 PM PDT 24 3347375594 ps
T44 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.381885704 Jun 23 06:11:06 PM PDT 24 Jun 23 06:11:35 PM PDT 24 1052257565 ps
T122 /workspace/coverage/default/3.sram_ctrl_regwen.2323238682 Jun 23 06:07:31 PM PDT 24 Jun 23 06:19:34 PM PDT 24 84891610305 ps
T107 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.828499850 Jun 23 06:07:17 PM PDT 24 Jun 23 06:11:31 PM PDT 24 6212473500 ps
T123 /workspace/coverage/default/41.sram_ctrl_bijection.2229330644 Jun 23 06:12:00 PM PDT 24 Jun 23 06:33:31 PM PDT 24 304200410917 ps
T91 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.3777551153 Jun 23 06:13:47 PM PDT 24 Jun 23 06:14:55 PM PDT 24 1977524702 ps
T43 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.3285024868 Jun 23 06:09:19 PM PDT 24 Jun 23 06:31:09 PM PDT 24 38320132911 ps
T24 /workspace/coverage/default/9.sram_ctrl_stress_all.2665488774 Jun 23 06:07:47 PM PDT 24 Jun 23 07:40:52 PM PDT 24 152965132158 ps
T124 /workspace/coverage/default/13.sram_ctrl_executable.19039792 Jun 23 06:07:47 PM PDT 24 Jun 23 06:11:03 PM PDT 24 12986915039 ps
T30 /workspace/coverage/default/35.sram_ctrl_ram_cfg.4277792978 Jun 23 06:11:05 PM PDT 24 Jun 23 06:11:09 PM PDT 24 1355854367 ps
T92 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.2865670672 Jun 23 06:09:35 PM PDT 24 Jun 23 06:10:23 PM PDT 24 2389038774 ps
T154 /workspace/coverage/default/46.sram_ctrl_multiple_keys.416715904 Jun 23 06:12:55 PM PDT 24 Jun 23 06:31:31 PM PDT 24 34160837666 ps
T155 /workspace/coverage/default/22.sram_ctrl_ram_cfg.155383426 Jun 23 06:08:55 PM PDT 24 Jun 23 06:08:58 PM PDT 24 358971842 ps
T141 /workspace/coverage/default/15.sram_ctrl_multiple_keys.1289133592 Jun 23 06:07:58 PM PDT 24 Jun 23 06:39:33 PM PDT 24 118948001361 ps
T93 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.1316532090 Jun 23 06:11:01 PM PDT 24 Jun 23 06:14:19 PM PDT 24 19816539205 ps
T108 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.2236779722 Jun 23 06:10:12 PM PDT 24 Jun 23 06:15:14 PM PDT 24 4333512529 ps
T156 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.306712514 Jun 23 06:08:54 PM PDT 24 Jun 23 06:09:50 PM PDT 24 784530028 ps
T125 /workspace/coverage/default/43.sram_ctrl_stress_all.1046372947 Jun 23 06:12:34 PM PDT 24 Jun 23 06:55:19 PM PDT 24 251939199810 ps
T157 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.241567386 Jun 23 06:10:48 PM PDT 24 Jun 23 06:13:28 PM PDT 24 8945582324 ps
T158 /workspace/coverage/default/5.sram_ctrl_ram_cfg.697222699 Jun 23 06:07:32 PM PDT 24 Jun 23 06:07:35 PM PDT 24 363710474 ps
T159 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.2692598011 Jun 23 06:10:11 PM PDT 24 Jun 23 06:15:43 PM PDT 24 5288247855 ps
T109 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3921986538 Jun 23 06:07:40 PM PDT 24 Jun 23 06:11:56 PM PDT 24 4612826674 ps
T160 /workspace/coverage/default/19.sram_ctrl_smoke.3554467779 Jun 23 06:08:28 PM PDT 24 Jun 23 06:08:43 PM PDT 24 1055707334 ps
T161 /workspace/coverage/default/45.sram_ctrl_regwen.2957912486 Jun 23 06:12:49 PM PDT 24 Jun 23 06:14:08 PM PDT 24 1861622827 ps
T137 /workspace/coverage/default/32.sram_ctrl_regwen.3496296846 Jun 23 06:10:33 PM PDT 24 Jun 23 06:21:58 PM PDT 24 43746804113 ps
T162 /workspace/coverage/default/3.sram_ctrl_executable.352802347 Jun 23 06:07:24 PM PDT 24 Jun 23 06:20:14 PM PDT 24 28245323465 ps
T110 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1598620682 Jun 23 06:13:23 PM PDT 24 Jun 23 06:18:49 PM PDT 24 52780239553 ps
T163 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.2593104181 Jun 23 06:08:17 PM PDT 24 Jun 23 06:12:02 PM PDT 24 11140598495 ps
T164 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.424492642 Jun 23 06:08:07 PM PDT 24 Jun 23 06:08:34 PM PDT 24 1516997474 ps
T165 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3717261990 Jun 23 06:11:19 PM PDT 24 Jun 23 06:11:22 PM PDT 24 1606945875 ps
T166 /workspace/coverage/default/2.sram_ctrl_lc_escalation.3116859517 Jun 23 06:07:22 PM PDT 24 Jun 23 06:08:23 PM PDT 24 39850992791 ps
T142 /workspace/coverage/default/1.sram_ctrl_stress_all.3695129034 Jun 23 06:07:20 PM PDT 24 Jun 23 07:08:05 PM PDT 24 217890854883 ps
T167 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.2355586412 Jun 23 06:07:25 PM PDT 24 Jun 23 06:27:35 PM PDT 24 65813139191 ps
T168 /workspace/coverage/default/44.sram_ctrl_multiple_keys.3505533382 Jun 23 06:12:34 PM PDT 24 Jun 23 06:28:40 PM PDT 24 4120423166 ps
T51 /workspace/coverage/default/49.sram_ctrl_mem_walk.2382328801 Jun 23 06:13:45 PM PDT 24 Jun 23 06:16:13 PM PDT 24 2741903227 ps
T169 /workspace/coverage/default/15.sram_ctrl_executable.2548708266 Jun 23 06:08:05 PM PDT 24 Jun 23 06:22:05 PM PDT 24 15673282109 ps
T170 /workspace/coverage/default/41.sram_ctrl_stress_all.3348782353 Jun 23 06:12:06 PM PDT 24 Jun 23 07:38:05 PM PDT 24 791833958883 ps
T171 /workspace/coverage/default/15.sram_ctrl_stress_all.780125731 Jun 23 06:08:07 PM PDT 24 Jun 23 08:18:44 PM PDT 24 68766555257 ps
T172 /workspace/coverage/default/41.sram_ctrl_lc_escalation.1525427570 Jun 23 06:12:10 PM PDT 24 Jun 23 06:13:35 PM PDT 24 54963412622 ps
T173 /workspace/coverage/default/18.sram_ctrl_max_throughput.3590390545 Jun 23 06:08:24 PM PDT 24 Jun 23 06:10:11 PM PDT 24 1539284151 ps
T174 /workspace/coverage/default/20.sram_ctrl_bijection.4065802055 Jun 23 06:08:37 PM PDT 24 Jun 23 06:55:37 PM PDT 24 548064187139 ps
T175 /workspace/coverage/default/5.sram_ctrl_lc_escalation.1121687138 Jun 23 06:07:33 PM PDT 24 Jun 23 06:08:39 PM PDT 24 21999885637 ps
T176 /workspace/coverage/default/0.sram_ctrl_ram_cfg.789374297 Jun 23 06:07:18 PM PDT 24 Jun 23 06:07:21 PM PDT 24 719900825 ps
T177 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3037178357 Jun 23 06:10:45 PM PDT 24 Jun 23 06:10:49 PM PDT 24 356901333 ps
T139 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.4205521394 Jun 23 06:10:41 PM PDT 24 Jun 23 06:21:58 PM PDT 24 27195465749 ps
T178 /workspace/coverage/default/47.sram_ctrl_lc_escalation.1765321302 Jun 23 06:13:12 PM PDT 24 Jun 23 06:14:32 PM PDT 24 39523391052 ps
T179 /workspace/coverage/default/25.sram_ctrl_lc_escalation.180372342 Jun 23 06:09:34 PM PDT 24 Jun 23 06:10:55 PM PDT 24 12130385481 ps
T180 /workspace/coverage/default/34.sram_ctrl_stress_all.685243718 Jun 23 06:10:58 PM PDT 24 Jun 23 06:55:16 PM PDT 24 256710762938 ps
T52 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1890276240 Jun 23 06:11:09 PM PDT 24 Jun 23 06:11:46 PM PDT 24 2460226052 ps
T181 /workspace/coverage/default/47.sram_ctrl_bijection.981714969 Jun 23 06:13:06 PM PDT 24 Jun 23 06:37:58 PM PDT 24 79986319775 ps
T182 /workspace/coverage/default/19.sram_ctrl_bijection.2703309864 Jun 23 06:08:28 PM PDT 24 Jun 23 06:52:33 PM PDT 24 137623061079 ps
T183 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2134459772 Jun 23 06:07:48 PM PDT 24 Jun 23 06:07:52 PM PDT 24 1598688950 ps
T184 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.356380469 Jun 23 06:08:38 PM PDT 24 Jun 23 06:28:14 PM PDT 24 13375324309 ps
T185 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2665960264 Jun 23 06:07:42 PM PDT 24 Jun 23 06:10:07 PM PDT 24 1333417890 ps
T186 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2204909720 Jun 23 06:10:31 PM PDT 24 Jun 23 06:32:20 PM PDT 24 8526391667 ps
T187 /workspace/coverage/default/25.sram_ctrl_alert_test.3002955844 Jun 23 06:09:36 PM PDT 24 Jun 23 06:09:36 PM PDT 24 32451670 ps
T188 /workspace/coverage/default/48.sram_ctrl_ram_cfg.66516576 Jun 23 06:13:26 PM PDT 24 Jun 23 06:13:30 PM PDT 24 653352042 ps
T189 /workspace/coverage/default/13.sram_ctrl_max_throughput.2980934445 Jun 23 06:07:49 PM PDT 24 Jun 23 06:10:05 PM PDT 24 802172694 ps
T190 /workspace/coverage/default/47.sram_ctrl_regwen.346115615 Jun 23 06:13:19 PM PDT 24 Jun 23 06:32:45 PM PDT 24 178983926096 ps
T191 /workspace/coverage/default/3.sram_ctrl_lc_escalation.1522677673 Jun 23 06:07:23 PM PDT 24 Jun 23 06:07:52 PM PDT 24 4866519329 ps
T192 /workspace/coverage/default/7.sram_ctrl_smoke.1102016992 Jun 23 06:07:36 PM PDT 24 Jun 23 06:07:45 PM PDT 24 1050786963 ps
T193 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.713005668 Jun 23 06:07:39 PM PDT 24 Jun 23 06:14:25 PM PDT 24 3969155958 ps
T194 /workspace/coverage/default/27.sram_ctrl_smoke.3645987215 Jun 23 06:09:40 PM PDT 24 Jun 23 06:09:57 PM PDT 24 917249704 ps
T195 /workspace/coverage/default/36.sram_ctrl_stress_all.2298811175 Jun 23 06:11:14 PM PDT 24 Jun 23 07:10:52 PM PDT 24 137030026884 ps
T196 /workspace/coverage/default/19.sram_ctrl_executable.2376808665 Jun 23 06:08:25 PM PDT 24 Jun 23 06:24:10 PM PDT 24 31147301752 ps
T197 /workspace/coverage/default/29.sram_ctrl_bijection.847680405 Jun 23 06:10:05 PM PDT 24 Jun 23 06:23:13 PM PDT 24 40080304923 ps
T198 /workspace/coverage/default/12.sram_ctrl_mem_walk.768280669 Jun 23 06:07:50 PM PDT 24 Jun 23 06:10:30 PM PDT 24 7195765453 ps
T65 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2296926397 Jun 23 06:08:52 PM PDT 24 Jun 23 06:09:25 PM PDT 24 3378402769 ps
T199 /workspace/coverage/default/6.sram_ctrl_executable.2298669895 Jun 23 06:07:37 PM PDT 24 Jun 23 06:10:35 PM PDT 24 4105243795 ps
T200 /workspace/coverage/default/15.sram_ctrl_smoke.3235980870 Jun 23 06:07:58 PM PDT 24 Jun 23 06:08:07 PM PDT 24 3183410166 ps
T201 /workspace/coverage/default/8.sram_ctrl_stress_all.719161060 Jun 23 06:07:36 PM PDT 24 Jun 23 07:57:32 PM PDT 24 581011782760 ps
T202 /workspace/coverage/default/35.sram_ctrl_regwen.4040367169 Jun 23 06:11:06 PM PDT 24 Jun 23 06:26:15 PM PDT 24 5377215174 ps
T203 /workspace/coverage/default/35.sram_ctrl_executable.3003086702 Jun 23 06:11:00 PM PDT 24 Jun 23 06:31:13 PM PDT 24 39462409027 ps
T204 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.2178699381 Jun 23 06:09:34 PM PDT 24 Jun 23 06:13:26 PM PDT 24 4191209643 ps
T205 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.853240312 Jun 23 06:13:25 PM PDT 24 Jun 23 06:14:44 PM PDT 24 10941475963 ps
T206 /workspace/coverage/default/27.sram_ctrl_max_throughput.154427810 Jun 23 06:09:42 PM PDT 24 Jun 23 06:10:25 PM PDT 24 729820880 ps
T207 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3092565245 Jun 23 06:08:29 PM PDT 24 Jun 23 06:13:46 PM PDT 24 50456267340 ps
T208 /workspace/coverage/default/8.sram_ctrl_bijection.2877626938 Jun 23 06:07:40 PM PDT 24 Jun 23 06:16:47 PM PDT 24 8575113821 ps
T209 /workspace/coverage/default/23.sram_ctrl_regwen.1783814602 Jun 23 06:09:06 PM PDT 24 Jun 23 06:26:46 PM PDT 24 26276775470 ps
T210 /workspace/coverage/default/2.sram_ctrl_bijection.3750298628 Jun 23 06:07:24 PM PDT 24 Jun 23 06:28:30 PM PDT 24 288134673835 ps
T143 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1745680409 Jun 23 06:10:43 PM PDT 24 Jun 23 06:19:27 PM PDT 24 237500402121 ps
T211 /workspace/coverage/default/17.sram_ctrl_bijection.1095522937 Jun 23 06:08:14 PM PDT 24 Jun 23 06:52:40 PM PDT 24 441698993866 ps
T212 /workspace/coverage/default/25.sram_ctrl_executable.3495430381 Jun 23 06:09:30 PM PDT 24 Jun 23 06:12:16 PM PDT 24 1751403697 ps
T213 /workspace/coverage/default/24.sram_ctrl_max_throughput.177478779 Jun 23 06:09:16 PM PDT 24 Jun 23 06:09:55 PM PDT 24 776167696 ps
T214 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.879098927 Jun 23 06:07:34 PM PDT 24 Jun 23 06:08:49 PM PDT 24 1584898707 ps
T215 /workspace/coverage/default/33.sram_ctrl_mem_walk.1064523778 Jun 23 06:10:44 PM PDT 24 Jun 23 06:13:19 PM PDT 24 10959771834 ps
T216 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1868280128 Jun 23 06:10:51 PM PDT 24 Jun 23 06:13:29 PM PDT 24 36185590945 ps
T217 /workspace/coverage/default/49.sram_ctrl_partial_access.162630885 Jun 23 06:13:34 PM PDT 24 Jun 23 06:13:41 PM PDT 24 375533174 ps
T218 /workspace/coverage/default/3.sram_ctrl_bijection.1488445368 Jun 23 06:07:33 PM PDT 24 Jun 23 06:26:24 PM PDT 24 503112381068 ps
T219 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.894043969 Jun 23 06:11:11 PM PDT 24 Jun 23 06:13:48 PM PDT 24 3254973036 ps
T66 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1262064280 Jun 23 06:07:49 PM PDT 24 Jun 23 06:08:14 PM PDT 24 13985233663 ps
T220 /workspace/coverage/default/40.sram_ctrl_max_throughput.2003217286 Jun 23 06:11:52 PM PDT 24 Jun 23 06:14:02 PM PDT 24 4228193203 ps
T221 /workspace/coverage/default/46.sram_ctrl_partial_access.2778830611 Jun 23 06:13:01 PM PDT 24 Jun 23 06:13:24 PM PDT 24 605127831 ps
T222 /workspace/coverage/default/47.sram_ctrl_executable.3944253450 Jun 23 06:13:15 PM PDT 24 Jun 23 06:29:27 PM PDT 24 37658364188 ps
T223 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2672186660 Jun 23 06:09:35 PM PDT 24 Jun 23 06:15:03 PM PDT 24 51224669650 ps
T224 /workspace/coverage/default/34.sram_ctrl_mem_walk.3776255500 Jun 23 06:10:56 PM PDT 24 Jun 23 06:13:48 PM PDT 24 10559682734 ps
T225 /workspace/coverage/default/46.sram_ctrl_max_throughput.3125830451 Jun 23 06:13:01 PM PDT 24 Jun 23 06:13:47 PM PDT 24 771638192 ps
T226 /workspace/coverage/default/2.sram_ctrl_multiple_keys.769903878 Jun 23 06:07:21 PM PDT 24 Jun 23 06:09:32 PM PDT 24 13004520292 ps
T227 /workspace/coverage/default/7.sram_ctrl_partial_access.3858215059 Jun 23 06:07:34 PM PDT 24 Jun 23 06:07:45 PM PDT 24 767840146 ps
T228 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.471348398 Jun 23 06:13:00 PM PDT 24 Jun 23 06:13:07 PM PDT 24 3937899200 ps
T229 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.954480332 Jun 23 06:12:13 PM PDT 24 Jun 23 06:15:28 PM PDT 24 3029489845 ps
T144 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3135994080 Jun 23 06:11:02 PM PDT 24 Jun 23 06:18:58 PM PDT 24 22088711837 ps
T230 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.127591803 Jun 23 06:08:23 PM PDT 24 Jun 23 06:09:22 PM PDT 24 11346622042 ps
T231 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.2696978419 Jun 23 06:13:03 PM PDT 24 Jun 23 06:16:16 PM PDT 24 5549922261 ps
T232 /workspace/coverage/default/14.sram_ctrl_partial_access.904932321 Jun 23 06:07:55 PM PDT 24 Jun 23 06:08:11 PM PDT 24 1078758143 ps
T233 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.4206009507 Jun 23 06:10:41 PM PDT 24 Jun 23 06:13:26 PM PDT 24 3080002920 ps
T234 /workspace/coverage/default/0.sram_ctrl_max_throughput.4166979751 Jun 23 06:07:19 PM PDT 24 Jun 23 06:07:28 PM PDT 24 1475481986 ps
T235 /workspace/coverage/default/4.sram_ctrl_multiple_keys.2154800355 Jun 23 06:07:28 PM PDT 24 Jun 23 06:27:22 PM PDT 24 77820897377 ps
T236 /workspace/coverage/default/46.sram_ctrl_bijection.2248023913 Jun 23 06:12:59 PM PDT 24 Jun 23 06:37:35 PM PDT 24 27680762237 ps
T237 /workspace/coverage/default/18.sram_ctrl_ram_cfg.404255227 Jun 23 06:08:32 PM PDT 24 Jun 23 06:08:35 PM PDT 24 1413264860 ps
T238 /workspace/coverage/default/10.sram_ctrl_alert_test.2829319335 Jun 23 06:07:43 PM PDT 24 Jun 23 06:07:45 PM PDT 24 37931007 ps
T239 /workspace/coverage/default/26.sram_ctrl_ram_cfg.2660945410 Jun 23 06:09:38 PM PDT 24 Jun 23 06:09:41 PM PDT 24 387070145 ps
T240 /workspace/coverage/default/39.sram_ctrl_bijection.3871995807 Jun 23 06:11:34 PM PDT 24 Jun 23 06:52:49 PM PDT 24 67579614410 ps
T241 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.4246302622 Jun 23 06:13:22 PM PDT 24 Jun 23 06:21:37 PM PDT 24 72663249972 ps
T242 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.335768373 Jun 23 06:07:36 PM PDT 24 Jun 23 06:09:16 PM PDT 24 3220027213 ps
T243 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1438613446 Jun 23 06:07:24 PM PDT 24 Jun 23 06:08:43 PM PDT 24 4805246358 ps
T244 /workspace/coverage/default/8.sram_ctrl_max_throughput.1946600064 Jun 23 06:07:37 PM PDT 24 Jun 23 06:07:47 PM PDT 24 718830960 ps
T245 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2080816864 Jun 23 06:13:36 PM PDT 24 Jun 23 06:15:03 PM PDT 24 3141701697 ps
T246 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2624704881 Jun 23 06:07:41 PM PDT 24 Jun 23 06:10:36 PM PDT 24 4171270903 ps
T247 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.3386585889 Jun 23 06:07:26 PM PDT 24 Jun 23 06:08:30 PM PDT 24 3988531325 ps
T248 /workspace/coverage/default/26.sram_ctrl_partial_access.3665758849 Jun 23 06:09:32 PM PDT 24 Jun 23 06:09:44 PM PDT 24 1431779079 ps
T249 /workspace/coverage/default/22.sram_ctrl_mem_walk.3862600519 Jun 23 06:08:56 PM PDT 24 Jun 23 06:11:49 PM PDT 24 10914709054 ps
T250 /workspace/coverage/default/40.sram_ctrl_smoke.468221724 Jun 23 06:11:43 PM PDT 24 Jun 23 06:14:18 PM PDT 24 14089452515 ps
T251 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.4053110570 Jun 23 06:07:23 PM PDT 24 Jun 23 06:22:40 PM PDT 24 12022892979 ps
T53 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.213947436 Jun 23 06:07:59 PM PDT 24 Jun 23 06:08:17 PM PDT 24 2469426949 ps
T252 /workspace/coverage/default/35.sram_ctrl_partial_access.1930635886 Jun 23 06:10:55 PM PDT 24 Jun 23 06:11:33 PM PDT 24 806671771 ps
T253 /workspace/coverage/default/32.sram_ctrl_executable.3174899707 Jun 23 06:10:43 PM PDT 24 Jun 23 06:12:18 PM PDT 24 1842914627 ps
T254 /workspace/coverage/default/44.sram_ctrl_lc_escalation.1072505132 Jun 23 06:12:43 PM PDT 24 Jun 23 06:14:18 PM PDT 24 49136098796 ps
T255 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.2953286154 Jun 23 06:13:15 PM PDT 24 Jun 23 06:28:59 PM PDT 24 22513764978 ps
T256 /workspace/coverage/default/23.sram_ctrl_multiple_keys.3582382276 Jun 23 06:09:03 PM PDT 24 Jun 23 06:27:27 PM PDT 24 15759308412 ps
T257 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3816136305 Jun 23 06:07:45 PM PDT 24 Jun 23 06:08:21 PM PDT 24 80501847384 ps
T258 /workspace/coverage/default/36.sram_ctrl_smoke.333587420 Jun 23 06:11:07 PM PDT 24 Jun 23 06:12:36 PM PDT 24 949425995 ps
T259 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.277691769 Jun 23 06:07:17 PM PDT 24 Jun 23 06:12:06 PM PDT 24 47932624874 ps
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T266 /workspace/coverage/default/20.sram_ctrl_regwen.2116507541 Jun 23 06:08:41 PM PDT 24 Jun 23 06:23:29 PM PDT 24 14805775673 ps
T267 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2618513102 Jun 23 06:12:12 PM PDT 24 Jun 23 06:14:28 PM PDT 24 3115302666 ps
T268 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.4221055915 Jun 23 06:07:48 PM PDT 24 Jun 23 06:12:11 PM PDT 24 4696796271 ps
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T270 /workspace/coverage/default/24.sram_ctrl_bijection.2178889647 Jun 23 06:09:14 PM PDT 24 Jun 23 06:35:36 PM PDT 24 99932719866 ps
T271 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.2379477837 Jun 23 06:10:44 PM PDT 24 Jun 23 06:26:42 PM PDT 24 50453860677 ps
T54 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.89495651 Jun 23 06:13:16 PM PDT 24 Jun 23 06:15:52 PM PDT 24 1736394669 ps
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T273 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1974666254 Jun 23 06:09:35 PM PDT 24 Jun 23 06:11:41 PM PDT 24 1660531015 ps
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T275 /workspace/coverage/default/15.sram_ctrl_bijection.554403121 Jun 23 06:08:02 PM PDT 24 Jun 23 06:48:38 PM PDT 24 644254014103 ps
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T277 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1944424240 Jun 23 06:12:20 PM PDT 24 Jun 23 06:36:54 PM PDT 24 42690331055 ps
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T280 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1718806154 Jun 23 06:09:57 PM PDT 24 Jun 23 06:19:38 PM PDT 24 7832902599 ps
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T296 /workspace/coverage/default/36.sram_ctrl_partial_access.4075368965 Jun 23 06:11:05 PM PDT 24 Jun 23 06:11:10 PM PDT 24 1551781028 ps
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T305 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1361059423 Jun 23 06:08:55 PM PDT 24 Jun 23 06:09:35 PM PDT 24 12524251240 ps
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T309 /workspace/coverage/default/36.sram_ctrl_bijection.781992339 Jun 23 06:11:05 PM PDT 24 Jun 23 06:51:43 PM PDT 24 33810702015 ps
T310 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.4247503501 Jun 23 06:11:55 PM PDT 24 Jun 23 06:12:09 PM PDT 24 1007643570 ps
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T312 /workspace/coverage/default/24.sram_ctrl_lc_escalation.3393405472 Jun 23 06:09:23 PM PDT 24 Jun 23 06:09:44 PM PDT 24 3422459456 ps
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T314 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.1721443036 Jun 23 06:08:40 PM PDT 24 Jun 23 06:10:00 PM PDT 24 3636670611 ps
T315 /workspace/coverage/default/45.sram_ctrl_mem_walk.636520836 Jun 23 06:12:50 PM PDT 24 Jun 23 06:15:55 PM PDT 24 43068548542 ps
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T317 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.4157416428 Jun 23 06:07:19 PM PDT 24 Jun 23 06:09:24 PM PDT 24 4444884602 ps
T318 /workspace/coverage/default/21.sram_ctrl_mem_walk.3322385556 Jun 23 06:08:49 PM PDT 24 Jun 23 06:13:55 PM PDT 24 10722820792 ps
T319 /workspace/coverage/default/2.sram_ctrl_ram_cfg.2837338193 Jun 23 06:07:24 PM PDT 24 Jun 23 06:07:27 PM PDT 24 363310231 ps
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