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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total test records in report: 1034
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T548 /workspace/coverage/default/39.sram_ctrl_max_throughput.3396141693 Jun 26 04:38:07 PM PDT 24 Jun 26 04:39:59 PM PDT 24 3119097655 ps
T549 /workspace/coverage/default/5.sram_ctrl_executable.3878740724 Jun 26 04:36:42 PM PDT 24 Jun 26 04:48:16 PM PDT 24 57723152569 ps
T550 /workspace/coverage/default/24.sram_ctrl_lc_escalation.879330464 Jun 26 04:37:10 PM PDT 24 Jun 26 04:38:58 PM PDT 24 93845041027 ps
T551 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2114267155 Jun 26 04:36:47 PM PDT 24 Jun 26 04:44:00 PM PDT 24 35185049573 ps
T552 /workspace/coverage/default/8.sram_ctrl_alert_test.1557020970 Jun 26 04:36:53 PM PDT 24 Jun 26 04:36:57 PM PDT 24 17527351 ps
T553 /workspace/coverage/default/28.sram_ctrl_stress_all.2113667304 Jun 26 04:37:32 PM PDT 24 Jun 26 05:22:43 PM PDT 24 146360814994 ps
T554 /workspace/coverage/default/19.sram_ctrl_bijection.2306964412 Jun 26 04:39:10 PM PDT 24 Jun 26 04:55:02 PM PDT 24 192057021270 ps
T555 /workspace/coverage/default/34.sram_ctrl_multiple_keys.2375902521 Jun 26 04:37:46 PM PDT 24 Jun 26 04:53:39 PM PDT 24 27710520702 ps
T556 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.224819667 Jun 26 04:38:27 PM PDT 24 Jun 26 04:46:48 PM PDT 24 17549696264 ps
T125 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1700471249 Jun 26 04:36:50 PM PDT 24 Jun 26 04:37:06 PM PDT 24 1821361230 ps
T557 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3689868010 Jun 26 04:38:10 PM PDT 24 Jun 26 04:44:03 PM PDT 24 69146922351 ps
T558 /workspace/coverage/default/22.sram_ctrl_alert_test.967375869 Jun 26 04:37:14 PM PDT 24 Jun 26 04:37:21 PM PDT 24 17055003 ps
T559 /workspace/coverage/default/40.sram_ctrl_lc_escalation.4046075308 Jun 26 04:38:12 PM PDT 24 Jun 26 04:38:52 PM PDT 24 19385125912 ps
T560 /workspace/coverage/default/4.sram_ctrl_mem_walk.2405187841 Jun 26 04:36:35 PM PDT 24 Jun 26 04:39:35 PM PDT 24 10807440964 ps
T561 /workspace/coverage/default/25.sram_ctrl_alert_test.2884873995 Jun 26 04:37:28 PM PDT 24 Jun 26 04:37:31 PM PDT 24 14001737 ps
T562 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.1490387647 Jun 26 04:36:49 PM PDT 24 Jun 26 04:39:35 PM PDT 24 35613039073 ps
T563 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2978724550 Jun 26 04:37:05 PM PDT 24 Jun 26 05:18:45 PM PDT 24 39332854274 ps
T564 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.2688455297 Jun 26 04:36:46 PM PDT 24 Jun 26 04:57:02 PM PDT 24 48266158973 ps
T565 /workspace/coverage/default/13.sram_ctrl_ram_cfg.1287156875 Jun 26 04:37:35 PM PDT 24 Jun 26 04:37:40 PM PDT 24 1765805811 ps
T566 /workspace/coverage/default/5.sram_ctrl_stress_all.1005260463 Jun 26 04:36:44 PM PDT 24 Jun 26 07:20:12 PM PDT 24 243163882751 ps
T567 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3520303454 Jun 26 04:37:29 PM PDT 24 Jun 26 04:37:34 PM PDT 24 1210396875 ps
T568 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3560084743 Jun 26 04:37:35 PM PDT 24 Jun 26 04:42:39 PM PDT 24 5040848051 ps
T569 /workspace/coverage/default/36.sram_ctrl_alert_test.3342620292 Jun 26 04:37:56 PM PDT 24 Jun 26 04:37:59 PM PDT 24 36301913 ps
T570 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1540539038 Jun 26 04:37:39 PM PDT 24 Jun 26 04:37:57 PM PDT 24 3289763934 ps
T571 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1894734690 Jun 26 04:37:13 PM PDT 24 Jun 26 04:37:50 PM PDT 24 2999668279 ps
T572 /workspace/coverage/default/22.sram_ctrl_multiple_keys.1463227234 Jun 26 04:37:05 PM PDT 24 Jun 26 04:44:24 PM PDT 24 15410180949 ps
T573 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.2341183303 Jun 26 04:37:04 PM PDT 24 Jun 26 04:38:19 PM PDT 24 3465811944 ps
T574 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.854567053 Jun 26 04:37:48 PM PDT 24 Jun 26 04:37:59 PM PDT 24 753188038 ps
T575 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.60774353 Jun 26 04:37:56 PM PDT 24 Jun 26 04:38:30 PM PDT 24 1158361406 ps
T576 /workspace/coverage/default/7.sram_ctrl_lc_escalation.350854983 Jun 26 04:36:52 PM PDT 24 Jun 26 04:37:22 PM PDT 24 5226674103 ps
T577 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3412462004 Jun 26 04:38:28 PM PDT 24 Jun 26 04:42:37 PM PDT 24 3660676839 ps
T578 /workspace/coverage/default/43.sram_ctrl_mem_walk.3744627371 Jun 26 04:38:27 PM PDT 24 Jun 26 04:41:22 PM PDT 24 21577280479 ps
T579 /workspace/coverage/default/26.sram_ctrl_stress_all.3958687779 Jun 26 04:37:27 PM PDT 24 Jun 26 05:36:28 PM PDT 24 43582008402 ps
T580 /workspace/coverage/default/36.sram_ctrl_partial_access.1125809736 Jun 26 04:37:55 PM PDT 24 Jun 26 04:38:05 PM PDT 24 860526622 ps
T581 /workspace/coverage/default/44.sram_ctrl_regwen.1062828884 Jun 26 04:38:38 PM PDT 24 Jun 26 04:50:22 PM PDT 24 20105683887 ps
T582 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.463174640 Jun 26 04:37:33 PM PDT 24 Jun 26 04:37:46 PM PDT 24 11232385244 ps
T583 /workspace/coverage/default/46.sram_ctrl_regwen.4033343369 Jun 26 04:38:42 PM PDT 24 Jun 26 04:52:38 PM PDT 24 11078229093 ps
T584 /workspace/coverage/default/15.sram_ctrl_ram_cfg.132343314 Jun 26 04:36:54 PM PDT 24 Jun 26 04:37:01 PM PDT 24 368002174 ps
T585 /workspace/coverage/default/24.sram_ctrl_regwen.1254660860 Jun 26 04:37:23 PM PDT 24 Jun 26 04:42:37 PM PDT 24 6649657648 ps
T586 /workspace/coverage/default/15.sram_ctrl_lc_escalation.2239324891 Jun 26 04:37:05 PM PDT 24 Jun 26 04:39:19 PM PDT 24 78819227705 ps
T587 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1009394654 Jun 26 04:38:22 PM PDT 24 Jun 26 04:52:10 PM PDT 24 10981055692 ps
T588 /workspace/coverage/default/7.sram_ctrl_mem_walk.4236570615 Jun 26 04:36:50 PM PDT 24 Jun 26 04:41:08 PM PDT 24 3949160377 ps
T589 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1534798249 Jun 26 04:38:54 PM PDT 24 Jun 26 04:39:32 PM PDT 24 5575305319 ps
T590 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1638055816 Jun 26 04:37:17 PM PDT 24 Jun 26 04:37:42 PM PDT 24 5509342040 ps
T591 /workspace/coverage/default/7.sram_ctrl_multiple_keys.2758812542 Jun 26 04:37:02 PM PDT 24 Jun 26 04:50:35 PM PDT 24 26282527871 ps
T592 /workspace/coverage/default/42.sram_ctrl_regwen.3670619256 Jun 26 04:38:24 PM PDT 24 Jun 26 04:45:11 PM PDT 24 6708495764 ps
T593 /workspace/coverage/default/26.sram_ctrl_smoke.3487927622 Jun 26 04:37:20 PM PDT 24 Jun 26 04:37:30 PM PDT 24 383377682 ps
T594 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3650821280 Jun 26 04:37:07 PM PDT 24 Jun 26 04:43:39 PM PDT 24 58876789154 ps
T595 /workspace/coverage/default/14.sram_ctrl_alert_test.2811561120 Jun 26 04:37:00 PM PDT 24 Jun 26 04:37:03 PM PDT 24 22351877 ps
T596 /workspace/coverage/default/44.sram_ctrl_stress_all.690452469 Jun 26 04:38:33 PM PDT 24 Jun 26 07:00:17 PM PDT 24 522460572669 ps
T597 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1947919995 Jun 26 04:39:03 PM PDT 24 Jun 26 04:43:10 PM PDT 24 4401860304 ps
T598 /workspace/coverage/default/6.sram_ctrl_bijection.3950500197 Jun 26 04:36:44 PM PDT 24 Jun 26 05:15:03 PM PDT 24 99658450613 ps
T599 /workspace/coverage/default/28.sram_ctrl_executable.978831346 Jun 26 04:37:26 PM PDT 24 Jun 26 04:48:28 PM PDT 24 28572785925 ps
T600 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1564226196 Jun 26 04:37:36 PM PDT 24 Jun 26 04:39:53 PM PDT 24 3260884049 ps
T601 /workspace/coverage/default/41.sram_ctrl_alert_test.1318315551 Jun 26 04:38:19 PM PDT 24 Jun 26 04:38:20 PM PDT 24 27452340 ps
T602 /workspace/coverage/default/49.sram_ctrl_alert_test.3916972955 Jun 26 04:39:11 PM PDT 24 Jun 26 04:39:13 PM PDT 24 24518639 ps
T603 /workspace/coverage/default/4.sram_ctrl_ram_cfg.3140507316 Jun 26 04:36:38 PM PDT 24 Jun 26 04:36:43 PM PDT 24 1356269548 ps
T604 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.148123959 Jun 26 04:38:42 PM PDT 24 Jun 26 04:49:27 PM PDT 24 116009033350 ps
T605 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1925681481 Jun 26 04:36:29 PM PDT 24 Jun 26 04:37:34 PM PDT 24 967598030 ps
T606 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.237911292 Jun 26 04:38:31 PM PDT 24 Jun 26 04:41:03 PM PDT 24 1796554771 ps
T607 /workspace/coverage/default/32.sram_ctrl_executable.1371559932 Jun 26 04:37:43 PM PDT 24 Jun 26 04:51:01 PM PDT 24 40432025340 ps
T608 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1534780289 Jun 26 04:36:43 PM PDT 24 Jun 26 04:37:42 PM PDT 24 3193124438 ps
T609 /workspace/coverage/default/29.sram_ctrl_smoke.3965257099 Jun 26 04:37:31 PM PDT 24 Jun 26 04:37:41 PM PDT 24 730641772 ps
T610 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1068894056 Jun 26 04:37:50 PM PDT 24 Jun 26 04:38:25 PM PDT 24 769543990 ps
T611 /workspace/coverage/default/11.sram_ctrl_mem_walk.1629315855 Jun 26 04:37:08 PM PDT 24 Jun 26 04:40:04 PM PDT 24 9447498033 ps
T612 /workspace/coverage/default/21.sram_ctrl_ram_cfg.609659425 Jun 26 04:37:13 PM PDT 24 Jun 26 04:37:21 PM PDT 24 386362697 ps
T613 /workspace/coverage/default/3.sram_ctrl_ram_cfg.2116302971 Jun 26 04:36:57 PM PDT 24 Jun 26 04:37:03 PM PDT 24 1983829112 ps
T614 /workspace/coverage/default/30.sram_ctrl_alert_test.2481851520 Jun 26 04:37:45 PM PDT 24 Jun 26 04:37:48 PM PDT 24 16953791 ps
T615 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1955396617 Jun 26 04:37:39 PM PDT 24 Jun 26 04:38:59 PM PDT 24 781443035 ps
T616 /workspace/coverage/default/39.sram_ctrl_regwen.2513754697 Jun 26 04:38:10 PM PDT 24 Jun 26 04:40:17 PM PDT 24 3064125831 ps
T617 /workspace/coverage/default/23.sram_ctrl_alert_test.2842876342 Jun 26 04:37:09 PM PDT 24 Jun 26 04:37:13 PM PDT 24 25152201 ps
T618 /workspace/coverage/default/45.sram_ctrl_max_throughput.3780824648 Jun 26 04:38:37 PM PDT 24 Jun 26 04:40:00 PM PDT 24 1574493867 ps
T619 /workspace/coverage/default/2.sram_ctrl_stress_all.3519347573 Jun 26 04:36:19 PM PDT 24 Jun 26 06:22:22 PM PDT 24 1017441356368 ps
T620 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3063988182 Jun 26 04:36:53 PM PDT 24 Jun 26 04:37:11 PM PDT 24 1581520922 ps
T621 /workspace/coverage/default/18.sram_ctrl_regwen.1403663721 Jun 26 04:37:30 PM PDT 24 Jun 26 04:38:24 PM PDT 24 4620227540 ps
T622 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.592940665 Jun 26 04:36:41 PM PDT 24 Jun 26 04:39:44 PM PDT 24 35910527211 ps
T623 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1024567786 Jun 26 04:36:49 PM PDT 24 Jun 26 04:37:27 PM PDT 24 1022224386 ps
T624 /workspace/coverage/default/2.sram_ctrl_ram_cfg.1600736926 Jun 26 04:36:34 PM PDT 24 Jun 26 04:36:39 PM PDT 24 1352161668 ps
T17 /workspace/coverage/default/0.sram_ctrl_sec_cm.1768600797 Jun 26 04:36:39 PM PDT 24 Jun 26 04:36:48 PM PDT 24 348048169 ps
T625 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.941216734 Jun 26 04:37:10 PM PDT 24 Jun 26 04:37:28 PM PDT 24 700791152 ps
T626 /workspace/coverage/default/35.sram_ctrl_partial_access.568703102 Jun 26 04:37:52 PM PDT 24 Jun 26 04:38:12 PM PDT 24 25048320211 ps
T627 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.53646298 Jun 26 04:37:25 PM PDT 24 Jun 26 04:37:52 PM PDT 24 721328456 ps
T628 /workspace/coverage/default/32.sram_ctrl_regwen.3603386493 Jun 26 04:37:45 PM PDT 24 Jun 26 04:39:59 PM PDT 24 3040105341 ps
T629 /workspace/coverage/default/41.sram_ctrl_ram_cfg.2706325551 Jun 26 04:38:16 PM PDT 24 Jun 26 04:38:20 PM PDT 24 1402497226 ps
T630 /workspace/coverage/default/33.sram_ctrl_mem_walk.642142758 Jun 26 04:37:45 PM PDT 24 Jun 26 04:43:18 PM PDT 24 35958819190 ps
T631 /workspace/coverage/default/32.sram_ctrl_bijection.361494323 Jun 26 04:37:38 PM PDT 24 Jun 26 05:07:44 PM PDT 24 82443234517 ps
T632 /workspace/coverage/default/14.sram_ctrl_executable.3951351109 Jun 26 04:37:12 PM PDT 24 Jun 26 04:48:27 PM PDT 24 8684115286 ps
T633 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3262621829 Jun 26 04:36:36 PM PDT 24 Jun 26 04:37:22 PM PDT 24 14627097429 ps
T634 /workspace/coverage/default/20.sram_ctrl_partial_access.732382119 Jun 26 04:37:17 PM PDT 24 Jun 26 04:39:30 PM PDT 24 4134950676 ps
T635 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3429865487 Jun 26 04:38:08 PM PDT 24 Jun 26 04:38:12 PM PDT 24 705998225 ps
T636 /workspace/coverage/default/9.sram_ctrl_regwen.858415659 Jun 26 04:36:43 PM PDT 24 Jun 26 04:47:33 PM PDT 24 13774461432 ps
T637 /workspace/coverage/default/14.sram_ctrl_max_throughput.255529704 Jun 26 04:37:10 PM PDT 24 Jun 26 04:39:08 PM PDT 24 3261023255 ps
T638 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.1196027189 Jun 26 04:37:51 PM PDT 24 Jun 26 04:43:26 PM PDT 24 17729417677 ps
T639 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1984773802 Jun 26 04:38:47 PM PDT 24 Jun 26 04:41:03 PM PDT 24 1582629387 ps
T640 /workspace/coverage/default/43.sram_ctrl_smoke.2915692865 Jun 26 04:38:31 PM PDT 24 Jun 26 04:38:48 PM PDT 24 2057884426 ps
T641 /workspace/coverage/default/21.sram_ctrl_max_throughput.3251438081 Jun 26 04:37:17 PM PDT 24 Jun 26 04:37:38 PM PDT 24 728309947 ps
T642 /workspace/coverage/default/13.sram_ctrl_max_throughput.3312402635 Jun 26 04:36:47 PM PDT 24 Jun 26 04:37:32 PM PDT 24 1473225955 ps
T643 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4251956788 Jun 26 04:38:09 PM PDT 24 Jun 26 04:41:58 PM PDT 24 14138334093 ps
T644 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.3757295427 Jun 26 04:37:08 PM PDT 24 Jun 26 04:43:08 PM PDT 24 10576562440 ps
T645 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2308910571 Jun 26 04:37:11 PM PDT 24 Jun 26 04:40:09 PM PDT 24 21754388819 ps
T646 /workspace/coverage/default/37.sram_ctrl_bijection.1431989719 Jun 26 04:37:56 PM PDT 24 Jun 26 05:12:52 PM PDT 24 139390418292 ps
T647 /workspace/coverage/default/1.sram_ctrl_smoke.3440477679 Jun 26 04:36:33 PM PDT 24 Jun 26 04:37:48 PM PDT 24 3034003131 ps
T648 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1227893045 Jun 26 04:37:43 PM PDT 24 Jun 26 04:39:37 PM PDT 24 862308837 ps
T649 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2158662834 Jun 26 04:37:08 PM PDT 24 Jun 26 04:37:14 PM PDT 24 716115992 ps
T650 /workspace/coverage/default/10.sram_ctrl_ram_cfg.3952346656 Jun 26 04:36:51 PM PDT 24 Jun 26 04:36:57 PM PDT 24 356015212 ps
T651 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1309400875 Jun 26 04:38:07 PM PDT 24 Jun 26 04:40:12 PM PDT 24 1670415855 ps
T652 /workspace/coverage/default/23.sram_ctrl_mem_walk.375632914 Jun 26 04:37:22 PM PDT 24 Jun 26 04:41:41 PM PDT 24 3983882282 ps
T653 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2645931390 Jun 26 04:37:36 PM PDT 24 Jun 26 04:37:47 PM PDT 24 2840372340 ps
T654 /workspace/coverage/default/2.sram_ctrl_smoke.49720306 Jun 26 04:36:31 PM PDT 24 Jun 26 04:36:41 PM PDT 24 3038033591 ps
T655 /workspace/coverage/default/39.sram_ctrl_smoke.728872657 Jun 26 04:38:08 PM PDT 24 Jun 26 04:38:25 PM PDT 24 1062673342 ps
T656 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1728797518 Jun 26 04:36:54 PM PDT 24 Jun 26 04:42:50 PM PDT 24 19281630662 ps
T657 /workspace/coverage/default/38.sram_ctrl_executable.1280656979 Jun 26 04:38:08 PM PDT 24 Jun 26 04:40:06 PM PDT 24 3243978456 ps
T658 /workspace/coverage/default/12.sram_ctrl_executable.3019525273 Jun 26 04:36:50 PM PDT 24 Jun 26 04:58:26 PM PDT 24 18652752729 ps
T659 /workspace/coverage/default/47.sram_ctrl_smoke.3906876964 Jun 26 04:38:45 PM PDT 24 Jun 26 04:38:50 PM PDT 24 1474705715 ps
T660 /workspace/coverage/default/6.sram_ctrl_ram_cfg.3137668013 Jun 26 04:36:45 PM PDT 24 Jun 26 04:36:50 PM PDT 24 656182376 ps
T661 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.802200885 Jun 26 04:36:57 PM PDT 24 Jun 26 04:39:10 PM PDT 24 820395848 ps
T662 /workspace/coverage/default/49.sram_ctrl_max_throughput.2692502953 Jun 26 04:39:03 PM PDT 24 Jun 26 04:40:53 PM PDT 24 7542914793 ps
T663 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2657575553 Jun 26 04:38:47 PM PDT 24 Jun 26 04:46:34 PM PDT 24 73391888008 ps
T664 /workspace/coverage/default/7.sram_ctrl_executable.2682975927 Jun 26 04:36:58 PM PDT 24 Jun 26 04:40:50 PM PDT 24 12233186483 ps
T665 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1585592546 Jun 26 04:38:06 PM PDT 24 Jun 26 04:39:24 PM PDT 24 2501933569 ps
T666 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1075797725 Jun 26 04:37:12 PM PDT 24 Jun 26 04:42:06 PM PDT 24 11523034083 ps
T33 /workspace/coverage/default/4.sram_ctrl_sec_cm.1016780505 Jun 26 04:37:02 PM PDT 24 Jun 26 04:37:07 PM PDT 24 432986321 ps
T667 /workspace/coverage/default/7.sram_ctrl_alert_test.841848015 Jun 26 04:36:49 PM PDT 24 Jun 26 04:36:51 PM PDT 24 46226889 ps
T668 /workspace/coverage/default/3.sram_ctrl_stress_all.2966166766 Jun 26 04:36:35 PM PDT 24 Jun 26 06:33:11 PM PDT 24 1203744427417 ps
T669 /workspace/coverage/default/23.sram_ctrl_smoke.901416298 Jun 26 04:37:17 PM PDT 24 Jun 26 04:37:30 PM PDT 24 701365478 ps
T670 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2474936015 Jun 26 04:37:18 PM PDT 24 Jun 26 04:39:53 PM PDT 24 7288501890 ps
T671 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.238498393 Jun 26 04:37:16 PM PDT 24 Jun 26 04:42:54 PM PDT 24 36217934136 ps
T672 /workspace/coverage/default/28.sram_ctrl_lc_escalation.2002891099 Jun 26 04:37:37 PM PDT 24 Jun 26 04:38:38 PM PDT 24 39469154898 ps
T673 /workspace/coverage/default/14.sram_ctrl_mem_walk.1919296618 Jun 26 04:37:03 PM PDT 24 Jun 26 04:42:29 PM PDT 24 28823341267 ps
T674 /workspace/coverage/default/38.sram_ctrl_multiple_keys.1902171559 Jun 26 04:38:09 PM PDT 24 Jun 26 04:57:34 PM PDT 24 62802554706 ps
T675 /workspace/coverage/default/24.sram_ctrl_max_throughput.4241731206 Jun 26 04:37:14 PM PDT 24 Jun 26 04:38:23 PM PDT 24 4609420382 ps
T676 /workspace/coverage/default/16.sram_ctrl_bijection.2698068529 Jun 26 04:37:03 PM PDT 24 Jun 26 04:48:13 PM PDT 24 41667321077 ps
T677 /workspace/coverage/default/45.sram_ctrl_stress_all.933377302 Jun 26 04:38:42 PM PDT 24 Jun 26 05:28:34 PM PDT 24 197428415535 ps
T678 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1423021198 Jun 26 04:37:15 PM PDT 24 Jun 26 04:39:30 PM PDT 24 14885678790 ps
T679 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.2697486517 Jun 26 04:36:47 PM PDT 24 Jun 26 04:51:45 PM PDT 24 23709187055 ps
T680 /workspace/coverage/default/19.sram_ctrl_regwen.760015522 Jun 26 04:37:18 PM PDT 24 Jun 26 04:45:43 PM PDT 24 17641739449 ps
T681 /workspace/coverage/default/20.sram_ctrl_executable.732770085 Jun 26 04:37:10 PM PDT 24 Jun 26 04:37:33 PM PDT 24 3305874833 ps
T682 /workspace/coverage/default/28.sram_ctrl_ram_cfg.1306258006 Jun 26 04:37:30 PM PDT 24 Jun 26 04:37:36 PM PDT 24 677713361 ps
T683 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1570838042 Jun 26 04:38:58 PM PDT 24 Jun 26 04:48:13 PM PDT 24 26461687616 ps
T684 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3546306635 Jun 26 04:37:52 PM PDT 24 Jun 26 04:40:44 PM PDT 24 75151116314 ps
T685 /workspace/coverage/default/43.sram_ctrl_ram_cfg.3608870139 Jun 26 04:38:27 PM PDT 24 Jun 26 04:38:31 PM PDT 24 1252242655 ps
T686 /workspace/coverage/default/48.sram_ctrl_stress_all.3749123014 Jun 26 04:39:01 PM PDT 24 Jun 26 06:44:22 PM PDT 24 285786782818 ps
T687 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3769532005 Jun 26 04:38:27 PM PDT 24 Jun 26 04:39:37 PM PDT 24 778507817 ps
T688 /workspace/coverage/default/1.sram_ctrl_mem_walk.1714474944 Jun 26 04:36:33 PM PDT 24 Jun 26 04:39:09 PM PDT 24 15464797028 ps
T689 /workspace/coverage/default/15.sram_ctrl_executable.1671904068 Jun 26 04:37:02 PM PDT 24 Jun 26 04:54:37 PM PDT 24 71654284558 ps
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T691 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.813797165 Jun 26 04:37:04 PM PDT 24 Jun 26 04:38:31 PM PDT 24 1423577834 ps
T692 /workspace/coverage/default/9.sram_ctrl_smoke.1027485772 Jun 26 04:36:51 PM PDT 24 Jun 26 04:37:28 PM PDT 24 2241469555 ps
T693 /workspace/coverage/default/34.sram_ctrl_partial_access.1395658795 Jun 26 04:37:45 PM PDT 24 Jun 26 04:38:09 PM PDT 24 4749924672 ps
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T695 /workspace/coverage/default/48.sram_ctrl_bijection.3276487224 Jun 26 04:38:58 PM PDT 24 Jun 26 05:01:23 PM PDT 24 19472299612 ps
T696 /workspace/coverage/default/33.sram_ctrl_bijection.3314322829 Jun 26 04:37:44 PM PDT 24 Jun 26 05:22:11 PM PDT 24 550117155273 ps
T697 /workspace/coverage/default/6.sram_ctrl_smoke.1717814391 Jun 26 04:36:48 PM PDT 24 Jun 26 04:37:40 PM PDT 24 4270190834 ps
T698 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.118621484 Jun 26 04:37:19 PM PDT 24 Jun 26 04:43:20 PM PDT 24 15783910694 ps
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T700 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2574519568 Jun 26 04:37:58 PM PDT 24 Jun 26 04:39:17 PM PDT 24 1581255012 ps
T701 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3740644333 Jun 26 04:36:39 PM PDT 24 Jun 26 04:39:14 PM PDT 24 2109099514 ps
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T703 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3281904665 Jun 26 04:37:17 PM PDT 24 Jun 26 04:37:57 PM PDT 24 5268448555 ps
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T705 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1359892751 Jun 26 04:36:51 PM PDT 24 Jun 26 04:37:09 PM PDT 24 452239662 ps
T706 /workspace/coverage/default/13.sram_ctrl_executable.3468889618 Jun 26 04:37:03 PM PDT 24 Jun 26 05:06:03 PM PDT 24 88657952427 ps
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T708 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.3538871016 Jun 26 04:37:48 PM PDT 24 Jun 26 04:49:43 PM PDT 24 18031652215 ps
T709 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1295408529 Jun 26 04:37:14 PM PDT 24 Jun 26 04:38:31 PM PDT 24 3122861023 ps
T710 /workspace/coverage/default/18.sram_ctrl_partial_access.2752989001 Jun 26 04:37:11 PM PDT 24 Jun 26 04:37:27 PM PDT 24 1553357535 ps
T711 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.4191476955 Jun 26 04:36:34 PM PDT 24 Jun 26 04:39:27 PM PDT 24 3413163148 ps
T712 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2918306311 Jun 26 04:38:11 PM PDT 24 Jun 26 04:38:29 PM PDT 24 2734923658 ps
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T714 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2320669259 Jun 26 04:38:41 PM PDT 24 Jun 26 04:53:34 PM PDT 24 11427669148 ps
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T718 /workspace/coverage/default/24.sram_ctrl_alert_test.1425512126 Jun 26 04:37:11 PM PDT 24 Jun 26 04:37:16 PM PDT 24 38111784 ps
T719 /workspace/coverage/default/39.sram_ctrl_alert_test.3207531671 Jun 26 04:38:09 PM PDT 24 Jun 26 04:38:11 PM PDT 24 24766081 ps
T720 /workspace/coverage/default/29.sram_ctrl_multiple_keys.872126134 Jun 26 04:37:29 PM PDT 24 Jun 26 04:53:37 PM PDT 24 62231581569 ps
T721 /workspace/coverage/default/15.sram_ctrl_regwen.3430686599 Jun 26 04:36:56 PM PDT 24 Jun 26 04:37:12 PM PDT 24 491384349 ps
T722 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3656396578 Jun 26 04:36:19 PM PDT 24 Jun 26 04:46:54 PM PDT 24 24884548502 ps
T723 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2865797051 Jun 26 04:36:50 PM PDT 24 Jun 26 04:37:07 PM PDT 24 738976168 ps
T724 /workspace/coverage/default/23.sram_ctrl_executable.4216763560 Jun 26 04:37:23 PM PDT 24 Jun 26 04:47:20 PM PDT 24 14393113971 ps
T725 /workspace/coverage/default/22.sram_ctrl_mem_walk.3105731826 Jun 26 04:37:08 PM PDT 24 Jun 26 04:39:57 PM PDT 24 18028020318 ps
T726 /workspace/coverage/default/41.sram_ctrl_bijection.3733222609 Jun 26 04:38:16 PM PDT 24 Jun 26 05:07:49 PM PDT 24 170211039103 ps
T727 /workspace/coverage/default/28.sram_ctrl_alert_test.311496777 Jun 26 04:37:28 PM PDT 24 Jun 26 04:37:31 PM PDT 24 17598181 ps
T728 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.637649019 Jun 26 04:37:39 PM PDT 24 Jun 26 04:55:24 PM PDT 24 63284586188 ps
T729 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2222498380 Jun 26 04:36:17 PM PDT 24 Jun 26 04:37:22 PM PDT 24 1002653558 ps
T730 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.470696377 Jun 26 04:37:09 PM PDT 24 Jun 26 04:42:08 PM PDT 24 4935615869 ps
T34 /workspace/coverage/default/3.sram_ctrl_sec_cm.164878396 Jun 26 04:37:03 PM PDT 24 Jun 26 04:37:09 PM PDT 24 1381745203 ps
T731 /workspace/coverage/default/30.sram_ctrl_stress_all.2181974138 Jun 26 04:37:39 PM PDT 24 Jun 26 06:20:17 PM PDT 24 72917506573 ps
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T733 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.294976964 Jun 26 04:36:51 PM PDT 24 Jun 26 04:45:21 PM PDT 24 199220791882 ps
T734 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.4056030338 Jun 26 04:38:25 PM PDT 24 Jun 26 04:49:42 PM PDT 24 22195946042 ps
T735 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2754626479 Jun 26 04:37:32 PM PDT 24 Jun 26 04:44:05 PM PDT 24 18956827146 ps
T736 /workspace/coverage/default/11.sram_ctrl_smoke.147888453 Jun 26 04:36:55 PM PDT 24 Jun 26 04:37:02 PM PDT 24 370211599 ps
T737 /workspace/coverage/default/14.sram_ctrl_multiple_keys.3529208086 Jun 26 04:37:00 PM PDT 24 Jun 26 04:59:46 PM PDT 24 84793201709 ps
T738 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1645898941 Jun 26 04:36:34 PM PDT 24 Jun 26 04:37:59 PM PDT 24 3311313763 ps
T739 /workspace/coverage/default/25.sram_ctrl_bijection.3460949267 Jun 26 04:37:18 PM PDT 24 Jun 26 05:02:08 PM PDT 24 40834515213 ps
T740 /workspace/coverage/default/42.sram_ctrl_mem_walk.164811536 Jun 26 04:38:24 PM PDT 24 Jun 26 04:41:14 PM PDT 24 6916212886 ps
T741 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3703997384 Jun 26 04:37:49 PM PDT 24 Jun 26 04:38:58 PM PDT 24 12908795799 ps
T742 /workspace/coverage/default/46.sram_ctrl_alert_test.3690115147 Jun 26 04:38:46 PM PDT 24 Jun 26 04:38:48 PM PDT 24 18350210 ps
T743 /workspace/coverage/default/11.sram_ctrl_alert_test.490056838 Jun 26 04:36:59 PM PDT 24 Jun 26 04:37:01 PM PDT 24 12642993 ps
T744 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.621852567 Jun 26 04:37:12 PM PDT 24 Jun 26 04:46:18 PM PDT 24 33718974425 ps
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T746 /workspace/coverage/default/4.sram_ctrl_regwen.3512449828 Jun 26 04:36:41 PM PDT 24 Jun 26 04:49:39 PM PDT 24 11241133559 ps
T747 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3535619709 Jun 26 04:36:50 PM PDT 24 Jun 26 04:37:58 PM PDT 24 3863675045 ps
T748 /workspace/coverage/default/46.sram_ctrl_executable.3170597305 Jun 26 04:38:42 PM PDT 24 Jun 26 04:44:13 PM PDT 24 10596475660 ps
T749 /workspace/coverage/default/4.sram_ctrl_multiple_keys.2570909703 Jun 26 04:36:45 PM PDT 24 Jun 26 05:16:35 PM PDT 24 122485068950 ps
T750 /workspace/coverage/default/25.sram_ctrl_regwen.2273255536 Jun 26 04:37:11 PM PDT 24 Jun 26 04:55:28 PM PDT 24 11148669745 ps
T751 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3434687916 Jun 26 04:38:13 PM PDT 24 Jun 26 04:40:42 PM PDT 24 1750549682 ps
T752 /workspace/coverage/default/6.sram_ctrl_executable.874815473 Jun 26 04:36:49 PM PDT 24 Jun 26 04:46:48 PM PDT 24 15605613771 ps
T753 /workspace/coverage/default/21.sram_ctrl_alert_test.631614673 Jun 26 04:37:13 PM PDT 24 Jun 26 04:37:18 PM PDT 24 22802949 ps
T754 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.2285151045 Jun 26 04:36:44 PM PDT 24 Jun 26 04:39:45 PM PDT 24 5026591072 ps
T755 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.2451204574 Jun 26 04:38:22 PM PDT 24 Jun 26 04:40:42 PM PDT 24 4803001134 ps
T756 /workspace/coverage/default/48.sram_ctrl_regwen.537939740 Jun 26 04:39:00 PM PDT 24 Jun 26 05:00:44 PM PDT 24 87045143220 ps
T757 /workspace/coverage/default/36.sram_ctrl_max_throughput.3925309986 Jun 26 04:37:55 PM PDT 24 Jun 26 04:39:53 PM PDT 24 797959696 ps
T758 /workspace/coverage/default/15.sram_ctrl_stress_all.1638292354 Jun 26 04:37:03 PM PDT 24 Jun 26 05:15:45 PM PDT 24 214225278812 ps
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T760 /workspace/coverage/default/22.sram_ctrl_bijection.960548327 Jun 26 04:37:11 PM PDT 24 Jun 26 05:08:08 PM PDT 24 105206329879 ps
T761 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2345733973 Jun 26 04:36:36 PM PDT 24 Jun 26 04:40:51 PM PDT 24 7621202192 ps
T762 /workspace/coverage/default/49.sram_ctrl_mem_walk.316064117 Jun 26 04:39:02 PM PDT 24 Jun 26 04:44:19 PM PDT 24 5474645034 ps
T763 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.762578216 Jun 26 04:36:17 PM PDT 24 Jun 26 04:37:10 PM PDT 24 5366631385 ps
T764 /workspace/coverage/default/4.sram_ctrl_alert_test.3048970285 Jun 26 04:37:05 PM PDT 24 Jun 26 04:37:14 PM PDT 24 21250694 ps
T765 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.831818007 Jun 26 04:38:02 PM PDT 24 Jun 26 04:38:57 PM PDT 24 761147200 ps
T766 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.3487930765 Jun 26 04:37:14 PM PDT 24 Jun 26 04:40:25 PM PDT 24 21240265030 ps
T767 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.3184393517 Jun 26 04:37:47 PM PDT 24 Jun 26 04:43:31 PM PDT 24 4928611787 ps
T768 /workspace/coverage/default/2.sram_ctrl_executable.1080409349 Jun 26 04:36:31 PM PDT 24 Jun 26 04:38:47 PM PDT 24 18033827793 ps
T769 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2529446884 Jun 26 04:37:02 PM PDT 24 Jun 26 04:37:39 PM PDT 24 1795962928 ps
T770 /workspace/coverage/default/4.sram_ctrl_max_throughput.4221006826 Jun 26 04:36:48 PM PDT 24 Jun 26 04:37:31 PM PDT 24 1184592059 ps
T771 /workspace/coverage/default/47.sram_ctrl_stress_all.1782596851 Jun 26 04:38:51 PM PDT 24 Jun 26 05:47:46 PM PDT 24 150730899441 ps
T772 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.310874981 Jun 26 04:37:06 PM PDT 24 Jun 26 04:43:07 PM PDT 24 11128255478 ps
T773 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.2127623252 Jun 26 04:36:31 PM PDT 24 Jun 26 04:39:15 PM PDT 24 10081971208 ps
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T775 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.245670958 Jun 26 04:37:54 PM PDT 24 Jun 26 04:44:57 PM PDT 24 8034567495 ps
T776 /workspace/coverage/default/3.sram_ctrl_partial_access.4200975477 Jun 26 04:36:33 PM PDT 24 Jun 26 04:39:09 PM PDT 24 3381458205 ps
T777 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3479119769 Jun 26 04:36:55 PM PDT 24 Jun 26 05:02:58 PM PDT 24 27325757857 ps
T778 /workspace/coverage/default/42.sram_ctrl_smoke.3560713175 Jun 26 04:38:16 PM PDT 24 Jun 26 04:38:25 PM PDT 24 770314863 ps
T779 /workspace/coverage/default/16.sram_ctrl_executable.2214039022 Jun 26 04:37:05 PM PDT 24 Jun 26 04:44:03 PM PDT 24 50774912754 ps
T780 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.112648957 Jun 26 04:38:46 PM PDT 24 Jun 26 04:39:49 PM PDT 24 1857077792 ps
T781 /workspace/coverage/default/26.sram_ctrl_alert_test.3613942406 Jun 26 04:37:27 PM PDT 24 Jun 26 04:37:30 PM PDT 24 71746637 ps
T782 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.2045664722 Jun 26 04:37:29 PM PDT 24 Jun 26 04:38:47 PM PDT 24 2754500549 ps
T783 /workspace/coverage/default/35.sram_ctrl_regwen.1961598801 Jun 26 04:37:52 PM PDT 24 Jun 26 04:44:06 PM PDT 24 11292277672 ps
T784 /workspace/coverage/default/23.sram_ctrl_max_throughput.1067471468 Jun 26 04:37:23 PM PDT 24 Jun 26 04:39:18 PM PDT 24 1825958967 ps
T785 /workspace/coverage/default/48.sram_ctrl_alert_test.4220374609 Jun 26 04:39:03 PM PDT 24 Jun 26 04:39:04 PM PDT 24 11181004 ps
T786 /workspace/coverage/default/29.sram_ctrl_partial_access.1515032572 Jun 26 04:37:28 PM PDT 24 Jun 26 04:37:55 PM PDT 24 3593293511 ps
T787 /workspace/coverage/default/3.sram_ctrl_mem_walk.3774258918 Jun 26 04:36:36 PM PDT 24 Jun 26 04:41:57 PM PDT 24 58325410173 ps
T788 /workspace/coverage/default/48.sram_ctrl_partial_access.845782503 Jun 26 04:38:57 PM PDT 24 Jun 26 04:39:04 PM PDT 24 508767493 ps
T789 /workspace/coverage/default/21.sram_ctrl_regwen.259853665 Jun 26 04:37:08 PM PDT 24 Jun 26 04:51:57 PM PDT 24 26221222065 ps
T790 /workspace/coverage/default/12.sram_ctrl_smoke.792797772 Jun 26 04:36:51 PM PDT 24 Jun 26 04:38:59 PM PDT 24 2748945128 ps
T791 /workspace/coverage/default/15.sram_ctrl_mem_walk.1085870689 Jun 26 04:36:49 PM PDT 24 Jun 26 04:39:26 PM PDT 24 11439461065 ps
T792 /workspace/coverage/default/17.sram_ctrl_alert_test.1080842930 Jun 26 04:37:18 PM PDT 24 Jun 26 04:37:25 PM PDT 24 14944549 ps
T793 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1726698040 Jun 26 04:38:11 PM PDT 24 Jun 26 04:39:37 PM PDT 24 1955473503 ps
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