Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16346412	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

155080418

1

T1

3241

T2

1569

T3

3024

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	84312745	1			T1	32342		T2	14873		T3	30177
values[0x0]	41930061	1			T1	10559		T2	4690		T3	9681
values[0x1]	45184024	1			T1	22432		T2	10186		T3	21022

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8323804	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

163103026

1

T1

29695

T2

13742

T3

27772

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	581616	1			T1	287		T2	134		T3	241
valid_sources[0x01]	586933	1			T1	243		T2	113		T3	249
valid_sources[0x02]	552583	1			T1	261		T2	87		T3	241
valid_sources[0x03]	753172	1			T1	257		T2	123		T3	219
valid_sources[0x04]	625650	1			T1	239		T2	118		T3	274
valid_sources[0x05]	574588	1			T1	250		T2	118		T3	254
valid_sources[0x06]	817443	1			T1	268		T2	124		T3	212
valid_sources[0x07]	547228	1			T1	249		T2	119		T3	279
valid_sources[0x08]	549919	1			T1	244		T2	142		T3	241
valid_sources[0x09]	555068	1			T1	245		T2	129		T3	258
valid_sources[0x0a]	553984	1			T1	278		T2	115		T3	255
valid_sources[0x0b]	597469	1			T1	256		T2	105		T3	226
valid_sources[0x0c]	572752	1			T1	263		T2	100		T3	253
valid_sources[0x0d]	3126644	1			T1	276		T2	114		T3	232
valid_sources[0x0e]	593318	1			T1	232		T2	120		T3	223
valid_sources[0x0f]	572229	1			T1	259		T2	106		T3	211
valid_sources[0x10]	583740	1			T1	255		T2	116		T3	217
valid_sources[0x11]	602294	1			T1	275		T2	134		T3	235
valid_sources[0x12]	549251	1			T1	256		T2	98		T3	239
valid_sources[0x13]	667964	1			T1	227		T2	122		T3	265
valid_sources[0x14]	603700	1			T1	285		T2	106		T3	262
valid_sources[0x15]	569948	1			T1	237		T2	132		T3	214
valid_sources[0x16]	560265	1			T1	265		T2	109		T3	241
valid_sources[0x17]	561724	1			T1	285		T2	123		T3	219
valid_sources[0x18]	545682	1			T1	261		T2	100		T3	237
valid_sources[0x19]	565556	1			T1	260		T2	123		T3	235
valid_sources[0x1a]	589620	1			T1	260		T2	129		T3	218
valid_sources[0x1b]	561031	1			T1	251		T2	120		T3	241
valid_sources[0x1c]	547859	1			T1	230		T2	100		T3	228
valid_sources[0x1d]	1747576	1			T1	254		T2	124		T3	256
valid_sources[0x1e]	551930	1			T1	239		T2	110		T3	235
valid_sources[0x1f]	563599	1			T1	249		T2	113		T3	246
valid_sources[0x20]	564630	1			T1	276		T2	131		T3	253
valid_sources[0x21]	545901	1			T1	235		T2	120		T3	241
valid_sources[0x22]	554450	1			T1	262		T2	109		T3	229
valid_sources[0x23]	557976	1			T1	280		T2	122		T3	252
valid_sources[0x24]	570373	1			T1	232		T2	122		T3	218
valid_sources[0x25]	570198	1			T1	235		T2	161		T3	235
valid_sources[0x26]	560163	1			T1	217		T2	120		T3	231
valid_sources[0x27]	1536517	1			T1	233		T2	119		T3	242
valid_sources[0x28]	571175	1			T1	261		T2	135		T3	245
valid_sources[0x29]	577353	1			T1	296		T2	115		T3	228
valid_sources[0x2a]	550064	1			T1	278		T2	113		T3	252
valid_sources[0x2b]	591347	1			T1	220		T2	117		T3	231
valid_sources[0x2c]	589665	1			T1	272		T2	113		T3	224
valid_sources[0x2d]	573370	1			T1	244		T2	104		T3	230
valid_sources[0x2e]	552246	1			T1	287		T2	109		T3	237
valid_sources[0x2f]	578095	1			T1	272		T2	128		T3	241
valid_sources[0x30]	589131	1			T1	234		T2	110		T3	240
valid_sources[0x31]	554909	1			T1	261		T2	139		T3	220
valid_sources[0x32]	547115	1			T1	227		T2	114		T3	248
valid_sources[0x33]	561579	1			T1	260		T2	115		T3	249
valid_sources[0x34]	553069	1			T1	295		T2	127		T3	242
valid_sources[0x35]	545697	1			T1	257		T2	121		T3	237
valid_sources[0x36]	585367	1			T1	285		T2	135		T3	244
valid_sources[0x37]	573278	1			T1	266		T2	119		T3	262
valid_sources[0x38]	1149528	1			T1	258		T2	122		T3	212
valid_sources[0x39]	592301	1			T1	239		T2	115		T3	256
valid_sources[0x3a]	598881	1			T1	243		T2	102		T3	220
valid_sources[0x3b]	556912	1			T1	278		T2	134		T3	235
valid_sources[0x3c]	576418	1			T1	250		T2	122		T3	246
valid_sources[0x3d]	544281	1			T1	242		T2	96		T3	252
valid_sources[0x3e]	554054	1			T1	254		T2	107		T3	260
valid_sources[0x3f]	550253	1			T1	236		T2	110		T3	237
valid_sources[0x40]	554562	1			T1	239		T2	99		T3	250
valid_sources[0x41]	562482	1			T1	232		T2	114		T3	243
valid_sources[0x42]	578576	1			T1	241		T2	126		T3	227
valid_sources[0x43]	1088214	1			T1	257		T2	124		T3	210
valid_sources[0x44]	557493	1			T1	238		T2	115		T3	233
valid_sources[0x45]	562669	1			T1	284		T2	120		T3	221
valid_sources[0x46]	596929	1			T1	235		T2	132		T3	221
valid_sources[0x47]	551488	1			T1	269		T2	126		T3	261
valid_sources[0x48]	547508	1			T1	278		T2	115		T3	204
valid_sources[0x49]	578352	1			T1	296		T2	105		T3	214
valid_sources[0x4a]	693686	1			T1	235		T2	119		T3	229
valid_sources[0x4b]	565487	1			T1	280		T2	113		T3	222
valid_sources[0x4c]	578166	1			T1	250		T2	118		T3	206
valid_sources[0x4d]	554242	1			T1	255		T2	110		T3	245
valid_sources[0x4e]	576823	1			T1	277		T2	132		T3	237
valid_sources[0x4f]	551326	1			T1	241		T2	113		T3	221
valid_sources[0x50]	623310	1			T1	251		T2	120		T3	242
valid_sources[0x51]	561824	1			T1	212		T2	127		T3	248
valid_sources[0x52]	559188	1			T1	269		T2	93		T3	256
valid_sources[0x53]	598367	1			T1	275		T2	138		T3	224
valid_sources[0x54]	627957	1			T1	262		T2	95		T3	222
valid_sources[0x55]	622089	1			T1	264		T2	124		T3	232
valid_sources[0x56]	572743	1			T1	272		T2	127		T3	231
valid_sources[0x57]	625323	1			T1	248		T2	146		T3	237
valid_sources[0x58]	545441	1			T1	247		T2	111		T3	235
valid_sources[0x59]	633933	1			T1	239		T2	103		T3	220
valid_sources[0x5a]	579320	1			T1	249		T2	113		T3	238
valid_sources[0x5b]	571183	1			T1	259		T2	112		T3	218
valid_sources[0x5c]	568241	1			T1	253		T2	101		T3	242
valid_sources[0x5d]	549581	1			T1	272		T2	125		T3	234
valid_sources[0x5e]	564549	1			T1	281		T2	106		T3	235
valid_sources[0x5f]	920477	1			T1	258		T2	100		T3	222
valid_sources[0x60]	591921	1			T1	243		T2	119		T3	214
valid_sources[0x61]	2131017	1			T1	263		T2	125		T3	217
valid_sources[0x62]	590048	1			T1	264		T2	118		T3	202
valid_sources[0x63]	562476	1			T1	284		T2	126		T3	244
valid_sources[0x64]	614973	1			T1	231		T2	128		T3	256
valid_sources[0x65]	548562	1			T1	261		T2	130		T3	224
valid_sources[0x66]	557264	1			T1	274		T2	106		T3	218
valid_sources[0x67]	568306	1			T1	228		T2	120		T3	224
valid_sources[0x68]	608537	1			T1	279		T2	112		T3	272
valid_sources[0x69]	589326	1			T1	264		T2	115		T3	252
valid_sources[0x6a]	593634	1			T1	241		T2	103		T3	246
valid_sources[0x6b]	626857	1			T1	274		T2	115		T3	232
valid_sources[0x6c]	547578	1			T1	260		T2	113		T3	244
valid_sources[0x6d]	568379	1			T1	241		T2	101		T3	244
valid_sources[0x6e]	607208	1			T1	252		T2	134		T3	261
valid_sources[0x6f]	555534	1			T1	243		T2	116		T3	238
valid_sources[0x70]	791269	1			T1	238		T2	130		T3	235
valid_sources[0x71]	662920	1			T1	253		T2	119		T3	249
valid_sources[0x72]	548805	1			T1	265		T2	110		T3	219
valid_sources[0x73]	565295	1			T1	239		T2	121		T3	251
valid_sources[0x74]	558992	1			T1	232		T2	109		T3	234
valid_sources[0x75]	621701	1			T1	285		T2	122		T3	257
valid_sources[0x76]	605453	1			T1	257		T2	79		T3	260
valid_sources[0x77]	563675	1			T1	276		T2	118		T3	240
valid_sources[0x78]	561970	1			T1	233		T2	126		T3	256
valid_sources[0x79]	573779	1			T1	233		T2	142		T3	247
valid_sources[0x7a]	546821	1			T1	287		T2	119		T3	246
valid_sources[0x7b]	562998	1			T1	233		T2	133		T3	207
valid_sources[0x7c]	548580	1			T1	263		T2	143		T3	249
valid_sources[0x7d]	555920	1			T1	266		T2	114		T3	238
valid_sources[0x7e]	626805	1			T1	241		T2	129		T3	227
valid_sources[0x7f]	558782	1			T1	256		T2	113		T3	244
valid_sources[0x80]	551153	1			T1	269		T2	117		T3	239

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

76093421

1

T1

274

T2

142

T3

259

values[0x0]

all_enables

biggest_size

39494282

1

T1

1471

T2

686

T3

1354

values[0x1]

all_enables

biggest_size

39492715

1

T1

1496

T2

741

T3

1411

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48027	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

175332

1

T1

2

T3

1

T4

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	60374	1			T13	2324		T6	47		T23	1741
values[0x0]	78262	1			T1	2		T2	1		T3	2
values[0x1]	84723	1			T1	1		T2	2		T3	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36608	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

186751

1

T1

2

T2

2

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	916	1			T13	37		T6	2		T23	35
valid_sources[0x01]	962	1			T10	6		T13	35		T6	1
valid_sources[0x02]	750	1			T13	30		T23	38		T21	22
valid_sources[0x03]	892	1			T10	5		T13	36		T23	23
valid_sources[0x04]	1123	1			T13	27		T6	2		T23	22
valid_sources[0x05]	749	1			T13	34		T23	24		T8	3
valid_sources[0x06]	709	1			T10	2		T13	31		T6	3
valid_sources[0x07]	1445	1			T10	2		T13	38		T23	33
valid_sources[0x08]	831	1			T10	4		T13	39		T23	35
valid_sources[0x09]	1013	1			T10	4		T13	33		T23	27
valid_sources[0x0a]	740	1			T13	36		T23	24		T21	8
valid_sources[0x0b]	745	1			T10	1		T13	35		T23	13
valid_sources[0x0c]	1142	1			T10	1		T13	34		T6	1
valid_sources[0x0d]	883	1			T10	1		T13	35		T23	19
valid_sources[0x0e]	569	1			T13	33		T20	5		T23	30
valid_sources[0x0f]	697	1			T10	2		T13	27		T23	26
valid_sources[0x10]	902	1			T13	41		T24	1		T23	23
valid_sources[0x11]	722	1			T13	36		T23	22		T21	21
valid_sources[0x12]	805	1			T3	3		T10	2		T13	26
valid_sources[0x13]	744	1			T4	1		T10	1		T13	42
valid_sources[0x14]	715	1			T13	35		T23	24		T8	2
valid_sources[0x15]	885	1			T10	1		T13	36		T23	39
valid_sources[0x16]	944	1			T10	2		T13	24		T23	15
valid_sources[0x17]	718	1			T13	32		T23	28		T7	1
valid_sources[0x18]	996	1			T10	1		T13	38		T23	31
valid_sources[0x19]	1043	1			T10	2		T13	30		T24	1
valid_sources[0x1a]	1344	1			T10	2		T13	38		T24	3
valid_sources[0x1b]	779	1			T10	2		T13	38		T23	34
valid_sources[0x1c]	774	1			T10	2		T13	30		T6	3
valid_sources[0x1d]	678	1			T10	1		T13	38		T23	25
valid_sources[0x1e]	924	1			T10	2		T13	24		T23	29
valid_sources[0x1f]	604	1			T10	1		T13	36		T6	1
valid_sources[0x20]	819	1			T10	1		T13	24		T6	2
valid_sources[0x21]	1117	1			T10	3		T13	34		T23	31
valid_sources[0x22]	1145	1			T13	40		T23	22		T21	32
valid_sources[0x23]	781	1			T13	31		T23	34		T7	1
valid_sources[0x24]	805	1			T13	35		T23	31		T7	1
valid_sources[0x25]	927	1			T13	38		T6	3		T23	23
valid_sources[0x26]	1472	1			T13	28		T23	26		T21	20
valid_sources[0x27]	1042	1			T13	39		T23	34		T21	16
valid_sources[0x28]	1060	1			T13	44		T6	3		T23	36
valid_sources[0x29]	866	1			T10	4		T13	31		T23	44
valid_sources[0x2a]	777	1			T10	2		T13	25		T23	27
valid_sources[0x2b]	690	1			T13	36		T23	33		T21	30
valid_sources[0x2c]	1274	1			T10	2		T13	29		T6	2
valid_sources[0x2d]	1039	1			T10	1		T13	32		T23	33
valid_sources[0x2e]	761	1			T13	38		T23	22		T7	1
valid_sources[0x2f]	629	1			T10	1		T13	39		T23	34
valid_sources[0x30]	837	1			T10	1		T13	37		T23	24
valid_sources[0x31]	1137	1			T13	42		T23	24		T7	1
valid_sources[0x32]	750	1			T10	4		T13	30		T23	22
valid_sources[0x33]	1092	1			T10	1		T13	36		T23	26
valid_sources[0x34]	813	1			T13	34		T23	18		T7	1
valid_sources[0x35]	774	1			T13	36		T23	23		T8	2
valid_sources[0x36]	738	1			T1	2		T10	1		T13	33
valid_sources[0x37]	764	1			T13	32		T23	33		T62	51
valid_sources[0x38]	844	1			T13	38		T23	28		T7	1
valid_sources[0x39]	753	1			T10	1		T13	33		T6	2
valid_sources[0x3a]	729	1			T13	46		T23	31		T8	1
valid_sources[0x3b]	843	1			T13	31		T23	25		T21	26
valid_sources[0x3c]	735	1			T13	41		T24	1		T23	29
valid_sources[0x3d]	997	1			T13	36		T23	39		T8	2
valid_sources[0x3e]	1162	1			T13	37		T23	24		T8	2
valid_sources[0x3f]	618	1			T10	3		T13	43		T6	1
valid_sources[0x40]	919	1			T13	28		T23	17		T7	1
valid_sources[0x41]	721	1			T13	32		T6	4		T24	2
valid_sources[0x42]	936	1			T10	2		T13	34		T23	33
valid_sources[0x43]	1126	1			T10	1		T13	35		T23	31
valid_sources[0x44]	895	1			T10	2		T13	37		T20	6
valid_sources[0x45]	683	1			T13	26		T23	33		T15	1
valid_sources[0x46]	1143	1			T10	1		T13	31		T23	27
valid_sources[0x47]	826	1			T3	1		T10	1		T12	1
valid_sources[0x48]	682	1			T12	1		T13	25		T23	24
valid_sources[0x49]	873	1			T10	2		T13	44		T23	21
valid_sources[0x4a]	876	1			T10	2		T13	27		T23	25
valid_sources[0x4b]	1172	1			T10	2		T13	40		T23	27
valid_sources[0x4c]	906	1			T13	27		T23	24		T21	14
valid_sources[0x4d]	755	1			T10	1		T13	31		T6	1
valid_sources[0x4e]	1251	1			T2	3		T13	24		T23	17
valid_sources[0x4f]	1058	1			T10	1		T13	40		T23	28
valid_sources[0x50]	870	1			T10	5		T13	35		T23	29
valid_sources[0x51]	881	1			T10	2		T13	30		T23	19
valid_sources[0x52]	705	1			T13	29		T23	40		T21	25
valid_sources[0x53]	933	1			T13	22		T23	27		T142	1
valid_sources[0x54]	925	1			T10	3		T13	30		T23	21
valid_sources[0x55]	751	1			T13	53		T6	1		T23	30
valid_sources[0x56]	1176	1			T10	1		T13	40		T23	20
valid_sources[0x57]	873	1			T13	50		T23	31		T8	7
valid_sources[0x58]	806	1			T10	4		T5	1		T13	35
valid_sources[0x59]	752	1			T13	41		T23	36		T21	21
valid_sources[0x5a]	842	1			T10	3		T13	30		T23	19
valid_sources[0x5b]	667	1			T10	1		T13	40		T6	8
valid_sources[0x5c]	645	1			T13	33		T23	25		T38	46
valid_sources[0x5d]	925	1			T10	3		T13	40		T23	27
valid_sources[0x5e]	728	1			T10	2		T13	32		T23	22
valid_sources[0x5f]	626	1			T10	2		T13	36		T23	26
valid_sources[0x60]	715	1			T13	28		T23	18		T21	23
valid_sources[0x61]	846	1			T10	1		T12	1		T13	30
valid_sources[0x62]	851	1			T10	2		T13	40		T6	1
valid_sources[0x63]	781	1			T10	3		T13	43		T23	29
valid_sources[0x64]	1399	1			T10	1		T13	33		T23	33
valid_sources[0x65]	611	1			T13	24		T23	28		T7	1
valid_sources[0x66]	1069	1			T13	29		T6	3		T23	45
valid_sources[0x67]	888	1			T12	1		T13	28		T23	22
valid_sources[0x68]	902	1			T4	1		T10	2		T13	31
valid_sources[0x69]	656	1			T10	3		T13	25		T23	39
valid_sources[0x6a]	963	1			T10	1		T13	43		T23	21
valid_sources[0x6b]	699	1			T13	40		T23	21		T21	16
valid_sources[0x6c]	982	1			T13	40		T23	20		T38	10
valid_sources[0x6d]	1073	1			T13	26		T23	30		T21	22
valid_sources[0x6e]	931	1			T10	2		T5	3		T12	1
valid_sources[0x6f]	828	1			T10	1		T13	24		T6	2
valid_sources[0x70]	776	1			T13	38		T23	25		T21	28
valid_sources[0x71]	734	1			T11	2		T12	1		T13	30
valid_sources[0x72]	916	1			T10	2		T13	37		T23	23
valid_sources[0x73]	744	1			T13	39		T23	17		T8	2
valid_sources[0x74]	722	1			T10	1		T13	46		T23	30
valid_sources[0x75]	906	1			T13	37		T23	19		T8	1
valid_sources[0x76]	568	1			T13	37		T6	1		T23	33
valid_sources[0x77]	658	1			T13	41		T23	20		T7	1
valid_sources[0x78]	1024	1			T13	30		T23	26		T21	20
valid_sources[0x79]	1020	1			T10	4		T13	32		T23	26
valid_sources[0x7a]	1106	1			T13	52		T23	33		T21	18
valid_sources[0x7b]	1101	1			T10	1		T13	33		T23	27
valid_sources[0x7c]	776	1			T10	3		T13	35		T23	33
valid_sources[0x7d]	722	1			T13	38		T23	31		T7	2
valid_sources[0x7e]	708	1			T10	2		T13	39		T23	44
valid_sources[0x7f]	813	1			T13	51		T23	34		T8	1
valid_sources[0x80]	735	1			T10	4		T13	39		T23	21

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

46461

1

T13

2154

T6

16

T23

1600

values[0x0]

all_enables

biggest_size

65856

1

T1

1

T10

46

T5

2

values[0x1]

all_enables

biggest_size

63015

1

T1

1

T3

1

T4

1