Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.97	99.19	94.27	99.72	100.00	96.03	99.12	97.44

Total tests in report: 1037

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
71.79	71.79	92.23	92.23	70.50	70.50	84.71	84.71	33.33	33.33	82.70	82.70	93.57	93.57	45.52	45.52	/workspace/coverage/default/13.sram_ctrl_lc_escalation.2493970312
84.20	12.41	95.91	3.68	75.47	4.98	85.33	0.62	80.95	47.62	88.15	5.45	95.76	2.19	67.82	22.30	/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3855839007
89.84	5.64	98.28	2.37	84.36	8.89	92.39	7.06	95.24	14.29	92.18	4.03	96.20	0.44	70.20	2.38	/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3232330244
92.04	2.20	98.53	0.25	87.91	3.55	95.59	3.20	95.24	0.00	94.55	2.37	96.20	0.00	76.23	6.03	/workspace/coverage/default/46.sram_ctrl_regwen.1212283550
93.23	1.19	98.86	0.33	89.93	2.01	96.87	1.27	95.24	0.00	95.97	1.42	96.78	0.58	78.98	2.74	/workspace/coverage/default/3.sram_ctrl_sec_cm.1977792899
94.08	0.85	98.86	0.00	89.93	0.00	96.87	0.00	100.00	4.76	95.97	0.00	97.81	1.02	79.16	0.18	/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1865582952
94.85	0.76	98.86	0.00	90.52	0.59	96.87	0.00	100.00	0.00	95.97	0.00	97.81	0.00	83.91	4.75	/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2125261663
95.61	0.76	98.86	0.00	90.52	0.00	98.52	1.65	100.00	0.00	95.97	0.00	97.81	0.00	87.57	3.66	/workspace/coverage/default/21.sram_ctrl_mem_walk.1970464496
96.11	0.51	98.86	0.00	90.52	0.00	98.59	0.07	100.00	0.00	95.97	0.00	97.81	0.00	91.04	3.47	/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2574512358
96.50	0.39	98.86	0.00	90.52	0.00	98.59	0.00	100.00	0.00	95.97	0.00	97.81	0.00	93.78	2.74	/workspace/coverage/default/29.sram_ctrl_stress_all.2879509934
96.70	0.20	99.10	0.25	90.52	0.00	98.59	0.00	100.00	0.00	96.21	0.24	97.81	0.00	94.70	0.91	/workspace/coverage/default/11.sram_ctrl_stress_all.3587679933
96.88	0.18	99.10	0.00	90.52	0.00	98.66	0.07	100.00	0.00	96.21	0.00	98.98	1.17	94.70	0.00	/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2627378978
97.04	0.16	99.10	0.00	90.52	0.00	98.66	0.00	100.00	0.00	96.21	0.00	98.98	0.00	95.80	1.10	/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.367808821
97.17	0.13	99.18	0.08	90.52	0.00	99.48	0.83	100.00	0.00	96.21	0.00	98.98	0.00	95.80	0.00	/workspace/coverage/default/0.sram_ctrl_ram_cfg.330988329
97.27	0.10	99.18	0.00	90.52	0.00	99.48	0.00	100.00	0.00	96.21	0.00	98.98	0.00	96.53	0.73	/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3770176839
97.35	0.08	99.18	0.00	90.52	0.00	99.48	0.00	100.00	0.00	96.21	0.00	98.98	0.00	97.07	0.55	/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3811960400
97.41	0.06	99.18	0.00	90.64	0.12	99.62	0.14	100.00	0.00	96.21	0.00	98.98	0.00	97.26	0.18	/workspace/coverage/default/26.sram_ctrl_stress_all.1405430859
97.47	0.06	99.18	0.00	91.00	0.36	99.69	0.07	100.00	0.00	96.21	0.00	98.98	0.00	97.26	0.00	/workspace/coverage/default/0.sram_ctrl_alert_test.3912408079
97.50	0.03	99.18	0.00	91.00	0.00	99.72	0.03	100.00	0.00	96.21	0.00	98.98	0.00	97.44	0.18	/workspace/coverage/default/7.sram_ctrl_access_during_key_req.208550641
97.52	0.02	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.15	97.44	0.00	/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2108886859

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.21385245
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2549791736
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1290126222
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2276229388
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.78974413
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2245012446
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4010251636
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2970479735
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1312487863
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2317231309
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3732509118
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2864947419
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3474105917
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4135425194
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3686726828
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.549669965
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1631311814
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1936877781
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2289523808
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2895398373
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.4028166897
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3032858044
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1581944281
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1447355635
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3166947677
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3699284156
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2396116022
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4016137862
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1585553208
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2819067887
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3776346967
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.554217405
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2800035907
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2271412374
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3816204084
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3126494464
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3725489079
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.137985151
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1696565754
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3776409595
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4279989282
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.16987372
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.967692526
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3431570188
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2936826754
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2511367106
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.759048531
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2153566582
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1620880518
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.919132448
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3771603344
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.563288670
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1582676008
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.657559641
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1236602813
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.604115870
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1959481320
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.933910998
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3972759364
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.236587965
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1873404533
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2091967756
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.898806321
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1941681732
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3366726778
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3795518228
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3292110850
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.312700120
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.708605410
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3566429420
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2626098425
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2275915149
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2232223449
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.549781066
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3522896314
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1051987449
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4293280896
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2801074181
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1338671129
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.139291499
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3307082594
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2586577228
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3970665403
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1677264592
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2376652974
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2361696605
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2717626477
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.815944261
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3316967973
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.41504154
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.963834823
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1353100981
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1933946961
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3809774612
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1063284030
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.252656576
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.4286368932
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2403301769
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2778456758
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1441267701
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3031444105
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3564495297
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3794850870
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.278527322
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3263957361
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1624329877
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2004731852
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.464089175
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.4071082436
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.4185180172
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.983240651
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3588415271
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.341139803
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.917289202
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1375325121
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.153529936
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2082649061
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1891974279
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3542244037
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1828590396
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1188425129
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3247674865
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3906931146
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2754348210
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2842632892
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.396849284
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1361206167
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.599609644
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3135150191
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2378904212
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2525189977
/workspace/coverage/default/0.sram_ctrl_bijection.4174347963
/workspace/coverage/default/0.sram_ctrl_executable.1363006130
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2685064495
/workspace/coverage/default/0.sram_ctrl_max_throughput.2865511331
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.917403771
/workspace/coverage/default/0.sram_ctrl_mem_walk.672923627
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1430333116
/workspace/coverage/default/0.sram_ctrl_partial_access.4219034670
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2023092774
/workspace/coverage/default/0.sram_ctrl_regwen.1472348985
/workspace/coverage/default/0.sram_ctrl_sec_cm.1031831609
/workspace/coverage/default/0.sram_ctrl_smoke.2784252865
/workspace/coverage/default/0.sram_ctrl_stress_all.4261014022
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2682306642
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.832614437
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4271968375
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2199381619
/workspace/coverage/default/1.sram_ctrl_alert_test.4284260084
/workspace/coverage/default/1.sram_ctrl_bijection.2885480901
/workspace/coverage/default/1.sram_ctrl_executable.320003758
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3688223484
/workspace/coverage/default/1.sram_ctrl_max_throughput.1227233674
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1162002003
/workspace/coverage/default/1.sram_ctrl_mem_walk.823940964
/workspace/coverage/default/1.sram_ctrl_multiple_keys.483199817
/workspace/coverage/default/1.sram_ctrl_partial_access.1298403019
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2175537145
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3199149149
/workspace/coverage/default/1.sram_ctrl_regwen.1302209228
/workspace/coverage/default/1.sram_ctrl_sec_cm.2643546324
/workspace/coverage/default/1.sram_ctrl_smoke.4257379390
/workspace/coverage/default/1.sram_ctrl_stress_all.430333933
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2928104397
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.412519053
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3983366776
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2284586693
/workspace/coverage/default/10.sram_ctrl_alert_test.1477087647
/workspace/coverage/default/10.sram_ctrl_bijection.2755455310
/workspace/coverage/default/10.sram_ctrl_executable.1476039123
/workspace/coverage/default/10.sram_ctrl_lc_escalation.935801450
/workspace/coverage/default/10.sram_ctrl_max_throughput.3136072527
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.4140215419
/workspace/coverage/default/10.sram_ctrl_mem_walk.761370856
/workspace/coverage/default/10.sram_ctrl_multiple_keys.64076495
/workspace/coverage/default/10.sram_ctrl_partial_access.3668424402
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2605900493
/workspace/coverage/default/10.sram_ctrl_regwen.2304721254
/workspace/coverage/default/10.sram_ctrl_smoke.2131970512
/workspace/coverage/default/10.sram_ctrl_stress_all.1199160600
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2351061465
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2704654483
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1881099781
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2956049617
/workspace/coverage/default/11.sram_ctrl_alert_test.244854729
/workspace/coverage/default/11.sram_ctrl_bijection.1491439469
/workspace/coverage/default/11.sram_ctrl_executable.620878938
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2074297455
/workspace/coverage/default/11.sram_ctrl_max_throughput.3672760096
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3465332405
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/workspace/coverage/default/41.sram_ctrl_stress_pipeline.4203978227
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1090524875
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.1226319629
/workspace/coverage/default/42.sram_ctrl_alert_test.599196752
/workspace/coverage/default/42.sram_ctrl_bijection.693704578
/workspace/coverage/default/42.sram_ctrl_executable.1845474412
/workspace/coverage/default/42.sram_ctrl_lc_escalation.353385605
/workspace/coverage/default/42.sram_ctrl_max_throughput.3482458031
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3511803501
/workspace/coverage/default/42.sram_ctrl_mem_walk.3221622867
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2574088338
/workspace/coverage/default/42.sram_ctrl_partial_access.1753456111
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1603048156
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2095556729
/workspace/coverage/default/42.sram_ctrl_regwen.2991118070
/workspace/coverage/default/42.sram_ctrl_smoke.1638603133
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1230844349
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2513092009
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1924995980
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3185029194
/workspace/coverage/default/43.sram_ctrl_alert_test.1993356709
/workspace/coverage/default/43.sram_ctrl_bijection.3896852028
/workspace/coverage/default/43.sram_ctrl_executable.2402647660
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2993970571
/workspace/coverage/default/43.sram_ctrl_max_throughput.2736180079
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1692204532
/workspace/coverage/default/43.sram_ctrl_mem_walk.2852989000
/workspace/coverage/default/43.sram_ctrl_multiple_keys.253000306
/workspace/coverage/default/43.sram_ctrl_partial_access.4291386199
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.4211523876
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2453264514
/workspace/coverage/default/43.sram_ctrl_regwen.4168324382
/workspace/coverage/default/43.sram_ctrl_smoke.4091207918
/workspace/coverage/default/43.sram_ctrl_stress_all.3660051728
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3736231615
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.636453673
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3614360451
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2672633010
/workspace/coverage/default/44.sram_ctrl_alert_test.3331944297
/workspace/coverage/default/44.sram_ctrl_bijection.56544190
/workspace/coverage/default/44.sram_ctrl_executable.1098666295
/workspace/coverage/default/44.sram_ctrl_lc_escalation.4187852201
/workspace/coverage/default/44.sram_ctrl_max_throughput.1831347769
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4179399772
/workspace/coverage/default/44.sram_ctrl_mem_walk.3957446240
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2804884079
/workspace/coverage/default/44.sram_ctrl_partial_access.1415307152
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2739767505
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1840793754
/workspace/coverage/default/44.sram_ctrl_regwen.170171831
/workspace/coverage/default/44.sram_ctrl_smoke.3999124762
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2074387343
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2103630278
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1186240130
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2485885822
/workspace/coverage/default/45.sram_ctrl_alert_test.432456534
/workspace/coverage/default/45.sram_ctrl_bijection.3218359428
/workspace/coverage/default/45.sram_ctrl_executable.2088308320
/workspace/coverage/default/45.sram_ctrl_lc_escalation.227501902
/workspace/coverage/default/45.sram_ctrl_max_throughput.4073651837
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3542064482
/workspace/coverage/default/45.sram_ctrl_mem_walk.720083207
/workspace/coverage/default/45.sram_ctrl_multiple_keys.859596159
/workspace/coverage/default/45.sram_ctrl_partial_access.2279255004
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.173944340
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1081643399
/workspace/coverage/default/45.sram_ctrl_regwen.2758176402
/workspace/coverage/default/45.sram_ctrl_smoke.2140484564
/workspace/coverage/default/45.sram_ctrl_stress_all.3104840318
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1534985253
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3472152526
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4138807951
/workspace/coverage/default/46.sram_ctrl_alert_test.2923924875
/workspace/coverage/default/46.sram_ctrl_bijection.2681433374
/workspace/coverage/default/46.sram_ctrl_executable.1108977022
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1633490536
/workspace/coverage/default/46.sram_ctrl_max_throughput.3613339203
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3882273978
/workspace/coverage/default/46.sram_ctrl_mem_walk.2681365986
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3476836208
/workspace/coverage/default/46.sram_ctrl_partial_access.3906318451
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1427868801
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3335071169
/workspace/coverage/default/46.sram_ctrl_smoke.3112741194
/workspace/coverage/default/46.sram_ctrl_stress_all.246403164
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.957972220
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.991705731
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3286128206
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2045522534
/workspace/coverage/default/47.sram_ctrl_alert_test.3408521399
/workspace/coverage/default/47.sram_ctrl_bijection.1504116642
/workspace/coverage/default/47.sram_ctrl_executable.3643796635
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1052924033
/workspace/coverage/default/47.sram_ctrl_max_throughput.2592176769
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2919648699
/workspace/coverage/default/47.sram_ctrl_mem_walk.4097048368
/workspace/coverage/default/47.sram_ctrl_multiple_keys.551040586
/workspace/coverage/default/47.sram_ctrl_partial_access.698910521
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2171597200
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3361601932
/workspace/coverage/default/47.sram_ctrl_regwen.594125341
/workspace/coverage/default/47.sram_ctrl_smoke.3283542168
/workspace/coverage/default/47.sram_ctrl_stress_all.3464578207
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1365439662
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2382384601
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3045856056
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.61632685
/workspace/coverage/default/48.sram_ctrl_alert_test.1698317666
/workspace/coverage/default/48.sram_ctrl_bijection.3057392581
/workspace/coverage/default/48.sram_ctrl_executable.826746440
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2859313712
/workspace/coverage/default/48.sram_ctrl_max_throughput.250336573
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.656641538
/workspace/coverage/default/48.sram_ctrl_mem_walk.2412635182
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1257749251
/workspace/coverage/default/48.sram_ctrl_partial_access.2769329087
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1484125351
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1969637745
/workspace/coverage/default/48.sram_ctrl_regwen.386036276
/workspace/coverage/default/48.sram_ctrl_smoke.3611843951
/workspace/coverage/default/48.sram_ctrl_stress_all.537299652
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.287456561
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1699654290
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2568482375
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1242758787
/workspace/coverage/default/49.sram_ctrl_alert_test.616986344
/workspace/coverage/default/49.sram_ctrl_bijection.2477766621
/workspace/coverage/default/49.sram_ctrl_executable.2479228119
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4043776092
/workspace/coverage/default/49.sram_ctrl_max_throughput.2428366259
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4022749485
/workspace/coverage/default/49.sram_ctrl_mem_walk.1556965149
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3251867400
/workspace/coverage/default/49.sram_ctrl_partial_access.3323944332
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1914080873
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1531852571
/workspace/coverage/default/49.sram_ctrl_regwen.1770433243
/workspace/coverage/default/49.sram_ctrl_smoke.2502068831
/workspace/coverage/default/49.sram_ctrl_stress_all.2457226734
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3873842515
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.500205375
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.673886101
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.356431998
/workspace/coverage/default/5.sram_ctrl_alert_test.612228995
/workspace/coverage/default/5.sram_ctrl_bijection.3191522680
/workspace/coverage/default/5.sram_ctrl_executable.3841994798
/workspace/coverage/default/5.sram_ctrl_lc_escalation.263042575
/workspace/coverage/default/5.sram_ctrl_max_throughput.2499055634
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.996657481
/workspace/coverage/default/5.sram_ctrl_mem_walk.525802028
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2304382492
/workspace/coverage/default/5.sram_ctrl_partial_access.4118468297
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2771280850
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2660486371
/workspace/coverage/default/5.sram_ctrl_regwen.3381636384
/workspace/coverage/default/5.sram_ctrl_smoke.1105033126
/workspace/coverage/default/5.sram_ctrl_stress_all.581991713
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2135948296
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1446820291
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2451169418
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3555084883
/workspace/coverage/default/6.sram_ctrl_alert_test.4235940702
/workspace/coverage/default/6.sram_ctrl_bijection.1160255183
/workspace/coverage/default/6.sram_ctrl_executable.1670257778
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1261271479
/workspace/coverage/default/6.sram_ctrl_max_throughput.2744679726
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2340740365
/workspace/coverage/default/6.sram_ctrl_mem_walk.3174848976
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1728823679
/workspace/coverage/default/6.sram_ctrl_partial_access.2463551856
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2908654105
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4253708501
/workspace/coverage/default/6.sram_ctrl_regwen.2222362359
/workspace/coverage/default/6.sram_ctrl_smoke.2182008708
/workspace/coverage/default/6.sram_ctrl_stress_all.3495909856
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2424661298
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3785429520
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3614560023
/workspace/coverage/default/7.sram_ctrl_alert_test.1998280554
/workspace/coverage/default/7.sram_ctrl_bijection.4246908392
/workspace/coverage/default/7.sram_ctrl_executable.1451165010
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3379981975
/workspace/coverage/default/7.sram_ctrl_max_throughput.4138912246
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2278919209
/workspace/coverage/default/7.sram_ctrl_mem_walk.3043798289
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2370409638
/workspace/coverage/default/7.sram_ctrl_partial_access.2309890643
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2466201969
/workspace/coverage/default/7.sram_ctrl_ram_cfg.4089908818
/workspace/coverage/default/7.sram_ctrl_regwen.143899188
/workspace/coverage/default/7.sram_ctrl_smoke.45272358
/workspace/coverage/default/7.sram_ctrl_stress_all.3543352592
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2880879939
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2515194576
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1496538731
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1795327261
/workspace/coverage/default/8.sram_ctrl_alert_test.4251598899
/workspace/coverage/default/8.sram_ctrl_bijection.191777592
/workspace/coverage/default/8.sram_ctrl_executable.1087252328
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3891198375
/workspace/coverage/default/8.sram_ctrl_max_throughput.1496969171
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.962270114
/workspace/coverage/default/8.sram_ctrl_mem_walk.1212869559
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2522501122
/workspace/coverage/default/8.sram_ctrl_partial_access.1100523362
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.789488277
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3942197854
/workspace/coverage/default/8.sram_ctrl_regwen.1142249143
/workspace/coverage/default/8.sram_ctrl_smoke.2200953648
/workspace/coverage/default/8.sram_ctrl_stress_all.3403060390
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.396933235
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.399861645
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.608578681
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.781996920
/workspace/coverage/default/9.sram_ctrl_alert_test.181961187
/workspace/coverage/default/9.sram_ctrl_bijection.1643408242
/workspace/coverage/default/9.sram_ctrl_executable.1288586881
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1266110263
/workspace/coverage/default/9.sram_ctrl_max_throughput.1727186607
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1353516927
/workspace/coverage/default/9.sram_ctrl_mem_walk.992827249
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1704254854
/workspace/coverage/default/9.sram_ctrl_partial_access.927260040
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.698808454
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3205895597
/workspace/coverage/default/9.sram_ctrl_regwen.2062017671
/workspace/coverage/default/9.sram_ctrl_smoke.196093436
/workspace/coverage/default/9.sram_ctrl_stress_all.1766274060
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4156650998
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2755659090
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.883190923

Total test records in report: 1037

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/46.sram_ctrl_regwen.1212283550	Jun 29 04:38:15 PM PDT 24	Jun 29 04:49:16 PM PDT 24	33718026496 ps
T2	/workspace/coverage/default/34.sram_ctrl_multiple_keys.1816236391	Jun 29 04:37:03 PM PDT 24	Jun 29 04:38:53 PM PDT 24	1065064720 ps
T3	/workspace/coverage/default/7.sram_ctrl_access_during_key_req.208550641	Jun 29 04:35:31 PM PDT 24	Jun 29 04:48:21 PM PDT 24	47537521945 ps
T7	/workspace/coverage/default/20.sram_ctrl_alert_test.758178748	Jun 29 04:36:05 PM PDT 24	Jun 29 04:36:07 PM PDT 24	147960106 ps
T4	/workspace/coverage/default/13.sram_ctrl_lc_escalation.2493970312	Jun 29 04:35:53 PM PDT 24	Jun 29 04:37:08 PM PDT 24	21655229995 ps
T8	/workspace/coverage/default/32.sram_ctrl_bijection.3514548379	Jun 29 04:36:47 PM PDT 24	Jun 29 04:58:40 PM PDT 24	18877391854 ps
T5	/workspace/coverage/default/20.sram_ctrl_stress_all.838514947	Jun 29 04:36:07 PM PDT 24	Jun 29 05:56:14 PM PDT 24	239978797204 ps
T9	/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1865582952	Jun 29 04:36:29 PM PDT 24	Jun 29 04:37:39 PM PDT 24	5803446631 ps
T10	/workspace/coverage/default/0.sram_ctrl_multiple_keys.1430333116	Jun 29 04:35:14 PM PDT 24	Jun 29 04:46:48 PM PDT 24	14278236652 ps
T11	/workspace/coverage/default/44.sram_ctrl_multiple_keys.2804884079	Jun 29 04:38:00 PM PDT 24	Jun 29 04:46:14 PM PDT 24	10184113565 ps
T39	/workspace/coverage/default/29.sram_ctrl_stress_pipeline.423619027	Jun 29 04:36:48 PM PDT 24	Jun 29 04:39:28 PM PDT 24	11378849669 ps
T6	/workspace/coverage/default/45.sram_ctrl_lc_escalation.227501902	Jun 29 04:38:09 PM PDT 24	Jun 29 04:38:55 PM PDT 24	12936854380 ps
T56	/workspace/coverage/default/2.sram_ctrl_bijection.1065299462	Jun 29 04:35:10 PM PDT 24	Jun 29 04:49:36 PM PDT 24	12288374751 ps
T25	/workspace/coverage/default/28.sram_ctrl_ram_cfg.921256518	Jun 29 04:36:37 PM PDT 24	Jun 29 04:36:41 PM PDT 24	1775608528 ps
T24	/workspace/coverage/default/0.sram_ctrl_executable.1363006130	Jun 29 04:35:11 PM PDT 24	Jun 29 04:54:50 PM PDT 24	23803849521 ps
T43	/workspace/coverage/default/21.sram_ctrl_mem_walk.1970464496	Jun 29 04:36:06 PM PDT 24	Jun 29 04:41:51 PM PDT 24	55379620049 ps
T57	/workspace/coverage/default/48.sram_ctrl_partial_access.2769329087	Jun 29 04:38:25 PM PDT 24	Jun 29 04:38:44 PM PDT 24	3438105628 ps
T40	/workspace/coverage/default/37.sram_ctrl_partial_access.9458446	Jun 29 04:37:13 PM PDT 24	Jun 29 04:39:44 PM PDT 24	5886569974 ps
T62	/workspace/coverage/default/17.sram_ctrl_multiple_keys.1430046554	Jun 29 04:35:56 PM PDT 24	Jun 29 04:49:46 PM PDT 24	36362740483 ps
T68	/workspace/coverage/default/1.sram_ctrl_bijection.2885480901	Jun 29 04:35:14 PM PDT 24	Jun 29 05:00:04 PM PDT 24	68062416200 ps
T67	/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2739767505	Jun 29 04:38:01 PM PDT 24	Jun 29 04:42:30 PM PDT 24	17570332110 ps
T41	/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4138807951	Jun 29 04:38:15 PM PDT 24	Jun 29 04:52:03 PM PDT 24	20115758540 ps
T152	/workspace/coverage/default/26.sram_ctrl_max_throughput.714169168	Jun 29 04:36:23 PM PDT 24	Jun 29 04:36:36 PM PDT 24	2868092428 ps
T12	/workspace/coverage/default/35.sram_ctrl_alert_test.1305458268	Jun 29 04:37:14 PM PDT 24	Jun 29 04:37:15 PM PDT 24	15832350 ps
T71	/workspace/coverage/default/48.sram_ctrl_lc_escalation.2859313712	Jun 29 04:38:26 PM PDT 24	Jun 29 04:39:15 PM PDT 24	6763890669 ps
T13	/workspace/coverage/default/18.sram_ctrl_alert_test.928953901	Jun 29 04:35:56 PM PDT 24	Jun 29 04:35:58 PM PDT 24	12159442 ps
T153	/workspace/coverage/default/30.sram_ctrl_smoke.44183278	Jun 29 04:36:48 PM PDT 24	Jun 29 04:36:56 PM PDT 24	1673221307 ps
T26	/workspace/coverage/default/36.sram_ctrl_ram_cfg.2921852968	Jun 29 04:37:20 PM PDT 24	Jun 29 04:37:24 PM PDT 24	366365248 ps
T14	/workspace/coverage/default/25.sram_ctrl_alert_test.4156128003	Jun 29 04:36:25 PM PDT 24	Jun 29 04:36:26 PM PDT 24	52851845 ps
T21	/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3232330244	Jun 29 04:35:21 PM PDT 24	Jun 29 04:35:54 PM PDT 24	2324899936 ps
T22	/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3770176839	Jun 29 04:36:39 PM PDT 24	Jun 29 04:37:28 PM PDT 24	3985480644 ps
T77	/workspace/coverage/default/31.sram_ctrl_partial_access.3885380230	Jun 29 04:36:48 PM PDT 24	Jun 29 04:38:00 PM PDT 24	502052219 ps
T78	/workspace/coverage/default/19.sram_ctrl_multiple_keys.1310666603	Jun 29 04:35:59 PM PDT 24	Jun 29 04:52:28 PM PDT 24	85610519741 ps
T42	/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2956049617	Jun 29 04:35:51 PM PDT 24	Jun 29 05:01:22 PM PDT 24	67811630364 ps
T79	/workspace/coverage/default/8.sram_ctrl_max_throughput.1496969171	Jun 29 04:35:28 PM PDT 24	Jun 29 04:37:40 PM PDT 24	800393852 ps
T18	/workspace/coverage/default/41.sram_ctrl_regwen.653713837	Jun 29 04:37:44 PM PDT 24	Jun 29 04:45:26 PM PDT 24	2778236437 ps
T80	/workspace/coverage/default/31.sram_ctrl_executable.161271690	Jun 29 04:36:46 PM PDT 24	Jun 29 04:49:34 PM PDT 24	6043973886 ps
T81	/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3185029194	Jun 29 04:37:59 PM PDT 24	Jun 29 04:46:13 PM PDT 24	12809814330 ps
T44	/workspace/coverage/default/15.sram_ctrl_mem_walk.563430234	Jun 29 04:35:52 PM PDT 24	Jun 29 04:38:34 PM PDT 24	27646420889 ps
T55	/workspace/coverage/default/38.sram_ctrl_mem_walk.1065154546	Jun 29 04:37:29 PM PDT 24	Jun 29 04:40:14 PM PDT 24	27697687138 ps
T96	/workspace/coverage/default/25.sram_ctrl_access_during_key_req.843447021	Jun 29 04:36:20 PM PDT 24	Jun 29 04:48:05 PM PDT 24	9130930654 ps
T97	/workspace/coverage/default/33.sram_ctrl_access_during_key_req.1301220626	Jun 29 04:36:55 PM PDT 24	Jun 29 04:54:30 PM PDT 24	51354019831 ps
T66	/workspace/coverage/default/11.sram_ctrl_stress_all.3587679933	Jun 29 04:35:42 PM PDT 24	Jun 29 05:45:46 PM PDT 24	35069253301 ps
T19	/workspace/coverage/default/29.sram_ctrl_regwen.3027023626	Jun 29 04:36:37 PM PDT 24	Jun 29 05:00:15 PM PDT 24	16652953331 ps
T27	/workspace/coverage/default/27.sram_ctrl_ram_cfg.809179605	Jun 29 04:36:30 PM PDT 24	Jun 29 04:36:34 PM PDT 24	702042781 ps
T98	/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2485885822	Jun 29 04:38:10 PM PDT 24	Jun 29 04:44:33 PM PDT 24	18071632661 ps
T154	/workspace/coverage/default/3.sram_ctrl_partial_access.1781516486	Jun 29 04:35:14 PM PDT 24	Jun 29 04:35:23 PM PDT 24	2821435769 ps
T15	/workspace/coverage/default/3.sram_ctrl_sec_cm.1977792899	Jun 29 04:35:28 PM PDT 24	Jun 29 04:35:31 PM PDT 24	396333163 ps
T30	/workspace/coverage/default/29.sram_ctrl_smoke.413705388	Jun 29 04:36:41 PM PDT 24	Jun 29 04:36:57 PM PDT 24	506232607 ps
T31	/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2360533977	Jun 29 04:36:15 PM PDT 24	Jun 29 04:36:23 PM PDT 24	706383385 ps
T32	/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3545016974	Jun 29 04:35:17 PM PDT 24	Jun 29 04:47:07 PM PDT 24	11650804990 ps
T33	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.950423848	Jun 29 04:37:42 PM PDT 24	Jun 29 04:38:25 PM PDT 24	6648764502 ps
T34	/workspace/coverage/default/22.sram_ctrl_bijection.2714858804	Jun 29 04:36:06 PM PDT 24	Jun 29 04:57:39 PM PDT 24	58293905031 ps
T35	/workspace/coverage/default/6.sram_ctrl_alert_test.4235940702	Jun 29 04:35:28 PM PDT 24	Jun 29 04:35:30 PM PDT 24	48735730 ps
T36	/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2574512358	Jun 29 04:35:35 PM PDT 24	Jun 29 04:39:24 PM PDT 24	58624846959 ps
T37	/workspace/coverage/default/25.sram_ctrl_executable.607013377	Jun 29 04:36:21 PM PDT 24	Jun 29 04:49:16 PM PDT 24	20400548549 ps
T38	/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1795327261	Jun 29 04:35:38 PM PDT 24	Jun 29 04:46:01 PM PDT 24	7929322484 ps
T111	/workspace/coverage/default/46.sram_ctrl_stress_pipeline.991705731	Jun 29 04:38:16 PM PDT 24	Jun 29 04:41:33 PM PDT 24	13199268593 ps
T20	/workspace/coverage/default/29.sram_ctrl_lc_escalation.4165170152	Jun 29 04:36:38 PM PDT 24	Jun 29 04:37:48 PM PDT 24	44948773913 ps
T146	/workspace/coverage/default/2.sram_ctrl_stress_all.605758269	Jun 29 04:35:19 PM PDT 24	Jun 29 05:25:58 PM PDT 24	261627042029 ps
T155	/workspace/coverage/default/35.sram_ctrl_smoke.1707890140	Jun 29 04:37:08 PM PDT 24	Jun 29 04:37:27 PM PDT 24	4785180138 ps
T48	/workspace/coverage/default/0.sram_ctrl_mem_partial_access.917403771	Jun 29 04:35:12 PM PDT 24	Jun 29 04:37:40 PM PDT 24	26917774972 ps
T144	/workspace/coverage/default/34.sram_ctrl_executable.1960307515	Jun 29 04:37:03 PM PDT 24	Jun 29 04:47:47 PM PDT 24	7245939808 ps
T131	/workspace/coverage/default/7.sram_ctrl_lc_escalation.3379981975	Jun 29 04:35:21 PM PDT 24	Jun 29 04:36:41 PM PDT 24	11865125205 ps
T156	/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2637319142	Jun 29 04:35:47 PM PDT 24	Jun 29 04:51:48 PM PDT 24	11687347233 ps
T157	/workspace/coverage/default/21.sram_ctrl_ram_cfg.3456935380	Jun 29 04:36:06 PM PDT 24	Jun 29 04:36:10 PM PDT 24	3739162580 ps
T158	/workspace/coverage/default/17.sram_ctrl_bijection.3707455204	Jun 29 04:35:54 PM PDT 24	Jun 29 04:50:06 PM PDT 24	50549891853 ps
T52	/workspace/coverage/default/46.sram_ctrl_mem_walk.2681365986	Jun 29 04:38:15 PM PDT 24	Jun 29 04:41:17 PM PDT 24	18797697688 ps
T159	/workspace/coverage/default/33.sram_ctrl_bijection.333620144	Jun 29 04:36:55 PM PDT 24	Jun 29 04:54:39 PM PDT 24	29523365836 ps
T160	/workspace/coverage/default/3.sram_ctrl_bijection.1403438207	Jun 29 04:35:11 PM PDT 24	Jun 29 05:03:47 PM PDT 24	66494314079 ps
T112	/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2755659090	Jun 29 04:35:30 PM PDT 24	Jun 29 04:40:02 PM PDT 24	3616831479 ps
T108	/workspace/coverage/default/33.sram_ctrl_mem_partial_access.823077263	Jun 29 04:36:57 PM PDT 24	Jun 29 04:39:36 PM PDT 24	5260773261 ps
T16	/workspace/coverage/default/0.sram_ctrl_sec_cm.1031831609	Jun 29 04:35:10 PM PDT 24	Jun 29 04:35:12 PM PDT 24	453089937 ps
T161	/workspace/coverage/default/2.sram_ctrl_partial_access.2737831751	Jun 29 04:35:12 PM PDT 24	Jun 29 04:36:39 PM PDT 24	6000000198 ps
T132	/workspace/coverage/default/26.sram_ctrl_stress_all.1405430859	Jun 29 04:36:31 PM PDT 24	Jun 29 04:54:38 PM PDT 24	128952467377 ps
T162	/workspace/coverage/default/41.sram_ctrl_multiple_keys.820512313	Jun 29 04:37:37 PM PDT 24	Jun 29 04:58:44 PM PDT 24	27404193417 ps
T163	/workspace/coverage/default/24.sram_ctrl_multiple_keys.1979481472	Jun 29 04:36:15 PM PDT 24	Jun 29 05:02:30 PM PDT 24	105192762049 ps
T23	/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3873842515	Jun 29 04:38:34 PM PDT 24	Jun 29 04:38:49 PM PDT 24	1688700461 ps
T123	/workspace/coverage/default/42.sram_ctrl_regwen.2991118070	Jun 29 04:37:52 PM PDT 24	Jun 29 04:52:43 PM PDT 24	165402485747 ps
T124	/workspace/coverage/default/29.sram_ctrl_partial_access.854379926	Jun 29 04:36:39 PM PDT 24	Jun 29 04:36:54 PM PDT 24	4049638131 ps
T125	/workspace/coverage/default/42.sram_ctrl_partial_access.1753456111	Jun 29 04:37:51 PM PDT 24	Jun 29 04:38:08 PM PDT 24	556158432 ps
T126	/workspace/coverage/default/12.sram_ctrl_lc_escalation.1987040610	Jun 29 04:35:41 PM PDT 24	Jun 29 04:37:16 PM PDT 24	15622077884 ps
T127	/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1764891817	Jun 29 04:35:58 PM PDT 24	Jun 29 05:02:18 PM PDT 24	47398238496 ps
T113	/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2382384601	Jun 29 04:38:15 PM PDT 24	Jun 29 04:42:00 PM PDT 24	23424323138 ps
T128	/workspace/coverage/default/45.sram_ctrl_stress_all.3104840318	Jun 29 04:38:17 PM PDT 24	Jun 29 05:49:47 PM PDT 24	303344062370 ps
T129	/workspace/coverage/default/21.sram_ctrl_regwen.1149233156	Jun 29 04:36:06 PM PDT 24	Jun 29 04:44:39 PM PDT 24	6195716959 ps
T130	/workspace/coverage/default/2.sram_ctrl_regwen.3921790307	Jun 29 04:35:13 PM PDT 24	Jun 29 04:37:53 PM PDT 24	5530770182 ps
T53	/workspace/coverage/default/42.sram_ctrl_mem_walk.3221622867	Jun 29 04:37:50 PM PDT 24	Jun 29 04:40:46 PM PDT 24	10570826881 ps
T164	/workspace/coverage/default/19.sram_ctrl_smoke.3988623707	Jun 29 04:35:58 PM PDT 24	Jun 29 04:36:12 PM PDT 24	488524894 ps
T165	/workspace/coverage/default/39.sram_ctrl_ram_cfg.2827902755	Jun 29 04:37:30 PM PDT 24	Jun 29 04:37:34 PM PDT 24	358823738 ps
T114	/workspace/coverage/default/19.sram_ctrl_mem_partial_access.2936363469	Jun 29 04:36:00 PM PDT 24	Jun 29 04:38:14 PM PDT 24	17489104550 ps
T166	/workspace/coverage/default/9.sram_ctrl_lc_escalation.1266110263	Jun 29 04:35:37 PM PDT 24	Jun 29 04:36:32 PM PDT 24	25620963535 ps
T115	/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3002125906	Jun 29 04:36:06 PM PDT 24	Jun 29 04:40:39 PM PDT 24	20656820763 ps
T167	/workspace/coverage/default/36.sram_ctrl_partial_access.870596149	Jun 29 04:37:14 PM PDT 24	Jun 29 04:37:25 PM PDT 24	919498109 ps
T168	/workspace/coverage/default/8.sram_ctrl_bijection.191777592	Jun 29 04:35:26 PM PDT 24	Jun 29 04:52:52 PM PDT 24	17585846526 ps
T147	/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2174758995	Jun 29 04:36:07 PM PDT 24	Jun 29 04:38:50 PM PDT 24	10189516481 ps
T169	/workspace/coverage/default/41.sram_ctrl_stress_pipeline.4203978227	Jun 29 04:37:42 PM PDT 24	Jun 29 04:41:19 PM PDT 24	5016297513 ps
T170	/workspace/coverage/default/40.sram_ctrl_access_during_key_req.728575457	Jun 29 04:37:36 PM PDT 24	Jun 29 05:10:22 PM PDT 24	71661281244 ps
T171	/workspace/coverage/default/29.sram_ctrl_multiple_keys.3552951938	Jun 29 04:36:39 PM PDT 24	Jun 29 04:49:59 PM PDT 24	166258626600 ps
T172	/workspace/coverage/default/35.sram_ctrl_bijection.1677958004	Jun 29 04:37:05 PM PDT 24	Jun 29 05:26:54 PM PDT 24	173260757758 ps
T173	/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2513092009	Jun 29 04:37:51 PM PDT 24	Jun 29 04:40:53 PM PDT 24	6891994370 ps
T174	/workspace/coverage/default/41.sram_ctrl_bijection.788654794	Jun 29 04:37:44 PM PDT 24	Jun 29 05:05:23 PM PDT 24	83849259169 ps
T175	/workspace/coverage/default/27.sram_ctrl_lc_escalation.2685152480	Jun 29 04:36:31 PM PDT 24	Jun 29 04:37:23 PM PDT 24	79922698512 ps
T176	/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2629823555	Jun 29 04:35:13 PM PDT 24	Jun 29 04:35:31 PM PDT 24	723603597 ps
T177	/workspace/coverage/default/3.sram_ctrl_stress_pipeline.3380718004	Jun 29 04:35:15 PM PDT 24	Jun 29 04:38:53 PM PDT 24	14430687114 ps
T178	/workspace/coverage/default/12.sram_ctrl_regwen.4005741325	Jun 29 04:35:51 PM PDT 24	Jun 29 04:45:31 PM PDT 24	35293415198 ps
T179	/workspace/coverage/default/32.sram_ctrl_partial_access.1964313854	Jun 29 04:36:59 PM PDT 24	Jun 29 04:37:43 PM PDT 24	1623355947 ps
T180	/workspace/coverage/default/28.sram_ctrl_multiple_keys.1022603883	Jun 29 04:36:31 PM PDT 24	Jun 29 04:55:17 PM PDT 24	25301202577 ps
T181	/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3059861494	Jun 29 04:36:59 PM PDT 24	Jun 29 04:38:09 PM PDT 24	2355479188 ps
T49	/workspace/coverage/default/10.sram_ctrl_mem_partial_access.4140215419	Jun 29 04:35:39 PM PDT 24	Jun 29 04:38:12 PM PDT 24	14288489700 ps
T182	/workspace/coverage/default/34.sram_ctrl_smoke.3215897247	Jun 29 04:37:04 PM PDT 24	Jun 29 04:37:13 PM PDT 24	376263346 ps
T145	/workspace/coverage/default/27.sram_ctrl_stress_all.2458495136	Jun 29 04:36:31 PM PDT 24	Jun 29 05:39:15 PM PDT 24	300379227051 ps
T183	/workspace/coverage/default/20.sram_ctrl_max_throughput.1340419569	Jun 29 04:35:57 PM PDT 24	Jun 29 04:36:43 PM PDT 24	754721495 ps
T184	/workspace/coverage/default/24.sram_ctrl_regwen.2141374758	Jun 29 04:36:21 PM PDT 24	Jun 29 04:41:45 PM PDT 24	15999215095 ps
T185	/workspace/coverage/default/14.sram_ctrl_regwen.2853437819	Jun 29 04:35:47 PM PDT 24	Jun 29 04:54:50 PM PDT 24	4504959284 ps
T186	/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3835563987	Jun 29 04:36:22 PM PDT 24	Jun 29 04:43:03 PM PDT 24	23045152498 ps
T187	/workspace/coverage/default/8.sram_ctrl_multiple_keys.2522501122	Jun 29 04:35:41 PM PDT 24	Jun 29 05:02:48 PM PDT 24	128870934590 ps
T188	/workspace/coverage/default/29.sram_ctrl_stress_all.2879509934	Jun 29 04:36:39 PM PDT 24	Jun 29 06:05:24 PM PDT 24	78479474670 ps
T54	/workspace/coverage/default/31.sram_ctrl_mem_walk.3396121052	Jun 29 04:36:47 PM PDT 24	Jun 29 04:42:38 PM PDT 24	21340160519 ps
T189	/workspace/coverage/default/30.sram_ctrl_max_throughput.585542867	Jun 29 04:36:45 PM PDT 24	Jun 29 04:37:55 PM PDT 24	759413307 ps
T45	/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3855839007	Jun 29 04:38:16 PM PDT 24	Jun 29 04:38:59 PM PDT 24	1614226461 ps
T190	/workspace/coverage/default/0.sram_ctrl_ram_cfg.330988329	Jun 29 04:35:09 PM PDT 24	Jun 29 04:35:13 PM PDT 24	2594719023 ps
T72	/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3737475850	Jun 29 04:35:40 PM PDT 24	Jun 29 04:35:48 PM PDT 24	217758649 ps
T50	/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.389757925	Jun 29 04:36:22 PM PDT 24	Jun 29 04:37:22 PM PDT 24	2277512752 ps
T191	/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1446820291	Jun 29 04:35:18 PM PDT 24	Jun 29 04:39:07 PM PDT 24	30444427602 ps
T192	/workspace/coverage/default/16.sram_ctrl_mem_walk.2115844163	Jun 29 04:35:54 PM PDT 24	Jun 29 04:41:40 PM PDT 24	24909890225 ps
T193	/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3109770899	Jun 29 04:36:31 PM PDT 24	Jun 29 04:42:10 PM PDT 24	6467807180 ps
T194	/workspace/coverage/default/37.sram_ctrl_bijection.3937191384	Jun 29 04:37:13 PM PDT 24	Jun 29 04:47:01 PM PDT 24	16741223031 ps
T195	/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2212808117	Jun 29 04:35:15 PM PDT 24	Jun 29 04:37:38 PM PDT 24	827386749 ps
T196	/workspace/coverage/default/3.sram_ctrl_stress_all.3940290900	Jun 29 04:35:24 PM PDT 24	Jun 29 05:53:21 PM PDT 24	793959760259 ps
T197	/workspace/coverage/default/39.sram_ctrl_bijection.3639880537	Jun 29 04:37:31 PM PDT 24	Jun 29 04:53:31 PM PDT 24	55343678728 ps
T198	/workspace/coverage/default/15.sram_ctrl_lc_escalation.3357930410	Jun 29 04:35:53 PM PDT 24	Jun 29 04:37:15 PM PDT 24	17404620208 ps
T199	/workspace/coverage/default/3.sram_ctrl_ram_cfg.3166384517	Jun 29 04:35:22 PM PDT 24	Jun 29 04:35:26 PM PDT 24	1535282930 ps
T200	/workspace/coverage/default/20.sram_ctrl_smoke.2692283524	Jun 29 04:35:59 PM PDT 24	Jun 29 04:36:18 PM PDT 24	2378148794 ps
T201	/workspace/coverage/default/43.sram_ctrl_partial_access.4291386199	Jun 29 04:38:05 PM PDT 24	Jun 29 04:40:41 PM PDT 24	11898828453 ps
T202	/workspace/coverage/default/0.sram_ctrl_stress_pipeline.832614437	Jun 29 04:35:08 PM PDT 24	Jun 29 04:38:02 PM PDT 24	11882496842 ps
T203	/workspace/coverage/default/14.sram_ctrl_executable.1725495356	Jun 29 04:35:51 PM PDT 24	Jun 29 04:52:58 PM PDT 24	32198441770 ps
T204	/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2338729935	Jun 29 04:36:32 PM PDT 24	Jun 29 04:46:07 PM PDT 24	9164589010 ps
T205	/workspace/coverage/default/44.sram_ctrl_alert_test.3331944297	Jun 29 04:38:08 PM PDT 24	Jun 29 04:38:10 PM PDT 24	39965182 ps
T206	/workspace/coverage/default/44.sram_ctrl_max_throughput.1831347769	Jun 29 04:38:10 PM PDT 24	Jun 29 04:38:16 PM PDT 24	696691727 ps
T207	/workspace/coverage/default/25.sram_ctrl_mem_walk.794617689	Jun 29 04:36:23 PM PDT 24	Jun 29 04:41:31 PM PDT 24	5474848231 ps
T208	/workspace/coverage/default/2.sram_ctrl_executable.183162947	Jun 29 04:35:14 PM PDT 24	Jun 29 04:50:52 PM PDT 24	21774843221 ps
T209	/workspace/coverage/default/0.sram_ctrl_alert_test.3912408079	Jun 29 04:35:12 PM PDT 24	Jun 29 04:35:14 PM PDT 24	32017676 ps
T210	/workspace/coverage/default/37.sram_ctrl_ram_cfg.549992534	Jun 29 04:37:24 PM PDT 24	Jun 29 04:37:28 PM PDT 24	2237296137 ps
T73	/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1285952126	Jun 29 04:36:13 PM PDT 24	Jun 29 04:36:40 PM PDT 24	4372352554 ps
T211	/workspace/coverage/default/26.sram_ctrl_access_during_key_req.3047445489	Jun 29 04:36:27 PM PDT 24	Jun 29 04:55:41 PM PDT 24	31498725255 ps
T212	/workspace/coverage/default/16.sram_ctrl_executable.1025898887	Jun 29 04:35:50 PM PDT 24	Jun 29 04:45:01 PM PDT 24	14909472042 ps
T148	/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2175537145	Jun 29 04:35:12 PM PDT 24	Jun 29 04:40:12 PM PDT 24	11618773654 ps
T213	/workspace/coverage/default/12.sram_ctrl_max_throughput.2883491923	Jun 29 04:35:42 PM PDT 24	Jun 29 04:37:32 PM PDT 24	765511715 ps
T214	/workspace/coverage/default/43.sram_ctrl_stress_all.3660051728	Jun 29 04:38:00 PM PDT 24	Jun 29 05:14:53 PM PDT 24	185817001941 ps
T150	/workspace/coverage/default/28.sram_ctrl_regwen.1806453075	Jun 29 04:36:40 PM PDT 24	Jun 29 04:57:32 PM PDT 24	80745077647 ps
T215	/workspace/coverage/default/46.sram_ctrl_executable.1108977022	Jun 29 04:38:17 PM PDT 24	Jun 29 04:52:38 PM PDT 24	18988046815 ps
T74	/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3797811941	Jun 29 04:36:45 PM PDT 24	Jun 29 04:37:24 PM PDT 24	1003144824 ps
T216	/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1090524875	Jun 29 04:37:47 PM PDT 24	Jun 29 04:39:01 PM PDT 24	3567403731 ps
T217	/workspace/coverage/default/5.sram_ctrl_bijection.3191522680	Jun 29 04:35:25 PM PDT 24	Jun 29 04:56:50 PM PDT 24	80010298201 ps
T218	/workspace/coverage/default/16.sram_ctrl_smoke.1845126070	Jun 29 04:36:00 PM PDT 24	Jun 29 04:36:07 PM PDT 24	740864007 ps
T75	/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2026363064	Jun 29 04:36:28 PM PDT 24	Jun 29 04:36:39 PM PDT 24	1437562421 ps
T219	/workspace/coverage/default/36.sram_ctrl_executable.3317455152	Jun 29 04:37:11 PM PDT 24	Jun 29 05:06:50 PM PDT 24	92782202664 ps
T220	/workspace/coverage/default/7.sram_ctrl_ram_cfg.4089908818	Jun 29 04:35:31 PM PDT 24	Jun 29 04:35:35 PM PDT 24	380379010 ps
T221	/workspace/coverage/default/27.sram_ctrl_stress_pipeline.2876001458	Jun 29 04:36:30 PM PDT 24	Jun 29 04:39:58 PM PDT 24	12830494799 ps
T222	/workspace/coverage/default/27.sram_ctrl_smoke.1612905031	Jun 29 04:36:31 PM PDT 24	Jun 29 04:36:52 PM PDT 24	4468340561 ps
T223	/workspace/coverage/default/21.sram_ctrl_access_during_key_req.51089475	Jun 29 04:36:07 PM PDT 24	Jun 29 04:47:17 PM PDT 24	56486660318 ps
T224	/workspace/coverage/default/38.sram_ctrl_smoke.2289438695	Jun 29 04:37:21 PM PDT 24	Jun 29 04:37:28 PM PDT 24	6182208213 ps
T225	/workspace/coverage/default/4.sram_ctrl_stress_all.3305959023	Jun 29 04:35:17 PM PDT 24	Jun 29 05:26:19 PM PDT 24	99173914488 ps
T149	/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2771280850	Jun 29 04:35:20 PM PDT 24	Jun 29 04:41:44 PM PDT 24	58922871929 ps
T226	/workspace/coverage/default/40.sram_ctrl_bijection.1984173953	Jun 29 04:37:36 PM PDT 24	Jun 29 04:53:41 PM PDT 24	14008958723 ps
T227	/workspace/coverage/default/14.sram_ctrl_stress_all.4253811239	Jun 29 04:35:51 PM PDT 24	Jun 29 06:39:08 PM PDT 24	328945057897 ps
T228	/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.4227320296	Jun 29 04:36:23 PM PDT 24	Jun 29 04:36:31 PM PDT 24	702780203 ps
T58	/workspace/coverage/default/15.sram_ctrl_mem_partial_access.3011445771	Jun 29 04:35:52 PM PDT 24	Jun 29 04:38:25 PM PDT 24	5088502987 ps
T229	/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3423164435	Jun 29 04:36:32 PM PDT 24	Jun 29 04:37:28 PM PDT 24	8176034193 ps
T230	/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1534985253	Jun 29 04:38:08 PM PDT 24	Jun 29 04:40:55 PM PDT 24	11533435427 ps
T231	/workspace/coverage/default/46.sram_ctrl_smoke.3112741194	Jun 29 04:38:19 PM PDT 24	Jun 29 04:38:41 PM PDT 24	7047654026 ps
T232	/workspace/coverage/default/0.sram_ctrl_partial_access.4219034670	Jun 29 04:35:13 PM PDT 24	Jun 29 04:36:56 PM PDT 24	2714151417 ps
T17	/workspace/coverage/default/1.sram_ctrl_sec_cm.2643546324	Jun 29 04:35:10 PM PDT 24	Jun 29 04:35:14 PM PDT 24	429603990 ps
T59	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1184994382	Jun 29 04:37:37 PM PDT 24	Jun 29 04:40:30 PM PDT 24	34819334581 ps
T60	/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3511803501	Jun 29 04:37:53 PM PDT 24	Jun 29 04:40:24 PM PDT 24	9784639234 ps
T233	/workspace/coverage/default/39.sram_ctrl_smoke.1949536081	Jun 29 04:37:33 PM PDT 24	Jun 29 04:39:33 PM PDT 24	5318254177 ps
T151	/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.652467389	Jun 29 04:36:48 PM PDT 24	Jun 29 04:41:59 PM PDT 24	14160544309 ps
T234	/workspace/coverage/default/48.sram_ctrl_stress_all.537299652	Jun 29 04:38:24 PM PDT 24	Jun 29 05:32:11 PM PDT 24	82511385276 ps
T235	/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1007056735	Jun 29 04:35:43 PM PDT 24	Jun 29 04:38:35 PM PDT 24	19972410508 ps
T61	/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2567265000	Jun 29 04:37:20 PM PDT 24	Jun 29 04:38:39 PM PDT 24	6961439006 ps
T236	/workspace/coverage/default/28.sram_ctrl_max_throughput.2070130878	Jun 29 04:36:32 PM PDT 24	Jun 29 04:37:23 PM PDT 24	759332319 ps
T237	/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2340740365	Jun 29 04:35:18 PM PDT 24	Jun 29 04:37:20 PM PDT 24	1613637085 ps
T238	/workspace/coverage/default/29.sram_ctrl_executable.867595386	Jun 29 04:36:39 PM PDT 24	Jun 29 04:51:22 PM PDT 24	13639647723 ps
T239	/workspace/coverage/default/36.sram_ctrl_access_during_key_req.3145905452	Jun 29 04:37:16 PM PDT 24	Jun 29 04:56:51 PM PDT 24	56258106517 ps
T240	/workspace/coverage/default/43.sram_ctrl_executable.2402647660	Jun 29 04:38:02 PM PDT 24	Jun 29 04:49:17 PM PDT 24	73996262545 ps
T241	/workspace/coverage/default/9.sram_ctrl_bijection.1643408242	Jun 29 04:35:31 PM PDT 24	Jun 29 04:56:35 PM PDT 24	55448044751 ps
T242	/workspace/coverage/default/48.sram_ctrl_mem_walk.2412635182	Jun 29 04:38:27 PM PDT 24	Jun 29 04:43:43 PM PDT 24	13836020483 ps
T76	/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1384859470	Jun 29 04:35:56 PM PDT 24	Jun 29 04:36:19 PM PDT 24	568201154 ps
T243	/workspace/coverage/default/14.sram_ctrl_max_throughput.775057476	Jun 29 04:35:47 PM PDT 24	Jun 29 04:36:29 PM PDT 24	1453742785 ps
T244	/workspace/coverage/default/14.sram_ctrl_partial_access.1346978247	Jun 29 04:35:50 PM PDT 24	Jun 29 04:36:01 PM PDT 24	1390547767 ps
T245	/workspace/coverage/default/18.sram_ctrl_stress_pipeline.313222674	Jun 29 04:36:03 PM PDT 24	Jun 29 04:40:56 PM PDT 24	7780145328 ps
T246	/workspace/coverage/default/45.sram_ctrl_bijection.3218359428	Jun 29 04:38:07 PM PDT 24	Jun 29 05:04:47 PM PDT 24	88802980523 ps
T247	/workspace/coverage/default/28.sram_ctrl_partial_access.613064260	Jun 29 04:36:30 PM PDT 24	Jun 29 04:36:46 PM PDT 24	1212009578 ps
T248	/workspace/coverage/default/49.sram_ctrl_stress_pipeline.500205375	Jun 29 04:38:33 PM PDT 24	Jun 29 04:42:43 PM PDT 24	15350477616 ps
T249	/workspace/coverage/default/28.sram_ctrl_smoke.735796586	Jun 29 04:36:32 PM PDT 24	Jun 29 04:37:50 PM PDT 24	439147013 ps
T250	/workspace/coverage/default/26.sram_ctrl_multiple_keys.854550112	Jun 29 04:36:22 PM PDT 24	Jun 29 04:39:20 PM PDT 24	7343790730 ps
T251	/workspace/coverage/default/19.sram_ctrl_alert_test.3891141656	Jun 29 04:36:05 PM PDT 24	Jun 29 04:36:07 PM PDT 24	38737590 ps
T252	/workspace/coverage/default/48.sram_ctrl_smoke.3611843951	Jun 29 04:38:26 PM PDT 24	Jun 29 04:38:38 PM PDT 24	1995207589 ps
T253	/workspace/coverage/default/46.sram_ctrl_max_throughput.3613339203	Jun 29 04:38:16 PM PDT 24	Jun 29 04:38:30 PM PDT 24	2638993232 ps
T254	/workspace/coverage/default/47.sram_ctrl_alert_test.3408521399	Jun 29 04:38:26 PM PDT 24	Jun 29 04:38:27 PM PDT 24	13107000 ps
T255	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.4211523876	Jun 29 04:38:05 PM PDT 24	Jun 29 04:43:12 PM PDT 24	30408421210 ps
T256	/workspace/coverage/default/33.sram_ctrl_smoke.3162673177	Jun 29 04:36:57 PM PDT 24	Jun 29 04:37:14 PM PDT 24	852537425 ps
T257	/workspace/coverage/default/21.sram_ctrl_max_throughput.191164469	Jun 29 04:36:06 PM PDT 24	Jun 29 04:37:00 PM PDT 24	2805172958 ps
T118	/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2880879939	Jun 29 04:35:29 PM PDT 24	Jun 29 04:35:39 PM PDT 24	1049651063 ps
T258	/workspace/coverage/default/7.sram_ctrl_alert_test.1998280554	Jun 29 04:35:27 PM PDT 24	Jun 29 04:35:30 PM PDT 24	37534580 ps
T259	/workspace/coverage/default/32.sram_ctrl_executable.3408115821	Jun 29 04:36:56 PM PDT 24	Jun 29 04:46:52 PM PDT 24	10697929875 ps
T260	/workspace/coverage/default/1.sram_ctrl_stress_all.430333933	Jun 29 04:35:16 PM PDT 24	Jun 29 05:54:34 PM PDT 24	76615520581 ps
T261	/workspace/coverage/default/43.sram_ctrl_ram_cfg.2453264514	Jun 29 04:37:58 PM PDT 24	Jun 29 04:38:02 PM PDT 24	1526908787 ps
T262	/workspace/coverage/default/47.sram_ctrl_regwen.594125341	Jun 29 04:38:15 PM PDT 24	Jun 29 04:54:15 PM PDT 24	62970233976 ps
T263	/workspace/coverage/default/32.sram_ctrl_multiple_keys.1390448835	Jun 29 04:36:47 PM PDT 24	Jun 29 04:37:18 PM PDT 24	7624345996 ps
T264	/workspace/coverage/default/35.sram_ctrl_executable.1909813832	Jun 29 04:37:15 PM PDT 24	Jun 29 04:48:46 PM PDT 24	5269524094 ps
T265	/workspace/coverage/default/10.sram_ctrl_regwen.2304721254	Jun 29 04:35:32 PM PDT 24	Jun 29 04:53:40 PM PDT 24	46684593252 ps
T266	/workspace/coverage/default/39.sram_ctrl_mem_partial_access.365076296	Jun 29 04:37:33 PM PDT 24	Jun 29 04:39:40 PM PDT 24	7575946001 ps
T267	/workspace/coverage/default/10.sram_ctrl_max_throughput.3136072527	Jun 29 04:35:38 PM PDT 24	Jun 29 04:35:45 PM PDT 24	2653038893 ps
T268	/workspace/coverage/default/33.sram_ctrl_multiple_keys.227078546	Jun 29 04:36:55 PM PDT 24	Jun 29 04:50:07 PM PDT 24	46505820562 ps
T269	/workspace/coverage/default/30.sram_ctrl_executable.1364583070	Jun 29 04:36:48 PM PDT 24	Jun 29 05:02:32 PM PDT 24	81581835188 ps
T270	/workspace/coverage/default/18.sram_ctrl_smoke.3738377151	Jun 29 04:36:01 PM PDT 24	Jun 29 04:36:14 PM PDT 24	1540740087 ps
T271	/workspace/coverage/default/20.sram_ctrl_regwen.3495513548	Jun 29 04:36:05 PM PDT 24	Jun 29 04:44:42 PM PDT 24	7948333239 ps
T272	/workspace/coverage/default/15.sram_ctrl_regwen.3643587720	Jun 29 04:35:57 PM PDT 24	Jun 29 05:02:11 PM PDT 24	17865443227 ps
T273	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.287456561	Jun 29 04:38:27 PM PDT 24	Jun 29 04:38:36 PM PDT 24	1901044964 ps
T274	/workspace/coverage/default/27.sram_ctrl_regwen.386250677	Jun 29 04:36:34 PM PDT 24	Jun 29 04:49:59 PM PDT 24	12116976016 ps
T275	/workspace/coverage/default/18.sram_ctrl_lc_escalation.1596990619	Jun 29 04:35:59 PM PDT 24	Jun 29 04:36:47 PM PDT 24	7865672745 ps
T276	/workspace/coverage/default/17.sram_ctrl_regwen.191658725	Jun 29 04:35:59 PM PDT 24	Jun 29 04:49:56 PM PDT 24	6179483412 ps
T277	/workspace/coverage/default/3.sram_ctrl_smoke.1422408383	Jun 29 04:35:13 PM PDT 24	Jun 29 04:35:27 PM PDT 24	972490686 ps
T278	/workspace/coverage/default/49.sram_ctrl_ram_cfg.1531852571	Jun 29 04:38:33 PM PDT 24	Jun 29 04:38:37 PM PDT 24	1408695276 ps
T279	/workspace/coverage/default/47.sram_ctrl_bijection.1504116642	Jun 29 04:38:16 PM PDT 24	Jun 29 05:11:38 PM PDT 24	176539292021 ps
T280	/workspace/coverage/default/43.sram_ctrl_max_throughput.2736180079	Jun 29 04:38:01 PM PDT 24	Jun 29 04:38:27 PM PDT 24	14115862685 ps
T281	/workspace/coverage/default/10.sram_ctrl_multiple_keys.64076495	Jun 29 04:35:41 PM PDT 24	Jun 29 04:57:16 PM PDT 24	38433297653 ps
T282	/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3514434652	Jun 29 04:37:21 PM PDT 24	Jun 29 04:37:28 PM PDT 24	2809096116 ps
T283	/workspace/coverage/default/15.sram_ctrl_smoke.2392907494	Jun 29 04:35:52 PM PDT 24	Jun 29 04:36:50 PM PDT 24	857772497 ps
T284	/workspace/coverage/default/25.sram_ctrl_stress_all.988528071	Jun 29 04:36:23 PM PDT 24	Jun 29 05:25:29 PM PDT 24	419930818488 ps
T285	/workspace/coverage/default/14.sram_ctrl_alert_test.991385740	Jun 29 04:35:55 PM PDT 24	Jun 29 04:35:55 PM PDT 24	18977614 ps
T286	/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2389527349	Jun 29 04:37:39 PM PDT 24	Jun 29 04:46:30 PM PDT 24	35497314747 ps
T287	/workspace/coverage/default/0.sram_ctrl_smoke.2784252865	Jun 29 04:35:17 PM PDT 24	Jun 29 04:36:08 PM PDT 24	416479835 ps
T288	/workspace/coverage/default/4.sram_ctrl_multiple_keys.2982953997	Jun 29 04:35:22 PM PDT 24	Jun 29 04:56:56 PM PDT 24	7590182639 ps
T289	/workspace/coverage/default/37.sram_ctrl_multiple_keys.3088865074	Jun 29 04:37:12 PM PDT 24	Jun 29 04:43:21 PM PDT 24	9229396621 ps
T290	/workspace/coverage/default/10.sram_ctrl_stress_all.1199160600	Jun 29 04:35:36 PM PDT 24	Jun 29 06:49:10 PM PDT 24	73129729152 ps
T291	/workspace/coverage/default/10.sram_ctrl_smoke.2131970512	Jun 29 04:35:38 PM PDT 24	Jun 29 04:35:44 PM PDT 24	2862939417 ps
T292	/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1230844349	Jun 29 04:37:51 PM PDT 24	Jun 29 04:38:04 PM PDT 24	893338875 ps
T293	/workspace/coverage/default/43.sram_ctrl_smoke.4091207918	Jun 29 04:38:02 PM PDT 24	Jun 29 04:38:20 PM PDT 24	395535639 ps
T294	/workspace/coverage/default/26.sram_ctrl_alert_test.4050263238	Jun 29 04:36:29 PM PDT 24	Jun 29 04:36:30 PM PDT 24	38203878 ps
T295	/workspace/coverage/default/1.sram_ctrl_executable.320003758	Jun 29 04:35:12 PM PDT 24	Jun 29 04:42:18 PM PDT 24	26332923536 ps
T296	/workspace/coverage/default/27.sram_ctrl_bijection.2751760512	Jun 29 04:36:30 PM PDT 24	Jun 29 05:20:21 PM PDT 24	115075003454 ps
T297	/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2135948296	Jun 29 04:35:20 PM PDT 24	Jun 29 04:35:51 PM PDT 24	2921336071 ps
T298	/workspace/coverage/default/35.sram_ctrl_ram_cfg.2961492377	Jun 29 04:37:11 PM PDT 24	Jun 29 04:37:15 PM PDT 24	708589299 ps
T299	/workspace/coverage/default/38.sram_ctrl_ram_cfg.175191867	Jun 29 04:37:21 PM PDT 24	Jun 29 04:37:25 PM PDT 24	343271446 ps
T300	/workspace/coverage/default/49.sram_ctrl_regwen.1770433243	Jun 29 04:38:34 PM PDT 24	Jun 29 04:50:08 PM PDT 24	12593274542 ps
T301	/workspace/coverage/default/43.sram_ctrl_bijection.3896852028	Jun 29 04:38:01 PM PDT 24	Jun 29 04:53:42 PM PDT 24	14011931001 ps
T302	/workspace/coverage/default/28.sram_ctrl_stress_pipeline.952336138	Jun 29 04:36:34 PM PDT 24	Jun 29 04:41:18 PM PDT 24	16041161766 ps