Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1035
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.29 69.29 91.91 91.91 69.91 69.91 80.44 80.44 23.81 23.81 80.57 80.57 93.42 93.42 44.97 44.97 /workspace/coverage/default/37.sram_ctrl_regwen.230463352
86.41 17.12 96.32 4.42 84.60 14.69 97.18 16.74 66.67 42.86 89.10 8.53 95.32 1.90 75.69 30.71 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2708349741
90.35 3.94 97.38 1.06 84.60 0.00 97.18 0.00 90.48 23.81 90.76 1.66 96.20 0.88 75.87 0.18 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.615809440
93.68 3.33 98.53 1.14 87.91 3.32 97.80 0.62 100.00 9.52 93.84 3.08 96.35 0.15 81.35 5.48 /workspace/coverage/default/23.sram_ctrl_stress_all.1029700947
94.69 1.00 98.69 0.16 88.74 0.83 98.00 0.21 100.00 0.00 94.55 0.71 96.35 0.00 86.47 5.12 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1308768020
95.47 0.78 98.86 0.16 90.52 1.78 98.76 0.76 100.00 0.00 95.26 0.71 96.93 0.58 87.93 1.46 /workspace/coverage/default/0.sram_ctrl_sec_cm.1211351937
96.06 0.59 99.10 0.25 90.52 0.00 98.76 0.00 100.00 0.00 95.73 0.47 97.08 0.15 91.22 3.29 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1003460065
96.53 0.47 99.10 0.00 90.52 0.00 98.76 0.00 100.00 0.00 95.73 0.00 97.08 0.00 94.52 3.29 /workspace/coverage/default/15.sram_ctrl_stress_all.854914411
96.76 0.24 99.10 0.00 90.52 0.00 98.76 0.00 100.00 0.00 95.73 0.00 97.81 0.73 95.43 0.91 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2394299099
96.95 0.19 99.10 0.00 90.52 0.00 98.76 0.00 100.00 0.00 95.73 0.00 99.12 1.32 95.43 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.220897867
97.08 0.13 99.18 0.08 90.52 0.00 99.59 0.83 100.00 0.00 95.73 0.00 99.12 0.00 95.43 0.00 /workspace/coverage/default/16.sram_ctrl_ram_cfg.2846510122
97.19 0.10 99.18 0.00 90.52 0.00 99.59 0.00 100.00 0.00 95.73 0.00 99.12 0.00 96.16 0.73 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2060323867
97.29 0.10 99.18 0.00 90.52 0.00 99.59 0.00 100.00 0.00 95.73 0.00 99.12 0.00 96.89 0.73 /workspace/coverage/default/11.sram_ctrl_regwen.1976063499
97.38 0.08 99.18 0.00 90.64 0.12 99.59 0.00 100.00 0.00 96.21 0.47 99.12 0.00 96.89 0.00 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1718175603
97.44 0.06 99.18 0.00 91.00 0.36 99.66 0.07 100.00 0.00 96.21 0.00 99.12 0.00 96.89 0.00 /workspace/coverage/default/0.sram_ctrl_alert_test.3263110394
97.49 0.05 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.37 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2712595740
97.52 0.03 99.18 0.00 91.00 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3242524532
97.52 0.01 99.18 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.70504456

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.349436591
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.513565770
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.646667807
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4027727179
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1507388102
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2258284481
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3763466452
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1308887284
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3681407075
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4072025139
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.141955991
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.499107002
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1922628912
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1264291227
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2236607662
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2664837044
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1945379024
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2516743155
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3906833630
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.336138452
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.704267005
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2396663140
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2564751624
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3623576248
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3029058987
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3100155688
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1886383310
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3679207367
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.4182081213
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.4100507069
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1920452207
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3356578321
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.57682516
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1367274843
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.289768676
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.775175794
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.670761924
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.4102389149
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3784048139
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3174173995
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3903008879
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2033314365
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.913107946
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.4118490022
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1419211775
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1085711004
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2100417474
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.504270825
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1024876224
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2637344807
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2158298330
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1899613256
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2319659115
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.4173416359
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.959507450
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.704104784
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.733520321
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1717381200
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.4146736556
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3119137472
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.741750576
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1553804008
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2825090163
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4266319778
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3928742684
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3117098594
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.319084593
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.955751972
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4255971294
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.507837520
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.244976327
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2102970763
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2384132255
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.309819371
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1081623193
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2249161533
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3292472711
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3921855890
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1148131707
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3293265266
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.542773466
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.35780969
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3735024492
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1856929846
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3040107190
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2470552182
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1628377988
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1128420124
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1453769043
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1370707927
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3585378751
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2597651400
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3121120622
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3017986368
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1964825115
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3630974536
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3462408549
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3242624303
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1458176507
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.138053000
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1260852930
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.315868570
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2012804556
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3641453206
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1368675390
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.950989114
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1338543135
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.4056071063
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2630010702
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.545224652
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1065107532
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.638962987
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.966091776
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3972380640
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3994984389
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3953061708
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2348569407
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.421803769
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2958589988
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1114160853
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1844216139
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1600222670
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2484660586
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3821190757
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.302643695
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4057917098
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.585614263
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3953396470
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1489915119
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.250760278
/workspace/coverage/default/0.sram_ctrl_bijection.1010865867
/workspace/coverage/default/0.sram_ctrl_executable.3280898075
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1481953778
/workspace/coverage/default/0.sram_ctrl_max_throughput.2097415630
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1826504887
/workspace/coverage/default/0.sram_ctrl_mem_walk.736592320
/workspace/coverage/default/0.sram_ctrl_multiple_keys.859164727
/workspace/coverage/default/0.sram_ctrl_partial_access.309692943
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2361311934
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2685926116
/workspace/coverage/default/0.sram_ctrl_regwen.3615634482
/workspace/coverage/default/0.sram_ctrl_smoke.3141885878
/workspace/coverage/default/0.sram_ctrl_stress_all.231644111
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.344512472
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2316339044
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3500926387
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3403760463
/workspace/coverage/default/1.sram_ctrl_alert_test.2410951997
/workspace/coverage/default/1.sram_ctrl_bijection.2363510387
/workspace/coverage/default/1.sram_ctrl_executable.3244539695
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4121806039
/workspace/coverage/default/1.sram_ctrl_max_throughput.3455379673
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3018665644
/workspace/coverage/default/1.sram_ctrl_mem_walk.2465421850
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1976586340
/workspace/coverage/default/1.sram_ctrl_partial_access.3652142984
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3472156295
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4227338735
/workspace/coverage/default/1.sram_ctrl_regwen.4034586088
/workspace/coverage/default/1.sram_ctrl_sec_cm.295789568
/workspace/coverage/default/1.sram_ctrl_smoke.413693295
/workspace/coverage/default/1.sram_ctrl_stress_all.699879541
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.670795768
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3769392703
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3997814471
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4080716873
/workspace/coverage/default/10.sram_ctrl_alert_test.2343021034
/workspace/coverage/default/10.sram_ctrl_bijection.3760073566
/workspace/coverage/default/10.sram_ctrl_executable.2744842595
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1253887346
/workspace/coverage/default/10.sram_ctrl_max_throughput.1847359809
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3702806431
/workspace/coverage/default/10.sram_ctrl_mem_walk.3032497987
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2602671858
/workspace/coverage/default/10.sram_ctrl_partial_access.2007325083
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.290177171
/workspace/coverage/default/10.sram_ctrl_ram_cfg.752510888
/workspace/coverage/default/10.sram_ctrl_regwen.672491188
/workspace/coverage/default/10.sram_ctrl_smoke.345688983
/workspace/coverage/default/10.sram_ctrl_stress_all.1213743432
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2379647126
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1085844760
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4049962829
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1926474645
/workspace/coverage/default/11.sram_ctrl_alert_test.4078699471
/workspace/coverage/default/11.sram_ctrl_bijection.1931645599
/workspace/coverage/default/11.sram_ctrl_executable.660209144
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2396083674
/workspace/coverage/default/11.sram_ctrl_max_throughput.3359517696
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1181155841
/workspace/coverage/default/11.sram_ctrl_mem_walk.2653724960
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1416286922
/workspace/coverage/default/11.sram_ctrl_partial_access.3756481192
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2068458869
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1385431827
/workspace/coverage/default/11.sram_ctrl_smoke.3385850351
/workspace/coverage/default/11.sram_ctrl_stress_all.3115604530
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2180627975
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3740485002
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3570353230
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1747696823
/workspace/coverage/default/12.sram_ctrl_alert_test.3643872053
/workspace/coverage/default/12.sram_ctrl_bijection.3539930834
/workspace/coverage/default/12.sram_ctrl_executable.2303310799
/workspace/coverage/default/12.sram_ctrl_lc_escalation.520031356
/workspace/coverage/default/12.sram_ctrl_max_throughput.939355607
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.161551839
/workspace/coverage/default/12.sram_ctrl_mem_walk.3091290713
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/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2190685660
/workspace/coverage/default/43.sram_ctrl_alert_test.1945204954
/workspace/coverage/default/43.sram_ctrl_bijection.866120920
/workspace/coverage/default/43.sram_ctrl_executable.3429747281
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2701819001
/workspace/coverage/default/43.sram_ctrl_max_throughput.1785046896
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3353184158
/workspace/coverage/default/43.sram_ctrl_mem_walk.2045579015
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3603534261
/workspace/coverage/default/43.sram_ctrl_partial_access.404938268
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2570406296
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4287663658
/workspace/coverage/default/43.sram_ctrl_regwen.3754159495
/workspace/coverage/default/43.sram_ctrl_smoke.2345611599
/workspace/coverage/default/43.sram_ctrl_stress_all.1826649911
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2058028752
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3336080547
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2761593831
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3430319671
/workspace/coverage/default/44.sram_ctrl_alert_test.98503152
/workspace/coverage/default/44.sram_ctrl_bijection.4011775980
/workspace/coverage/default/44.sram_ctrl_executable.1070664250
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3866577748
/workspace/coverage/default/44.sram_ctrl_max_throughput.2996609691
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.330939201
/workspace/coverage/default/44.sram_ctrl_mem_walk.2244536040
/workspace/coverage/default/44.sram_ctrl_multiple_keys.127162595
/workspace/coverage/default/44.sram_ctrl_partial_access.4174485719
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3770455009
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2204504234
/workspace/coverage/default/44.sram_ctrl_regwen.2951434055
/workspace/coverage/default/44.sram_ctrl_smoke.2168107543
/workspace/coverage/default/44.sram_ctrl_stress_all.196811537
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4127682028
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3298921387
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1974481489
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.454399528
/workspace/coverage/default/45.sram_ctrl_alert_test.4145815486
/workspace/coverage/default/45.sram_ctrl_bijection.1587774957
/workspace/coverage/default/45.sram_ctrl_executable.1336929046
/workspace/coverage/default/45.sram_ctrl_lc_escalation.680665923
/workspace/coverage/default/45.sram_ctrl_max_throughput.524215671
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2085916244
/workspace/coverage/default/45.sram_ctrl_mem_walk.3770991364
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1201121762
/workspace/coverage/default/45.sram_ctrl_partial_access.2984917524
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3912070194
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2140177655
/workspace/coverage/default/45.sram_ctrl_regwen.250854404
/workspace/coverage/default/45.sram_ctrl_smoke.1212606155
/workspace/coverage/default/45.sram_ctrl_stress_all.429262915
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2420815584
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.368108814
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1019299626
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4060656175
/workspace/coverage/default/46.sram_ctrl_alert_test.270686721
/workspace/coverage/default/46.sram_ctrl_bijection.4248767909
/workspace/coverage/default/46.sram_ctrl_executable.390722071
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2236819220
/workspace/coverage/default/46.sram_ctrl_max_throughput.2614175538
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.72700190
/workspace/coverage/default/46.sram_ctrl_mem_walk.1204459688
/workspace/coverage/default/46.sram_ctrl_multiple_keys.4134458016
/workspace/coverage/default/46.sram_ctrl_partial_access.3816493431
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1342955297
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1103821197
/workspace/coverage/default/46.sram_ctrl_regwen.1977835050
/workspace/coverage/default/46.sram_ctrl_smoke.3493448349
/workspace/coverage/default/46.sram_ctrl_stress_all.3252844510
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4204404912
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3744341418
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.929817979
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3934873330
/workspace/coverage/default/47.sram_ctrl_alert_test.3959481538
/workspace/coverage/default/47.sram_ctrl_bijection.691655941
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2932047304
/workspace/coverage/default/47.sram_ctrl_max_throughput.1476232958
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4131982046
/workspace/coverage/default/47.sram_ctrl_mem_walk.4145678137
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1175789236
/workspace/coverage/default/47.sram_ctrl_partial_access.457938532
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4196768744
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1770272323
/workspace/coverage/default/47.sram_ctrl_regwen.2592205822
/workspace/coverage/default/47.sram_ctrl_smoke.4067994244
/workspace/coverage/default/47.sram_ctrl_stress_all.519221667
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3672401296
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1192126392
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2179465948
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.570295502
/workspace/coverage/default/48.sram_ctrl_alert_test.2341233243
/workspace/coverage/default/48.sram_ctrl_executable.3524922017
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1743497358
/workspace/coverage/default/48.sram_ctrl_max_throughput.2378942419
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2635716299
/workspace/coverage/default/48.sram_ctrl_mem_walk.2036336617
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3479293753
/workspace/coverage/default/48.sram_ctrl_partial_access.2528704495
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.27777157
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1783312186
/workspace/coverage/default/48.sram_ctrl_regwen.3965907913
/workspace/coverage/default/48.sram_ctrl_smoke.4133556965
/workspace/coverage/default/48.sram_ctrl_stress_all.3626690252
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3796845606
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.23053505
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2284792593
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.850195880
/workspace/coverage/default/49.sram_ctrl_alert_test.34342684
/workspace/coverage/default/49.sram_ctrl_bijection.1260944312
/workspace/coverage/default/49.sram_ctrl_executable.2464257335
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2570132710
/workspace/coverage/default/49.sram_ctrl_max_throughput.2918978481
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3965946631
/workspace/coverage/default/49.sram_ctrl_mem_walk.1063759169
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2863593437
/workspace/coverage/default/49.sram_ctrl_partial_access.1686470225
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2290471418
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3722464677
/workspace/coverage/default/49.sram_ctrl_regwen.1179813152
/workspace/coverage/default/49.sram_ctrl_smoke.819488171
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2963544124
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4188510135
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.618083947
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3909548347
/workspace/coverage/default/5.sram_ctrl_alert_test.3247450117
/workspace/coverage/default/5.sram_ctrl_bijection.1901433696
/workspace/coverage/default/5.sram_ctrl_executable.3416630790
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2149438173
/workspace/coverage/default/5.sram_ctrl_max_throughput.500012909
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2911803944
/workspace/coverage/default/5.sram_ctrl_mem_walk.3453363724
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3515585624
/workspace/coverage/default/5.sram_ctrl_partial_access.3306144473
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.236849988
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3607366085
/workspace/coverage/default/5.sram_ctrl_regwen.4182948713
/workspace/coverage/default/5.sram_ctrl_smoke.3056176122
/workspace/coverage/default/5.sram_ctrl_stress_all.2160296625
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2060044566
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3015195804
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3663231156
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1777580580
/workspace/coverage/default/6.sram_ctrl_alert_test.111359174
/workspace/coverage/default/6.sram_ctrl_bijection.333993743
/workspace/coverage/default/6.sram_ctrl_executable.1507786472
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3705642242
/workspace/coverage/default/6.sram_ctrl_max_throughput.3497764516
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1278888272
/workspace/coverage/default/6.sram_ctrl_mem_walk.1415623829
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1820573700
/workspace/coverage/default/6.sram_ctrl_partial_access.1429359447
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.533116502
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3524063419
/workspace/coverage/default/6.sram_ctrl_regwen.1919818761
/workspace/coverage/default/6.sram_ctrl_smoke.6829342
/workspace/coverage/default/6.sram_ctrl_stress_all.2194073763
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3969100766
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2299599705
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4098246582
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.4033777542
/workspace/coverage/default/7.sram_ctrl_alert_test.1744929622
/workspace/coverage/default/7.sram_ctrl_bijection.2879767049
/workspace/coverage/default/7.sram_ctrl_executable.864445437
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2434495142
/workspace/coverage/default/7.sram_ctrl_max_throughput.2580011217
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3134719348
/workspace/coverage/default/7.sram_ctrl_mem_walk.1796328678
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2188586006
/workspace/coverage/default/7.sram_ctrl_partial_access.937127295
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3123190437
/workspace/coverage/default/7.sram_ctrl_ram_cfg.42272370
/workspace/coverage/default/7.sram_ctrl_regwen.459888828
/workspace/coverage/default/7.sram_ctrl_smoke.390232874
/workspace/coverage/default/7.sram_ctrl_stress_all.3797699566
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1820141351
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4022630266
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1129069145
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1911537286
/workspace/coverage/default/8.sram_ctrl_alert_test.2774086398
/workspace/coverage/default/8.sram_ctrl_bijection.2499311057
/workspace/coverage/default/8.sram_ctrl_executable.2060815293
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1820175370
/workspace/coverage/default/8.sram_ctrl_max_throughput.1235356126
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2301559545
/workspace/coverage/default/8.sram_ctrl_mem_walk.539296645
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3966897494
/workspace/coverage/default/8.sram_ctrl_partial_access.1178459962
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1385178227
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3341800194
/workspace/coverage/default/8.sram_ctrl_regwen.3139785709
/workspace/coverage/default/8.sram_ctrl_smoke.4190448711
/workspace/coverage/default/8.sram_ctrl_stress_all.3793274671
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.500171219
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1101762965
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1108005156
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1469671404
/workspace/coverage/default/9.sram_ctrl_alert_test.2661226522
/workspace/coverage/default/9.sram_ctrl_bijection.3877903043
/workspace/coverage/default/9.sram_ctrl_executable.911593585
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1859877016
/workspace/coverage/default/9.sram_ctrl_max_throughput.4023946399
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3935818129
/workspace/coverage/default/9.sram_ctrl_mem_walk.839770137
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2992435131
/workspace/coverage/default/9.sram_ctrl_partial_access.2591374054
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4236014981
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3673375211
/workspace/coverage/default/9.sram_ctrl_regwen.3859435084
/workspace/coverage/default/9.sram_ctrl_smoke.3201778718
/workspace/coverage/default/9.sram_ctrl_stress_all.2286579460
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1240237007
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3070280857
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1742041594



Total test records in report: 1035
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/6.sram_ctrl_partial_access.1429359447 Jul 01 11:27:22 AM PDT 24 Jul 01 11:27:32 AM PDT 24 775288722 ps
T2 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1528420237 Jul 01 11:33:12 AM PDT 24 Jul 01 11:33:21 AM PDT 24 2737598120 ps
T3 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.419216871 Jul 01 11:30:43 AM PDT 24 Jul 01 11:30:55 AM PDT 24 279518908 ps
T4 /workspace/coverage/default/18.sram_ctrl_mem_walk.1265279863 Jul 01 11:29:32 AM PDT 24 Jul 01 11:35:16 AM PDT 24 20881008563 ps
T5 /workspace/coverage/default/46.sram_ctrl_smoke.3493448349 Jul 01 11:35:50 AM PDT 24 Jul 01 11:35:59 AM PDT 24 642695638 ps
T9 /workspace/coverage/default/26.sram_ctrl_max_throughput.2264630006 Jul 01 11:31:18 AM PDT 24 Jul 01 11:33:34 AM PDT 24 773566895 ps
T10 /workspace/coverage/default/5.sram_ctrl_ram_cfg.3607366085 Jul 01 11:27:16 AM PDT 24 Jul 01 11:27:21 AM PDT 24 347758211 ps
T11 /workspace/coverage/default/35.sram_ctrl_ram_cfg.539234260 Jul 01 11:33:29 AM PDT 24 Jul 01 11:33:32 AM PDT 24 1064906024 ps
T12 /workspace/coverage/default/43.sram_ctrl_ram_cfg.4287663658 Jul 01 11:35:17 AM PDT 24 Jul 01 11:35:22 AM PDT 24 3350240191 ps
T13 /workspace/coverage/default/37.sram_ctrl_regwen.230463352 Jul 01 11:33:53 AM PDT 24 Jul 01 11:39:43 AM PDT 24 3408858464 ps
T6 /workspace/coverage/default/23.sram_ctrl_stress_all.1029700947 Jul 01 11:30:44 AM PDT 24 Jul 01 12:14:38 PM PDT 24 100616043995 ps
T35 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.4220426829 Jul 01 11:33:01 AM PDT 24 Jul 01 11:34:19 AM PDT 24 15509708274 ps
T36 /workspace/coverage/default/49.sram_ctrl_max_throughput.2918978481 Jul 01 11:36:39 AM PDT 24 Jul 01 11:37:06 AM PDT 24 2826628767 ps
T57 /workspace/coverage/default/21.sram_ctrl_ram_cfg.3433601613 Jul 01 11:30:17 AM PDT 24 Jul 01 11:30:21 AM PDT 24 1348609118 ps
T37 /workspace/coverage/default/32.sram_ctrl_max_throughput.737205313 Jul 01 11:32:48 AM PDT 24 Jul 01 11:35:23 AM PDT 24 808786383 ps
T39 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.2895463444 Jul 01 11:29:20 AM PDT 24 Jul 01 11:31:50 AM PDT 24 9717323512 ps
T41 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3935818129 Jul 01 11:27:49 AM PDT 24 Jul 01 11:30:51 AM PDT 24 20404054673 ps
T42 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.1805362036 Jul 01 11:31:17 AM PDT 24 Jul 01 11:44:25 AM PDT 24 22862706424 ps
T58 /workspace/coverage/default/34.sram_ctrl_ram_cfg.2966767910 Jul 01 11:33:12 AM PDT 24 Jul 01 11:33:17 AM PDT 24 712598402 ps
T40 /workspace/coverage/default/17.sram_ctrl_multiple_keys.65238768 Jul 01 11:29:11 AM PDT 24 Jul 01 11:39:22 AM PDT 24 29811111578 ps
T38 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1003460065 Jul 01 11:28:58 AM PDT 24 Jul 01 11:35:14 AM PDT 24 125352579655 ps
T23 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2708349741 Jul 01 11:28:32 AM PDT 24 Jul 01 11:29:31 AM PDT 24 7452582969 ps
T7 /workspace/coverage/default/3.sram_ctrl_lc_escalation.525903098 Jul 01 11:27:00 AM PDT 24 Jul 01 11:27:46 AM PDT 24 7645267442 ps
T95 /workspace/coverage/default/33.sram_ctrl_smoke.948370265 Jul 01 11:32:47 AM PDT 24 Jul 01 11:33:46 AM PDT 24 425886229 ps
T96 /workspace/coverage/default/21.sram_ctrl_max_throughput.2889341203 Jul 01 11:30:09 AM PDT 24 Jul 01 11:31:30 AM PDT 24 1561520793 ps
T24 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3974866605 Jul 01 11:34:47 AM PDT 24 Jul 01 11:34:57 AM PDT 24 1159831264 ps
T97 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3770455009 Jul 01 11:35:28 AM PDT 24 Jul 01 11:39:44 AM PDT 24 45181681305 ps
T8 /workspace/coverage/default/46.sram_ctrl_stress_all.3252844510 Jul 01 11:36:06 AM PDT 24 Jul 01 12:19:27 PM PDT 24 328917049429 ps
T81 /workspace/coverage/default/7.sram_ctrl_executable.864445437 Jul 01 11:27:33 AM PDT 24 Jul 01 11:49:26 AM PDT 24 39764014677 ps
T98 /workspace/coverage/default/17.sram_ctrl_bijection.2591011530 Jul 01 11:29:10 AM PDT 24 Jul 01 11:47:24 AM PDT 24 16417851849 ps
T43 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1777580580 Jul 01 11:27:27 AM PDT 24 Jul 01 11:42:15 AM PDT 24 22871531057 ps
T139 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.669921196 Jul 01 11:30:23 AM PDT 24 Jul 01 11:30:30 AM PDT 24 679961622 ps
T20 /workspace/coverage/default/10.sram_ctrl_regwen.672491188 Jul 01 11:28:05 AM PDT 24 Jul 01 11:35:01 AM PDT 24 1285251651 ps
T140 /workspace/coverage/default/39.sram_ctrl_bijection.1595466965 Jul 01 11:34:07 AM PDT 24 Jul 01 11:51:46 AM PDT 24 33538883631 ps
T135 /workspace/coverage/default/23.sram_ctrl_partial_access.135935038 Jul 01 11:30:33 AM PDT 24 Jul 01 11:32:19 AM PDT 24 4071220149 ps
T137 /workspace/coverage/default/41.sram_ctrl_bijection.3983385197 Jul 01 11:34:38 AM PDT 24 Jul 01 11:56:12 AM PDT 24 18948419673 ps
T138 /workspace/coverage/default/44.sram_ctrl_ram_cfg.2204504234 Jul 01 11:35:34 AM PDT 24 Jul 01 11:35:39 AM PDT 24 3358080720 ps
T141 /workspace/coverage/default/37.sram_ctrl_smoke.3999903718 Jul 01 11:33:52 AM PDT 24 Jul 01 11:34:08 AM PDT 24 1139567788 ps
T136 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.8417489 Jul 01 11:31:07 AM PDT 24 Jul 01 11:31:56 AM PDT 24 3081724816 ps
T64 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2394299099 Jul 01 11:33:47 AM PDT 24 Jul 01 11:34:13 AM PDT 24 2868784909 ps
T116 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.618083947 Jul 01 11:36:45 AM PDT 24 Jul 01 11:39:21 AM PDT 24 4342091123 ps
T22 /workspace/coverage/default/11.sram_ctrl_lc_escalation.2396083674 Jul 01 11:28:05 AM PDT 24 Jul 01 11:29:26 AM PDT 24 15594805246 ps
T117 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2179465948 Jul 01 11:36:12 AM PDT 24 Jul 01 11:36:21 AM PDT 24 1392483073 ps
T70 /workspace/coverage/default/1.sram_ctrl_lc_escalation.4121806039 Jul 01 11:26:41 AM PDT 24 Jul 01 11:27:08 AM PDT 24 3788256615 ps
T21 /workspace/coverage/default/35.sram_ctrl_stress_all.4269155241 Jul 01 11:33:28 AM PDT 24 Jul 01 01:27:59 PM PDT 24 92157862655 ps
T87 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1181155841 Jul 01 11:28:18 AM PDT 24 Jul 01 11:29:36 AM PDT 24 1224494943 ps
T14 /workspace/coverage/default/40.sram_ctrl_alert_test.5176358 Jul 01 11:34:39 AM PDT 24 Jul 01 11:34:40 AM PDT 24 34424496 ps
T118 /workspace/coverage/default/47.sram_ctrl_bijection.691655941 Jul 01 11:36:05 AM PDT 24 Jul 01 11:49:09 AM PDT 24 90171162684 ps
T71 /workspace/coverage/default/14.sram_ctrl_lc_escalation.3630352102 Jul 01 11:28:41 AM PDT 24 Jul 01 11:29:57 AM PDT 24 11540347684 ps
T142 /workspace/coverage/default/3.sram_ctrl_bijection.2655895350 Jul 01 11:26:57 AM PDT 24 Jul 01 11:55:50 AM PDT 24 226195886678 ps
T143 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.929817979 Jul 01 11:36:02 AM PDT 24 Jul 01 11:37:54 AM PDT 24 1589560381 ps
T44 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1911537286 Jul 01 11:27:38 AM PDT 24 Jul 01 11:36:59 AM PDT 24 43959001272 ps
T48 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.615809440 Jul 01 11:27:12 AM PDT 24 Jul 01 11:28:38 AM PDT 24 6023874603 ps
T144 /workspace/coverage/default/30.sram_ctrl_bijection.1730872695 Jul 01 11:32:13 AM PDT 24 Jul 01 12:10:00 PM PDT 24 63675177797 ps
T145 /workspace/coverage/default/22.sram_ctrl_max_throughput.1960488815 Jul 01 11:30:23 AM PDT 24 Jul 01 11:30:58 AM PDT 24 1395623653 ps
T17 /workspace/coverage/default/0.sram_ctrl_sec_cm.1211351937 Jul 01 11:26:36 AM PDT 24 Jul 01 11:26:40 AM PDT 24 170703169 ps
T27 /workspace/coverage/default/9.sram_ctrl_max_throughput.4023946399 Jul 01 11:27:50 AM PDT 24 Jul 01 11:30:53 AM PDT 24 1179028943 ps
T28 /workspace/coverage/default/19.sram_ctrl_multiple_keys.3215842180 Jul 01 11:29:37 AM PDT 24 Jul 01 11:58:07 AM PDT 24 15560130768 ps
T29 /workspace/coverage/default/11.sram_ctrl_mem_walk.2653724960 Jul 01 11:28:17 AM PDT 24 Jul 01 11:30:50 AM PDT 24 7216745205 ps
T15 /workspace/coverage/default/49.sram_ctrl_alert_test.34342684 Jul 01 11:36:49 AM PDT 24 Jul 01 11:36:50 AM PDT 24 14121012 ps
T30 /workspace/coverage/default/36.sram_ctrl_lc_escalation.3459225315 Jul 01 11:33:42 AM PDT 24 Jul 01 11:35:28 AM PDT 24 68263360153 ps
T31 /workspace/coverage/default/8.sram_ctrl_regwen.3139785709 Jul 01 11:27:45 AM PDT 24 Jul 01 11:48:08 AM PDT 24 66105924968 ps
T32 /workspace/coverage/default/7.sram_ctrl_regwen.459888828 Jul 01 11:27:32 AM PDT 24 Jul 01 11:39:41 AM PDT 24 18333036435 ps
T33 /workspace/coverage/default/35.sram_ctrl_smoke.107147669 Jul 01 11:33:20 AM PDT 24 Jul 01 11:33:33 AM PDT 24 2849564504 ps
T34 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3833921725 Jul 01 11:28:41 AM PDT 24 Jul 01 11:28:47 AM PDT 24 675859406 ps
T146 /workspace/coverage/default/36.sram_ctrl_executable.705421248 Jul 01 11:33:43 AM PDT 24 Jul 01 11:36:55 AM PDT 24 11087162462 ps
T16 /workspace/coverage/default/31.sram_ctrl_alert_test.678857938 Jul 01 11:32:40 AM PDT 24 Jul 01 11:32:41 AM PDT 24 15412068 ps
T147 /workspace/coverage/default/36.sram_ctrl_max_throughput.1325251823 Jul 01 11:33:38 AM PDT 24 Jul 01 11:35:28 AM PDT 24 3144651385 ps
T88 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.4246897563 Jul 01 11:32:27 AM PDT 24 Jul 01 11:35:04 AM PDT 24 18242370074 ps
T148 /workspace/coverage/default/47.sram_ctrl_alert_test.3959481538 Jul 01 11:36:14 AM PDT 24 Jul 01 11:36:16 AM PDT 24 21701617 ps
T65 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2420815584 Jul 01 11:35:52 AM PDT 24 Jul 01 11:36:19 AM PDT 24 1480532899 ps
T149 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3118124551 Jul 01 11:30:04 AM PDT 24 Jul 01 11:30:26 AM PDT 24 739689364 ps
T89 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.1325589079 Jul 01 11:33:47 AM PDT 24 Jul 01 11:35:09 AM PDT 24 9789435973 ps
T150 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3866666199 Jul 01 11:30:40 AM PDT 24 Jul 01 11:31:26 AM PDT 24 790236075 ps
T151 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.3257567446 Jul 01 11:28:59 AM PDT 24 Jul 01 11:58:15 AM PDT 24 57510363659 ps
T152 /workspace/coverage/default/44.sram_ctrl_max_throughput.2996609691 Jul 01 11:35:27 AM PDT 24 Jul 01 11:37:27 AM PDT 24 3108264560 ps
T49 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1772209257 Jul 01 11:26:57 AM PDT 24 Jul 01 11:29:47 AM PDT 24 20009457943 ps
T153 /workspace/coverage/default/25.sram_ctrl_partial_access.2365901194 Jul 01 11:31:05 AM PDT 24 Jul 01 11:31:11 AM PDT 24 1735766195 ps
T102 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.848335664 Jul 01 11:34:18 AM PDT 24 Jul 01 11:36:21 AM PDT 24 3194498717 ps
T134 /workspace/coverage/default/49.sram_ctrl_executable.2464257335 Jul 01 11:36:45 AM PDT 24 Jul 01 11:54:52 AM PDT 24 6148503522 ps
T154 /workspace/coverage/default/46.sram_ctrl_max_throughput.2614175538 Jul 01 11:36:01 AM PDT 24 Jul 01 11:36:09 AM PDT 24 712384667 ps
T103 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4040503134 Jul 01 11:32:33 AM PDT 24 Jul 01 11:41:28 AM PDT 24 161728302648 ps
T155 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2190685660 Jul 01 11:35:17 AM PDT 24 Jul 01 12:03:23 PM PDT 24 15010405545 ps
T130 /workspace/coverage/default/15.sram_ctrl_stress_all.854914411 Jul 01 11:28:58 AM PDT 24 Jul 01 12:11:30 PM PDT 24 106149536435 ps
T66 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1653873946 Jul 01 11:27:13 AM PDT 24 Jul 01 11:27:29 AM PDT 24 6742244973 ps
T104 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2055274523 Jul 01 11:34:41 AM PDT 24 Jul 01 11:40:43 AM PDT 24 6701125137 ps
T156 /workspace/coverage/default/16.sram_ctrl_ram_cfg.2846510122 Jul 01 11:29:06 AM PDT 24 Jul 01 11:29:10 AM PDT 24 367706761 ps
T157 /workspace/coverage/default/22.sram_ctrl_executable.2605529689 Jul 01 11:30:25 AM PDT 24 Jul 01 11:44:40 AM PDT 24 12601067894 ps
T133 /workspace/coverage/default/5.sram_ctrl_regwen.4182948713 Jul 01 11:27:17 AM PDT 24 Jul 01 11:37:31 AM PDT 24 17867643992 ps
T50 /workspace/coverage/default/13.sram_ctrl_mem_walk.847895187 Jul 01 11:28:39 AM PDT 24 Jul 01 11:34:00 AM PDT 24 41931580525 ps
T158 /workspace/coverage/default/18.sram_ctrl_multiple_keys.4027033132 Jul 01 11:29:28 AM PDT 24 Jul 01 11:58:58 AM PDT 24 52774877271 ps
T159 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.4060656175 Jul 01 11:36:00 AM PDT 24 Jul 01 11:46:20 AM PDT 24 47957427992 ps
T160 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.608721500 Jul 01 11:34:43 AM PDT 24 Jul 01 11:35:40 AM PDT 24 749512143 ps
T161 /workspace/coverage/default/2.sram_ctrl_bijection.1418476797 Jul 01 11:26:53 AM PDT 24 Jul 01 11:46:19 AM PDT 24 51353253343 ps
T162 /workspace/coverage/default/11.sram_ctrl_partial_access.3756481192 Jul 01 11:28:06 AM PDT 24 Jul 01 11:28:16 AM PDT 24 1838210230 ps
T163 /workspace/coverage/default/49.sram_ctrl_bijection.1260944312 Jul 01 11:36:37 AM PDT 24 Jul 01 11:55:15 AM PDT 24 92437367943 ps
T164 /workspace/coverage/default/15.sram_ctrl_smoke.3124080443 Jul 01 11:28:50 AM PDT 24 Jul 01 11:29:06 AM PDT 24 873213295 ps
T51 /workspace/coverage/default/25.sram_ctrl_mem_walk.3482069890 Jul 01 11:31:11 AM PDT 24 Jul 01 11:34:09 AM PDT 24 10765685928 ps
T165 /workspace/coverage/default/31.sram_ctrl_max_throughput.2962612920 Jul 01 11:32:32 AM PDT 24 Jul 01 11:34:19 AM PDT 24 9505264648 ps
T105 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.403467682 Jul 01 11:31:33 AM PDT 24 Jul 01 11:34:51 AM PDT 24 3380461027 ps
T166 /workspace/coverage/default/45.sram_ctrl_bijection.1587774957 Jul 01 11:35:42 AM PDT 24 Jul 01 11:59:39 AM PDT 24 76929326669 ps
T52 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4204404912 Jul 01 11:36:05 AM PDT 24 Jul 01 11:36:49 AM PDT 24 1297277823 ps
T167 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3442289299 Jul 01 11:31:28 AM PDT 24 Jul 01 11:31:56 AM PDT 24 10234185472 ps
T168 /workspace/coverage/default/44.sram_ctrl_partial_access.4174485719 Jul 01 11:35:30 AM PDT 24 Jul 01 11:35:40 AM PDT 24 1652264667 ps
T169 /workspace/coverage/default/0.sram_ctrl_mem_walk.736592320 Jul 01 11:26:36 AM PDT 24 Jul 01 11:29:20 AM PDT 24 98945444883 ps
T170 /workspace/coverage/default/0.sram_ctrl_max_throughput.2097415630 Jul 01 11:26:35 AM PDT 24 Jul 01 11:27:06 AM PDT 24 8810523330 ps
T171 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1976586340 Jul 01 11:26:37 AM PDT 24 Jul 01 11:29:36 AM PDT 24 2223994773 ps
T172 /workspace/coverage/default/45.sram_ctrl_partial_access.2984917524 Jul 01 11:35:40 AM PDT 24 Jul 01 11:36:04 AM PDT 24 1946258142 ps
T67 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3997100672 Jul 01 11:33:57 AM PDT 24 Jul 01 11:34:05 AM PDT 24 165419622 ps
T131 /workspace/coverage/default/1.sram_ctrl_executable.3244539695 Jul 01 11:26:42 AM PDT 24 Jul 01 11:51:27 AM PDT 24 9958487990 ps
T173 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2389062426 Jul 01 11:32:33 AM PDT 24 Jul 01 11:33:26 AM PDT 24 24552013261 ps
T132 /workspace/coverage/default/36.sram_ctrl_regwen.3288534236 Jul 01 11:33:42 AM PDT 24 Jul 01 11:59:37 AM PDT 24 75501974642 ps
T174 /workspace/coverage/default/27.sram_ctrl_executable.1368025748 Jul 01 11:31:31 AM PDT 24 Jul 01 11:52:32 AM PDT 24 9270737286 ps
T175 /workspace/coverage/default/43.sram_ctrl_bijection.866120920 Jul 01 11:35:09 AM PDT 24 Jul 01 12:16:12 PM PDT 24 66222093083 ps
T176 /workspace/coverage/default/35.sram_ctrl_executable.1415897349 Jul 01 11:33:26 AM PDT 24 Jul 01 11:46:13 AM PDT 24 33738495718 ps
T177 /workspace/coverage/default/39.sram_ctrl_lc_escalation.2572391488 Jul 01 11:34:23 AM PDT 24 Jul 01 11:35:30 AM PDT 24 13139671798 ps
T178 /workspace/coverage/default/28.sram_ctrl_executable.1227880874 Jul 01 11:31:48 AM PDT 24 Jul 01 11:38:30 AM PDT 24 35596573029 ps
T106 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.3070280857 Jul 01 11:27:45 AM PDT 24 Jul 01 11:30:48 AM PDT 24 6100106518 ps
T179 /workspace/coverage/default/20.sram_ctrl_bijection.1278771963 Jul 01 11:29:51 AM PDT 24 Jul 01 12:02:47 PM PDT 24 26837918456 ps
T180 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.3155858495 Jul 01 11:29:00 AM PDT 24 Jul 01 11:33:53 AM PDT 24 4606475890 ps
T181 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3342774435 Jul 01 11:28:26 AM PDT 24 Jul 01 11:31:23 AM PDT 24 16364018117 ps
T182 /workspace/coverage/default/12.sram_ctrl_alert_test.3643872053 Jul 01 11:28:21 AM PDT 24 Jul 01 11:28:24 AM PDT 24 14284658 ps
T183 /workspace/coverage/default/7.sram_ctrl_stress_all.3797699566 Jul 01 11:27:39 AM PDT 24 Jul 01 11:59:21 AM PDT 24 49410163862 ps
T184 /workspace/coverage/default/7.sram_ctrl_alert_test.1744929622 Jul 01 11:27:39 AM PDT 24 Jul 01 11:27:41 AM PDT 24 13518594 ps
T185 /workspace/coverage/default/32.sram_ctrl_executable.2857303417 Jul 01 11:32:49 AM PDT 24 Jul 01 11:49:07 AM PDT 24 11140991779 ps
T186 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2620471339 Jul 01 11:32:02 AM PDT 24 Jul 01 11:39:53 AM PDT 24 15926031543 ps
T187 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3769392703 Jul 01 11:26:41 AM PDT 24 Jul 01 11:32:23 AM PDT 24 6389491394 ps
T188 /workspace/coverage/default/19.sram_ctrl_smoke.2501307989 Jul 01 11:29:35 AM PDT 24 Jul 01 11:29:56 AM PDT 24 923955445 ps
T189 /workspace/coverage/default/36.sram_ctrl_mem_walk.542401567 Jul 01 11:33:51 AM PDT 24 Jul 01 11:36:44 AM PDT 24 57603101665 ps
T68 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.99265877 Jul 01 11:32:39 AM PDT 24 Jul 01 11:32:53 AM PDT 24 3988770753 ps
T190 /workspace/coverage/default/36.sram_ctrl_ram_cfg.1529393978 Jul 01 11:33:42 AM PDT 24 Jul 01 11:33:46 AM PDT 24 346316808 ps
T191 /workspace/coverage/default/13.sram_ctrl_alert_test.3527333284 Jul 01 11:28:32 AM PDT 24 Jul 01 11:28:34 AM PDT 24 17270720 ps
T192 /workspace/coverage/default/13.sram_ctrl_partial_access.778949882 Jul 01 11:28:26 AM PDT 24 Jul 01 11:28:49 AM PDT 24 1261773820 ps
T193 /workspace/coverage/default/1.sram_ctrl_partial_access.3652142984 Jul 01 11:26:42 AM PDT 24 Jul 01 11:27:00 AM PDT 24 5160161744 ps
T194 /workspace/coverage/default/23.sram_ctrl_regwen.1419487375 Jul 01 11:30:44 AM PDT 24 Jul 01 11:36:34 AM PDT 24 1429128590 ps
T195 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.162447978 Jul 01 11:34:48 AM PDT 24 Jul 01 11:37:53 AM PDT 24 6575758941 ps
T196 /workspace/coverage/default/21.sram_ctrl_smoke.3921432549 Jul 01 11:30:03 AM PDT 24 Jul 01 11:32:14 AM PDT 24 1215831335 ps
T197 /workspace/coverage/default/26.sram_ctrl_bijection.3621213686 Jul 01 11:31:18 AM PDT 24 Jul 01 11:43:55 AM PDT 24 43300244551 ps
T69 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1958575522 Jul 01 11:31:12 AM PDT 24 Jul 01 11:31:32 AM PDT 24 1823153314 ps
T198 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3895455371 Jul 01 11:31:18 AM PDT 24 Jul 01 11:35:03 AM PDT 24 4420392702 ps
T199 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3703592053 Jul 01 11:32:28 AM PDT 24 Jul 01 11:32:34 AM PDT 24 6722126527 ps
T200 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2290471418 Jul 01 11:36:39 AM PDT 24 Jul 01 11:42:15 AM PDT 24 5547697759 ps
T201 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.1561280199 Jul 01 11:29:26 AM PDT 24 Jul 01 11:30:21 AM PDT 24 779488014 ps
T202 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.2458308016 Jul 01 11:32:33 AM PDT 24 Jul 01 11:38:35 AM PDT 24 21869561514 ps
T203 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.330939201 Jul 01 11:35:37 AM PDT 24 Jul 01 11:37:10 AM PDT 24 13488808370 ps
T204 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.2180320365 Jul 01 11:32:38 AM PDT 24 Jul 01 11:35:36 AM PDT 24 17562298304 ps
T53 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2498806012 Jul 01 11:28:44 AM PDT 24 Jul 01 11:29:47 AM PDT 24 2420844074 ps
T205 /workspace/coverage/default/31.sram_ctrl_bijection.1669259268 Jul 01 11:32:32 AM PDT 24 Jul 01 12:05:18 PM PDT 24 98350153168 ps
T206 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.2146406199 Jul 01 11:26:57 AM PDT 24 Jul 01 11:30:39 AM PDT 24 36943812263 ps
T207 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1369343071 Jul 01 11:34:04 AM PDT 24 Jul 01 11:35:25 AM PDT 24 5754780278 ps
T208 /workspace/coverage/default/44.sram_ctrl_regwen.2951434055 Jul 01 11:35:33 AM PDT 24 Jul 01 11:47:19 AM PDT 24 12755709826 ps
T209 /workspace/coverage/default/11.sram_ctrl_regwen.1976063499 Jul 01 11:28:10 AM PDT 24 Jul 01 11:53:57 AM PDT 24 16950845243 ps
T210 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2140177655 Jul 01 11:35:45 AM PDT 24 Jul 01 11:35:48 AM PDT 24 1403459872 ps
T211 /workspace/coverage/default/4.sram_ctrl_partial_access.1562224759 Jul 01 11:27:07 AM PDT 24 Jul 01 11:29:24 AM PDT 24 6439170199 ps
T212 /workspace/coverage/default/38.sram_ctrl_regwen.1249410199 Jul 01 11:34:04 AM PDT 24 Jul 01 11:43:07 AM PDT 24 21397876169 ps
T213 /workspace/coverage/default/15.sram_ctrl_lc_escalation.72396518 Jul 01 11:28:51 AM PDT 24 Jul 01 11:29:15 AM PDT 24 3747371757 ps
T214 /workspace/coverage/default/39.sram_ctrl_executable.1392611834 Jul 01 11:34:23 AM PDT 24 Jul 01 11:41:50 AM PDT 24 4422632749 ps
T215 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3018665644 Jul 01 11:26:46 AM PDT 24 Jul 01 11:28:05 AM PDT 24 2686136858 ps
T216 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2301559545 Jul 01 11:27:43 AM PDT 24 Jul 01 11:28:51 AM PDT 24 7950580730 ps
T217 /workspace/coverage/default/6.sram_ctrl_smoke.6829342 Jul 01 11:27:16 AM PDT 24 Jul 01 11:27:32 AM PDT 24 3445898552 ps
T218 /workspace/coverage/default/3.sram_ctrl_alert_test.1478471535 Jul 01 11:27:00 AM PDT 24 Jul 01 11:27:02 AM PDT 24 15618509 ps
T219 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.2178440238 Jul 01 11:29:33 AM PDT 24 Jul 01 11:50:20 AM PDT 24 11346062416 ps
T220 /workspace/coverage/default/32.sram_ctrl_mem_walk.1726630468 Jul 01 11:32:49 AM PDT 24 Jul 01 11:37:45 AM PDT 24 23859547327 ps
T221 /workspace/coverage/default/5.sram_ctrl_mem_walk.3453363724 Jul 01 11:27:16 AM PDT 24 Jul 01 11:33:15 AM PDT 24 20996862881 ps
T222 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2467464373 Jul 01 11:32:44 AM PDT 24 Jul 01 11:38:05 AM PDT 24 8057109252 ps
T223 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1108005156 Jul 01 11:28:03 AM PDT 24 Jul 01 11:28:58 AM PDT 24 1854676370 ps
T224 /workspace/coverage/default/34.sram_ctrl_multiple_keys.3265874293 Jul 01 11:33:07 AM PDT 24 Jul 01 11:42:54 AM PDT 24 19152014945 ps
T225 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.2911803944 Jul 01 11:27:19 AM PDT 24 Jul 01 11:30:03 AM PDT 24 10711681337 ps
T226 /workspace/coverage/default/23.sram_ctrl_executable.1264255194 Jul 01 11:30:45 AM PDT 24 Jul 01 11:36:59 AM PDT 24 6860765992 ps
T227 /workspace/coverage/default/23.sram_ctrl_bijection.3220830938 Jul 01 11:30:33 AM PDT 24 Jul 01 11:54:45 AM PDT 24 84594856756 ps
T228 /workspace/coverage/default/48.sram_ctrl_smoke.4133556965 Jul 01 11:36:14 AM PDT 24 Jul 01 11:36:30 AM PDT 24 1030043135 ps
T229 /workspace/coverage/default/41.sram_ctrl_executable.244785812 Jul 01 11:34:45 AM PDT 24 Jul 01 11:46:07 AM PDT 24 34937877670 ps
T230 /workspace/coverage/default/25.sram_ctrl_lc_escalation.3101098385 Jul 01 11:31:06 AM PDT 24 Jul 01 11:31:57 AM PDT 24 7675190125 ps
T231 /workspace/coverage/default/25.sram_ctrl_max_throughput.1457667664 Jul 01 11:31:03 AM PDT 24 Jul 01 11:32:02 AM PDT 24 2612927223 ps
T232 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2068458869 Jul 01 11:28:07 AM PDT 24 Jul 01 11:33:13 AM PDT 24 24304346884 ps
T233 /workspace/coverage/default/15.sram_ctrl_bijection.3568113157 Jul 01 11:28:50 AM PDT 24 Jul 01 11:59:21 AM PDT 24 326342698793 ps
T234 /workspace/coverage/default/38.sram_ctrl_mem_walk.2671996264 Jul 01 11:34:10 AM PDT 24 Jul 01 11:39:53 AM PDT 24 13812544393 ps
T235 /workspace/coverage/default/41.sram_ctrl_mem_walk.2984184211 Jul 01 11:34:45 AM PDT 24 Jul 01 11:37:39 AM PDT 24 38381405238 ps
T236 /workspace/coverage/default/3.sram_ctrl_smoke.764563199 Jul 01 11:26:57 AM PDT 24 Jul 01 11:27:41 AM PDT 24 1302403724 ps
T237 /workspace/coverage/default/20.sram_ctrl_stress_all.2664705550 Jul 01 11:30:07 AM PDT 24 Jul 01 01:12:35 PM PDT 24 669866030000 ps
T238 /workspace/coverage/default/9.sram_ctrl_ram_cfg.3673375211 Jul 01 11:27:50 AM PDT 24 Jul 01 11:27:54 AM PDT 24 1175643253 ps
T239 /workspace/coverage/default/4.sram_ctrl_executable.2142228230 Jul 01 11:27:12 AM PDT 24 Jul 01 11:34:58 AM PDT 24 62329463627 ps
T240 /workspace/coverage/default/22.sram_ctrl_alert_test.98609291 Jul 01 11:30:29 AM PDT 24 Jul 01 11:30:30 AM PDT 24 79976438 ps
T241 /workspace/coverage/default/1.sram_ctrl_ram_cfg.4227338735 Jul 01 11:26:47 AM PDT 24 Jul 01 11:26:51 AM PDT 24 369175344 ps
T109 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2058028752 Jul 01 11:35:18 AM PDT 24 Jul 01 11:35:28 AM PDT 24 1487614116 ps
T242 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.4123745692 Jul 01 11:33:51 AM PDT 24 Jul 01 11:52:42 AM PDT 24 14993307360 ps
T243 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3919319208 Jul 01 11:33:22 AM PDT 24 Jul 01 11:47:58 AM PDT 24 12302077142 ps
T244 /workspace/coverage/default/18.sram_ctrl_partial_access.2990359590 Jul 01 11:29:26 AM PDT 24 Jul 01 11:29:57 AM PDT 24 666614377 ps
T245 /workspace/coverage/default/9.sram_ctrl_partial_access.2591374054 Jul 01 11:27:48 AM PDT 24 Jul 01 11:30:11 AM PDT 24 1103668165 ps
T246 /workspace/coverage/default/23.sram_ctrl_multiple_keys.371316823 Jul 01 11:30:33 AM PDT 24 Jul 01 11:48:01 AM PDT 24 36718102126 ps
T247 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2898255434 Jul 01 11:33:11 AM PDT 24 Jul 01 11:34:37 AM PDT 24 4804629864 ps
T248 /workspace/coverage/default/17.sram_ctrl_mem_walk.4131799267 Jul 01 11:29:21 AM PDT 24 Jul 01 11:32:47 AM PDT 24 21143648700 ps
T249 /workspace/coverage/default/29.sram_ctrl_ram_cfg.1208445698 Jul 01 11:32:04 AM PDT 24 Jul 01 11:32:08 AM PDT 24 1426419394 ps
T250 /workspace/coverage/default/13.sram_ctrl_regwen.3177434581 Jul 01 11:28:30 AM PDT 24 Jul 01 11:30:21 AM PDT 24 1498849361 ps
T251 /workspace/coverage/default/27.sram_ctrl_ram_cfg.3545236211 Jul 01 11:31:28 AM PDT 24 Jul 01 11:31:32 AM PDT 24 696490574 ps
T252 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1438969727 Jul 01 11:30:33 AM PDT 24 Jul 01 11:36:10 AM PDT 24 22295720779 ps
T253 /workspace/coverage/default/45.sram_ctrl_lc_escalation.680665923 Jul 01 11:35:40 AM PDT 24 Jul 01 11:36:55 AM PDT 24 11500609843 ps
T254 /workspace/coverage/default/44.sram_ctrl_lc_escalation.3866577748 Jul 01 11:35:29 AM PDT 24 Jul 01 11:36:30 AM PDT 24 10229943435 ps
T255 /workspace/coverage/default/33.sram_ctrl_stress_all.1690290934 Jul 01 11:33:03 AM PDT 24 Jul 01 12:50:24 PM PDT 24 593551591234 ps
T256 /workspace/coverage/default/16.sram_ctrl_lc_escalation.413093290 Jul 01 11:29:00 AM PDT 24 Jul 01 11:30:44 AM PDT 24 32383214400 ps
T257 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.4084104566 Jul 01 11:31:17 AM PDT 24 Jul 01 11:33:47 AM PDT 24 5236554752 ps
T258 /workspace/coverage/default/39.sram_ctrl_partial_access.2922539903 Jul 01 11:34:09 AM PDT 24 Jul 01 11:35:21 AM PDT 24 1524783729 ps
T259 /workspace/coverage/default/24.sram_ctrl_multiple_keys.3245270933 Jul 01 11:30:50 AM PDT 24 Jul 01 12:09:11 PM PDT 24 59339417092 ps
T260 /workspace/coverage/default/1.sram_ctrl_stress_all.699879541 Jul 01 11:26:49 AM PDT 24 Jul 01 12:21:54 PM PDT 24 141642557365 ps
T261 /workspace/coverage/default/19.sram_ctrl_lc_escalation.781997782 Jul 01 11:29:42 AM PDT 24 Jul 01 11:30:46 AM PDT 24 11108070564 ps
T262 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.2299599705 Jul 01 11:27:24 AM PDT 24 Jul 01 11:31:59 AM PDT 24 15612866279 ps
T263 /workspace/coverage/default/30.sram_ctrl_regwen.3954785768 Jul 01 11:32:30 AM PDT 24 Jul 01 11:50:47 AM PDT 24 5993633370 ps
T264 /workspace/coverage/default/4.sram_ctrl_regwen.473428185 Jul 01 11:27:13 AM PDT 24 Jul 01 11:39:19 AM PDT 24 7190807645 ps
T265 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.3353184158 Jul 01 11:35:19 AM PDT 24 Jul 01 11:36:39 AM PDT 24 9483239101 ps
T266 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.3430319671 Jul 01 11:35:33 AM PDT 24 Jul 01 11:41:14 AM PDT 24 5004817534 ps
T267 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.238023017 Jul 01 11:29:57 AM PDT 24 Jul 01 11:32:34 AM PDT 24 4922055409 ps
T268 /workspace/coverage/default/37.sram_ctrl_stress_all.2489970773 Jul 01 11:33:57 AM PDT 24 Jul 01 12:51:41 PM PDT 24 36375019062 ps
T269 /workspace/coverage/default/39.sram_ctrl_smoke.1778664658 Jul 01 11:34:08 AM PDT 24 Jul 01 11:34:44 AM PDT 24 1030649807 ps
T270 /workspace/coverage/default/26.sram_ctrl_regwen.4036799307 Jul 01 11:31:18 AM PDT 24 Jul 01 11:38:20 AM PDT 24 4920290001 ps
T271 /workspace/coverage/default/31.sram_ctrl_smoke.1345931525 Jul 01 11:32:30 AM PDT 24 Jul 01 11:34:11 AM PDT 24 1805453873 ps
T272 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1760755668 Jul 01 11:27:01 AM PDT 24 Jul 01 11:27:06 AM PDT 24 1343360025 ps
T273 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1669141293 Jul 01 11:31:06 AM PDT 24 Jul 01 11:35:32 AM PDT 24 10560336748 ps
T274 /workspace/coverage/default/24.sram_ctrl_partial_access.1395328636 Jul 01 11:30:52 AM PDT 24 Jul 01 11:33:30 AM PDT 24 891341923 ps
T275 /workspace/coverage/default/45.sram_ctrl_mem_walk.3770991364 Jul 01 11:35:44 AM PDT 24 Jul 01 11:41:20 AM PDT 24 26659432360 ps
T276 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.3741947783 Jul 01 11:29:46 AM PDT 24 Jul 01 11:32:22 AM PDT 24 8923532187 ps
T277 /workspace/coverage/default/28.sram_ctrl_lc_escalation.2827500798 Jul 01 11:31:47 AM PDT 24 Jul 01 11:33:11 AM PDT 24 47980108050 ps
T278 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3472156295 Jul 01 11:26:43 AM PDT 24 Jul 01 11:32:25 AM PDT 24 35659831030 ps
T279 /workspace/coverage/default/20.sram_ctrl_executable.3885252516 Jul 01 11:29:58 AM PDT 24 Jul 01 11:59:58 AM PDT 24 9851809622 ps
T280 /workspace/coverage/default/6.sram_ctrl_executable.1507786472 Jul 01 11:27:30 AM PDT 24 Jul 01 11:41:08 AM PDT 24 9625611811 ps
T281 /workspace/coverage/default/44.sram_ctrl_mem_walk.2244536040 Jul 01 11:35:34 AM PDT 24 Jul 01 11:41:38 AM PDT 24 82754713526 ps
T282 /workspace/coverage/default/0.sram_ctrl_alert_test.3263110394 Jul 01 11:26:34 AM PDT 24 Jul 01 11:26:36 AM PDT 24 41282550 ps
T283 /workspace/coverage/default/47.sram_ctrl_max_throughput.1476232958 Jul 01 11:36:10 AM PDT 24 Jul 01 11:38:05 AM PDT 24 786765944 ps
T284 /workspace/coverage/default/42.sram_ctrl_mem_walk.3751267979 Jul 01 11:35:01 AM PDT 24 Jul 01 11:40:30 AM PDT 24 13831824012 ps
T285 /workspace/coverage/default/30.sram_ctrl_max_throughput.3643622781 Jul 01 11:32:16 AM PDT 24 Jul 01 11:32:30 AM PDT 24 735428025 ps
T286 /workspace/coverage/default/8.sram_ctrl_multiple_keys.3966897494 Jul 01 11:27:39 AM PDT 24 Jul 01 11:41:17 AM PDT 24 8963318624 ps
T287 /workspace/coverage/default/0.sram_ctrl_stress_all.231644111 Jul 01 11:26:37 AM PDT 24 Jul 01 11:29:44 AM PDT 24 305407728176 ps
T288 /workspace/coverage/default/5.sram_ctrl_alert_test.3247450117 Jul 01 11:27:17 AM PDT 24 Jul 01 11:27:19 AM PDT 24 40704273 ps
T289 /workspace/coverage/default/30.sram_ctrl_mem_walk.511108117 Jul 01 11:32:27 AM PDT 24 Jul 01 11:36:46 AM PDT 24 4150962987 ps
T290 /workspace/coverage/default/0.sram_ctrl_executable.3280898075 Jul 01 11:26:34 AM PDT 24 Jul 01 11:29:50 AM PDT 24 25255738211 ps
T291 /workspace/coverage/default/38.sram_ctrl_partial_access.3737817287 Jul 01 11:34:03 AM PDT 24 Jul 01 11:36:56 AM PDT 24 1304507297 ps
T110 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2376162671 Jul 01 11:29:49 AM PDT 24 Jul 01 11:29:58 AM PDT 24 214051024 ps
T292 /workspace/coverage/default/49.sram_ctrl_ram_cfg.3722464677 Jul 01 11:36:44 AM PDT 24 Jul 01 11:36:48 AM PDT 24 1349943976 ps
T293 /workspace/coverage/default/19.sram_ctrl_alert_test.702579738 Jul 01 11:29:51 AM PDT 24 Jul 01 11:29:53 AM PDT 24 32939617 ps
T294 /workspace/coverage/default/27.sram_ctrl_max_throughput.3966253252 Jul 01 11:31:29 AM PDT 24 Jul 01 11:32:00 AM PDT 24 10094668804 ps
T295 /workspace/coverage/default/24.sram_ctrl_bijection.262472770 Jul 01 11:30:53 AM PDT 24 Jul 01 11:41:26 AM PDT 24 8458342441 ps
T296 /workspace/coverage/default/35.sram_ctrl_partial_access.613341904 Jul 01 11:33:21 AM PDT 24 Jul 01 11:33:28 AM PDT 24 430477274 ps
T297 /workspace/coverage/default/45.sram_ctrl_regwen.250854404 Jul 01 11:35:43 AM PDT 24 Jul 01 11:53:45 AM PDT 24 2596603063 ps
T298 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3997814471 Jul 01 11:26:44 AM PDT 24 Jul 01 11:26:51 AM PDT 24 683699113 ps
T299 /workspace/coverage/default/44.sram_ctrl_smoke.2168107543 Jul 01 11:35:27 AM PDT 24 Jul 01 11:35:52 AM PDT 24 2145452582 ps
T300 /workspace/coverage/default/30.sram_ctrl_partial_access.742268936 Jul 01 11:32:11 AM PDT 24 Jul 01 11:32:35 AM PDT 24 1332575442 ps
T301 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1974481489 Jul 01 11:35:32 AM PDT 24 Jul 01 11:35:40 AM PDT 24 2569673915 ps
T302 /workspace/coverage/default/22.sram_ctrl_partial_access.2167458820 Jul 01 11:30:25 AM PDT 24 Jul 01 11:30:45 AM PDT 24 5798718585 ps
T303 /workspace/coverage/default/32.sram_ctrl_ram_cfg.703825217 Jul 01 11:32:50 AM PDT 24 Jul 01 11:32:54 AM PDT 24 359388806 ps
T304 /workspace/coverage/default/46.sram_ctrl_bijection.4248767909 Jul 01 11:35:56 AM PDT 24 Jul 01 12:15:10 PM PDT 24 124694067428 ps
T305 /workspace/coverage/default/28.sram_ctrl_smoke.2968458596 Jul 01 11:31:35 AM PDT 24 Jul 01 11:32:46 AM PDT 24 1491881132 ps
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