T304 |
/workspace/coverage/default/0.sram_ctrl_regwen.1407184030 |
|
|
Jul 02 10:00:11 AM PDT 24 |
Jul 02 10:20:21 AM PDT 24 |
13075591690 ps |
T305 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3398022099 |
|
|
Jul 02 10:00:02 AM PDT 24 |
Jul 02 10:04:06 AM PDT 24 |
37146388607 ps |
T306 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.586923322 |
|
|
Jul 02 10:01:21 AM PDT 24 |
Jul 02 10:21:00 AM PDT 24 |
40837098660 ps |
T307 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2659277902 |
|
|
Jul 02 10:03:55 AM PDT 24 |
Jul 02 10:06:03 AM PDT 24 |
8578448184 ps |
T308 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2822109975 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 10:03:30 AM PDT 24 |
6268062244 ps |
T309 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3858371105 |
|
|
Jul 02 10:00:02 AM PDT 24 |
Jul 02 10:00:10 AM PDT 24 |
366860662 ps |
T310 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.2081599084 |
|
|
Jul 02 10:02:52 AM PDT 24 |
Jul 02 10:05:34 AM PDT 24 |
17246031861 ps |
T311 |
/workspace/coverage/default/5.sram_ctrl_executable.2491247199 |
|
|
Jul 02 10:00:12 AM PDT 24 |
Jul 02 10:11:23 AM PDT 24 |
139450800961 ps |
T312 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1997998392 |
|
|
Jul 02 10:03:30 AM PDT 24 |
Jul 02 10:08:02 AM PDT 24 |
27584363349 ps |
T313 |
/workspace/coverage/default/39.sram_ctrl_stress_all.1023284737 |
|
|
Jul 02 10:02:34 AM PDT 24 |
Jul 02 11:16:38 AM PDT 24 |
33092214389 ps |
T44 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3792950543 |
|
|
Jul 02 10:00:52 AM PDT 24 |
Jul 02 10:01:41 AM PDT 24 |
10515355852 ps |
T314 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2076982518 |
|
|
Jul 02 10:00:03 AM PDT 24 |
Jul 02 11:06:50 AM PDT 24 |
66577165305 ps |
T315 |
/workspace/coverage/default/47.sram_ctrl_smoke.1444787975 |
|
|
Jul 02 10:03:47 AM PDT 24 |
Jul 02 10:04:13 AM PDT 24 |
5807861570 ps |
T316 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1151836565 |
|
|
Jul 02 10:00:49 AM PDT 24 |
Jul 02 10:00:54 AM PDT 24 |
361294387 ps |
T317 |
/workspace/coverage/default/39.sram_ctrl_partial_access.1074560895 |
|
|
Jul 02 10:02:28 AM PDT 24 |
Jul 02 10:02:37 AM PDT 24 |
743036930 ps |
T318 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4270807457 |
|
|
Jul 02 10:00:28 AM PDT 24 |
Jul 02 10:06:58 AM PDT 24 |
89630279752 ps |
T319 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3311832812 |
|
|
Jul 02 10:00:41 AM PDT 24 |
Jul 02 10:01:45 AM PDT 24 |
9906158853 ps |
T320 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.1736523134 |
|
|
Jul 02 10:00:40 AM PDT 24 |
Jul 02 10:02:13 AM PDT 24 |
15139616593 ps |
T321 |
/workspace/coverage/default/43.sram_ctrl_stress_all.1645278254 |
|
|
Jul 02 10:03:13 AM PDT 24 |
Jul 02 11:07:06 AM PDT 24 |
96487131300 ps |
T114 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.703713843 |
|
|
Jul 02 10:01:57 AM PDT 24 |
Jul 02 10:02:39 AM PDT 24 |
5145615321 ps |
T322 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.3944227826 |
|
|
Jul 02 10:01:17 AM PDT 24 |
Jul 02 10:18:47 AM PDT 24 |
11933406722 ps |
T323 |
/workspace/coverage/default/35.sram_ctrl_regwen.3160479785 |
|
|
Jul 02 10:02:06 AM PDT 24 |
Jul 02 10:21:01 AM PDT 24 |
10105076713 ps |
T324 |
/workspace/coverage/default/21.sram_ctrl_executable.2572325683 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:15:02 AM PDT 24 |
15353539081 ps |
T325 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2820947439 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 10:00:53 AM PDT 24 |
14217917466 ps |
T326 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2394976264 |
|
|
Jul 02 09:59:56 AM PDT 24 |
Jul 02 10:02:19 AM PDT 24 |
2471976576 ps |
T327 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3607854426 |
|
|
Jul 02 10:00:29 AM PDT 24 |
Jul 02 11:00:07 AM PDT 24 |
18124746535 ps |
T328 |
/workspace/coverage/default/40.sram_ctrl_alert_test.4283427160 |
|
|
Jul 02 10:02:44 AM PDT 24 |
Jul 02 10:02:45 AM PDT 24 |
15287054 ps |
T329 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2960351028 |
|
|
Jul 02 10:00:04 AM PDT 24 |
Jul 02 10:12:58 AM PDT 24 |
50889407328 ps |
T330 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2399507933 |
|
|
Jul 02 10:00:10 AM PDT 24 |
Jul 02 10:15:02 AM PDT 24 |
66172688128 ps |
T331 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.1229338675 |
|
|
Jul 02 10:02:45 AM PDT 24 |
Jul 02 10:32:42 AM PDT 24 |
24620902747 ps |
T332 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3313315376 |
|
|
Jul 02 10:00:07 AM PDT 24 |
Jul 02 10:12:34 AM PDT 24 |
29421093294 ps |
T333 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.1616587869 |
|
|
Jul 02 10:03:03 AM PDT 24 |
Jul 02 10:03:06 AM PDT 24 |
448514341 ps |
T334 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1071475543 |
|
|
Jul 02 10:02:15 AM PDT 24 |
Jul 02 11:44:27 AM PDT 24 |
1197393777235 ps |
T335 |
/workspace/coverage/default/1.sram_ctrl_bijection.3904982527 |
|
|
Jul 02 09:59:56 AM PDT 24 |
Jul 02 10:21:33 AM PDT 24 |
52670713596 ps |
T336 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3545843790 |
|
|
Jul 02 09:59:55 AM PDT 24 |
Jul 02 10:00:36 AM PDT 24 |
2280998840 ps |
T337 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.709754198 |
|
|
Jul 02 10:01:21 AM PDT 24 |
Jul 02 10:01:25 AM PDT 24 |
1681770580 ps |
T338 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.586790322 |
|
|
Jul 02 10:00:03 AM PDT 24 |
Jul 02 10:00:20 AM PDT 24 |
3119987983 ps |
T339 |
/workspace/coverage/default/12.sram_ctrl_regwen.3316332696 |
|
|
Jul 02 10:00:39 AM PDT 24 |
Jul 02 10:02:05 AM PDT 24 |
8944436380 ps |
T340 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1539490107 |
|
|
Jul 02 10:02:16 AM PDT 24 |
Jul 02 10:05:48 AM PDT 24 |
44802034162 ps |
T341 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.2689923628 |
|
|
Jul 02 10:01:25 AM PDT 24 |
Jul 02 10:01:50 AM PDT 24 |
4401899400 ps |
T342 |
/workspace/coverage/default/42.sram_ctrl_alert_test.1103830458 |
|
|
Jul 02 10:03:06 AM PDT 24 |
Jul 02 10:03:07 AM PDT 24 |
13274949 ps |
T343 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.2320472790 |
|
|
Jul 02 10:01:34 AM PDT 24 |
Jul 02 10:11:14 AM PDT 24 |
43971719061 ps |
T344 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.2276510046 |
|
|
Jul 02 10:01:46 AM PDT 24 |
Jul 02 10:02:00 AM PDT 24 |
1664957145 ps |
T345 |
/workspace/coverage/default/15.sram_ctrl_regwen.3576880691 |
|
|
Jul 02 10:00:37 AM PDT 24 |
Jul 02 10:08:38 AM PDT 24 |
1896847817 ps |
T346 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2809679595 |
|
|
Jul 02 10:01:35 AM PDT 24 |
Jul 02 10:01:36 AM PDT 24 |
15172150 ps |
T347 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.416329912 |
|
|
Jul 02 10:03:47 AM PDT 24 |
Jul 02 10:06:34 AM PDT 24 |
781868857 ps |
T348 |
/workspace/coverage/default/34.sram_ctrl_alert_test.702543898 |
|
|
Jul 02 10:01:59 AM PDT 24 |
Jul 02 10:02:00 AM PDT 24 |
44572388 ps |
T45 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4098582933 |
|
|
Jul 02 10:00:06 AM PDT 24 |
Jul 02 10:00:49 AM PDT 24 |
7284958547 ps |
T349 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2240810227 |
|
|
Jul 02 10:03:56 AM PDT 24 |
Jul 02 10:04:04 AM PDT 24 |
1382207692 ps |
T350 |
/workspace/coverage/default/12.sram_ctrl_executable.2348276879 |
|
|
Jul 02 10:00:36 AM PDT 24 |
Jul 02 10:17:30 AM PDT 24 |
23528389584 ps |
T351 |
/workspace/coverage/default/30.sram_ctrl_executable.4053282939 |
|
|
Jul 02 10:01:26 AM PDT 24 |
Jul 02 10:11:38 AM PDT 24 |
128369133440 ps |
T352 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.4042234168 |
|
|
Jul 02 10:01:06 AM PDT 24 |
Jul 02 10:03:34 AM PDT 24 |
7189677410 ps |
T353 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.4267674850 |
|
|
Jul 02 10:00:47 AM PDT 24 |
Jul 02 10:02:20 AM PDT 24 |
6736313169 ps |
T354 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.777738064 |
|
|
Jul 02 10:01:07 AM PDT 24 |
Jul 02 10:02:36 AM PDT 24 |
3342419945 ps |
T355 |
/workspace/coverage/default/23.sram_ctrl_regwen.2742396590 |
|
|
Jul 02 10:01:04 AM PDT 24 |
Jul 02 10:20:27 AM PDT 24 |
13301689331 ps |
T356 |
/workspace/coverage/default/39.sram_ctrl_alert_test.2274223163 |
|
|
Jul 02 10:02:32 AM PDT 24 |
Jul 02 10:02:33 AM PDT 24 |
21730839 ps |
T357 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.3177513183 |
|
|
Jul 02 09:59:56 AM PDT 24 |
Jul 02 10:00:05 AM PDT 24 |
1457315840 ps |
T358 |
/workspace/coverage/default/19.sram_ctrl_regwen.2770411748 |
|
|
Jul 02 10:00:56 AM PDT 24 |
Jul 02 10:25:10 AM PDT 24 |
30928523060 ps |
T359 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2752331203 |
|
|
Jul 02 10:00:43 AM PDT 24 |
Jul 02 10:00:48 AM PDT 24 |
1409505584 ps |
T360 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3320766266 |
|
|
Jul 02 09:59:57 AM PDT 24 |
Jul 02 10:03:52 AM PDT 24 |
6907329667 ps |
T361 |
/workspace/coverage/default/28.sram_ctrl_alert_test.4016642352 |
|
|
Jul 02 10:01:20 AM PDT 24 |
Jul 02 10:01:21 AM PDT 24 |
12931545 ps |
T362 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.459278253 |
|
|
Jul 02 10:01:45 AM PDT 24 |
Jul 02 10:27:01 AM PDT 24 |
26099413706 ps |
T363 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.2583412241 |
|
|
Jul 02 10:00:41 AM PDT 24 |
Jul 02 10:09:07 AM PDT 24 |
13718219590 ps |
T364 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1577632191 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:04:24 AM PDT 24 |
3906295774 ps |
T365 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2188691118 |
|
|
Jul 02 10:04:05 AM PDT 24 |
Jul 02 10:17:04 AM PDT 24 |
24756535163 ps |
T366 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3708069429 |
|
|
Jul 02 10:00:22 AM PDT 24 |
Jul 02 10:00:47 AM PDT 24 |
1390857730 ps |
T367 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3789636269 |
|
|
Jul 02 10:03:51 AM PDT 24 |
Jul 02 10:06:17 AM PDT 24 |
13191369984 ps |
T368 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.992492184 |
|
|
Jul 02 10:00:54 AM PDT 24 |
Jul 02 10:02:58 AM PDT 24 |
773544702 ps |
T369 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.571985123 |
|
|
Jul 02 10:02:19 AM PDT 24 |
Jul 02 10:04:25 AM PDT 24 |
3124089235 ps |
T370 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3266388226 |
|
|
Jul 02 10:00:40 AM PDT 24 |
Jul 02 10:02:04 AM PDT 24 |
10929862821 ps |
T371 |
/workspace/coverage/default/13.sram_ctrl_bijection.435822851 |
|
|
Jul 02 10:00:30 AM PDT 24 |
Jul 02 10:21:16 AM PDT 24 |
364215360922 ps |
T372 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1469339429 |
|
|
Jul 02 10:03:32 AM PDT 24 |
Jul 02 10:03:33 AM PDT 24 |
20504552 ps |
T373 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2073686126 |
|
|
Jul 02 10:01:45 AM PDT 24 |
Jul 02 10:03:06 AM PDT 24 |
9706667946 ps |
T374 |
/workspace/coverage/default/18.sram_ctrl_stress_all.1415588800 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 11:10:23 AM PDT 24 |
125129770014 ps |
T375 |
/workspace/coverage/default/23.sram_ctrl_bijection.2662409429 |
|
|
Jul 02 10:00:54 AM PDT 24 |
Jul 02 10:13:31 AM PDT 24 |
154492121795 ps |
T376 |
/workspace/coverage/default/1.sram_ctrl_executable.1008145930 |
|
|
Jul 02 09:59:55 AM PDT 24 |
Jul 02 10:16:28 AM PDT 24 |
13225910182 ps |
T377 |
/workspace/coverage/default/30.sram_ctrl_alert_test.3982498017 |
|
|
Jul 02 10:01:28 AM PDT 24 |
Jul 02 10:01:29 AM PDT 24 |
61322466 ps |
T378 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2916509440 |
|
|
Jul 02 10:02:48 AM PDT 24 |
Jul 02 10:07:27 AM PDT 24 |
11069117145 ps |
T379 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1090414701 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:01:03 AM PDT 24 |
841375395 ps |
T380 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.2177568069 |
|
|
Jul 02 10:01:45 AM PDT 24 |
Jul 02 10:01:53 AM PDT 24 |
707134409 ps |
T381 |
/workspace/coverage/default/43.sram_ctrl_alert_test.116023547 |
|
|
Jul 02 10:03:13 AM PDT 24 |
Jul 02 10:03:14 AM PDT 24 |
43494419 ps |
T382 |
/workspace/coverage/default/18.sram_ctrl_bijection.1923084205 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:32:47 AM PDT 24 |
83071383700 ps |
T383 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3593927975 |
|
|
Jul 02 10:01:58 AM PDT 24 |
Jul 02 10:10:24 AM PDT 24 |
84641179196 ps |
T384 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.3452099963 |
|
|
Jul 02 10:01:06 AM PDT 24 |
Jul 02 10:28:08 AM PDT 24 |
15162044051 ps |
T385 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.687756183 |
|
|
Jul 02 10:03:01 AM PDT 24 |
Jul 02 10:04:27 AM PDT 24 |
13957783415 ps |
T386 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.1907237126 |
|
|
Jul 02 10:00:44 AM PDT 24 |
Jul 02 10:02:19 AM PDT 24 |
6832507151 ps |
T387 |
/workspace/coverage/default/24.sram_ctrl_regwen.498175945 |
|
|
Jul 02 10:01:01 AM PDT 24 |
Jul 02 10:11:37 AM PDT 24 |
14571948517 ps |
T388 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1651075039 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 10:10:42 AM PDT 24 |
99791196484 ps |
T389 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.1390966066 |
|
|
Jul 02 10:01:49 AM PDT 24 |
Jul 02 10:03:18 AM PDT 24 |
232898162011 ps |
T390 |
/workspace/coverage/default/39.sram_ctrl_smoke.1604309778 |
|
|
Jul 02 10:02:30 AM PDT 24 |
Jul 02 10:02:35 AM PDT 24 |
1172700966 ps |
T391 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4233897258 |
|
|
Jul 02 10:00:44 AM PDT 24 |
Jul 02 10:05:57 AM PDT 24 |
15260397904 ps |
T392 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1813635349 |
|
|
Jul 02 10:00:31 AM PDT 24 |
Jul 02 10:04:32 AM PDT 24 |
3950786974 ps |
T393 |
/workspace/coverage/default/31.sram_ctrl_stress_all.3960383412 |
|
|
Jul 02 10:01:35 AM PDT 24 |
Jul 02 11:44:12 AM PDT 24 |
348643841217 ps |
T394 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3394531949 |
|
|
Jul 02 10:03:49 AM PDT 24 |
Jul 02 10:04:08 AM PDT 24 |
440634789 ps |
T395 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2584866871 |
|
|
Jul 02 10:03:20 AM PDT 24 |
Jul 02 10:04:31 AM PDT 24 |
6233884766 ps |
T396 |
/workspace/coverage/default/19.sram_ctrl_smoke.986822472 |
|
|
Jul 02 10:00:47 AM PDT 24 |
Jul 02 10:01:10 AM PDT 24 |
1773516268 ps |
T397 |
/workspace/coverage/default/41.sram_ctrl_smoke.1529971942 |
|
|
Jul 02 10:02:46 AM PDT 24 |
Jul 02 10:02:55 AM PDT 24 |
2503312198 ps |
T398 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.4158925694 |
|
|
Jul 02 10:00:49 AM PDT 24 |
Jul 02 10:11:10 AM PDT 24 |
17468075154 ps |
T399 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.2621917144 |
|
|
Jul 02 10:01:25 AM PDT 24 |
Jul 02 10:02:12 AM PDT 24 |
750135158 ps |
T400 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.3125128692 |
|
|
Jul 02 10:02:37 AM PDT 24 |
Jul 02 10:03:31 AM PDT 24 |
10292370202 ps |
T401 |
/workspace/coverage/default/37.sram_ctrl_partial_access.2221360769 |
|
|
Jul 02 10:02:17 AM PDT 24 |
Jul 02 10:02:28 AM PDT 24 |
2767285963 ps |
T402 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3242124777 |
|
|
Jul 02 10:01:22 AM PDT 24 |
Jul 02 10:04:31 AM PDT 24 |
27498319113 ps |
T403 |
/workspace/coverage/default/3.sram_ctrl_alert_test.3960889823 |
|
|
Jul 02 10:00:07 AM PDT 24 |
Jul 02 10:00:13 AM PDT 24 |
11694173 ps |
T404 |
/workspace/coverage/default/30.sram_ctrl_bijection.2211504480 |
|
|
Jul 02 10:01:25 AM PDT 24 |
Jul 02 10:47:18 AM PDT 24 |
323850969489 ps |
T405 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1740652758 |
|
|
Jul 02 10:00:27 AM PDT 24 |
Jul 02 10:01:55 AM PDT 24 |
3085395817 ps |
T406 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.2956321226 |
|
|
Jul 02 10:01:33 AM PDT 24 |
Jul 02 10:03:36 AM PDT 24 |
1643487020 ps |
T407 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.14329356 |
|
|
Jul 02 10:00:29 AM PDT 24 |
Jul 02 10:00:33 AM PDT 24 |
356327151 ps |
T408 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.1502650151 |
|
|
Jul 02 10:01:22 AM PDT 24 |
Jul 02 10:02:49 AM PDT 24 |
50930186959 ps |
T409 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2828576015 |
|
|
Jul 02 10:02:20 AM PDT 24 |
Jul 02 10:02:50 AM PDT 24 |
4015231187 ps |
T410 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.963255632 |
|
|
Jul 02 10:00:21 AM PDT 24 |
Jul 02 10:09:21 AM PDT 24 |
94272970524 ps |
T411 |
/workspace/coverage/default/7.sram_ctrl_smoke.2568083923 |
|
|
Jul 02 10:00:14 AM PDT 24 |
Jul 02 10:00:36 AM PDT 24 |
1215591898 ps |
T412 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2520329269 |
|
|
Jul 02 10:01:04 AM PDT 24 |
Jul 02 10:01:24 AM PDT 24 |
2832464515 ps |
T413 |
/workspace/coverage/default/38.sram_ctrl_regwen.1088403865 |
|
|
Jul 02 10:02:30 AM PDT 24 |
Jul 02 10:30:30 AM PDT 24 |
63607614381 ps |
T414 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1647845012 |
|
|
Jul 02 10:00:11 AM PDT 24 |
Jul 02 10:58:22 AM PDT 24 |
56960900196 ps |
T415 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.4201812732 |
|
|
Jul 02 10:01:42 AM PDT 24 |
Jul 02 10:01:46 AM PDT 24 |
1408873496 ps |
T416 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.2197319322 |
|
|
Jul 02 10:00:45 AM PDT 24 |
Jul 02 10:16:32 AM PDT 24 |
31164582850 ps |
T417 |
/workspace/coverage/default/11.sram_ctrl_smoke.3144987657 |
|
|
Jul 02 10:00:28 AM PDT 24 |
Jul 02 10:02:39 AM PDT 24 |
1337666577 ps |
T418 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1909892794 |
|
|
Jul 02 10:03:25 AM PDT 24 |
Jul 02 10:03:28 AM PDT 24 |
371822460 ps |
T419 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.426775528 |
|
|
Jul 02 10:01:23 AM PDT 24 |
Jul 02 10:09:11 AM PDT 24 |
6702218755 ps |
T420 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1758212727 |
|
|
Jul 02 10:03:57 AM PDT 24 |
Jul 02 10:05:11 AM PDT 24 |
12769561711 ps |
T421 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.4068084761 |
|
|
Jul 02 10:02:25 AM PDT 24 |
Jul 02 10:12:04 AM PDT 24 |
8685758642 ps |
T422 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.3275627130 |
|
|
Jul 02 10:01:07 AM PDT 24 |
Jul 02 10:20:41 AM PDT 24 |
9291101064 ps |
T423 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.176663700 |
|
|
Jul 02 10:00:33 AM PDT 24 |
Jul 02 10:01:55 AM PDT 24 |
3078872348 ps |
T424 |
/workspace/coverage/default/9.sram_ctrl_stress_all.2953248962 |
|
|
Jul 02 10:00:20 AM PDT 24 |
Jul 02 10:31:21 AM PDT 24 |
140220815628 ps |
T425 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1960247339 |
|
|
Jul 02 10:00:14 AM PDT 24 |
Jul 02 10:17:25 AM PDT 24 |
15345848533 ps |
T426 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.19526454 |
|
|
Jul 02 10:01:14 AM PDT 24 |
Jul 02 10:06:49 AM PDT 24 |
230545437871 ps |
T427 |
/workspace/coverage/default/41.sram_ctrl_alert_test.1385525114 |
|
|
Jul 02 10:02:53 AM PDT 24 |
Jul 02 10:02:54 AM PDT 24 |
14068135 ps |
T428 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.722505174 |
|
|
Jul 02 10:02:24 AM PDT 24 |
Jul 02 10:03:15 AM PDT 24 |
4464293527 ps |
T429 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.212546916 |
|
|
Jul 02 10:00:06 AM PDT 24 |
Jul 02 10:07:41 AM PDT 24 |
20887909985 ps |
T430 |
/workspace/coverage/default/18.sram_ctrl_partial_access.168959246 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:01:10 AM PDT 24 |
880431398 ps |
T431 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.4146014988 |
|
|
Jul 02 10:00:30 AM PDT 24 |
Jul 02 10:06:42 AM PDT 24 |
108673208040 ps |
T432 |
/workspace/coverage/default/6.sram_ctrl_regwen.392604417 |
|
|
Jul 02 10:00:23 AM PDT 24 |
Jul 02 10:13:55 AM PDT 24 |
2851437421 ps |
T433 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.474278463 |
|
|
Jul 02 10:00:54 AM PDT 24 |
Jul 02 10:15:05 AM PDT 24 |
10032208668 ps |
T434 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2920091548 |
|
|
Jul 02 10:00:31 AM PDT 24 |
Jul 02 10:02:03 AM PDT 24 |
1729388612 ps |
T435 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2536581773 |
|
|
Jul 02 10:03:01 AM PDT 24 |
Jul 02 10:08:31 AM PDT 24 |
12159766321 ps |
T436 |
/workspace/coverage/default/6.sram_ctrl_smoke.1588097391 |
|
|
Jul 02 10:00:09 AM PDT 24 |
Jul 02 10:00:38 AM PDT 24 |
1431614470 ps |
T437 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3740542167 |
|
|
Jul 02 10:00:36 AM PDT 24 |
Jul 02 10:01:41 AM PDT 24 |
3974526659 ps |
T438 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3873606324 |
|
|
Jul 02 10:00:10 AM PDT 24 |
Jul 02 10:24:51 AM PDT 24 |
61759724083 ps |
T439 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.1786549529 |
|
|
Jul 02 10:00:54 AM PDT 24 |
Jul 02 10:06:59 AM PDT 24 |
48052563500 ps |
T440 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.3907867716 |
|
|
Jul 02 10:00:43 AM PDT 24 |
Jul 02 10:21:44 AM PDT 24 |
9321880468 ps |
T441 |
/workspace/coverage/default/38.sram_ctrl_stress_all.484981488 |
|
|
Jul 02 10:02:30 AM PDT 24 |
Jul 02 10:41:39 AM PDT 24 |
34807609187 ps |
T442 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3643459751 |
|
|
Jul 02 10:03:17 AM PDT 24 |
Jul 02 10:26:33 AM PDT 24 |
101318584142 ps |
T443 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1411716603 |
|
|
Jul 02 10:00:46 AM PDT 24 |
Jul 02 10:02:44 AM PDT 24 |
3078321769 ps |
T444 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.4207997270 |
|
|
Jul 02 10:01:35 AM PDT 24 |
Jul 02 10:32:35 AM PDT 24 |
171434746827 ps |
T445 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.19467654 |
|
|
Jul 02 10:02:27 AM PDT 24 |
Jul 02 10:27:47 AM PDT 24 |
186958183537 ps |
T446 |
/workspace/coverage/default/33.sram_ctrl_executable.1904428587 |
|
|
Jul 02 10:01:45 AM PDT 24 |
Jul 02 10:19:34 AM PDT 24 |
101482128451 ps |
T447 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1547153311 |
|
|
Jul 02 10:03:06 AM PDT 24 |
Jul 02 10:03:24 AM PDT 24 |
2521597703 ps |
T448 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1586562196 |
|
|
Jul 02 10:03:50 AM PDT 24 |
Jul 02 10:16:57 AM PDT 24 |
100393967533 ps |
T449 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.813258949 |
|
|
Jul 02 10:00:42 AM PDT 24 |
Jul 02 10:05:49 AM PDT 24 |
4959524409 ps |
T450 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2394308713 |
|
|
Jul 02 10:04:00 AM PDT 24 |
Jul 02 10:04:01 AM PDT 24 |
14033141 ps |
T451 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2563805599 |
|
|
Jul 02 10:02:13 AM PDT 24 |
Jul 02 10:04:48 AM PDT 24 |
7213328646 ps |
T452 |
/workspace/coverage/default/23.sram_ctrl_stress_all.376360607 |
|
|
Jul 02 10:01:01 AM PDT 24 |
Jul 02 10:38:16 AM PDT 24 |
100721751764 ps |
T453 |
/workspace/coverage/default/23.sram_ctrl_alert_test.3178731396 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 10:00:59 AM PDT 24 |
17449254 ps |
T454 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.2165300871 |
|
|
Jul 02 10:00:03 AM PDT 24 |
Jul 02 10:04:10 AM PDT 24 |
12980506777 ps |
T455 |
/workspace/coverage/default/34.sram_ctrl_stress_all.1078666976 |
|
|
Jul 02 10:01:58 AM PDT 24 |
Jul 02 11:53:13 AM PDT 24 |
1035821788124 ps |
T456 |
/workspace/coverage/default/20.sram_ctrl_stress_all.343648682 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 12:24:41 PM PDT 24 |
61230137804 ps |
T457 |
/workspace/coverage/default/28.sram_ctrl_partial_access.3312280214 |
|
|
Jul 02 10:01:10 AM PDT 24 |
Jul 02 10:01:26 AM PDT 24 |
1947355156 ps |
T458 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2655346393 |
|
|
Jul 02 10:04:01 AM PDT 24 |
Jul 02 10:04:05 AM PDT 24 |
4194494618 ps |
T459 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1931348441 |
|
|
Jul 02 10:00:26 AM PDT 24 |
Jul 02 10:01:59 AM PDT 24 |
3038842612 ps |
T460 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1547703385 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:22:46 AM PDT 24 |
86397457416 ps |
T461 |
/workspace/coverage/default/48.sram_ctrl_executable.3940520622 |
|
|
Jul 02 10:03:53 AM PDT 24 |
Jul 02 10:15:00 AM PDT 24 |
15350301208 ps |
T462 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.515026874 |
|
|
Jul 02 10:00:45 AM PDT 24 |
Jul 02 10:01:03 AM PDT 24 |
2494014388 ps |
T463 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.3680703124 |
|
|
Jul 02 09:59:57 AM PDT 24 |
Jul 02 10:01:13 AM PDT 24 |
1429156273 ps |
T464 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2138067741 |
|
|
Jul 02 10:03:41 AM PDT 24 |
Jul 02 10:05:42 AM PDT 24 |
1717010352 ps |
T465 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1515107339 |
|
|
Jul 02 10:00:28 AM PDT 24 |
Jul 02 10:12:09 AM PDT 24 |
32285898410 ps |
T466 |
/workspace/coverage/default/0.sram_ctrl_stress_all.4026165725 |
|
|
Jul 02 09:59:57 AM PDT 24 |
Jul 02 10:39:51 AM PDT 24 |
235829925988 ps |
T467 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.324624432 |
|
|
Jul 02 10:00:52 AM PDT 24 |
Jul 02 10:04:39 AM PDT 24 |
15641234984 ps |
T468 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3959600305 |
|
|
Jul 02 10:00:30 AM PDT 24 |
Jul 02 10:00:34 AM PDT 24 |
346468652 ps |
T469 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2085956592 |
|
|
Jul 02 10:00:35 AM PDT 24 |
Jul 02 10:00:39 AM PDT 24 |
350848440 ps |
T470 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3111285949 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:01:08 AM PDT 24 |
385360203 ps |
T471 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.1185236531 |
|
|
Jul 02 10:02:16 AM PDT 24 |
Jul 02 10:15:18 AM PDT 24 |
16359131809 ps |
T472 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3829041809 |
|
|
Jul 02 10:01:21 AM PDT 24 |
Jul 02 10:02:50 AM PDT 24 |
5468041092 ps |
T473 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.304060139 |
|
|
Jul 02 10:00:26 AM PDT 24 |
Jul 02 10:14:52 AM PDT 24 |
4910320436 ps |
T474 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1784063909 |
|
|
Jul 02 10:00:06 AM PDT 24 |
Jul 02 10:02:18 AM PDT 24 |
1623223531 ps |
T475 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2465483797 |
|
|
Jul 02 10:00:43 AM PDT 24 |
Jul 02 10:09:14 AM PDT 24 |
89594561827 ps |
T476 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3368833246 |
|
|
Jul 02 10:00:34 AM PDT 24 |
Jul 02 10:04:36 AM PDT 24 |
4192277373 ps |
T477 |
/workspace/coverage/default/28.sram_ctrl_smoke.2759153920 |
|
|
Jul 02 10:01:15 AM PDT 24 |
Jul 02 10:02:50 AM PDT 24 |
2532630561 ps |
T478 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3093459121 |
|
|
Jul 02 10:02:52 AM PDT 24 |
Jul 02 10:03:10 AM PDT 24 |
454684634 ps |
T479 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1638208452 |
|
|
Jul 02 09:59:57 AM PDT 24 |
Jul 02 10:07:05 AM PDT 24 |
76903063266 ps |
T480 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1200938507 |
|
|
Jul 02 10:00:33 AM PDT 24 |
Jul 02 10:13:32 AM PDT 24 |
32296666188 ps |
T481 |
/workspace/coverage/default/17.sram_ctrl_stress_all.2946353547 |
|
|
Jul 02 10:00:53 AM PDT 24 |
Jul 02 10:52:31 AM PDT 24 |
77675910199 ps |
T482 |
/workspace/coverage/default/15.sram_ctrl_bijection.2600808940 |
|
|
Jul 02 10:00:43 AM PDT 24 |
Jul 02 10:25:57 AM PDT 24 |
21986726758 ps |
T483 |
/workspace/coverage/default/14.sram_ctrl_regwen.2898161079 |
|
|
Jul 02 10:00:32 AM PDT 24 |
Jul 02 10:23:06 AM PDT 24 |
14408122776 ps |
T484 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.919293792 |
|
|
Jul 02 10:01:07 AM PDT 24 |
Jul 02 10:02:45 AM PDT 24 |
776872379 ps |
T485 |
/workspace/coverage/default/2.sram_ctrl_smoke.2589541174 |
|
|
Jul 02 10:00:00 AM PDT 24 |
Jul 02 10:00:19 AM PDT 24 |
532926481 ps |
T486 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.605506476 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 10:05:14 AM PDT 24 |
4549216948 ps |
T487 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1606528585 |
|
|
Jul 02 10:02:36 AM PDT 24 |
Jul 02 10:05:31 AM PDT 24 |
13852929115 ps |
T488 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.90225140 |
|
|
Jul 02 10:02:28 AM PDT 24 |
Jul 02 10:02:32 AM PDT 24 |
348952730 ps |
T489 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2034272312 |
|
|
Jul 02 10:02:37 AM PDT 24 |
Jul 02 10:02:48 AM PDT 24 |
721532778 ps |
T490 |
/workspace/coverage/default/38.sram_ctrl_executable.1400725021 |
|
|
Jul 02 10:02:25 AM PDT 24 |
Jul 02 10:09:25 AM PDT 24 |
25633780576 ps |
T491 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.864078651 |
|
|
Jul 02 10:02:36 AM PDT 24 |
Jul 02 10:06:53 AM PDT 24 |
11879267672 ps |
T492 |
/workspace/coverage/default/47.sram_ctrl_executable.3316895277 |
|
|
Jul 02 10:03:46 AM PDT 24 |
Jul 02 10:04:36 AM PDT 24 |
1176324991 ps |
T493 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.855348469 |
|
|
Jul 02 10:00:49 AM PDT 24 |
Jul 02 10:03:20 AM PDT 24 |
14156850505 ps |
T115 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1224606629 |
|
|
Jul 02 10:00:07 AM PDT 24 |
Jul 02 10:00:36 AM PDT 24 |
1182300132 ps |
T494 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.9679204 |
|
|
Jul 02 10:01:44 AM PDT 24 |
Jul 02 10:04:27 AM PDT 24 |
13841221968 ps |
T495 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.249324115 |
|
|
Jul 02 10:03:06 AM PDT 24 |
Jul 02 10:05:29 AM PDT 24 |
10180787546 ps |
T496 |
/workspace/coverage/default/35.sram_ctrl_executable.43353182 |
|
|
Jul 02 10:02:04 AM PDT 24 |
Jul 02 10:04:23 AM PDT 24 |
2530696697 ps |
T497 |
/workspace/coverage/default/20.sram_ctrl_bijection.1182773853 |
|
|
Jul 02 10:01:04 AM PDT 24 |
Jul 02 10:29:44 AM PDT 24 |
374100906686 ps |
T498 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.523697513 |
|
|
Jul 02 10:02:34 AM PDT 24 |
Jul 02 10:05:33 AM PDT 24 |
2450865898 ps |
T499 |
/workspace/coverage/default/6.sram_ctrl_stress_all.44483163 |
|
|
Jul 02 10:00:06 AM PDT 24 |
Jul 02 11:12:08 AM PDT 24 |
245129930840 ps |
T500 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.3634942314 |
|
|
Jul 02 09:59:58 AM PDT 24 |
Jul 02 10:22:05 AM PDT 24 |
69108288158 ps |
T501 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2547549309 |
|
|
Jul 02 10:00:49 AM PDT 24 |
Jul 02 10:00:54 AM PDT 24 |
360450290 ps |
T502 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.3380080027 |
|
|
Jul 02 10:01:25 AM PDT 24 |
Jul 02 10:05:27 AM PDT 24 |
18718937563 ps |
T503 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1898593810 |
|
|
Jul 02 10:00:01 AM PDT 24 |
Jul 02 10:01:10 AM PDT 24 |
1020681312 ps |
T504 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.3091855231 |
|
|
Jul 02 10:02:30 AM PDT 24 |
Jul 02 10:05:03 AM PDT 24 |
1781348566 ps |
T505 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.334178473 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 10:00:29 AM PDT 24 |
716502340 ps |
T506 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3427272583 |
|
|
Jul 02 10:02:28 AM PDT 24 |
Jul 02 10:02:29 AM PDT 24 |
23222668 ps |
T507 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2233019766 |
|
|
Jul 02 10:00:57 AM PDT 24 |
Jul 02 10:03:29 AM PDT 24 |
30327993862 ps |
T508 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1948165706 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 10:03:26 AM PDT 24 |
2634861556 ps |
T509 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2446079742 |
|
|
Jul 02 10:03:09 AM PDT 24 |
Jul 02 10:12:42 AM PDT 24 |
49395938949 ps |
T510 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.3758813228 |
|
|
Jul 02 10:00:50 AM PDT 24 |
Jul 02 10:04:59 AM PDT 24 |
7424597482 ps |
T511 |
/workspace/coverage/default/49.sram_ctrl_bijection.2708718922 |
|
|
Jul 02 10:04:00 AM PDT 24 |
Jul 02 10:32:51 AM PDT 24 |
100869931803 ps |
T512 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.177773914 |
|
|
Jul 02 09:59:53 AM PDT 24 |
Jul 02 10:00:52 AM PDT 24 |
8844917802 ps |
T513 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1833965898 |
|
|
Jul 02 10:00:40 AM PDT 24 |
Jul 02 10:05:11 AM PDT 24 |
42475492636 ps |
T116 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.281959076 |
|
|
Jul 02 10:01:05 AM PDT 24 |
Jul 02 10:04:26 AM PDT 24 |
12192297618 ps |
T514 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3906074673 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 10:04:42 AM PDT 24 |
3981934077 ps |
T515 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.3207508733 |
|
|
Jul 02 10:00:45 AM PDT 24 |
Jul 02 10:00:50 AM PDT 24 |
345671266 ps |
T516 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.4086618245 |
|
|
Jul 02 10:00:08 AM PDT 24 |
Jul 02 10:00:29 AM PDT 24 |
1429675777 ps |
T517 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3764256103 |
|
|
Jul 02 10:02:08 AM PDT 24 |
Jul 02 10:02:15 AM PDT 24 |
2690699850 ps |
T518 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1744473739 |
|
|
Jul 02 10:01:21 AM PDT 24 |
Jul 02 10:02:59 AM PDT 24 |
786800416 ps |
T519 |
/workspace/coverage/default/40.sram_ctrl_partial_access.3919500879 |
|
|
Jul 02 10:02:38 AM PDT 24 |
Jul 02 10:04:05 AM PDT 24 |
1246974734 ps |
T520 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2014952627 |
|
|
Jul 02 10:03:22 AM PDT 24 |
Jul 02 10:03:23 AM PDT 24 |
70841655 ps |
T521 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1304846530 |
|
|
Jul 02 10:00:08 AM PDT 24 |
Jul 02 10:25:14 AM PDT 24 |
84910193435 ps |
T522 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.109779156 |
|
|
Jul 02 10:01:01 AM PDT 24 |
Jul 02 10:01:32 AM PDT 24 |
759324425 ps |
T523 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.4017752891 |
|
|
Jul 02 10:01:34 AM PDT 24 |
Jul 02 10:02:38 AM PDT 24 |
21040192692 ps |
T524 |
/workspace/coverage/default/11.sram_ctrl_alert_test.4052906780 |
|
|
Jul 02 10:00:26 AM PDT 24 |
Jul 02 10:00:28 AM PDT 24 |
13732310 ps |
T525 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.565628330 |
|
|
Jul 02 10:01:03 AM PDT 24 |
Jul 02 10:01:47 AM PDT 24 |
2625661260 ps |
T526 |
/workspace/coverage/default/34.sram_ctrl_executable.2726787666 |
|
|
Jul 02 10:01:55 AM PDT 24 |
Jul 02 10:05:33 AM PDT 24 |
19953240519 ps |
T117 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1817015030 |
|
|
Jul 02 10:01:30 AM PDT 24 |
Jul 02 10:01:56 AM PDT 24 |
932314116 ps |
T527 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2614543385 |
|
|
Jul 02 10:00:38 AM PDT 24 |
Jul 02 10:04:11 AM PDT 24 |
7727815864 ps |
T528 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.2853964785 |
|
|
Jul 02 10:00:01 AM PDT 24 |
Jul 02 10:01:32 AM PDT 24 |
24418680675 ps |
T529 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2350312290 |
|
|
Jul 02 10:02:38 AM PDT 24 |
Jul 02 10:03:28 AM PDT 24 |
30600407248 ps |
T530 |
/workspace/coverage/default/5.sram_ctrl_alert_test.227845739 |
|
|
Jul 02 10:00:03 AM PDT 24 |
Jul 02 10:00:08 AM PDT 24 |
17521930 ps |
T531 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.356932812 |
|
|
Jul 02 10:02:24 AM PDT 24 |
Jul 02 10:03:42 AM PDT 24 |
56478274541 ps |
T532 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.2624406737 |
|
|
Jul 02 10:03:15 AM PDT 24 |
Jul 02 10:05:17 AM PDT 24 |
3594828506 ps |
T533 |
/workspace/coverage/default/30.sram_ctrl_stress_all.3125488401 |
|
|
Jul 02 10:01:29 AM PDT 24 |
Jul 02 11:20:22 AM PDT 24 |
327024301044 ps |
T534 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2764794763 |
|
|
Jul 02 10:00:48 AM PDT 24 |
Jul 02 10:07:59 AM PDT 24 |
99195471033 ps |
T535 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1342824747 |
|
|
Jul 02 10:00:27 AM PDT 24 |
Jul 02 10:01:24 AM PDT 24 |
749264740 ps |
T536 |
/workspace/coverage/default/15.sram_ctrl_executable.3066826891 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:11:59 AM PDT 24 |
8260830659 ps |
T537 |
/workspace/coverage/default/13.sram_ctrl_smoke.2107973115 |
|
|
Jul 02 10:00:41 AM PDT 24 |
Jul 02 10:03:24 AM PDT 24 |
2626849308 ps |
T538 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2139619673 |
|
|
Jul 02 10:00:57 AM PDT 24 |
Jul 02 10:06:47 AM PDT 24 |
5325411434 ps |
T539 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.996585831 |
|
|
Jul 02 10:00:23 AM PDT 24 |
Jul 02 10:07:33 AM PDT 24 |
7583141288 ps |
T540 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.116268600 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 10:01:03 AM PDT 24 |
1422676669 ps |
T541 |
/workspace/coverage/default/37.sram_ctrl_bijection.1758069393 |
|
|
Jul 02 10:02:17 AM PDT 24 |
Jul 02 10:15:05 AM PDT 24 |
22107166370 ps |
T542 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.932828975 |
|
|
Jul 02 10:01:13 AM PDT 24 |
Jul 02 10:01:20 AM PDT 24 |
4758576928 ps |
T543 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.2114682233 |
|
|
Jul 02 10:01:06 AM PDT 24 |
Jul 02 10:17:01 AM PDT 24 |
11542445038 ps |
T544 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.231092046 |
|
|
Jul 02 10:03:22 AM PDT 24 |
Jul 02 10:03:32 AM PDT 24 |
6148305699 ps |
T545 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2277903987 |
|
|
Jul 02 10:02:41 AM PDT 24 |
Jul 02 10:02:53 AM PDT 24 |
2558659082 ps |
T546 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.4048280804 |
|
|
Jul 02 10:00:49 AM PDT 24 |
Jul 02 10:02:53 AM PDT 24 |
3391474058 ps |
T547 |
/workspace/coverage/default/44.sram_ctrl_regwen.1460982499 |
|
|
Jul 02 10:03:19 AM PDT 24 |
Jul 02 10:04:38 AM PDT 24 |
3828087475 ps |