Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.487277910 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.250356768 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4066342252 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1535013310 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.429225072 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.435489916 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.645789973 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2579509227 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1827740425 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2216505660 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4241341708 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1410758765 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3020401582 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1936694232 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2038265139 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.830914707 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1896064853 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2893830763 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2204056963 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1294409123 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.868148383 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1000576667 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1656556560 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2502614835 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.376282387 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3048739441 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3412060540 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1900178088 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.103885289 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1484744735 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2132795181 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.321714803 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.646097609 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2160055069 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3212569745 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.793103135 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.298860506 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1288267124 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2336317102 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.438002628 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.843687381 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1385554132 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.350735986 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.506311283 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.65888693 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.4268311405 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3904658109 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.372621720 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2956942712 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2992161071 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.143594578 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1955327689 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1394085831 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1258186792 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1877221964 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2482057208 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.4288103371 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1945623571 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1510836244 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.798850572 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.166922013 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2189715469 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2326851058 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1634120122 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1958903697 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2606898431 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3688926071 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.991369507 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.975387258 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1555189056 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1858858616 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2379048692 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1634310510 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1744159150 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2300603770 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.384453441 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3833777076 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3605909901 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.4001901918 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2365325276 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2936541460 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1412160504 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.955010950 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.447320526 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4192460412 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1727988169 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2225899880 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1309056978 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2844993090 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2382912806 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2829830423 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1803726437 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4229067140 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1154066266 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.659956916 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.544023439 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2373180460 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3244665880 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3454151489 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2343771070 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1011863227 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4202824850 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.512375989 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.630488363 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2411603985 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2580863993 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.4206027160 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3499270736 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2554249675 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3581341811 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2464254225 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.419427326 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.362111193 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1700752750 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4146516993 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3066671441 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3522507375 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.546684794 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1084502788 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2219545204 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2096272046 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1394191505 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3452845909 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.401069086 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1335879393 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1137223235 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4239522822 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.564910906 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1997682909 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.207922376 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3313315376 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1645821797 |
/workspace/coverage/default/0.sram_ctrl_bijection.3990692442 |
/workspace/coverage/default/0.sram_ctrl_executable.2317700031 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.177773914 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1826874502 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3190746424 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.73771178 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1397045347 |
/workspace/coverage/default/0.sram_ctrl_partial_access.365885554 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1638208452 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3537343126 |
/workspace/coverage/default/0.sram_ctrl_regwen.1407184030 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.2614765876 |
/workspace/coverage/default/0.sram_ctrl_smoke.1895989600 |
/workspace/coverage/default/0.sram_ctrl_stress_all.4026165725 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2394976264 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2677703175 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3545843790 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.212546916 |
/workspace/coverage/default/1.sram_ctrl_alert_test.4254464681 |
/workspace/coverage/default/1.sram_ctrl_bijection.3904982527 |
/workspace/coverage/default/1.sram_ctrl_executable.1008145930 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.124396308 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1767588185 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4039471782 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3566376450 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3760708330 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3299090934 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4193247747 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3858371105 |
/workspace/coverage/default/1.sram_ctrl_smoke.2624014507 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4098582933 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3320766266 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3476612210 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1382109863 |
/workspace/coverage/default/10.sram_ctrl_alert_test.645059469 |
/workspace/coverage/default/10.sram_ctrl_bijection.744031244 |
/workspace/coverage/default/10.sram_ctrl_executable.1832043890 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.998654538 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2906813558 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3062625072 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.513552943 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1515107339 |
/workspace/coverage/default/10.sram_ctrl_partial_access.1091046086 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.963255632 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2085956592 |
/workspace/coverage/default/10.sram_ctrl_regwen.1089473396 |
/workspace/coverage/default/10.sram_ctrl_smoke.3494525676 |
/workspace/coverage/default/10.sram_ctrl_stress_all.4029198776 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3187882858 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.336501535 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4050739649 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1850713484 |
/workspace/coverage/default/11.sram_ctrl_alert_test.4052906780 |
/workspace/coverage/default/11.sram_ctrl_bijection.1600252249 |
/workspace/coverage/default/11.sram_ctrl_executable.4241291041 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.11396535 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1313692897 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3740542167 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.3421706163 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.304060139 |
/workspace/coverage/default/11.sram_ctrl_partial_access.672375553 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.14329356 |
/workspace/coverage/default/11.sram_ctrl_regwen.2496847217 |
/workspace/coverage/default/11.sram_ctrl_smoke.3144987657 |
/workspace/coverage/default/11.sram_ctrl_stress_all.3055039447 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2840145666 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2514510586 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4093009412 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3607854426 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2713243486 |
/workspace/coverage/default/12.sram_ctrl_bijection.1852292019 |
/workspace/coverage/default/12.sram_ctrl_executable.2348276879 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3725562678 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.874141611 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3624827177 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3709908255 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3319094823 |
/workspace/coverage/default/12.sram_ctrl_partial_access.3049684200 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.590341450 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3959600305 |
/workspace/coverage/default/12.sram_ctrl_regwen.3316332696 |
/workspace/coverage/default/12.sram_ctrl_smoke.1967066574 |
/workspace/coverage/default/12.sram_ctrl_stress_all.850666586 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.637109613 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3820228945 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2835184776 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1200938507 |
/workspace/coverage/default/13.sram_ctrl_alert_test.3541855352 |
/workspace/coverage/default/13.sram_ctrl_bijection.435822851 |
/workspace/coverage/default/13.sram_ctrl_executable.1405712727 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1911171409 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.656248905 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.1407368439 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.4146014988 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1785388283 |
/workspace/coverage/default/13.sram_ctrl_partial_access.751700084 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1833965898 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1151836565 |
/workspace/coverage/default/13.sram_ctrl_regwen.367945998 |
/workspace/coverage/default/13.sram_ctrl_smoke.2107973115 |
/workspace/coverage/default/13.sram_ctrl_stress_all.2330648090 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3379217584 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1813635349 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1740652758 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2614543385 |
/workspace/coverage/default/14.sram_ctrl_alert_test.2264314498 |
/workspace/coverage/default/14.sram_ctrl_bijection.4002469734 |
/workspace/coverage/default/14.sram_ctrl_executable.3852338932 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3311832812 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.176663700 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1355386194 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.583475304 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.151886251 |
/workspace/coverage/default/14.sram_ctrl_partial_access.337371673 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4233897258 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.82820488 |
/workspace/coverage/default/14.sram_ctrl_regwen.2898161079 |
/workspace/coverage/default/14.sram_ctrl_smoke.1537423804 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2090712842 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.4098260802 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.813258949 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2375892756 |
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/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1290073734 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1647660542 |
/workspace/coverage/default/44.sram_ctrl_regwen.1460982499 |
/workspace/coverage/default/44.sram_ctrl_smoke.1273796211 |
/workspace/coverage/default/44.sram_ctrl_stress_all.542119706 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.587239954 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.371024847 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2584866871 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2220146908 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1469339429 |
/workspace/coverage/default/45.sram_ctrl_bijection.2220801990 |
/workspace/coverage/default/45.sram_ctrl_executable.3683473395 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3707139208 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.231092046 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1059479064 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3092656691 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2283558840 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2514153648 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1909892794 |
/workspace/coverage/default/45.sram_ctrl_regwen.1233212417 |
/workspace/coverage/default/45.sram_ctrl_smoke.1972360357 |
/workspace/coverage/default/45.sram_ctrl_stress_all.2183797830 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2188153711 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.819160679 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.837673473 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2284381194 |
/workspace/coverage/default/46.sram_ctrl_alert_test.76394445 |
/workspace/coverage/default/46.sram_ctrl_bijection.658236048 |
/workspace/coverage/default/46.sram_ctrl_executable.832554608 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2164783072 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2234050420 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.97415795 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.284177789 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1219505043 |
/workspace/coverage/default/46.sram_ctrl_partial_access.879793516 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1713491068 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3928368574 |
/workspace/coverage/default/46.sram_ctrl_regwen.3347020812 |
/workspace/coverage/default/46.sram_ctrl_smoke.1452248475 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3818956164 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1997998392 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2075967270 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2529458164 |
/workspace/coverage/default/47.sram_ctrl_alert_test.4131250302 |
/workspace/coverage/default/47.sram_ctrl_bijection.3117344238 |
/workspace/coverage/default/47.sram_ctrl_executable.3316895277 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1616212571 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.416329912 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.614823476 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1430948116 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2171676796 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2138067741 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.417113330 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1136527954 |
/workspace/coverage/default/47.sram_ctrl_smoke.1444787975 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3394531949 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1571841169 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1845135832 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2579554541 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2394308713 |
/workspace/coverage/default/48.sram_ctrl_bijection.4005169033 |
/workspace/coverage/default/48.sram_ctrl_executable.3940520622 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.981093586 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1085835331 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2275837334 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2659277902 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1586562196 |
/workspace/coverage/default/48.sram_ctrl_partial_access.2047978609 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3298492703 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3165912044 |
/workspace/coverage/default/48.sram_ctrl_regwen.3488929731 |
/workspace/coverage/default/48.sram_ctrl_smoke.1013360230 |
/workspace/coverage/default/48.sram_ctrl_stress_all.3572645868 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3309239972 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3789636269 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.254404045 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2188691118 |
/workspace/coverage/default/49.sram_ctrl_alert_test.3119124696 |
/workspace/coverage/default/49.sram_ctrl_bijection.2708718922 |
/workspace/coverage/default/49.sram_ctrl_executable.1075064543 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1758212727 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2240810227 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.806283284 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.142819857 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1180379943 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3355995254 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3658133294 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2655346393 |
/workspace/coverage/default/49.sram_ctrl_regwen.1095338671 |
/workspace/coverage/default/49.sram_ctrl_smoke.2036223970 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2551520189 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1524033325 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.277530111 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4285089439 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1960247339 |
/workspace/coverage/default/5.sram_ctrl_alert_test.227845739 |
/workspace/coverage/default/5.sram_ctrl_bijection.385951324 |
/workspace/coverage/default/5.sram_ctrl_executable.2491247199 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2248994933 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3708069429 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.779904835 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1143087709 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1959521314 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2575044711 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.66633266 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.341232584 |
/workspace/coverage/default/5.sram_ctrl_regwen.163369160 |
/workspace/coverage/default/5.sram_ctrl_smoke.2068886383 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2076982518 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3165191641 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3906074673 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3966196279 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2960351028 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3668504546 |
/workspace/coverage/default/6.sram_ctrl_bijection.496120051 |
/workspace/coverage/default/6.sram_ctrl_executable.1174117424 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2820947439 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.440711277 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2130267269 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1488174983 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.4051120751 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3768459349 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1807912474 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1423948826 |
/workspace/coverage/default/6.sram_ctrl_regwen.392604417 |
/workspace/coverage/default/6.sram_ctrl_smoke.1588097391 |
/workspace/coverage/default/6.sram_ctrl_stress_all.44483163 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2920091548 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1414702022 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.334178473 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3874168575 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3592188365 |
/workspace/coverage/default/7.sram_ctrl_bijection.2266679768 |
/workspace/coverage/default/7.sram_ctrl_executable.2434663465 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3137962575 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.4086618245 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3172844340 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2867966992 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.824051823 |
/workspace/coverage/default/7.sram_ctrl_partial_access.1234931469 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3212006250 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.127445160 |
/workspace/coverage/default/7.sram_ctrl_regwen.2667463961 |
/workspace/coverage/default/7.sram_ctrl_smoke.2568083923 |
/workspace/coverage/default/7.sram_ctrl_stress_all.895724101 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1527489143 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3275785016 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.307539532 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3153676706 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2828440507 |
/workspace/coverage/default/8.sram_ctrl_bijection.4276512046 |
/workspace/coverage/default/8.sram_ctrl_executable.2080020017 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1303074469 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.809650438 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2560563290 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1753076294 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1304846530 |
/workspace/coverage/default/8.sram_ctrl_partial_access.1675089136 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.996585831 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3840278755 |
/workspace/coverage/default/8.sram_ctrl_regwen.1686871959 |
/workspace/coverage/default/8.sram_ctrl_smoke.2445481054 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1647845012 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1794926316 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3368833246 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1784063909 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.628159822 |
/workspace/coverage/default/9.sram_ctrl_alert_test.3208236320 |
/workspace/coverage/default/9.sram_ctrl_bijection.1288438145 |
/workspace/coverage/default/9.sram_ctrl_executable.258093833 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3038602182 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1342824747 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1464866741 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2485138300 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2399507933 |
/workspace/coverage/default/9.sram_ctrl_partial_access.414169086 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3417510882 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2256201861 |
/workspace/coverage/default/9.sram_ctrl_regwen.996784705 |
/workspace/coverage/default/9.sram_ctrl_smoke.2004380764 |
/workspace/coverage/default/9.sram_ctrl_stress_all.2953248962 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1886881931 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1931348441 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1785388283 |
|
|
Jul 02 10:00:32 AM PDT 24 |
Jul 02 10:15:28 AM PDT 24 |
31713340369 ps |
T2 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3768459349 |
|
|
Jul 02 10:00:22 AM PDT 24 |
Jul 02 10:00:34 AM PDT 24 |
3474410437 ps |
T3 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2363381351 |
|
|
Jul 02 10:01:04 AM PDT 24 |
Jul 02 10:15:19 AM PDT 24 |
14973155158 ps |
T4 |
/workspace/coverage/default/46.sram_ctrl_bijection.658236048 |
|
|
Jul 02 10:03:30 AM PDT 24 |
Jul 02 10:52:23 AM PDT 24 |
344676169706 ps |
T8 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1488174983 |
|
|
Jul 02 10:00:25 AM PDT 24 |
Jul 02 10:02:58 AM PDT 24 |
11960186040 ps |
T5 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2248994933 |
|
|
Jul 02 10:00:04 AM PDT 24 |
Jul 02 10:01:30 AM PDT 24 |
14513897746 ps |
T9 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.628159822 |
|
|
Jul 02 10:00:09 AM PDT 24 |
Jul 02 10:18:42 AM PDT 24 |
13604791014 ps |
T10 |
/workspace/coverage/default/31.sram_ctrl_executable.3670060581 |
|
|
Jul 02 10:01:34 AM PDT 24 |
Jul 02 10:05:26 AM PDT 24 |
9837970771 ps |
T6 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.3137284026 |
|
|
Jul 02 10:02:14 AM PDT 24 |
Jul 02 10:03:09 AM PDT 24 |
8651501100 ps |
T11 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.4197055403 |
|
|
Jul 02 10:02:12 AM PDT 24 |
Jul 02 10:02:36 AM PDT 24 |
948806139 ps |
T40 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.2297404653 |
|
|
Jul 02 10:00:50 AM PDT 24 |
Jul 02 10:33:24 AM PDT 24 |
51818354085 ps |
T41 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3820228945 |
|
|
Jul 02 10:00:28 AM PDT 24 |
Jul 02 10:04:31 AM PDT 24 |
7147496588 ps |
T7 |
/workspace/coverage/default/1.sram_ctrl_stress_all.1144406351 |
|
|
Jul 02 10:00:03 AM PDT 24 |
Jul 02 11:25:11 AM PDT 24 |
194197881747 ps |
T52 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1397045347 |
|
|
Jul 02 09:59:52 AM PDT 24 |
Jul 02 10:15:45 AM PDT 24 |
10646445920 ps |
T24 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.442662461 |
|
|
Jul 02 10:00:19 AM PDT 24 |
Jul 02 10:02:35 AM PDT 24 |
7023148246 ps |
T26 |
/workspace/coverage/default/26.sram_ctrl_executable.3768627657 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:13:41 AM PDT 24 |
6496678162 ps |
T42 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2579554541 |
|
|
Jul 02 10:03:53 AM PDT 24 |
Jul 02 10:18:57 AM PDT 24 |
13555976487 ps |
T43 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.806283284 |
|
|
Jul 02 10:04:01 AM PDT 24 |
Jul 02 10:06:43 AM PDT 24 |
10047299750 ps |
T58 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2560563290 |
|
|
Jul 02 10:00:27 AM PDT 24 |
Jul 02 10:01:44 AM PDT 24 |
2785937401 ps |
T19 |
/workspace/coverage/default/2.sram_ctrl_regwen.1864118862 |
|
|
Jul 02 10:00:03 AM PDT 24 |
Jul 02 10:09:38 AM PDT 24 |
2417219210 ps |
T22 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.1533725417 |
|
|
Jul 02 10:00:59 AM PDT 24 |
Jul 02 10:02:38 AM PDT 24 |
55332385176 ps |
T59 |
/workspace/coverage/default/2.sram_ctrl_bijection.3361503901 |
|
|
Jul 02 09:59:59 AM PDT 24 |
Jul 02 10:48:10 AM PDT 24 |
662147633903 ps |
T60 |
/workspace/coverage/default/25.sram_ctrl_regwen.586216674 |
|
|
Jul 02 10:01:03 AM PDT 24 |
Jul 02 10:01:56 AM PDT 24 |
7045192500 ps |
T61 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2835184776 |
|
|
Jul 02 10:00:33 AM PDT 24 |
Jul 02 10:00:45 AM PDT 24 |
2749140875 ps |
T155 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.254404045 |
|
|
Jul 02 10:03:56 AM PDT 24 |
Jul 02 10:04:34 AM PDT 24 |
849668721 ps |
T152 |
/workspace/coverage/default/25.sram_ctrl_bijection.3067350924 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:20:11 AM PDT 24 |
53622802947 ps |
T151 |
/workspace/coverage/default/44.sram_ctrl_smoke.1273796211 |
|
|
Jul 02 10:03:18 AM PDT 24 |
Jul 02 10:03:27 AM PDT 24 |
1479315207 ps |
T156 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1845135832 |
|
|
Jul 02 10:03:48 AM PDT 24 |
Jul 02 10:04:36 AM PDT 24 |
14544935928 ps |
T68 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.1723818603 |
|
|
Jul 02 10:01:04 AM PDT 24 |
Jul 02 10:01:10 AM PDT 24 |
2416964247 ps |
T27 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.3203765101 |
|
|
Jul 02 10:01:01 AM PDT 24 |
Jul 02 10:01:07 AM PDT 24 |
2623926616 ps |
T105 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3905959206 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 10:07:51 AM PDT 24 |
59374894023 ps |
T135 |
/workspace/coverage/default/41.sram_ctrl_executable.1482851571 |
|
|
Jul 02 10:02:52 AM PDT 24 |
Jul 02 10:16:06 AM PDT 24 |
65741362912 ps |
T28 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1200823114 |
|
|
Jul 02 10:02:29 AM PDT 24 |
Jul 02 10:02:33 AM PDT 24 |
4231407540 ps |
T150 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4093009412 |
|
|
Jul 02 10:00:39 AM PDT 24 |
Jul 02 10:01:12 AM PDT 24 |
738303065 ps |
T153 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.2093523193 |
|
|
Jul 02 10:01:10 AM PDT 24 |
Jul 02 10:25:50 AM PDT 24 |
19061378242 ps |
T106 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2677703175 |
|
|
Jul 02 10:00:07 AM PDT 24 |
Jul 02 10:06:20 AM PDT 24 |
111065314023 ps |
T12 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2808028494 |
|
|
Jul 02 09:59:54 AM PDT 24 |
Jul 02 09:59:57 AM PDT 24 |
30572742 ps |
T23 |
/workspace/coverage/default/16.sram_ctrl_stress_all.1519546874 |
|
|
Jul 02 10:00:45 AM PDT 24 |
Jul 02 10:59:26 AM PDT 24 |
40685284099 ps |
T157 |
/workspace/coverage/default/16.sram_ctrl_smoke.2800309843 |
|
|
Jul 02 10:00:40 AM PDT 24 |
Jul 02 10:01:05 AM PDT 24 |
2800072943 ps |
T107 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.757914650 |
|
|
Jul 02 10:01:42 AM PDT 24 |
Jul 02 10:07:46 AM PDT 24 |
24699162857 ps |
T75 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.1799725628 |
|
|
Jul 02 10:02:49 AM PDT 24 |
Jul 02 10:03:52 AM PDT 24 |
44287812328 ps |
T134 |
/workspace/coverage/default/27.sram_ctrl_executable.2542134636 |
|
|
Jul 02 10:01:10 AM PDT 24 |
Jul 02 10:24:44 AM PDT 24 |
34560202803 ps |
T142 |
/workspace/coverage/default/11.sram_ctrl_executable.4241291041 |
|
|
Jul 02 10:00:23 AM PDT 24 |
Jul 02 10:12:34 AM PDT 24 |
17473515987 ps |
T108 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1886881931 |
|
|
Jul 02 10:00:11 AM PDT 24 |
Jul 02 10:03:01 AM PDT 24 |
2802426741 ps |
T158 |
/workspace/coverage/default/34.sram_ctrl_smoke.1272448898 |
|
|
Jul 02 10:01:45 AM PDT 24 |
Jul 02 10:01:55 AM PDT 24 |
489906331 ps |
T109 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1414702022 |
|
|
Jul 02 10:00:17 AM PDT 24 |
Jul 02 10:06:55 AM PDT 24 |
6514198790 ps |
T88 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1074959487 |
|
|
Jul 02 10:03:18 AM PDT 24 |
Jul 02 10:05:40 AM PDT 24 |
15918977339 ps |
T159 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.227034503 |
|
|
Jul 02 10:01:01 AM PDT 24 |
Jul 02 10:02:00 AM PDT 24 |
1010451926 ps |
T13 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1780032383 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:00:54 AM PDT 24 |
41123852 ps |
T29 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3165912044 |
|
|
Jul 02 10:03:53 AM PDT 24 |
Jul 02 10:03:57 AM PDT 24 |
1356609697 ps |
T46 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2867966992 |
|
|
Jul 02 10:00:14 AM PDT 24 |
Jul 02 10:06:08 AM PDT 24 |
55455222091 ps |
T160 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.2641641867 |
|
|
Jul 02 10:00:04 AM PDT 24 |
Jul 02 10:00:13 AM PDT 24 |
696068490 ps |
T76 |
/workspace/coverage/default/44.sram_ctrl_stress_all.542119706 |
|
|
Jul 02 10:03:22 AM PDT 24 |
Jul 02 10:44:08 AM PDT 24 |
42738002179 ps |
T14 |
/workspace/coverage/default/32.sram_ctrl_alert_test.1100814197 |
|
|
Jul 02 10:01:43 AM PDT 24 |
Jul 02 10:01:44 AM PDT 24 |
16132733 ps |
T133 |
/workspace/coverage/default/43.sram_ctrl_regwen.2661365190 |
|
|
Jul 02 10:03:18 AM PDT 24 |
Jul 02 10:11:36 AM PDT 24 |
22772697802 ps |
T149 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.3148974146 |
|
|
Jul 02 10:01:13 AM PDT 24 |
Jul 02 10:02:01 AM PDT 24 |
7118322817 ps |
T110 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.1592052187 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 10:05:31 AM PDT 24 |
14796178462 ps |
T161 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3355995254 |
|
|
Jul 02 10:03:56 AM PDT 24 |
Jul 02 10:04:25 AM PDT 24 |
4283102188 ps |
T148 |
/workspace/coverage/default/45.sram_ctrl_bijection.2220801990 |
|
|
Jul 02 10:03:23 AM PDT 24 |
Jul 02 10:38:25 AM PDT 24 |
29191537473 ps |
T111 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2837234695 |
|
|
Jul 02 10:00:50 AM PDT 24 |
Jul 02 10:05:34 AM PDT 24 |
11869148253 ps |
T48 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1143087709 |
|
|
Jul 02 10:00:18 AM PDT 24 |
Jul 02 10:03:19 AM PDT 24 |
10561066790 ps |
T162 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.440711277 |
|
|
Jul 02 10:00:23 AM PDT 24 |
Jul 02 10:02:37 AM PDT 24 |
2619634343 ps |
T112 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2514510586 |
|
|
Jul 02 10:00:25 AM PDT 24 |
Jul 02 10:06:57 AM PDT 24 |
5425140715 ps |
T154 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.333869709 |
|
|
Jul 02 10:02:34 AM PDT 24 |
Jul 02 10:06:46 AM PDT 24 |
3096270161 ps |
T140 |
/workspace/coverage/default/46.sram_ctrl_executable.832554608 |
|
|
Jul 02 10:03:37 AM PDT 24 |
Jul 02 10:21:51 AM PDT 24 |
125167150832 ps |
T163 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.837673473 |
|
|
Jul 02 10:03:23 AM PDT 24 |
Jul 02 10:03:32 AM PDT 24 |
2806167262 ps |
T164 |
/workspace/coverage/default/42.sram_ctrl_partial_access.2064668781 |
|
|
Jul 02 10:02:56 AM PDT 24 |
Jul 02 10:03:12 AM PDT 24 |
576040494 ps |
T137 |
/workspace/coverage/default/9.sram_ctrl_executable.258093833 |
|
|
Jul 02 10:00:32 AM PDT 24 |
Jul 02 10:08:00 AM PDT 24 |
4316563561 ps |
T165 |
/workspace/coverage/default/8.sram_ctrl_executable.2080020017 |
|
|
Jul 02 10:00:10 AM PDT 24 |
Jul 02 10:06:14 AM PDT 24 |
7202069114 ps |
T166 |
/workspace/coverage/default/24.sram_ctrl_partial_access.2166485313 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:01:20 AM PDT 24 |
978386317 ps |
T167 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2925557064 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:03:17 AM PDT 24 |
11991120848 ps |
T168 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2164783072 |
|
|
Jul 02 10:03:33 AM PDT 24 |
Jul 02 10:05:52 AM PDT 24 |
64468306598 ps |
T169 |
/workspace/coverage/default/26.sram_ctrl_partial_access.515279676 |
|
|
Jul 02 10:01:07 AM PDT 24 |
Jul 02 10:01:47 AM PDT 24 |
726482714 ps |
T25 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3659432877 |
|
|
Jul 02 10:00:46 AM PDT 24 |
Jul 02 10:01:26 AM PDT 24 |
2353798693 ps |
T170 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.4051120751 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 10:10:21 AM PDT 24 |
219785804598 ps |
T143 |
/workspace/coverage/default/6.sram_ctrl_executable.1174117424 |
|
|
Jul 02 10:00:24 AM PDT 24 |
Jul 02 10:11:26 AM PDT 24 |
52566842675 ps |
T171 |
/workspace/coverage/default/17.sram_ctrl_smoke.1939219194 |
|
|
Jul 02 10:00:43 AM PDT 24 |
Jul 02 10:03:08 AM PDT 24 |
820397737 ps |
T89 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.4218439527 |
|
|
Jul 02 10:00:43 AM PDT 24 |
Jul 02 10:09:08 AM PDT 24 |
9385509574 ps |
T172 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1813359580 |
|
|
Jul 02 10:02:49 AM PDT 24 |
Jul 02 10:03:58 AM PDT 24 |
2901252319 ps |
T90 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.432320453 |
|
|
Jul 02 10:02:51 AM PDT 24 |
Jul 02 10:08:50 AM PDT 24 |
20478209382 ps |
T136 |
/workspace/coverage/default/16.sram_ctrl_regwen.3573576230 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:15:17 AM PDT 24 |
2194237220 ps |
T173 |
/workspace/coverage/default/16.sram_ctrl_bijection.1521752792 |
|
|
Jul 02 10:00:56 AM PDT 24 |
Jul 02 10:21:06 AM PDT 24 |
210037313119 ps |
T174 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.3975196109 |
|
|
Jul 02 10:00:37 AM PDT 24 |
Jul 02 10:01:16 AM PDT 24 |
1441796824 ps |
T50 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2188153711 |
|
|
Jul 02 10:03:28 AM PDT 24 |
Jul 02 10:04:26 AM PDT 24 |
6181808602 ps |
T175 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2158421803 |
|
|
Jul 02 10:01:36 AM PDT 24 |
Jul 02 10:01:57 AM PDT 24 |
647865838 ps |
T176 |
/workspace/coverage/default/29.sram_ctrl_stress_all.3258102666 |
|
|
Jul 02 10:01:21 AM PDT 24 |
Jul 02 10:23:38 AM PDT 24 |
48932398005 ps |
T144 |
/workspace/coverage/default/28.sram_ctrl_executable.3438941083 |
|
|
Jul 02 10:01:13 AM PDT 24 |
Jul 02 10:12:12 AM PDT 24 |
27806633106 ps |
T177 |
/workspace/coverage/default/3.sram_ctrl_stress_all.2753333374 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 11:00:26 AM PDT 24 |
49767590376 ps |
T178 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.336501535 |
|
|
Jul 02 10:00:37 AM PDT 24 |
Jul 02 10:04:50 AM PDT 24 |
3875765288 ps |
T91 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3153676706 |
|
|
Jul 02 10:00:19 AM PDT 24 |
Jul 02 10:02:42 AM PDT 24 |
15846655034 ps |
T179 |
/workspace/coverage/default/10.sram_ctrl_executable.1832043890 |
|
|
Jul 02 10:00:26 AM PDT 24 |
Jul 02 10:18:43 AM PDT 24 |
10307471873 ps |
T20 |
/workspace/coverage/default/22.sram_ctrl_regwen.2630270529 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 10:18:05 AM PDT 24 |
4629442177 ps |
T145 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.965467277 |
|
|
Jul 02 10:01:06 AM PDT 24 |
Jul 02 10:09:08 AM PDT 24 |
19214141985 ps |
T180 |
/workspace/coverage/default/43.sram_ctrl_smoke.3042961796 |
|
|
Jul 02 10:03:07 AM PDT 24 |
Jul 02 10:04:22 AM PDT 24 |
819543113 ps |
T181 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.114163591 |
|
|
Jul 02 10:01:05 AM PDT 24 |
Jul 02 10:03:20 AM PDT 24 |
8439557298 ps |
T182 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.1112412972 |
|
|
Jul 02 10:02:17 AM PDT 24 |
Jul 02 10:02:46 AM PDT 24 |
743432898 ps |
T15 |
/workspace/coverage/default/22.sram_ctrl_alert_test.36755879 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:01:05 AM PDT 24 |
17836942 ps |
T183 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3966196279 |
|
|
Jul 02 10:00:17 AM PDT 24 |
Jul 02 10:01:39 AM PDT 24 |
815249931 ps |
T184 |
/workspace/coverage/default/27.sram_ctrl_smoke.2746062668 |
|
|
Jul 02 10:01:06 AM PDT 24 |
Jul 02 10:01:47 AM PDT 24 |
2079296499 ps |
T92 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.2630871487 |
|
|
Jul 02 10:01:15 AM PDT 24 |
Jul 02 10:14:59 AM PDT 24 |
10282663936 ps |
T185 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1464866741 |
|
|
Jul 02 10:00:11 AM PDT 24 |
Jul 02 10:02:29 AM PDT 24 |
6369728365 ps |
T186 |
/workspace/coverage/default/21.sram_ctrl_alert_test.3242591564 |
|
|
Jul 02 10:00:49 AM PDT 24 |
Jul 02 10:00:52 AM PDT 24 |
20104869 ps |
T187 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1213845910 |
|
|
Jul 02 10:02:23 AM PDT 24 |
Jul 02 10:02:42 AM PDT 24 |
1697681697 ps |
T188 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.341232584 |
|
|
Jul 02 10:00:17 AM PDT 24 |
Jul 02 10:00:21 AM PDT 24 |
368992822 ps |
T189 |
/workspace/coverage/default/31.sram_ctrl_bijection.405912534 |
|
|
Jul 02 10:01:30 AM PDT 24 |
Jul 02 10:49:44 AM PDT 24 |
165649600499 ps |
T21 |
/workspace/coverage/default/27.sram_ctrl_regwen.632255389 |
|
|
Jul 02 10:01:05 AM PDT 24 |
Jul 02 10:09:23 AM PDT 24 |
9544223811 ps |
T69 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2840145666 |
|
|
Jul 02 10:00:37 AM PDT 24 |
Jul 02 10:01:07 AM PDT 24 |
4413852260 ps |
T190 |
/workspace/coverage/default/5.sram_ctrl_bijection.385951324 |
|
|
Jul 02 10:00:00 AM PDT 24 |
Jul 02 10:46:55 AM PDT 24 |
170561193164 ps |
T191 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.3392434848 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:24:51 AM PDT 24 |
18362672556 ps |
T192 |
/workspace/coverage/default/45.sram_ctrl_executable.3683473395 |
|
|
Jul 02 10:03:26 AM PDT 24 |
Jul 02 10:22:58 AM PDT 24 |
30545557264 ps |
T49 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.3151626069 |
|
|
Jul 02 10:02:06 AM PDT 24 |
Jul 02 10:08:08 AM PDT 24 |
21536655810 ps |
T193 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1219505043 |
|
|
Jul 02 10:03:30 AM PDT 24 |
Jul 02 10:15:10 AM PDT 24 |
21765137197 ps |
T141 |
/workspace/coverage/default/29.sram_ctrl_regwen.2785446041 |
|
|
Jul 02 10:01:21 AM PDT 24 |
Jul 02 10:24:59 AM PDT 24 |
30502530784 ps |
T146 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.590341450 |
|
|
Jul 02 10:00:42 AM PDT 24 |
Jul 02 10:07:39 AM PDT 24 |
19056747788 ps |
T194 |
/workspace/coverage/default/4.sram_ctrl_partial_access.615259924 |
|
|
Jul 02 10:00:12 AM PDT 24 |
Jul 02 10:00:50 AM PDT 24 |
3527708477 ps |
T51 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.41573799 |
|
|
Jul 02 10:00:46 AM PDT 24 |
Jul 02 10:06:15 AM PDT 24 |
14575806469 ps |
T147 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.3278004648 |
|
|
Jul 02 10:01:35 AM PDT 24 |
Jul 02 10:06:09 AM PDT 24 |
22286614598 ps |
T195 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.1952482855 |
|
|
Jul 02 10:01:07 AM PDT 24 |
Jul 02 10:05:36 AM PDT 24 |
3942744812 ps |
T196 |
/workspace/coverage/default/17.sram_ctrl_executable.2303345709 |
|
|
Jul 02 10:00:36 AM PDT 24 |
Jul 02 10:05:54 AM PDT 24 |
13227159114 ps |
T47 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3624827177 |
|
|
Jul 02 10:00:28 AM PDT 24 |
Jul 02 10:01:55 AM PDT 24 |
6433556397 ps |
T138 |
/workspace/coverage/default/19.sram_ctrl_stress_all.3080024441 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 11:14:59 AM PDT 24 |
130778170314 ps |
T197 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.2233129171 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 10:06:15 AM PDT 24 |
46059101384 ps |
T16 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.3876085376 |
|
|
Jul 02 09:59:55 AM PDT 24 |
Jul 02 10:00:00 AM PDT 24 |
966783822 ps |
T32 |
/workspace/coverage/default/20.sram_ctrl_executable.2700520025 |
|
|
Jul 02 10:00:47 AM PDT 24 |
Jul 02 10:19:18 AM PDT 24 |
17168647149 ps |
T33 |
/workspace/coverage/default/29.sram_ctrl_executable.1941826520 |
|
|
Jul 02 10:01:24 AM PDT 24 |
Jul 02 10:20:03 AM PDT 24 |
64274091104 ps |
T34 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3403361889 |
|
|
Jul 02 10:00:02 AM PDT 24 |
Jul 02 10:02:16 AM PDT 24 |
822988163 ps |
T35 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.284177789 |
|
|
Jul 02 10:03:37 AM PDT 24 |
Jul 02 10:05:42 AM PDT 24 |
8228121068 ps |
T36 |
/workspace/coverage/default/35.sram_ctrl_stress_all.1943071883 |
|
|
Jul 02 10:02:05 AM PDT 24 |
Jul 02 10:50:43 AM PDT 24 |
565414341109 ps |
T37 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.906500656 |
|
|
Jul 02 10:01:47 AM PDT 24 |
Jul 02 10:02:21 AM PDT 24 |
2847535365 ps |
T38 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.944279591 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 10:01:16 AM PDT 24 |
3118616245 ps |
T17 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.2845379358 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 10:00:12 AM PDT 24 |
95582822 ps |
T39 |
/workspace/coverage/default/19.sram_ctrl_partial_access.489821138 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:01:13 AM PDT 24 |
7068355208 ps |
T198 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.2406829869 |
|
|
Jul 02 10:00:01 AM PDT 24 |
Jul 02 10:00:07 AM PDT 24 |
349142199 ps |
T199 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.1315715737 |
|
|
Jul 02 10:02:11 AM PDT 24 |
Jul 02 10:02:15 AM PDT 24 |
342817790 ps |
T200 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.235151790 |
|
|
Jul 02 10:02:04 AM PDT 24 |
Jul 02 10:02:08 AM PDT 24 |
361256721 ps |
T201 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3586144141 |
|
|
Jul 02 10:00:59 AM PDT 24 |
Jul 02 10:03:03 AM PDT 24 |
4310646530 ps |
T202 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3855176519 |
|
|
Jul 02 10:03:02 AM PDT 24 |
Jul 02 10:03:10 AM PDT 24 |
1397114228 ps |
T139 |
/workspace/coverage/default/40.sram_ctrl_regwen.576285052 |
|
|
Jul 02 10:02:36 AM PDT 24 |
Jul 02 10:13:23 AM PDT 24 |
21071137558 ps |
T203 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1423948826 |
|
|
Jul 02 10:00:02 AM PDT 24 |
Jul 02 10:00:09 AM PDT 24 |
1860381844 ps |
T204 |
/workspace/coverage/default/7.sram_ctrl_bijection.2266679768 |
|
|
Jul 02 10:00:19 AM PDT 24 |
Jul 02 10:23:42 AM PDT 24 |
19268652223 ps |
T205 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.97415795 |
|
|
Jul 02 10:03:40 AM PDT 24 |
Jul 02 10:05:06 AM PDT 24 |
4535521124 ps |
T206 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4261300724 |
|
|
Jul 02 10:03:12 AM PDT 24 |
Jul 02 10:03:16 AM PDT 24 |
1977145836 ps |
T207 |
/workspace/coverage/default/44.sram_ctrl_executable.813108142 |
|
|
Jul 02 10:03:17 AM PDT 24 |
Jul 02 10:21:57 AM PDT 24 |
23949214102 ps |
T208 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3863839384 |
|
|
Jul 02 10:01:29 AM PDT 24 |
Jul 02 10:08:01 AM PDT 24 |
5239300327 ps |
T209 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.2932337535 |
|
|
Jul 02 10:00:40 AM PDT 24 |
Jul 02 10:01:43 AM PDT 24 |
10383159026 ps |
T210 |
/workspace/coverage/default/1.sram_ctrl_regwen.668848835 |
|
|
Jul 02 09:59:56 AM PDT 24 |
Jul 02 10:11:06 AM PDT 24 |
6092309252 ps |
T211 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1911171409 |
|
|
Jul 02 10:00:36 AM PDT 24 |
Jul 02 10:01:46 AM PDT 24 |
21705540369 ps |
T212 |
/workspace/coverage/default/4.sram_ctrl_executable.2737145339 |
|
|
Jul 02 10:00:16 AM PDT 24 |
Jul 02 10:03:52 AM PDT 24 |
7448840557 ps |
T213 |
/workspace/coverage/default/36.sram_ctrl_executable.262663081 |
|
|
Jul 02 10:02:25 AM PDT 24 |
Jul 02 10:13:34 AM PDT 24 |
4434743547 ps |
T214 |
/workspace/coverage/default/22.sram_ctrl_bijection.804144635 |
|
|
Jul 02 10:00:48 AM PDT 24 |
Jul 02 10:33:49 AM PDT 24 |
82966549996 ps |
T18 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.562488073 |
|
|
Jul 02 10:00:06 AM PDT 24 |
Jul 02 10:00:13 AM PDT 24 |
475768582 ps |
T215 |
/workspace/coverage/default/49.sram_ctrl_regwen.1095338671 |
|
|
Jul 02 10:04:07 AM PDT 24 |
Jul 02 10:26:25 AM PDT 24 |
60096675757 ps |
T216 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.1846195981 |
|
|
Jul 02 10:01:11 AM PDT 24 |
Jul 02 10:05:51 AM PDT 24 |
33970907995 ps |
T70 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3165191641 |
|
|
Jul 02 10:00:14 AM PDT 24 |
Jul 02 10:00:40 AM PDT 24 |
4598782170 ps |
T217 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1022659238 |
|
|
Jul 02 10:01:05 AM PDT 24 |
Jul 02 10:02:03 AM PDT 24 |
1177345894 ps |
T53 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.351492334 |
|
|
Jul 02 10:00:45 AM PDT 24 |
Jul 02 10:03:16 AM PDT 24 |
10569425181 ps |
T218 |
/workspace/coverage/default/37.sram_ctrl_alert_test.3955717815 |
|
|
Jul 02 10:02:21 AM PDT 24 |
Jul 02 10:02:22 AM PDT 24 |
14678326 ps |
T219 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.82820488 |
|
|
Jul 02 10:00:41 AM PDT 24 |
Jul 02 10:00:46 AM PDT 24 |
1345495896 ps |
T71 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3556195426 |
|
|
Jul 02 10:01:14 AM PDT 24 |
Jul 02 10:01:21 AM PDT 24 |
622616703 ps |
T220 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3417510882 |
|
|
Jul 02 10:00:19 AM PDT 24 |
Jul 02 10:05:28 AM PDT 24 |
46025366461 ps |
T221 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.648139149 |
|
|
Jul 02 10:02:33 AM PDT 24 |
Jul 02 10:08:19 AM PDT 24 |
57661906604 ps |
T72 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3309239972 |
|
|
Jul 02 10:03:52 AM PDT 24 |
Jul 02 10:04:00 AM PDT 24 |
1004022923 ps |
T222 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.471547631 |
|
|
Jul 02 10:03:11 AM PDT 24 |
Jul 02 10:05:20 AM PDT 24 |
9588917587 ps |
T223 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.850619827 |
|
|
Jul 02 10:00:11 AM PDT 24 |
Jul 02 10:01:06 AM PDT 24 |
8340250589 ps |
T54 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2449382412 |
|
|
Jul 02 10:01:29 AM PDT 24 |
Jul 02 10:02:56 AM PDT 24 |
2706926875 ps |
T224 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2256201861 |
|
|
Jul 02 10:00:25 AM PDT 24 |
Jul 02 10:00:29 AM PDT 24 |
463244724 ps |
T225 |
/workspace/coverage/default/23.sram_ctrl_smoke.1138082661 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:01:08 AM PDT 24 |
2289046199 ps |
T226 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2237490048 |
|
|
Jul 02 10:01:10 AM PDT 24 |
Jul 02 10:06:37 AM PDT 24 |
61733614271 ps |
T227 |
/workspace/coverage/default/33.sram_ctrl_partial_access.3610934965 |
|
|
Jul 02 10:01:39 AM PDT 24 |
Jul 02 10:01:49 AM PDT 24 |
2014914705 ps |
T228 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3038602182 |
|
|
Jul 02 10:00:09 AM PDT 24 |
Jul 02 10:00:26 AM PDT 24 |
1910538738 ps |
T229 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.140480221 |
|
|
Jul 02 10:01:41 AM PDT 24 |
Jul 02 10:06:22 AM PDT 24 |
8226237940 ps |
T230 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3810725888 |
|
|
Jul 02 10:01:49 AM PDT 24 |
Jul 02 10:03:44 AM PDT 24 |
1685461939 ps |
T231 |
/workspace/coverage/default/24.sram_ctrl_alert_test.3105295490 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 10:01:00 AM PDT 24 |
15627236 ps |
T232 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.3881928684 |
|
|
Jul 02 10:01:53 AM PDT 24 |
Jul 02 10:15:14 AM PDT 24 |
11548039664 ps |
T233 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1850713484 |
|
|
Jul 02 10:00:27 AM PDT 24 |
Jul 02 10:10:51 AM PDT 24 |
29170232465 ps |
T234 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3239070303 |
|
|
Jul 02 10:02:19 AM PDT 24 |
Jul 02 10:04:34 AM PDT 24 |
775465436 ps |
T235 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.2615866918 |
|
|
Jul 02 10:02:12 AM PDT 24 |
Jul 02 10:19:59 AM PDT 24 |
44970859834 ps |
T55 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.314251341 |
|
|
Jul 02 10:02:43 AM PDT 24 |
Jul 02 10:04:16 AM PDT 24 |
17879565583 ps |
T236 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1959521314 |
|
|
Jul 02 10:00:24 AM PDT 24 |
Jul 02 10:05:37 AM PDT 24 |
2068236593 ps |
T237 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2220146908 |
|
|
Jul 02 10:03:21 AM PDT 24 |
Jul 02 10:43:04 AM PDT 24 |
73755577199 ps |
T238 |
/workspace/coverage/default/3.sram_ctrl_regwen.78570325 |
|
|
Jul 02 10:00:10 AM PDT 24 |
Jul 02 10:11:23 AM PDT 24 |
8267234007 ps |
T239 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3299090934 |
|
|
Jul 02 10:00:03 AM PDT 24 |
Jul 02 10:00:26 AM PDT 24 |
5902401057 ps |
T240 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.21097618 |
|
|
Jul 02 10:01:01 AM PDT 24 |
Jul 02 10:06:19 AM PDT 24 |
21884049743 ps |
T73 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2823814516 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 10:01:09 AM PDT 24 |
610351587 ps |
T241 |
/workspace/coverage/default/25.sram_ctrl_executable.615459988 |
|
|
Jul 02 10:00:57 AM PDT 24 |
Jul 02 10:09:57 AM PDT 24 |
13857280717 ps |
T242 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.66633266 |
|
|
Jul 02 10:00:00 AM PDT 24 |
Jul 02 10:05:02 AM PDT 24 |
5078115740 ps |
T243 |
/workspace/coverage/default/27.sram_ctrl_bijection.1872485359 |
|
|
Jul 02 10:01:07 AM PDT 24 |
Jul 02 10:30:34 AM PDT 24 |
74521505144 ps |
T244 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.164231416 |
|
|
Jul 02 10:00:05 AM PDT 24 |
Jul 02 10:00:27 AM PDT 24 |
9144768496 ps |
T245 |
/workspace/coverage/default/24.sram_ctrl_smoke.3938599684 |
|
|
Jul 02 10:01:02 AM PDT 24 |
Jul 02 10:01:21 AM PDT 24 |
6522645856 ps |
T246 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.2117101660 |
|
|
Jul 02 10:01:46 AM PDT 24 |
Jul 02 10:03:59 AM PDT 24 |
15227851055 ps |
T247 |
/workspace/coverage/default/0.sram_ctrl_executable.2317700031 |
|
|
Jul 02 09:59:55 AM PDT 24 |
Jul 02 10:24:17 AM PDT 24 |
22611249916 ps |
T248 |
/workspace/coverage/default/15.sram_ctrl_stress_all.3396869512 |
|
|
Jul 02 10:00:38 AM PDT 24 |
Jul 02 11:19:42 AM PDT 24 |
62030342725 ps |
T249 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.124396308 |
|
|
Jul 02 10:00:07 AM PDT 24 |
Jul 02 10:00:50 AM PDT 24 |
25113973642 ps |
T56 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2338973510 |
|
|
Jul 02 10:01:54 AM PDT 24 |
Jul 02 10:03:08 AM PDT 24 |
1467352489 ps |
T250 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2465957022 |
|
|
Jul 02 10:01:12 AM PDT 24 |
Jul 02 10:01:15 AM PDT 24 |
347447355 ps |
T251 |
/workspace/coverage/default/24.sram_ctrl_executable.3706713708 |
|
|
Jul 02 10:00:54 AM PDT 24 |
Jul 02 10:36:12 AM PDT 24 |
14103173988 ps |
T252 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3963355545 |
|
|
Jul 02 10:03:02 AM PDT 24 |
Jul 02 10:04:43 AM PDT 24 |
1554474288 ps |
T253 |
/workspace/coverage/default/45.sram_ctrl_smoke.1972360357 |
|
|
Jul 02 10:03:24 AM PDT 24 |
Jul 02 10:03:34 AM PDT 24 |
518681357 ps |
T254 |
/workspace/coverage/default/2.sram_ctrl_partial_access.942491633 |
|
|
Jul 02 10:00:07 AM PDT 24 |
Jul 02 10:02:11 AM PDT 24 |
3511610319 ps |
T255 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.3082530328 |
|
|
Jul 02 10:01:30 AM PDT 24 |
Jul 02 10:01:36 AM PDT 24 |
686846301 ps |
T256 |
/workspace/coverage/default/34.sram_ctrl_partial_access.2474561945 |
|
|
Jul 02 10:01:49 AM PDT 24 |
Jul 02 10:02:10 AM PDT 24 |
1579805988 ps |
T257 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.2211646849 |
|
|
Jul 02 10:02:18 AM PDT 24 |
Jul 02 10:08:10 AM PDT 24 |
21837515817 ps |
T258 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.1488841122 |
|
|
Jul 02 10:00:57 AM PDT 24 |
Jul 02 10:01:01 AM PDT 24 |
1463033527 ps |
T259 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.445650789 |
|
|
Jul 02 10:00:47 AM PDT 24 |
Jul 02 10:00:57 AM PDT 24 |
1341493958 ps |
T260 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1313692897 |
|
|
Jul 02 10:00:24 AM PDT 24 |
Jul 02 10:01:23 AM PDT 24 |
4329020745 ps |
T261 |
/workspace/coverage/default/19.sram_ctrl_alert_test.1372207613 |
|
|
Jul 02 10:00:47 AM PDT 24 |
Jul 02 10:00:50 AM PDT 24 |
40882506 ps |
T262 |
/workspace/coverage/default/22.sram_ctrl_executable.654745739 |
|
|
Jul 02 10:00:58 AM PDT 24 |
Jul 02 10:36:10 AM PDT 24 |
11173927315 ps |
T263 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4050739649 |
|
|
Jul 02 10:00:22 AM PDT 24 |
Jul 02 10:00:34 AM PDT 24 |
729488310 ps |
T264 |
/workspace/coverage/default/43.sram_ctrl_bijection.1659146216 |
|
|
Jul 02 10:03:10 AM PDT 24 |
Jul 02 10:40:43 AM PDT 24 |
451686482343 ps |
T265 |
/workspace/coverage/default/48.sram_ctrl_partial_access.2047978609 |
|
|
Jul 02 10:03:49 AM PDT 24 |
Jul 02 10:03:55 AM PDT 24 |
475717493 ps |
T266 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3928368574 |
|
|
Jul 02 10:03:38 AM PDT 24 |
Jul 02 10:03:42 AM PDT 24 |
346846273 ps |
T74 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1524033325 |
|
|
Jul 02 10:04:02 AM PDT 24 |
Jul 02 10:04:11 AM PDT 24 |
543670795 ps |
T267 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3092656691 |
|
|
Jul 02 10:03:27 AM PDT 24 |
Jul 02 10:07:51 AM PDT 24 |
21887411836 ps |
T57 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2638423271 |
|
|
Jul 02 10:02:28 AM PDT 24 |
Jul 02 10:05:12 AM PDT 24 |
27179000446 ps |
T268 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.219725699 |
|
|
Jul 02 10:01:41 AM PDT 24 |
Jul 02 10:04:17 AM PDT 24 |
4370317603 ps |
T269 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.4174918391 |
|
|
Jul 02 10:01:54 AM PDT 24 |
Jul 02 10:07:15 AM PDT 24 |
28772481721 ps |
T270 |
/workspace/coverage/default/26.sram_ctrl_bijection.1055884116 |
|
|
Jul 02 10:01:03 AM PDT 24 |
Jul 02 10:24:50 AM PDT 24 |
470763800050 ps |
T271 |
/workspace/coverage/default/37.sram_ctrl_regwen.1472492842 |
|
|
Jul 02 10:02:16 AM PDT 24 |
Jul 02 10:27:08 AM PDT 24 |
20853166881 ps |
T272 |
/workspace/coverage/default/20.sram_ctrl_smoke.4094536042 |
|
|
Jul 02 10:00:44 AM PDT 24 |
Jul 02 10:00:59 AM PDT 24 |
1500630170 ps |
T273 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3905157727 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:01:07 AM PDT 24 |
435499043 ps |
T274 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3730646142 |
|
|
Jul 02 10:01:00 AM PDT 24 |
Jul 02 10:09:46 AM PDT 24 |
5939311987 ps |
T275 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.1369557652 |
|
|
Jul 02 10:03:14 AM PDT 24 |
Jul 02 10:05:11 AM PDT 24 |
3063670398 ps |
T276 |
/workspace/coverage/default/10.sram_ctrl_alert_test.645059469 |
|
|
Jul 02 10:00:36 AM PDT 24 |
Jul 02 10:00:38 AM PDT 24 |
16465004 ps |
T277 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1252210571 |
|
|
Jul 02 10:03:17 AM PDT 24 |
Jul 02 10:03:39 AM PDT 24 |
5527594959 ps |
T278 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.1957088299 |
|
|
Jul 02 10:02:25 AM PDT 24 |
Jul 02 10:05:10 AM PDT 24 |
785360572 ps |
T279 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.3150881561 |
|
|
Jul 02 10:01:01 AM PDT 24 |
Jul 02 10:03:10 AM PDT 24 |
9413096761 ps |
T280 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.3287594281 |
|
|
Jul 02 10:00:51 AM PDT 24 |
Jul 02 10:01:34 AM PDT 24 |
25404646971 ps |
T281 |
/workspace/coverage/default/18.sram_ctrl_alert_test.2908609345 |
|
|
Jul 02 10:00:46 AM PDT 24 |
Jul 02 10:00:49 AM PDT 24 |
69605408 ps |
T282 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.3686543443 |
|
|
Jul 02 10:02:49 AM PDT 24 |
Jul 02 10:03:22 AM PDT 24 |
2838800638 ps |
T283 |
/workspace/coverage/default/11.sram_ctrl_regwen.2496847217 |
|
|
Jul 02 10:00:21 AM PDT 24 |
Jul 02 10:11:00 AM PDT 24 |
80832179421 ps |
T284 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.307539532 |
|
|
Jul 02 10:00:06 AM PDT 24 |
Jul 02 10:00:53 AM PDT 24 |
3083896845 ps |
T285 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3846840285 |
|
|
Jul 02 10:00:48 AM PDT 24 |
Jul 02 10:05:19 AM PDT 24 |
12940676628 ps |
T286 |
/workspace/coverage/default/21.sram_ctrl_regwen.4278530284 |
|
|
Jul 02 10:00:57 AM PDT 24 |
Jul 02 10:10:57 AM PDT 24 |
19074037022 ps |
T287 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3115729717 |
|
|
Jul 02 10:00:09 AM PDT 24 |
Jul 02 10:05:48 AM PDT 24 |
14506963944 ps |
T288 |
/workspace/coverage/default/42.sram_ctrl_executable.2340436923 |
|
|
Jul 02 10:03:04 AM PDT 24 |
Jul 02 10:05:25 AM PDT 24 |
2125143225 ps |
T289 |
/workspace/coverage/default/1.sram_ctrl_alert_test.4254464681 |
|
|
Jul 02 10:00:07 AM PDT 24 |
Jul 02 10:00:13 AM PDT 24 |
13145614 ps |
T290 |
/workspace/coverage/default/36.sram_ctrl_regwen.3028901384 |
|
|
Jul 02 10:02:12 AM PDT 24 |
Jul 02 10:05:45 AM PDT 24 |
4414159206 ps |
T291 |
/workspace/coverage/default/36.sram_ctrl_smoke.2452503820 |
|
|
Jul 02 10:02:05 AM PDT 24 |
Jul 02 10:03:37 AM PDT 24 |
854314510 ps |
T292 |
/workspace/coverage/default/33.sram_ctrl_bijection.3859231124 |
|
|
Jul 02 10:01:42 AM PDT 24 |
Jul 02 10:31:39 AM PDT 24 |
25573690865 ps |
T293 |
/workspace/coverage/default/21.sram_ctrl_smoke.130427550 |
|
|
Jul 02 10:00:49 AM PDT 24 |
Jul 02 10:01:07 AM PDT 24 |
1036810509 ps |
T294 |
/workspace/coverage/default/3.sram_ctrl_partial_access.3843646865 |
|
|
Jul 02 10:00:06 AM PDT 24 |
Jul 02 10:00:21 AM PDT 24 |
2945728114 ps |
T295 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.2215427892 |
|
|
Jul 02 10:00:50 AM PDT 24 |
Jul 02 10:24:05 AM PDT 24 |
21170062211 ps |
T296 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.393357576 |
|
|
Jul 02 10:00:59 AM PDT 24 |
Jul 02 10:33:15 AM PDT 24 |
170812583731 ps |
T297 |
/workspace/coverage/default/9.sram_ctrl_smoke.2004380764 |
|
|
Jul 02 10:00:10 AM PDT 24 |
Jul 02 10:00:28 AM PDT 24 |
895916418 ps |
T298 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.1217429465 |
|
|
Jul 02 10:00:31 AM PDT 24 |
Jul 02 10:26:15 AM PDT 24 |
15026470633 ps |
T299 |
/workspace/coverage/default/9.sram_ctrl_partial_access.414169086 |
|
|
Jul 02 10:00:16 AM PDT 24 |
Jul 02 10:00:22 AM PDT 24 |
736673459 ps |
T300 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.4195511935 |
|
|
Jul 02 10:03:19 AM PDT 24 |
Jul 02 10:03:51 AM PDT 24 |
14150358197 ps |
T301 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1303074469 |
|
|
Jul 02 10:00:19 AM PDT 24 |
Jul 02 10:00:46 AM PDT 24 |
10192206822 ps |
T302 |
/workspace/coverage/default/11.sram_ctrl_partial_access.672375553 |
|
|
Jul 02 10:00:37 AM PDT 24 |
Jul 02 10:02:53 AM PDT 24 |
10130187208 ps |
T303 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.4031212862 |
|
|
Jul 02 10:02:06 AM PDT 24 |
Jul 02 10:18:45 AM PDT 24 |
280666024363 ps |