| T309 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.923298817 |
|
|
Jul 05 04:56:51 PM PDT 24 |
Jul 05 04:57:31 PM PDT 24 |
35805141743 ps |
| T310 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.1070464611 |
|
|
Jul 05 04:57:39 PM PDT 24 |
Jul 05 05:00:26 PM PDT 24 |
5135331805 ps |
| T311 |
/workspace/coverage/default/45.sram_ctrl_regwen.2350939722 |
|
|
Jul 05 04:59:59 PM PDT 24 |
Jul 05 05:14:51 PM PDT 24 |
43783830566 ps |
| T91 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2843446517 |
|
|
Jul 05 04:53:42 PM PDT 24 |
Jul 05 04:56:23 PM PDT 24 |
15897027498 ps |
| T312 |
/workspace/coverage/default/48.sram_ctrl_smoke.3030141005 |
|
|
Jul 05 05:00:52 PM PDT 24 |
Jul 05 05:01:09 PM PDT 24 |
2198166273 ps |
| T313 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3320796276 |
|
|
Jul 05 04:49:54 PM PDT 24 |
Jul 05 04:51:13 PM PDT 24 |
3291515558 ps |
| T314 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3078628125 |
|
|
Jul 05 04:55:21 PM PDT 24 |
Jul 05 04:55:32 PM PDT 24 |
1800083549 ps |
| T315 |
/workspace/coverage/default/47.sram_ctrl_executable.1091791648 |
|
|
Jul 05 05:00:43 PM PDT 24 |
Jul 05 05:22:27 PM PDT 24 |
25673583543 ps |
| T316 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.2150300153 |
|
|
Jul 05 04:51:49 PM PDT 24 |
Jul 05 04:51:53 PM PDT 24 |
1414849476 ps |
| T317 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.3535222644 |
|
|
Jul 05 04:57:18 PM PDT 24 |
Jul 05 05:01:03 PM PDT 24 |
14235144093 ps |
| T318 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.177927809 |
|
|
Jul 05 05:01:08 PM PDT 24 |
Jul 05 05:02:29 PM PDT 24 |
11810467392 ps |
| T319 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3942200101 |
|
|
Jul 05 04:58:45 PM PDT 24 |
Jul 05 04:59:47 PM PDT 24 |
18777376752 ps |
| T320 |
/workspace/coverage/default/19.sram_ctrl_alert_test.699246838 |
|
|
Jul 05 04:51:57 PM PDT 24 |
Jul 05 04:51:58 PM PDT 24 |
15078802 ps |
| T321 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1949146852 |
|
|
Jul 05 04:49:24 PM PDT 24 |
Jul 05 04:49:38 PM PDT 24 |
2787870706 ps |
| T322 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.916781168 |
|
|
Jul 05 04:55:21 PM PDT 24 |
Jul 05 04:55:24 PM PDT 24 |
358991281 ps |
| T323 |
/workspace/coverage/default/6.sram_ctrl_smoke.2937938457 |
|
|
Jul 05 04:48:41 PM PDT 24 |
Jul 05 04:49:00 PM PDT 24 |
1732008298 ps |
| T324 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.1672576241 |
|
|
Jul 05 04:53:07 PM PDT 24 |
Jul 05 04:56:27 PM PDT 24 |
13771197534 ps |
| T325 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1495255200 |
|
|
Jul 05 05:01:26 PM PDT 24 |
Jul 05 05:04:12 PM PDT 24 |
25662295620 ps |
| T326 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2054298789 |
|
|
Jul 05 04:48:10 PM PDT 24 |
Jul 05 04:48:21 PM PDT 24 |
744745159 ps |
| T327 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2644321547 |
|
|
Jul 05 04:50:51 PM PDT 24 |
Jul 05 04:50:52 PM PDT 24 |
16439791 ps |
| T328 |
/workspace/coverage/default/31.sram_ctrl_stress_all.679256399 |
|
|
Jul 05 04:55:27 PM PDT 24 |
Jul 05 06:06:30 PM PDT 24 |
73178633073 ps |
| T329 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1551064426 |
|
|
Jul 05 04:59:54 PM PDT 24 |
Jul 05 05:05:21 PM PDT 24 |
32376298337 ps |
| T330 |
/workspace/coverage/default/10.sram_ctrl_alert_test.530117047 |
|
|
Jul 05 04:49:46 PM PDT 24 |
Jul 05 04:49:48 PM PDT 24 |
156926847 ps |
| T331 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1421241094 |
|
|
Jul 05 04:50:45 PM PDT 24 |
Jul 05 04:56:10 PM PDT 24 |
28014752308 ps |
| T332 |
/workspace/coverage/default/26.sram_ctrl_stress_all.3450655522 |
|
|
Jul 05 04:53:50 PM PDT 24 |
Jul 05 05:21:02 PM PDT 24 |
300548376378 ps |
| T333 |
/workspace/coverage/default/42.sram_ctrl_alert_test.279013829 |
|
|
Jul 05 04:59:17 PM PDT 24 |
Jul 05 04:59:18 PM PDT 24 |
13055422 ps |
| T334 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1023981159 |
|
|
Jul 05 04:58:39 PM PDT 24 |
Jul 05 05:00:47 PM PDT 24 |
4117879692 ps |
| T335 |
/workspace/coverage/default/44.sram_ctrl_regwen.2712345993 |
|
|
Jul 05 04:59:40 PM PDT 24 |
Jul 05 05:34:16 PM PDT 24 |
18550070387 ps |
| T336 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3460930525 |
|
|
Jul 05 04:48:06 PM PDT 24 |
Jul 05 04:53:17 PM PDT 24 |
27008172510 ps |
| T112 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1390734618 |
|
|
Jul 05 04:50:14 PM PDT 24 |
Jul 05 04:50:25 PM PDT 24 |
690780265 ps |
| T337 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2975816538 |
|
|
Jul 05 04:52:33 PM PDT 24 |
Jul 05 05:02:14 PM PDT 24 |
44927273629 ps |
| T338 |
/workspace/coverage/default/46.sram_ctrl_executable.820858981 |
|
|
Jul 05 05:00:22 PM PDT 24 |
Jul 05 05:09:41 PM PDT 24 |
15944840432 ps |
| T339 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1549370444 |
|
|
Jul 05 05:00:21 PM PDT 24 |
Jul 05 05:01:34 PM PDT 24 |
44404564558 ps |
| T340 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2349937066 |
|
|
Jul 05 04:52:41 PM PDT 24 |
Jul 05 04:55:21 PM PDT 24 |
10952991363 ps |
| T341 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3651827978 |
|
|
Jul 05 04:58:39 PM PDT 24 |
Jul 05 05:46:17 PM PDT 24 |
143799504795 ps |
| T113 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.955448307 |
|
|
Jul 05 04:58:27 PM PDT 24 |
Jul 05 04:59:52 PM PDT 24 |
2154054939 ps |
| T342 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2769715492 |
|
|
Jul 05 04:49:59 PM PDT 24 |
Jul 05 04:54:26 PM PDT 24 |
25419177458 ps |
| T343 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.2217305964 |
|
|
Jul 05 04:59:18 PM PDT 24 |
Jul 05 05:06:00 PM PDT 24 |
188007970300 ps |
| T344 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.1429730863 |
|
|
Jul 05 04:57:10 PM PDT 24 |
Jul 05 04:57:14 PM PDT 24 |
352286185 ps |
| T345 |
/workspace/coverage/default/46.sram_ctrl_bijection.415301894 |
|
|
Jul 05 05:00:16 PM PDT 24 |
Jul 05 05:40:20 PM PDT 24 |
150503895736 ps |
| T346 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.806157071 |
|
|
Jul 05 04:58:32 PM PDT 24 |
Jul 05 04:59:04 PM PDT 24 |
754623823 ps |
| T347 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.3390110308 |
|
|
Jul 05 04:53:54 PM PDT 24 |
Jul 05 04:56:09 PM PDT 24 |
16119286371 ps |
| T348 |
/workspace/coverage/default/20.sram_ctrl_stress_all.739025149 |
|
|
Jul 05 04:52:05 PM PDT 24 |
Jul 05 06:40:21 PM PDT 24 |
775881785213 ps |
| T349 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.434717645 |
|
|
Jul 05 04:48:11 PM PDT 24 |
Jul 05 04:51:17 PM PDT 24 |
5238550449 ps |
| T350 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1853863734 |
|
|
Jul 05 04:49:18 PM PDT 24 |
Jul 05 04:50:33 PM PDT 24 |
1428513268 ps |
| T351 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1790336031 |
|
|
Jul 05 04:48:40 PM PDT 24 |
Jul 05 04:56:26 PM PDT 24 |
13950005530 ps |
| T352 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.2107865672 |
|
|
Jul 05 04:57:58 PM PDT 24 |
Jul 05 05:02:39 PM PDT 24 |
4810222808 ps |
| T353 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.609418380 |
|
|
Jul 05 04:54:58 PM PDT 24 |
Jul 05 05:02:49 PM PDT 24 |
65057886407 ps |
| T354 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.4036427859 |
|
|
Jul 05 04:50:21 PM PDT 24 |
Jul 05 05:00:55 PM PDT 24 |
6440500979 ps |
| T355 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2367429186 |
|
|
Jul 05 04:59:29 PM PDT 24 |
Jul 05 05:00:16 PM PDT 24 |
14465012019 ps |
| T356 |
/workspace/coverage/default/1.sram_ctrl_bijection.345887571 |
|
|
Jul 05 04:47:55 PM PDT 24 |
Jul 05 05:05:38 PM PDT 24 |
21086260662 ps |
| T357 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.810941569 |
|
|
Jul 05 04:59:35 PM PDT 24 |
Jul 05 05:08:48 PM PDT 24 |
80242184680 ps |
| T358 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.4261696109 |
|
|
Jul 05 04:54:18 PM PDT 24 |
Jul 05 04:54:59 PM PDT 24 |
11602934265 ps |
| T359 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.160715960 |
|
|
Jul 05 04:54:43 PM PDT 24 |
Jul 05 05:10:15 PM PDT 24 |
28837619689 ps |
| T360 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1076783745 |
|
|
Jul 05 04:53:37 PM PDT 24 |
Jul 05 04:53:56 PM PDT 24 |
1464265174 ps |
| T361 |
/workspace/coverage/default/3.sram_ctrl_partial_access.3789784131 |
|
|
Jul 05 04:48:18 PM PDT 24 |
Jul 05 04:48:42 PM PDT 24 |
1503435717 ps |
| T362 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2705978483 |
|
|
Jul 05 04:48:19 PM PDT 24 |
Jul 05 04:56:34 PM PDT 24 |
117174521765 ps |
| T363 |
/workspace/coverage/default/1.sram_ctrl_stress_all.1556938313 |
|
|
Jul 05 04:48:05 PM PDT 24 |
Jul 05 05:53:36 PM PDT 24 |
53530679391 ps |
| T364 |
/workspace/coverage/default/44.sram_ctrl_smoke.3254532481 |
|
|
Jul 05 04:59:46 PM PDT 24 |
Jul 05 05:00:02 PM PDT 24 |
826765616 ps |
| T365 |
/workspace/coverage/default/36.sram_ctrl_alert_test.179616437 |
|
|
Jul 05 04:57:18 PM PDT 24 |
Jul 05 04:57:19 PM PDT 24 |
20723956 ps |
| T366 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.2485700336 |
|
|
Jul 05 04:50:21 PM PDT 24 |
Jul 05 04:51:17 PM PDT 24 |
2910199156 ps |
| T367 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.656364340 |
|
|
Jul 05 04:55:00 PM PDT 24 |
Jul 05 04:59:26 PM PDT 24 |
5443834520 ps |
| T368 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.2904513343 |
|
|
Jul 05 04:57:52 PM PDT 24 |
Jul 05 04:59:45 PM PDT 24 |
66252431065 ps |
| T369 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1652735547 |
|
|
Jul 05 04:49:31 PM PDT 24 |
Jul 05 04:50:53 PM PDT 24 |
3034911508 ps |
| T370 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.1517603994 |
|
|
Jul 05 04:59:19 PM PDT 24 |
Jul 05 05:02:02 PM PDT 24 |
5064881074 ps |
| T371 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2840146274 |
|
|
Jul 05 04:52:49 PM PDT 24 |
Jul 05 04:54:26 PM PDT 24 |
3188291240 ps |
| T372 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3142243158 |
|
|
Jul 05 04:50:35 PM PDT 24 |
Jul 05 04:50:42 PM PDT 24 |
228491690 ps |
| T373 |
/workspace/coverage/default/39.sram_ctrl_stress_all.1057984022 |
|
|
Jul 05 04:58:26 PM PDT 24 |
Jul 05 06:07:40 PM PDT 24 |
737484531232 ps |
| T374 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1947959884 |
|
|
Jul 05 04:48:04 PM PDT 24 |
Jul 05 04:50:28 PM PDT 24 |
5005333121 ps |
| T375 |
/workspace/coverage/default/22.sram_ctrl_stress_all.3864647220 |
|
|
Jul 05 04:52:43 PM PDT 24 |
Jul 05 07:05:12 PM PDT 24 |
826604108708 ps |
| T376 |
/workspace/coverage/default/10.sram_ctrl_partial_access.461017123 |
|
|
Jul 05 04:49:31 PM PDT 24 |
Jul 05 04:49:44 PM PDT 24 |
4780623464 ps |
| T377 |
/workspace/coverage/default/39.sram_ctrl_partial_access.2777660941 |
|
|
Jul 05 04:57:59 PM PDT 24 |
Jul 05 04:58:19 PM PDT 24 |
6860918189 ps |
| T378 |
/workspace/coverage/default/35.sram_ctrl_alert_test.3323474843 |
|
|
Jul 05 04:57:04 PM PDT 24 |
Jul 05 04:57:05 PM PDT 24 |
12100353 ps |
| T379 |
/workspace/coverage/default/9.sram_ctrl_regwen.2183564969 |
|
|
Jul 05 04:49:31 PM PDT 24 |
Jul 05 04:58:01 PM PDT 24 |
3023116821 ps |
| T380 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.78267281 |
|
|
Jul 05 04:52:05 PM PDT 24 |
Jul 05 05:02:10 PM PDT 24 |
5365306137 ps |
| T381 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1874661295 |
|
|
Jul 05 04:51:04 PM PDT 24 |
Jul 05 04:52:18 PM PDT 24 |
972181684 ps |
| T382 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.2502300659 |
|
|
Jul 05 04:54:58 PM PDT 24 |
Jul 05 04:56:56 PM PDT 24 |
129563329811 ps |
| T383 |
/workspace/coverage/default/41.sram_ctrl_regwen.3120738418 |
|
|
Jul 05 04:58:52 PM PDT 24 |
Jul 05 05:05:55 PM PDT 24 |
15467871445 ps |
| T384 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2717126122 |
|
|
Jul 05 04:49:11 PM PDT 24 |
Jul 05 04:59:21 PM PDT 24 |
34677798841 ps |
| T385 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3178881188 |
|
|
Jul 05 04:49:58 PM PDT 24 |
Jul 05 04:51:42 PM PDT 24 |
1588918357 ps |
| T386 |
/workspace/coverage/default/21.sram_ctrl_executable.3330653169 |
|
|
Jul 05 04:52:19 PM PDT 24 |
Jul 05 05:10:01 PM PDT 24 |
117951516976 ps |
| T387 |
/workspace/coverage/default/41.sram_ctrl_alert_test.2732686371 |
|
|
Jul 05 04:58:57 PM PDT 24 |
Jul 05 04:58:59 PM PDT 24 |
16770702 ps |
| T114 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2955069250 |
|
|
Jul 05 04:54:11 PM PDT 24 |
Jul 05 04:54:30 PM PDT 24 |
632591764 ps |
| T388 |
/workspace/coverage/default/23.sram_ctrl_partial_access.4030068512 |
|
|
Jul 05 04:52:48 PM PDT 24 |
Jul 05 04:52:54 PM PDT 24 |
418879475 ps |
| T389 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.238538111 |
|
|
Jul 05 04:53:11 PM PDT 24 |
Jul 05 04:55:38 PM PDT 24 |
809729741 ps |
| T390 |
/workspace/coverage/default/0.sram_ctrl_regwen.3539870975 |
|
|
Jul 05 04:47:56 PM PDT 24 |
Jul 05 05:04:08 PM PDT 24 |
76319206828 ps |
| T391 |
/workspace/coverage/default/42.sram_ctrl_smoke.3269832754 |
|
|
Jul 05 04:58:58 PM PDT 24 |
Jul 05 05:00:29 PM PDT 24 |
1710106734 ps |
| T115 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1607319670 |
|
|
Jul 05 04:51:24 PM PDT 24 |
Jul 05 04:51:32 PM PDT 24 |
210978168 ps |
| T392 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.4182361437 |
|
|
Jul 05 04:53:44 PM PDT 24 |
Jul 05 05:11:02 PM PDT 24 |
11570333147 ps |
| T393 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3946881261 |
|
|
Jul 05 05:01:14 PM PDT 24 |
Jul 05 05:04:58 PM PDT 24 |
7167462032 ps |
| T394 |
/workspace/coverage/default/27.sram_ctrl_executable.769055573 |
|
|
Jul 05 04:53:59 PM PDT 24 |
Jul 05 05:09:04 PM PDT 24 |
21420363001 ps |
| T395 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3295399430 |
|
|
Jul 05 04:49:33 PM PDT 24 |
Jul 05 04:49:53 PM PDT 24 |
4707090643 ps |
| T396 |
/workspace/coverage/default/18.sram_ctrl_regwen.2913296523 |
|
|
Jul 05 04:51:25 PM PDT 24 |
Jul 05 05:03:49 PM PDT 24 |
38878933511 ps |
| T397 |
/workspace/coverage/default/15.sram_ctrl_executable.4252702840 |
|
|
Jul 05 04:50:43 PM PDT 24 |
Jul 05 05:03:48 PM PDT 24 |
29698696328 ps |
| T398 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.4174727165 |
|
|
Jul 05 04:47:56 PM PDT 24 |
Jul 05 04:50:31 PM PDT 24 |
6928691895 ps |
| T399 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2625272208 |
|
|
Jul 05 04:48:40 PM PDT 24 |
Jul 05 04:52:57 PM PDT 24 |
9211759771 ps |
| T400 |
/workspace/coverage/default/5.sram_ctrl_bijection.3103090531 |
|
|
Jul 05 04:48:35 PM PDT 24 |
Jul 05 05:13:20 PM PDT 24 |
153825450436 ps |
| T401 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.346570645 |
|
|
Jul 05 04:51:50 PM PDT 24 |
Jul 05 04:52:16 PM PDT 24 |
779101071 ps |
| T402 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2001128121 |
|
|
Jul 05 04:51:25 PM PDT 24 |
Jul 05 04:56:22 PM PDT 24 |
27386382332 ps |
| T403 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.1631037657 |
|
|
Jul 05 04:54:34 PM PDT 24 |
Jul 05 04:55:25 PM PDT 24 |
8840350916 ps |
| T404 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2234128994 |
|
|
Jul 05 04:54:27 PM PDT 24 |
Jul 05 04:56:38 PM PDT 24 |
2083013406 ps |
| T405 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3669709930 |
|
|
Jul 05 04:59:29 PM PDT 24 |
Jul 05 05:01:55 PM PDT 24 |
3128157014 ps |
| T406 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.1338321957 |
|
|
Jul 05 04:52:37 PM PDT 24 |
Jul 05 04:55:16 PM PDT 24 |
3062768675 ps |
| T407 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.52134775 |
|
|
Jul 05 05:00:04 PM PDT 24 |
Jul 05 05:03:00 PM PDT 24 |
9251392776 ps |
| T408 |
/workspace/coverage/default/1.sram_ctrl_alert_test.932483912 |
|
|
Jul 05 04:48:03 PM PDT 24 |
Jul 05 04:48:05 PM PDT 24 |
59488183 ps |
| T409 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.2562655968 |
|
|
Jul 05 04:55:07 PM PDT 24 |
Jul 05 05:11:47 PM PDT 24 |
16035873025 ps |
| T410 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.2857722569 |
|
|
Jul 05 04:54:50 PM PDT 24 |
Jul 05 05:00:26 PM PDT 24 |
53178152609 ps |
| T411 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1147987495 |
|
|
Jul 05 04:49:00 PM PDT 24 |
Jul 05 04:53:02 PM PDT 24 |
128430106114 ps |
| T412 |
/workspace/coverage/default/25.sram_ctrl_alert_test.592067309 |
|
|
Jul 05 04:53:37 PM PDT 24 |
Jul 05 04:53:38 PM PDT 24 |
22821121 ps |
| T413 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.1832749560 |
|
|
Jul 05 04:48:11 PM PDT 24 |
Jul 05 05:10:31 PM PDT 24 |
33480290925 ps |
| T414 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3188370359 |
|
|
Jul 05 05:00:56 PM PDT 24 |
Jul 05 05:06:04 PM PDT 24 |
12547528867 ps |
| T415 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2383099830 |
|
|
Jul 05 04:50:08 PM PDT 24 |
Jul 05 04:54:39 PM PDT 24 |
78810663282 ps |
| T416 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2140577563 |
|
|
Jul 05 04:49:10 PM PDT 24 |
Jul 05 04:49:19 PM PDT 24 |
1378949064 ps |
| T417 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.3335040420 |
|
|
Jul 05 04:55:11 PM PDT 24 |
Jul 05 04:57:22 PM PDT 24 |
2085667868 ps |
| T418 |
/workspace/coverage/default/15.sram_ctrl_stress_all.639483903 |
|
|
Jul 05 04:50:53 PM PDT 24 |
Jul 05 05:49:10 PM PDT 24 |
123257609461 ps |
| T419 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2219795648 |
|
|
Jul 05 04:53:22 PM PDT 24 |
Jul 05 04:58:20 PM PDT 24 |
4822053998 ps |
| T420 |
/workspace/coverage/default/29.sram_ctrl_alert_test.3429078842 |
|
|
Jul 05 04:54:50 PM PDT 24 |
Jul 05 04:54:51 PM PDT 24 |
14597345 ps |
| T421 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1330083666 |
|
|
Jul 05 04:59:46 PM PDT 24 |
Jul 05 05:40:41 PM PDT 24 |
267939082543 ps |
| T422 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3979134260 |
|
|
Jul 05 04:50:06 PM PDT 24 |
Jul 05 04:50:10 PM PDT 24 |
361769737 ps |
| T423 |
/workspace/coverage/default/38.sram_ctrl_smoke.3494009491 |
|
|
Jul 05 04:57:45 PM PDT 24 |
Jul 05 04:57:57 PM PDT 24 |
468505539 ps |
| T424 |
/workspace/coverage/default/14.sram_ctrl_alert_test.2346374212 |
|
|
Jul 05 04:50:43 PM PDT 24 |
Jul 05 04:50:44 PM PDT 24 |
12949423 ps |
| T425 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2670770834 |
|
|
Jul 05 04:54:06 PM PDT 24 |
Jul 05 04:57:00 PM PDT 24 |
24097037709 ps |
| T426 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1357312337 |
|
|
Jul 05 04:58:52 PM PDT 24 |
Jul 05 05:00:05 PM PDT 24 |
988941909 ps |
| T427 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1084984510 |
|
|
Jul 05 04:48:41 PM PDT 24 |
Jul 05 04:49:18 PM PDT 24 |
5414422453 ps |
| T428 |
/workspace/coverage/default/27.sram_ctrl_bijection.4186143942 |
|
|
Jul 05 04:53:58 PM PDT 24 |
Jul 05 05:03:34 PM PDT 24 |
39055389384 ps |
| T429 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.930302119 |
|
|
Jul 05 04:59:36 PM PDT 24 |
Jul 05 05:02:51 PM PDT 24 |
1374568868 ps |
| T430 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3047991541 |
|
|
Jul 05 04:50:21 PM PDT 24 |
Jul 05 06:25:31 PM PDT 24 |
60815086110 ps |
| T431 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.98350351 |
|
|
Jul 05 04:48:35 PM PDT 24 |
Jul 05 04:50:47 PM PDT 24 |
22482321471 ps |
| T432 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.4116376224 |
|
|
Jul 05 04:58:33 PM PDT 24 |
Jul 05 05:01:56 PM PDT 24 |
31346030002 ps |
| T433 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.981936710 |
|
|
Jul 05 04:54:19 PM PDT 24 |
Jul 05 04:55:41 PM PDT 24 |
4693236807 ps |
| T434 |
/workspace/coverage/default/43.sram_ctrl_smoke.3643543788 |
|
|
Jul 05 04:59:16 PM PDT 24 |
Jul 05 05:00:49 PM PDT 24 |
8687770513 ps |
| T435 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1044298392 |
|
|
Jul 05 04:54:50 PM PDT 24 |
Jul 05 04:58:11 PM PDT 24 |
2722034092 ps |
| T436 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1417167557 |
|
|
Jul 05 04:49:59 PM PDT 24 |
Jul 05 04:56:22 PM PDT 24 |
26814205952 ps |
| T437 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.2096256097 |
|
|
Jul 05 04:56:01 PM PDT 24 |
Jul 05 04:57:55 PM PDT 24 |
1515760295 ps |
| T438 |
/workspace/coverage/default/14.sram_ctrl_executable.1413087531 |
|
|
Jul 05 04:50:36 PM PDT 24 |
Jul 05 04:58:00 PM PDT 24 |
28636242200 ps |
| T439 |
/workspace/coverage/default/41.sram_ctrl_stress_all.3463879158 |
|
|
Jul 05 04:58:57 PM PDT 24 |
Jul 05 06:18:37 PM PDT 24 |
141926930380 ps |
| T440 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.2203821446 |
|
|
Jul 05 04:52:19 PM PDT 24 |
Jul 05 04:53:47 PM PDT 24 |
52054567138 ps |
| T441 |
/workspace/coverage/default/2.sram_ctrl_regwen.3231936049 |
|
|
Jul 05 04:48:09 PM PDT 24 |
Jul 05 04:49:14 PM PDT 24 |
5952918963 ps |
| T442 |
/workspace/coverage/default/8.sram_ctrl_regwen.1724783640 |
|
|
Jul 05 04:49:16 PM PDT 24 |
Jul 05 05:03:16 PM PDT 24 |
9280452219 ps |
| T443 |
/workspace/coverage/default/43.sram_ctrl_regwen.2858365149 |
|
|
Jul 05 04:59:29 PM PDT 24 |
Jul 05 05:01:44 PM PDT 24 |
2221569789 ps |
| T444 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3335824728 |
|
|
Jul 05 04:52:47 PM PDT 24 |
Jul 05 04:57:52 PM PDT 24 |
13914783132 ps |
| T445 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.2056670279 |
|
|
Jul 05 04:52:18 PM PDT 24 |
Jul 05 04:52:22 PM PDT 24 |
345884373 ps |
| T446 |
/workspace/coverage/default/35.sram_ctrl_executable.2756654904 |
|
|
Jul 05 04:56:48 PM PDT 24 |
Jul 05 05:17:35 PM PDT 24 |
194646098355 ps |
| T447 |
/workspace/coverage/default/12.sram_ctrl_smoke.2176538138 |
|
|
Jul 05 04:49:52 PM PDT 24 |
Jul 05 04:50:46 PM PDT 24 |
1204527913 ps |
| T448 |
/workspace/coverage/default/42.sram_ctrl_partial_access.1286696255 |
|
|
Jul 05 04:58:56 PM PDT 24 |
Jul 05 04:59:05 PM PDT 24 |
890560691 ps |
| T449 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1838006251 |
|
|
Jul 05 04:51:26 PM PDT 24 |
Jul 05 05:10:44 PM PDT 24 |
34368818465 ps |
| T450 |
/workspace/coverage/default/20.sram_ctrl_alert_test.2673250278 |
|
|
Jul 05 04:52:04 PM PDT 24 |
Jul 05 04:52:05 PM PDT 24 |
17122259 ps |
| T451 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1205516170 |
|
|
Jul 05 04:53:45 PM PDT 24 |
Jul 05 05:00:07 PM PDT 24 |
26672995847 ps |
| T452 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.8994701 |
|
|
Jul 05 04:51:50 PM PDT 24 |
Jul 05 04:53:26 PM PDT 24 |
168533062943 ps |
| T453 |
/workspace/coverage/default/25.sram_ctrl_stress_all.1190475695 |
|
|
Jul 05 04:53:37 PM PDT 24 |
Jul 05 05:48:38 PM PDT 24 |
108919835591 ps |
| T454 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1904795565 |
|
|
Jul 05 04:50:30 PM PDT 24 |
Jul 05 04:53:13 PM PDT 24 |
3457605763 ps |
| T455 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2337274859 |
|
|
Jul 05 04:55:10 PM PDT 24 |
Jul 05 04:55:14 PM PDT 24 |
365273501 ps |
| T456 |
/workspace/coverage/default/33.sram_ctrl_partial_access.2234459936 |
|
|
Jul 05 04:55:57 PM PDT 24 |
Jul 05 04:56:24 PM PDT 24 |
2237323255 ps |
| T457 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3355093603 |
|
|
Jul 05 04:59:40 PM PDT 24 |
Jul 05 05:00:10 PM PDT 24 |
3893422140 ps |
| T458 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.3825625229 |
|
|
Jul 05 04:50:51 PM PDT 24 |
Jul 05 04:56:18 PM PDT 24 |
28814512644 ps |
| T459 |
/workspace/coverage/default/27.sram_ctrl_smoke.2458567782 |
|
|
Jul 05 04:53:50 PM PDT 24 |
Jul 05 04:54:00 PM PDT 24 |
497363064 ps |
| T460 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.2618480383 |
|
|
Jul 05 04:53:03 PM PDT 24 |
Jul 05 04:53:07 PM PDT 24 |
667215025 ps |
| T461 |
/workspace/coverage/default/4.sram_ctrl_regwen.306422574 |
|
|
Jul 05 04:48:34 PM PDT 24 |
Jul 05 05:07:12 PM PDT 24 |
15231146029 ps |
| T462 |
/workspace/coverage/default/3.sram_ctrl_smoke.305887496 |
|
|
Jul 05 04:48:17 PM PDT 24 |
Jul 05 04:51:09 PM PDT 24 |
1787101861 ps |
| T463 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.4228491126 |
|
|
Jul 05 04:47:55 PM PDT 24 |
Jul 05 04:48:51 PM PDT 24 |
3650807973 ps |
| T464 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.836606983 |
|
|
Jul 05 04:55:57 PM PDT 24 |
Jul 05 05:07:21 PM PDT 24 |
10378311190 ps |
| T465 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.654396887 |
|
|
Jul 05 04:55:42 PM PDT 24 |
Jul 05 05:03:40 PM PDT 24 |
8506315036 ps |
| T466 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.845863089 |
|
|
Jul 05 04:50:21 PM PDT 24 |
Jul 05 04:51:36 PM PDT 24 |
5822910638 ps |
| T467 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3173520198 |
|
|
Jul 05 04:47:46 PM PDT 24 |
Jul 05 05:01:04 PM PDT 24 |
28226689898 ps |
| T468 |
/workspace/coverage/default/25.sram_ctrl_partial_access.1856610598 |
|
|
Jul 05 04:53:22 PM PDT 24 |
Jul 05 04:53:30 PM PDT 24 |
1753592803 ps |
| T469 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1301608702 |
|
|
Jul 05 04:48:55 PM PDT 24 |
Jul 05 04:52:28 PM PDT 24 |
17745620102 ps |
| T470 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1875642470 |
|
|
Jul 05 04:53:07 PM PDT 24 |
Jul 05 04:54:26 PM PDT 24 |
4943502811 ps |
| T471 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.2007078247 |
|
|
Jul 05 04:56:07 PM PDT 24 |
Jul 05 04:57:23 PM PDT 24 |
14136397546 ps |
| T472 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3922027083 |
|
|
Jul 05 04:48:41 PM PDT 24 |
Jul 05 04:54:27 PM PDT 24 |
9392050236 ps |
| T473 |
/workspace/coverage/default/34.sram_ctrl_executable.2568822302 |
|
|
Jul 05 04:56:28 PM PDT 24 |
Jul 05 05:10:53 PM PDT 24 |
39547156015 ps |
| T474 |
/workspace/coverage/default/49.sram_ctrl_smoke.4270717592 |
|
|
Jul 05 05:01:08 PM PDT 24 |
Jul 05 05:01:23 PM PDT 24 |
1235422066 ps |
| T475 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.2779376011 |
|
|
Jul 05 04:51:23 PM PDT 24 |
Jul 05 04:52:02 PM PDT 24 |
10408013170 ps |
| T476 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.1883689151 |
|
|
Jul 05 04:51:01 PM PDT 24 |
Jul 05 04:52:35 PM PDT 24 |
10685100566 ps |
| T477 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.635179836 |
|
|
Jul 05 04:51:20 PM PDT 24 |
Jul 05 04:57:15 PM PDT 24 |
21130621763 ps |
| T478 |
/workspace/coverage/default/46.sram_ctrl_regwen.2298438107 |
|
|
Jul 05 05:00:21 PM PDT 24 |
Jul 05 05:31:29 PM PDT 24 |
2905554849 ps |
| T479 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.872068708 |
|
|
Jul 05 04:56:57 PM PDT 24 |
Jul 05 04:59:01 PM PDT 24 |
1625152418 ps |
| T480 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.323039009 |
|
|
Jul 05 04:55:27 PM PDT 24 |
Jul 05 04:56:27 PM PDT 24 |
1112962516 ps |
| T481 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.2703913175 |
|
|
Jul 05 04:51:06 PM PDT 24 |
Jul 05 04:51:10 PM PDT 24 |
690579350 ps |
| T482 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3786506620 |
|
|
Jul 05 04:59:58 PM PDT 24 |
Jul 05 05:01:33 PM PDT 24 |
2884632713 ps |
| T483 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1855412083 |
|
|
Jul 05 04:55:44 PM PDT 24 |
Jul 05 04:57:06 PM PDT 24 |
41106082486 ps |
| T484 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3859517643 |
|
|
Jul 05 04:56:34 PM PDT 24 |
Jul 05 04:56:37 PM PDT 24 |
370227777 ps |
| T485 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2676333024 |
|
|
Jul 05 05:00:51 PM PDT 24 |
Jul 05 05:00:56 PM PDT 24 |
357660143 ps |
| T486 |
/workspace/coverage/default/40.sram_ctrl_smoke.3855378697 |
|
|
Jul 05 04:58:39 PM PDT 24 |
Jul 05 04:58:45 PM PDT 24 |
3646079899 ps |
| T487 |
/workspace/coverage/default/41.sram_ctrl_bijection.2480472568 |
|
|
Jul 05 04:58:47 PM PDT 24 |
Jul 05 05:20:39 PM PDT 24 |
197818056337 ps |
| T488 |
/workspace/coverage/default/22.sram_ctrl_smoke.2322537427 |
|
|
Jul 05 04:52:37 PM PDT 24 |
Jul 05 04:52:48 PM PDT 24 |
2255974077 ps |
| T116 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3626334448 |
|
|
Jul 05 05:00:50 PM PDT 24 |
Jul 05 05:00:57 PM PDT 24 |
377817746 ps |
| T489 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.918799084 |
|
|
Jul 05 04:51:26 PM PDT 24 |
Jul 05 05:07:22 PM PDT 24 |
43993374198 ps |
| T490 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.3239755724 |
|
|
Jul 05 04:59:05 PM PDT 24 |
Jul 05 05:31:26 PM PDT 24 |
70879866588 ps |
| T491 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.1380123886 |
|
|
Jul 05 04:53:29 PM PDT 24 |
Jul 05 04:53:34 PM PDT 24 |
6706622263 ps |
| T117 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3201405996 |
|
|
Jul 05 05:00:05 PM PDT 24 |
Jul 05 05:00:13 PM PDT 24 |
233506218 ps |
| T492 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.3775270540 |
|
|
Jul 05 04:59:41 PM PDT 24 |
Jul 05 05:00:52 PM PDT 24 |
775738644 ps |
| T493 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1380150808 |
|
|
Jul 05 04:48:48 PM PDT 24 |
Jul 05 04:49:13 PM PDT 24 |
7513647838 ps |
| T494 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.617256055 |
|
|
Jul 05 04:50:30 PM PDT 24 |
Jul 05 04:56:05 PM PDT 24 |
5811610889 ps |
| T495 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.659195937 |
|
|
Jul 05 04:50:07 PM PDT 24 |
Jul 05 05:10:36 PM PDT 24 |
95753763595 ps |
| T496 |
/workspace/coverage/default/23.sram_ctrl_smoke.2708325987 |
|
|
Jul 05 04:52:42 PM PDT 24 |
Jul 05 04:55:19 PM PDT 24 |
947998540 ps |
| T497 |
/workspace/coverage/default/6.sram_ctrl_alert_test.387833927 |
|
|
Jul 05 04:48:56 PM PDT 24 |
Jul 05 04:48:57 PM PDT 24 |
41400701 ps |
| T498 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2018820822 |
|
|
Jul 05 04:52:42 PM PDT 24 |
Jul 05 04:52:59 PM PDT 24 |
2825695464 ps |
| T499 |
/workspace/coverage/default/43.sram_ctrl_stress_all.86217093 |
|
|
Jul 05 04:59:46 PM PDT 24 |
Jul 05 05:34:32 PM PDT 24 |
91524157785 ps |
| T500 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.979922211 |
|
|
Jul 05 04:58:29 PM PDT 24 |
Jul 05 05:05:39 PM PDT 24 |
15195978591 ps |
| T501 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3327961374 |
|
|
Jul 05 05:01:16 PM PDT 24 |
Jul 05 05:02:29 PM PDT 24 |
57877715637 ps |
| T502 |
/workspace/coverage/default/45.sram_ctrl_smoke.3063179119 |
|
|
Jul 05 05:00:04 PM PDT 24 |
Jul 05 05:00:12 PM PDT 24 |
2699620453 ps |
| T503 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2263886798 |
|
|
Jul 05 04:50:25 PM PDT 24 |
Jul 05 04:51:59 PM PDT 24 |
3530656704 ps |
| T504 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1673976892 |
|
|
Jul 05 04:48:35 PM PDT 24 |
Jul 05 04:48:54 PM PDT 24 |
886479986 ps |
| T505 |
/workspace/coverage/default/27.sram_ctrl_partial_access.3547943645 |
|
|
Jul 05 04:53:56 PM PDT 24 |
Jul 05 04:54:20 PM PDT 24 |
3946845070 ps |
| T506 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.3096040886 |
|
|
Jul 05 04:53:22 PM PDT 24 |
Jul 05 04:54:55 PM PDT 24 |
805604116 ps |
| T507 |
/workspace/coverage/default/21.sram_ctrl_partial_access.2528621957 |
|
|
Jul 05 04:52:11 PM PDT 24 |
Jul 05 04:52:54 PM PDT 24 |
4963661973 ps |
| T508 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2841564080 |
|
|
Jul 05 04:48:08 PM PDT 24 |
Jul 05 04:48:58 PM PDT 24 |
24621930093 ps |
| T509 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.986014245 |
|
|
Jul 05 04:47:55 PM PDT 24 |
Jul 05 04:47:59 PM PDT 24 |
359343177 ps |
| T510 |
/workspace/coverage/default/7.sram_ctrl_bijection.2527372600 |
|
|
Jul 05 04:48:57 PM PDT 24 |
Jul 05 05:08:15 PM PDT 24 |
31537878551 ps |
| T511 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.663969535 |
|
|
Jul 05 04:54:18 PM PDT 24 |
Jul 05 05:17:00 PM PDT 24 |
14874675723 ps |
| T512 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2310362499 |
|
|
Jul 05 05:00:03 PM PDT 24 |
Jul 05 05:03:23 PM PDT 24 |
10942936491 ps |
| T513 |
/workspace/coverage/default/4.sram_ctrl_smoke.2312812124 |
|
|
Jul 05 04:48:26 PM PDT 24 |
Jul 05 04:48:49 PM PDT 24 |
2912262608 ps |
| T514 |
/workspace/coverage/default/26.sram_ctrl_alert_test.3627715662 |
|
|
Jul 05 04:53:54 PM PDT 24 |
Jul 05 04:53:56 PM PDT 24 |
51868637 ps |
| T515 |
/workspace/coverage/default/39.sram_ctrl_alert_test.806020784 |
|
|
Jul 05 04:58:26 PM PDT 24 |
Jul 05 04:58:27 PM PDT 24 |
15798969 ps |
| T516 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.294734962 |
|
|
Jul 05 04:51:57 PM PDT 24 |
Jul 05 04:53:34 PM PDT 24 |
16606353869 ps |
| T517 |
/workspace/coverage/default/29.sram_ctrl_partial_access.3018233391 |
|
|
Jul 05 04:54:35 PM PDT 24 |
Jul 05 04:55:09 PM PDT 24 |
434356153 ps |
| T518 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.1742949912 |
|
|
Jul 05 04:59:23 PM PDT 24 |
Jul 05 04:59:30 PM PDT 24 |
683361275 ps |
| T519 |
/workspace/coverage/default/43.sram_ctrl_bijection.3734460147 |
|
|
Jul 05 04:59:23 PM PDT 24 |
Jul 05 05:41:57 PM PDT 24 |
230053580049 ps |
| T520 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1196780194 |
|
|
Jul 05 04:49:02 PM PDT 24 |
Jul 05 05:34:45 PM PDT 24 |
117013789503 ps |
| T521 |
/workspace/coverage/default/40.sram_ctrl_bijection.1950188022 |
|
|
Jul 05 04:58:26 PM PDT 24 |
Jul 05 05:22:59 PM PDT 24 |
85258399381 ps |
| T522 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.382298541 |
|
|
Jul 05 04:48:34 PM PDT 24 |
Jul 05 04:50:15 PM PDT 24 |
53301127460 ps |
| T523 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3602601734 |
|
|
Jul 05 04:49:46 PM PDT 24 |
Jul 05 04:49:53 PM PDT 24 |
1729396440 ps |
| T524 |
/workspace/coverage/default/32.sram_ctrl_bijection.75732811 |
|
|
Jul 05 04:55:35 PM PDT 24 |
Jul 05 05:17:20 PM PDT 24 |
288068543417 ps |
| T525 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3997746025 |
|
|
Jul 05 04:54:15 PM PDT 24 |
Jul 05 04:57:02 PM PDT 24 |
32770798838 ps |
| T526 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.535981575 |
|
|
Jul 05 04:51:44 PM PDT 24 |
Jul 05 04:53:34 PM PDT 24 |
13590748278 ps |
| T527 |
/workspace/coverage/default/39.sram_ctrl_regwen.1803307295 |
|
|
Jul 05 04:58:18 PM PDT 24 |
Jul 05 05:09:21 PM PDT 24 |
17966001711 ps |
| T528 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.4203960967 |
|
|
Jul 05 04:48:36 PM PDT 24 |
Jul 05 05:06:00 PM PDT 24 |
15959212343 ps |
| T529 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2126578676 |
|
|
Jul 05 05:01:21 PM PDT 24 |
Jul 05 05:03:49 PM PDT 24 |
9538443443 ps |
| T530 |
/workspace/coverage/default/29.sram_ctrl_bijection.616447322 |
|
|
Jul 05 04:54:35 PM PDT 24 |
Jul 05 05:26:09 PM PDT 24 |
106667258792 ps |
| T531 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3725306502 |
|
|
Jul 05 05:00:42 PM PDT 24 |
Jul 05 05:05:41 PM PDT 24 |
14260506832 ps |
| T532 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.693381820 |
|
|
Jul 05 05:00:17 PM PDT 24 |
Jul 05 05:04:03 PM PDT 24 |
15100080998 ps |
| T533 |
/workspace/coverage/default/24.sram_ctrl_executable.3427001514 |
|
|
Jul 05 04:53:17 PM PDT 24 |
Jul 05 05:04:57 PM PDT 24 |
55077650440 ps |
| T534 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.52080463 |
|
|
Jul 05 04:59:46 PM PDT 24 |
Jul 05 05:03:45 PM PDT 24 |
21993997139 ps |
| T535 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.2247617111 |
|
|
Jul 05 04:59:40 PM PDT 24 |
Jul 05 05:02:13 PM PDT 24 |
10522708002 ps |
| T536 |
/workspace/coverage/default/30.sram_ctrl_executable.3843196411 |
|
|
Jul 05 04:55:06 PM PDT 24 |
Jul 05 05:01:45 PM PDT 24 |
76322410120 ps |
| T537 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.4089998091 |
|
|
Jul 05 05:01:10 PM PDT 24 |
Jul 05 05:05:30 PM PDT 24 |
15759493808 ps |
| T538 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.2368076572 |
|
|
Jul 05 04:53:50 PM PDT 24 |
Jul 05 04:58:55 PM PDT 24 |
28841056452 ps |
| T539 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.1481200142 |
|
|
Jul 05 04:52:49 PM PDT 24 |
Jul 05 04:53:05 PM PDT 24 |
709047471 ps |
| T540 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.2509999058 |
|
|
Jul 05 04:56:57 PM PDT 24 |
Jul 05 04:57:02 PM PDT 24 |
2573138673 ps |
| T541 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.357796252 |
|
|
Jul 05 04:54:05 PM PDT 24 |
Jul 05 04:58:25 PM PDT 24 |
8213459272 ps |
| T542 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2373620969 |
|
|
Jul 05 05:00:03 PM PDT 24 |
Jul 05 05:00:07 PM PDT 24 |
362199159 ps |
| T543 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.2359777808 |
|
|
Jul 05 04:53:58 PM PDT 24 |
Jul 05 04:54:12 PM PDT 24 |
1988806759 ps |
| T544 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.2620523271 |
|
|
Jul 05 04:52:20 PM PDT 24 |
Jul 05 05:01:28 PM PDT 24 |
10232328263 ps |
| T545 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.5895568 |
|
|
Jul 05 04:50:52 PM PDT 24 |
Jul 05 05:01:42 PM PDT 24 |
12726382620 ps |
| T546 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.2982444371 |
|
|
Jul 05 04:53:50 PM PDT 24 |
Jul 05 04:55:06 PM PDT 24 |
2338330814 ps |
| T547 |
/workspace/coverage/default/34.sram_ctrl_partial_access.119815691 |
|
|
Jul 05 04:56:21 PM PDT 24 |
Jul 05 04:56:47 PM PDT 24 |
1809151431 ps |
| T548 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.1201525982 |
|
|
Jul 05 04:58:38 PM PDT 24 |
Jul 05 05:17:49 PM PDT 24 |
44185912450 ps |
| T549 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.505558765 |
|
|
Jul 05 04:49:39 PM PDT 24 |
Jul 05 04:52:02 PM PDT 24 |
2499229884 ps |
| T550 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.2700030115 |
|
|
Jul 05 04:57:32 PM PDT 24 |
Jul 05 05:18:34 PM PDT 24 |
65295668302 ps |
| T551 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.592582228 |
|
|
Jul 05 04:58:53 PM PDT 24 |
Jul 05 05:03:58 PM PDT 24 |
23860097258 ps |