Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.921130153 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2499211598 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3419561067 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3434945186 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.4182059877 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.4055091700 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2304025519 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1183309780 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1740188458 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2822148693 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3304177192 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1536082760 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3761613645 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3825130769 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1224065718 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1189720885 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1764454424 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3325505149 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.4183333248 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1572541259 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.142927823 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4284350818 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2144094751 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3532150005 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.861992990 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3390971013 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3329553851 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1316663486 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3049406524 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1344533512 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.892350335 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2685975102 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4030652120 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3834279293 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3561641199 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3537850841 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2734340057 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2596615531 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.37876727 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.652244968 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3635525392 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1812369528 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3239976618 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3975118885 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1368529918 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3410955271 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2261744191 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1539544559 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2984839973 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2826272418 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.233228357 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2284706553 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3514826767 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1939311936 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1869879500 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.130628413 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.340065449 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.878075925 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.983749909 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3261785357 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3524147484 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1340644572 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.824996768 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.254456711 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.608864285 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3275166672 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2051328464 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3542757904 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4116033884 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4185356627 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2753542134 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3979650351 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1144904662 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1510577437 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.132261255 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3830047382 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3219567324 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.85747617 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.48108052 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.998187843 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2320084701 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3756890749 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.4233825528 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1448023084 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.642838939 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.316846963 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1603973553 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.4177974011 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2129218479 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2797153246 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1734777946 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1021505890 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2532194692 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.852294631 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.892362127 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2729625420 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.860768472 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1326845637 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3052481071 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3025795232 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4163824974 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4088174424 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1571412977 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2571127866 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.592775504 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3642243272 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1833890966 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1423114256 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1063711686 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.338485526 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2568427403 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.846486471 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.14435981 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.26749198 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1531685574 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1829010180 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3224752307 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2768029421 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1960995295 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.934094901 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.345683013 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.418904344 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.651070488 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1183129206 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1428385891 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1984192102 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1739688805 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4201322496 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1024450155 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1963780308 |
/workspace/coverage/default/0.sram_ctrl_alert_test.4184155213 |
/workspace/coverage/default/0.sram_ctrl_bijection.4102769792 |
/workspace/coverage/default/0.sram_ctrl_executable.2714454805 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3895085085 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.491045527 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3080300361 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3101500572 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3100776435 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2273673397 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1532042586 |
/workspace/coverage/default/0.sram_ctrl_regwen.3124538683 |
/workspace/coverage/default/0.sram_ctrl_smoke.2240679833 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1942624905 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.369439640 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2711141838 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4239948776 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3739961643 |
/workspace/coverage/default/1.sram_ctrl_alert_test.1399435762 |
/workspace/coverage/default/1.sram_ctrl_bijection.1213345798 |
/workspace/coverage/default/1.sram_ctrl_executable.335403703 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3107524251 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.4108813408 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2890872623 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2257958529 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1331158827 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3041336685 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1120721431 |
/workspace/coverage/default/1.sram_ctrl_regwen.3675595778 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.1884207696 |
/workspace/coverage/default/1.sram_ctrl_smoke.2946735649 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1304625247 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2439718211 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3738838774 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2177515329 |
/workspace/coverage/default/10.sram_ctrl_alert_test.3748599760 |
/workspace/coverage/default/10.sram_ctrl_bijection.742472080 |
/workspace/coverage/default/10.sram_ctrl_executable.1975583094 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2027828635 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1357236852 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.50811658 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1010622981 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2126174646 |
/workspace/coverage/default/10.sram_ctrl_partial_access.1391990321 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4206418988 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2967923561 |
/workspace/coverage/default/10.sram_ctrl_regwen.2801896617 |
/workspace/coverage/default/10.sram_ctrl_smoke.172382961 |
/workspace/coverage/default/10.sram_ctrl_stress_all.1281178753 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1064444138 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.185629576 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2554096543 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2169063066 |
/workspace/coverage/default/11.sram_ctrl_alert_test.1604773377 |
/workspace/coverage/default/11.sram_ctrl_bijection.53804016 |
/workspace/coverage/default/11.sram_ctrl_executable.1359257974 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3008324256 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2055416237 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1691377356 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.4020550599 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1177640597 |
/workspace/coverage/default/11.sram_ctrl_partial_access.390839921 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.826686397 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1831825380 |
/workspace/coverage/default/11.sram_ctrl_regwen.2781528482 |
/workspace/coverage/default/11.sram_ctrl_smoke.399602429 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2226342783 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2308135278 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4143176888 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3979397873 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1472902612 |
/workspace/coverage/default/12.sram_ctrl_bijection.2247915951 |
/workspace/coverage/default/12.sram_ctrl_executable.13136714 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1994626712 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.486775834 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3411147962 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.1577150908 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.879175519 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4035756645 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.73168896 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1787333161 |
/workspace/coverage/default/12.sram_ctrl_regwen.1388412845 |
/workspace/coverage/default/12.sram_ctrl_smoke.3208285107 |
/workspace/coverage/default/12.sram_ctrl_stress_all.968862361 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3316559359 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.734706707 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2526158270 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.836554768 |
/workspace/coverage/default/13.sram_ctrl_alert_test.2228729625 |
/workspace/coverage/default/13.sram_ctrl_bijection.1157327530 |
/workspace/coverage/default/13.sram_ctrl_executable.2188539163 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3420717051 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.1011195703 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.1712206930 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.752436176 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.4130240954 |
/workspace/coverage/default/13.sram_ctrl_partial_access.3225225153 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2166287425 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1233100456 |
/workspace/coverage/default/13.sram_ctrl_regwen.2750186699 |
/workspace/coverage/default/13.sram_ctrl_smoke.3112021285 |
/workspace/coverage/default/13.sram_ctrl_stress_all.2268420633 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.743455110 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2023646774 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.823723280 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1486417997 |
/workspace/coverage/default/14.sram_ctrl_alert_test.4088186165 |
/workspace/coverage/default/14.sram_ctrl_bijection.2448049350 |
/workspace/coverage/default/14.sram_ctrl_executable.3564107459 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3188124656 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2290235194 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2840059844 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.219940688 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1499332730 |
/workspace/coverage/default/14.sram_ctrl_partial_access.3461194644 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3031731791 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2556018659 |
/workspace/coverage/default/14.sram_ctrl_regwen.4285769446 |
/workspace/coverage/default/14.sram_ctrl_smoke.2948170345 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2018114049 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1430342679 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2789552697 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3184892280 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1939903795 |
/workspace/coverage/default/15.sram_ctrl_alert_test.4221615857 |
/workspace/coverage/default/15.sram_ctrl_bijection.23528975 |
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/workspace/coverage/default/44.sram_ctrl_max_throughput.2725174614 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2796666391 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3649153393 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2828620666 |
/workspace/coverage/default/44.sram_ctrl_partial_access.4212128810 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2779830771 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3922041832 |
/workspace/coverage/default/44.sram_ctrl_regwen.3913372025 |
/workspace/coverage/default/44.sram_ctrl_smoke.1957719068 |
/workspace/coverage/default/44.sram_ctrl_stress_all.253703008 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3690093226 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3873258216 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1327898216 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3158556399 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1078093774 |
/workspace/coverage/default/45.sram_ctrl_bijection.3368632585 |
/workspace/coverage/default/45.sram_ctrl_executable.1352767545 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2078279481 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3917364973 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2590327163 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.4169178545 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1938796447 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2117115752 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.744678435 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.151638522 |
/workspace/coverage/default/45.sram_ctrl_regwen.314386226 |
/workspace/coverage/default/45.sram_ctrl_smoke.774802827 |
/workspace/coverage/default/45.sram_ctrl_stress_all.863699317 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3287093268 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.992701657 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3075117863 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1376024759 |
/workspace/coverage/default/46.sram_ctrl_alert_test.4026414713 |
/workspace/coverage/default/46.sram_ctrl_executable.510515106 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2296405803 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2697579235 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.605532373 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3793793257 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1931466773 |
/workspace/coverage/default/46.sram_ctrl_partial_access.3724308535 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2408008245 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2929500985 |
/workspace/coverage/default/46.sram_ctrl_regwen.1696773640 |
/workspace/coverage/default/46.sram_ctrl_smoke.3783960073 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3677711775 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.128502704 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3572481168 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.844641620 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3753135169 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3845584038 |
/workspace/coverage/default/47.sram_ctrl_bijection.2584395325 |
/workspace/coverage/default/47.sram_ctrl_executable.3059484178 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.183866942 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.190010770 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1687894288 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1093596595 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3113450756 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3356265419 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2944715542 |
/workspace/coverage/default/47.sram_ctrl_regwen.4224837090 |
/workspace/coverage/default/47.sram_ctrl_smoke.3448999445 |
/workspace/coverage/default/47.sram_ctrl_stress_all.194060440 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2483811644 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3077808076 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3907759479 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2809288878 |
/workspace/coverage/default/48.sram_ctrl_alert_test.927256329 |
/workspace/coverage/default/48.sram_ctrl_bijection.340407437 |
/workspace/coverage/default/48.sram_ctrl_executable.643691952 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3692510832 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.3875161137 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4032714407 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.1103640926 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.880514476 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1255015203 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1175471974 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.4143805151 |
/workspace/coverage/default/48.sram_ctrl_regwen.2514447890 |
/workspace/coverage/default/48.sram_ctrl_smoke.637542429 |
/workspace/coverage/default/48.sram_ctrl_stress_all.686289586 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2224601724 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.947880649 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1761446673 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.373645452 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1903536545 |
/workspace/coverage/default/49.sram_ctrl_bijection.1132541469 |
/workspace/coverage/default/49.sram_ctrl_executable.2905775177 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3549510591 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1709154315 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1617665390 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.3974325081 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.894294326 |
/workspace/coverage/default/49.sram_ctrl_partial_access.1315130843 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.181000965 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.860283288 |
/workspace/coverage/default/49.sram_ctrl_regwen.3259253529 |
/workspace/coverage/default/49.sram_ctrl_smoke.1958915223 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3495292950 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.902298079 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1516944983 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2035826349 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2152151178 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1900270937 |
/workspace/coverage/default/5.sram_ctrl_bijection.1790764595 |
/workspace/coverage/default/5.sram_ctrl_executable.3549324343 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2598456033 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.1693033368 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3353582204 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3841835857 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2495565726 |
/workspace/coverage/default/5.sram_ctrl_partial_access.4012190134 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3930431981 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2867418988 |
/workspace/coverage/default/5.sram_ctrl_regwen.2038453949 |
/workspace/coverage/default/5.sram_ctrl_smoke.1410455336 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2654345697 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.254823154 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2151227202 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3393128083 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1437794919 |
/workspace/coverage/default/6.sram_ctrl_alert_test.2306980757 |
/workspace/coverage/default/6.sram_ctrl_bijection.112978899 |
/workspace/coverage/default/6.sram_ctrl_executable.695353753 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3178232782 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.3004782753 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3794885177 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.3679561393 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2423655655 |
/workspace/coverage/default/6.sram_ctrl_partial_access.4006502327 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1467546332 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1687307635 |
/workspace/coverage/default/6.sram_ctrl_regwen.2100691951 |
/workspace/coverage/default/6.sram_ctrl_smoke.484032199 |
/workspace/coverage/default/6.sram_ctrl_stress_all.174358431 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2094423224 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2860979131 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.207451464 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.484774934 |
/workspace/coverage/default/7.sram_ctrl_alert_test.1903040385 |
/workspace/coverage/default/7.sram_ctrl_bijection.1379295591 |
/workspace/coverage/default/7.sram_ctrl_executable.17841922 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1382346784 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.966081068 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.431314233 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2643604503 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.179043565 |
/workspace/coverage/default/7.sram_ctrl_partial_access.22399126 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.109416388 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1724182731 |
/workspace/coverage/default/7.sram_ctrl_regwen.1457155494 |
/workspace/coverage/default/7.sram_ctrl_smoke.2129649861 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1002898469 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2482491594 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1187396417 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3990891403 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2132255014 |
/workspace/coverage/default/8.sram_ctrl_bijection.126280154 |
/workspace/coverage/default/8.sram_ctrl_executable.1225373784 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3546775676 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1707261048 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3702261370 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.341268335 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3256408279 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2252098955 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2048114632 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2296557266 |
/workspace/coverage/default/8.sram_ctrl_regwen.2593965355 |
/workspace/coverage/default/8.sram_ctrl_smoke.3021824620 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1006447456 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3999110708 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3037601461 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1011626885 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.723469459 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1803414773 |
/workspace/coverage/default/9.sram_ctrl_bijection.1842789935 |
/workspace/coverage/default/9.sram_ctrl_executable.2498450775 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1605739683 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1749059930 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2064496404 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1797787900 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1980841701 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1884960047 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.588846568 |
/workspace/coverage/default/9.sram_ctrl_regwen.570889035 |
/workspace/coverage/default/9.sram_ctrl_smoke.3549781563 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3490043562 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1502709054 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1656397053 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.706253416 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/38.sram_ctrl_partial_access.4261835139 |
|
|
Jul 09 06:49:38 PM PDT 24 |
Jul 09 06:49:59 PM PDT 24 |
1205301137 ps |
T2 |
/workspace/coverage/default/1.sram_ctrl_executable.335403703 |
|
|
Jul 09 06:43:56 PM PDT 24 |
Jul 09 06:56:54 PM PDT 24 |
33964106540 ps |
T3 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1430342679 |
|
|
Jul 09 06:45:20 PM PDT 24 |
Jul 09 06:45:40 PM PDT 24 |
5319354016 ps |
T8 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2952376285 |
|
|
Jul 09 06:44:30 PM PDT 24 |
Jul 09 06:44:34 PM PDT 24 |
19125661 ps |
T4 |
/workspace/coverage/default/17.sram_ctrl_smoke.2493418317 |
|
|
Jul 09 06:45:37 PM PDT 24 |
Jul 09 06:48:15 PM PDT 24 |
8885237202 ps |
T9 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2117115752 |
|
|
Jul 09 06:51:06 PM PDT 24 |
Jul 09 06:52:18 PM PDT 24 |
15508329543 ps |
T10 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.341268335 |
|
|
Jul 09 06:44:30 PM PDT 24 |
Jul 09 06:49:25 PM PDT 24 |
24998972340 ps |
T11 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3089757702 |
|
|
Jul 09 06:44:36 PM PDT 24 |
Jul 09 06:47:26 PM PDT 24 |
34953814030 ps |
T12 |
/workspace/coverage/default/16.sram_ctrl_stress_all.526021518 |
|
|
Jul 09 06:45:35 PM PDT 24 |
Jul 09 07:39:55 PM PDT 24 |
105331992142 ps |
T13 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.4284817903 |
|
|
Jul 09 06:46:23 PM PDT 24 |
Jul 09 06:49:17 PM PDT 24 |
5129064924 ps |
T25 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.1397677029 |
|
|
Jul 09 06:46:20 PM PDT 24 |
Jul 09 06:50:37 PM PDT 24 |
13545188814 ps |
T5 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2027828635 |
|
|
Jul 09 06:44:44 PM PDT 24 |
Jul 09 06:45:38 PM PDT 24 |
66631258234 ps |
T6 |
/workspace/coverage/default/31.sram_ctrl_stress_all.2200924327 |
|
|
Jul 09 06:48:22 PM PDT 24 |
Jul 09 06:56:35 PM PDT 24 |
29730651870 ps |
T57 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1931466773 |
|
|
Jul 09 06:51:15 PM PDT 24 |
Jul 09 07:12:36 PM PDT 24 |
12520845067 ps |
T58 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.2521741955 |
|
|
Jul 09 06:44:14 PM PDT 24 |
Jul 09 06:44:28 PM PDT 24 |
720095649 ps |
T28 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.1817455096 |
|
|
Jul 09 06:46:47 PM PDT 24 |
Jul 09 06:46:51 PM PDT 24 |
652491695 ps |
T42 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1010622981 |
|
|
Jul 09 06:44:42 PM PDT 24 |
Jul 09 06:50:22 PM PDT 24 |
21557339911 ps |
T70 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1426360572 |
|
|
Jul 09 06:44:06 PM PDT 24 |
Jul 09 06:44:17 PM PDT 24 |
2867685805 ps |
T26 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3820546333 |
|
|
Jul 09 06:48:35 PM PDT 24 |
Jul 09 06:49:19 PM PDT 24 |
3658980036 ps |
T71 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2638791362 |
|
|
Jul 09 06:49:49 PM PDT 24 |
Jul 09 06:51:56 PM PDT 24 |
3319919585 ps |
T19 |
/workspace/coverage/default/43.sram_ctrl_bijection.2496605290 |
|
|
Jul 09 06:50:39 PM PDT 24 |
Jul 09 07:05:13 PM PDT 24 |
19278384892 ps |
T140 |
/workspace/coverage/default/31.sram_ctrl_partial_access.499653602 |
|
|
Jul 09 06:48:10 PM PDT 24 |
Jul 09 06:48:23 PM PDT 24 |
815096073 ps |
T14 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1803414773 |
|
|
Jul 09 06:44:36 PM PDT 24 |
Jul 09 06:44:39 PM PDT 24 |
17788054 ps |
T44 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2037442416 |
|
|
Jul 09 06:48:49 PM PDT 24 |
Jul 09 06:53:13 PM PDT 24 |
8417630027 ps |
T29 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.399013873 |
|
|
Jul 09 06:48:34 PM PDT 24 |
Jul 09 06:48:38 PM PDT 24 |
345107618 ps |
T81 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.3482067572 |
|
|
Jul 09 06:44:05 PM PDT 24 |
Jul 09 06:48:19 PM PDT 24 |
17551304308 ps |
T7 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.1024655234 |
|
|
Jul 09 06:47:42 PM PDT 24 |
Jul 09 06:47:50 PM PDT 24 |
1921266552 ps |
T43 |
/workspace/coverage/default/41.sram_ctrl_regwen.3716177416 |
|
|
Jul 09 06:50:22 PM PDT 24 |
Jul 09 07:26:14 PM PDT 24 |
82825908744 ps |
T141 |
/workspace/coverage/default/49.sram_ctrl_smoke.1958915223 |
|
|
Jul 09 06:52:06 PM PDT 24 |
Jul 09 06:52:31 PM PDT 24 |
3221504705 ps |
T107 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.814641885 |
|
|
Jul 09 06:46:28 PM PDT 24 |
Jul 09 06:52:26 PM PDT 24 |
5798570137 ps |
T49 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1658308702 |
|
|
Jul 09 06:44:03 PM PDT 24 |
Jul 09 06:47:35 PM PDT 24 |
17874955769 ps |
T142 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.706253416 |
|
|
Jul 09 06:44:35 PM PDT 24 |
Jul 09 06:44:48 PM PDT 24 |
2966881833 ps |
T23 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.890559307 |
|
|
Jul 09 06:47:50 PM PDT 24 |
Jul 09 06:49:19 PM PDT 24 |
29293743977 ps |
T47 |
/workspace/coverage/default/26.sram_ctrl_executable.2341625612 |
|
|
Jul 09 06:47:26 PM PDT 24 |
Jul 09 06:59:29 PM PDT 24 |
74171156154 ps |
T48 |
/workspace/coverage/default/4.sram_ctrl_executable.3938526446 |
|
|
Jul 09 06:44:13 PM PDT 24 |
Jul 09 07:05:58 PM PDT 24 |
94788570082 ps |
T54 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1093596595 |
|
|
Jul 09 06:51:40 PM PDT 24 |
Jul 09 06:57:08 PM PDT 24 |
55347954668 ps |
T143 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.502423742 |
|
|
Jul 09 06:46:29 PM PDT 24 |
Jul 09 06:46:36 PM PDT 24 |
9497007694 ps |
T45 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.3335113733 |
|
|
Jul 09 06:44:12 PM PDT 24 |
Jul 09 07:02:02 PM PDT 24 |
41568787140 ps |
T30 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2454917078 |
|
|
Jul 09 06:50:36 PM PDT 24 |
Jul 09 06:50:39 PM PDT 24 |
726835418 ps |
T24 |
/workspace/coverage/default/1.sram_ctrl_stress_all.1198784776 |
|
|
Jul 09 06:44:02 PM PDT 24 |
Jul 09 07:17:07 PM PDT 24 |
26695370690 ps |
T27 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3287010544 |
|
|
Jul 09 06:48:45 PM PDT 24 |
Jul 09 06:49:14 PM PDT 24 |
1011364398 ps |
T20 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1002898469 |
|
|
Jul 09 06:44:25 PM PDT 24 |
Jul 09 07:27:44 PM PDT 24 |
86674278767 ps |
T52 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.3956579840 |
|
|
Jul 09 06:48:58 PM PDT 24 |
Jul 09 06:51:46 PM PDT 24 |
43116670645 ps |
T15 |
/workspace/coverage/default/37.sram_ctrl_alert_test.3374206126 |
|
|
Jul 09 06:49:41 PM PDT 24 |
Jul 09 06:49:43 PM PDT 24 |
34854678 ps |
T144 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2554096543 |
|
|
Jul 09 06:44:42 PM PDT 24 |
Jul 09 06:45:56 PM PDT 24 |
8268384288 ps |
T46 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.3679722133 |
|
|
Jul 09 06:50:34 PM PDT 24 |
Jul 09 07:17:01 PM PDT 24 |
16022764363 ps |
T21 |
/workspace/coverage/default/30.sram_ctrl_regwen.4019337917 |
|
|
Jul 09 06:48:01 PM PDT 24 |
Jul 09 07:10:07 PM PDT 24 |
18843828960 ps |
T145 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1761446673 |
|
|
Jul 09 06:51:57 PM PDT 24 |
Jul 09 06:52:29 PM PDT 24 |
2914701582 ps |
T146 |
/workspace/coverage/default/16.sram_ctrl_executable.3615944899 |
|
|
Jul 09 06:45:29 PM PDT 24 |
Jul 09 06:46:17 PM PDT 24 |
10852189708 ps |
T133 |
/workspace/coverage/default/34.sram_ctrl_executable.1291408363 |
|
|
Jul 09 06:48:51 PM PDT 24 |
Jul 09 07:09:08 PM PDT 24 |
20695483705 ps |
T147 |
/workspace/coverage/default/45.sram_ctrl_executable.1352767545 |
|
|
Jul 09 06:51:16 PM PDT 24 |
Jul 09 07:00:08 PM PDT 24 |
12570004479 ps |
T148 |
/workspace/coverage/default/24.sram_ctrl_partial_access.3736091911 |
|
|
Jul 09 06:46:51 PM PDT 24 |
Jul 09 06:49:48 PM PDT 24 |
546680465 ps |
T108 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.36863621 |
|
|
Jul 09 06:47:39 PM PDT 24 |
Jul 09 06:53:35 PM PDT 24 |
46472935698 ps |
T89 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1882811681 |
|
|
Jul 09 06:47:29 PM PDT 24 |
Jul 09 07:40:22 PM PDT 24 |
85726956302 ps |
T149 |
/workspace/coverage/default/43.sram_ctrl_executable.2777219778 |
|
|
Jul 09 06:50:45 PM PDT 24 |
Jul 09 07:04:48 PM PDT 24 |
9114007608 ps |
T90 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.4188435908 |
|
|
Jul 09 06:48:42 PM PDT 24 |
Jul 09 07:09:18 PM PDT 24 |
22396650349 ps |
T109 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1187396417 |
|
|
Jul 09 06:44:26 PM PDT 24 |
Jul 09 06:50:07 PM PDT 24 |
5510291512 ps |
T150 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1183887884 |
|
|
Jul 09 06:46:17 PM PDT 24 |
Jul 09 06:47:03 PM PDT 24 |
12229504190 ps |
T151 |
/workspace/coverage/default/47.sram_ctrl_bijection.2584395325 |
|
|
Jul 09 06:51:37 PM PDT 24 |
Jul 09 07:01:09 PM PDT 24 |
8560807365 ps |
T69 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2462327223 |
|
|
Jul 09 06:49:54 PM PDT 24 |
Jul 09 06:50:36 PM PDT 24 |
16860967358 ps |
T152 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.1817203054 |
|
|
Jul 09 06:48:33 PM PDT 24 |
Jul 09 07:17:41 PM PDT 24 |
46086692797 ps |
T153 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2252098955 |
|
|
Jul 09 06:44:30 PM PDT 24 |
Jul 09 06:45:45 PM PDT 24 |
805679139 ps |
T154 |
/workspace/coverage/default/12.sram_ctrl_bijection.2247915951 |
|
|
Jul 09 06:44:55 PM PDT 24 |
Jul 09 07:13:02 PM PDT 24 |
23938337458 ps |
T22 |
/workspace/coverage/default/42.sram_ctrl_stress_all.2425391247 |
|
|
Jul 09 06:50:41 PM PDT 24 |
Jul 09 08:21:59 PM PDT 24 |
329221564509 ps |
T155 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3895085085 |
|
|
Jul 09 06:43:56 PM PDT 24 |
Jul 09 06:45:12 PM PDT 24 |
44325128448 ps |
T110 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2676450251 |
|
|
Jul 09 06:49:17 PM PDT 24 |
Jul 09 06:53:14 PM PDT 24 |
4083751981 ps |
T156 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3738838774 |
|
|
Jul 09 06:43:55 PM PDT 24 |
Jul 09 06:44:06 PM PDT 24 |
718740633 ps |
T111 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.3559337080 |
|
|
Jul 09 06:46:40 PM PDT 24 |
Jul 09 06:48:55 PM PDT 24 |
6268476772 ps |
T157 |
/workspace/coverage/default/13.sram_ctrl_smoke.3112021285 |
|
|
Jul 09 06:44:58 PM PDT 24 |
Jul 09 06:45:10 PM PDT 24 |
3053221380 ps |
T53 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3945505794 |
|
|
Jul 09 06:46:45 PM PDT 24 |
Jul 09 06:49:29 PM PDT 24 |
5095547572 ps |
T158 |
/workspace/coverage/default/17.sram_ctrl_regwen.2434046061 |
|
|
Jul 09 06:45:45 PM PDT 24 |
Jul 09 06:59:45 PM PDT 24 |
25145344835 ps |
T120 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3852099287 |
|
|
Jul 09 06:48:17 PM PDT 24 |
Jul 09 06:49:18 PM PDT 24 |
18087460627 ps |
T159 |
/workspace/coverage/default/27.sram_ctrl_smoke.2918361951 |
|
|
Jul 09 06:47:24 PM PDT 24 |
Jul 09 06:47:33 PM PDT 24 |
687205597 ps |
T55 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1365758377 |
|
|
Jul 09 06:45:35 PM PDT 24 |
Jul 09 06:47:40 PM PDT 24 |
2145361627 ps |
T160 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.109416388 |
|
|
Jul 09 06:44:25 PM PDT 24 |
Jul 09 06:51:35 PM PDT 24 |
29798974158 ps |
T161 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3188124656 |
|
|
Jul 09 06:45:12 PM PDT 24 |
Jul 09 06:46:05 PM PDT 24 |
36330796764 ps |
T162 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2273673397 |
|
|
Jul 09 06:43:56 PM PDT 24 |
Jul 09 06:44:17 PM PDT 24 |
1516555939 ps |
T163 |
/workspace/coverage/default/39.sram_ctrl_bijection.2294864190 |
|
|
Jul 09 06:49:56 PM PDT 24 |
Jul 09 07:07:27 PM PDT 24 |
14914034303 ps |
T91 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.4011197654 |
|
|
Jul 09 06:49:32 PM PDT 24 |
Jul 09 06:50:38 PM PDT 24 |
1284039374 ps |
T50 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1502709054 |
|
|
Jul 09 06:44:36 PM PDT 24 |
Jul 09 06:47:11 PM PDT 24 |
3050429860 ps |
T100 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1376024759 |
|
|
Jul 09 06:51:30 PM PDT 24 |
Jul 09 06:52:11 PM PDT 24 |
3413280727 ps |
T164 |
/workspace/coverage/default/22.sram_ctrl_partial_access.559997887 |
|
|
Jul 09 06:46:28 PM PDT 24 |
Jul 09 06:47:59 PM PDT 24 |
3846446079 ps |
T165 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3256408279 |
|
|
Jul 09 06:44:27 PM PDT 24 |
Jul 09 06:56:55 PM PDT 24 |
25050307898 ps |
T166 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.543599347 |
|
|
Jul 09 06:48:59 PM PDT 24 |
Jul 09 06:50:51 PM PDT 24 |
1612006493 ps |
T136 |
/workspace/coverage/default/21.sram_ctrl_executable.1726809693 |
|
|
Jul 09 06:46:25 PM PDT 24 |
Jul 09 07:10:48 PM PDT 24 |
113414775350 ps |
T167 |
/workspace/coverage/default/37.sram_ctrl_partial_access.1518992643 |
|
|
Jul 09 06:49:29 PM PDT 24 |
Jul 09 06:49:35 PM PDT 24 |
359000199 ps |
T168 |
/workspace/coverage/default/27.sram_ctrl_stress_all.3426759061 |
|
|
Jul 09 06:47:35 PM PDT 24 |
Jul 09 08:03:54 PM PDT 24 |
70014894861 ps |
T101 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2138395830 |
|
|
Jul 09 06:50:45 PM PDT 24 |
Jul 09 06:51:50 PM PDT 24 |
1212080261 ps |
T102 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.704612531 |
|
|
Jul 09 06:47:10 PM PDT 24 |
Jul 09 06:51:07 PM PDT 24 |
7438688178 ps |
T134 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3745615967 |
|
|
Jul 09 06:43:56 PM PDT 24 |
Jul 09 06:50:48 PM PDT 24 |
77776323141 ps |
T169 |
/workspace/coverage/default/10.sram_ctrl_bijection.742472080 |
|
|
Jul 09 06:44:37 PM PDT 24 |
Jul 09 07:27:12 PM PDT 24 |
115090653422 ps |
T170 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.2647028658 |
|
|
Jul 09 06:49:38 PM PDT 24 |
Jul 09 07:01:53 PM PDT 24 |
18376822556 ps |
T171 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.3012920705 |
|
|
Jul 09 06:50:10 PM PDT 24 |
Jul 09 06:52:38 PM PDT 24 |
802946499 ps |
T66 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3196891623 |
|
|
Jul 09 06:46:07 PM PDT 24 |
Jul 09 06:46:34 PM PDT 24 |
801466005 ps |
T172 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.1999852164 |
|
|
Jul 09 06:49:28 PM PDT 24 |
Jul 09 06:50:08 PM PDT 24 |
23653141026 ps |
T56 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3233552795 |
|
|
Jul 09 06:44:17 PM PDT 24 |
Jul 09 06:49:40 PM PDT 24 |
57571062414 ps |
T173 |
/workspace/coverage/default/37.sram_ctrl_smoke.1317135315 |
|
|
Jul 09 06:49:26 PM PDT 24 |
Jul 09 06:49:47 PM PDT 24 |
1761792385 ps |
T174 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.3974393907 |
|
|
Jul 09 06:49:22 PM PDT 24 |
Jul 09 07:02:46 PM PDT 24 |
32298843107 ps |
T175 |
/workspace/coverage/default/21.sram_ctrl_alert_test.1939288555 |
|
|
Jul 09 06:46:26 PM PDT 24 |
Jul 09 06:46:27 PM PDT 24 |
39924442 ps |
T121 |
/workspace/coverage/default/3.sram_ctrl_stress_all.3342284646 |
|
|
Jul 09 06:44:13 PM PDT 24 |
Jul 09 07:29:10 PM PDT 24 |
230314455131 ps |
T176 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3979469789 |
|
|
Jul 09 06:49:55 PM PDT 24 |
Jul 09 06:49:57 PM PDT 24 |
12329808 ps |
T177 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2257958529 |
|
|
Jul 09 06:44:02 PM PDT 24 |
Jul 09 06:46:56 PM PDT 24 |
18351433107 ps |
T178 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3950634323 |
|
|
Jul 09 06:48:05 PM PDT 24 |
Jul 09 06:48:33 PM PDT 24 |
2152781244 ps |
T179 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2552522129 |
|
|
Jul 09 06:47:52 PM PDT 24 |
Jul 09 06:52:34 PM PDT 24 |
11776452353 ps |
T180 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.2746127793 |
|
|
Jul 09 06:48:23 PM PDT 24 |
Jul 09 06:54:01 PM PDT 24 |
57642274350 ps |
T181 |
/workspace/coverage/default/18.sram_ctrl_alert_test.2708099815 |
|
|
Jul 09 06:45:58 PM PDT 24 |
Jul 09 06:46:00 PM PDT 24 |
22769552 ps |
T182 |
/workspace/coverage/default/42.sram_ctrl_partial_access.3691286071 |
|
|
Jul 09 06:50:27 PM PDT 24 |
Jul 09 06:50:43 PM PDT 24 |
547635180 ps |
T183 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.3804746475 |
|
|
Jul 09 06:47:26 PM PDT 24 |
Jul 09 06:52:36 PM PDT 24 |
14131314746 ps |
T184 |
/workspace/coverage/default/6.sram_ctrl_smoke.484032199 |
|
|
Jul 09 06:44:19 PM PDT 24 |
Jul 09 06:45:03 PM PDT 24 |
763189167 ps |
T185 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2402699483 |
|
|
Jul 09 06:46:53 PM PDT 24 |
Jul 09 07:16:56 PM PDT 24 |
48616296506 ps |
T186 |
/workspace/coverage/default/19.sram_ctrl_partial_access.3234504968 |
|
|
Jul 09 06:46:01 PM PDT 24 |
Jul 09 06:47:54 PM PDT 24 |
1764208437 ps |
T187 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2394740500 |
|
|
Jul 09 06:46:58 PM PDT 24 |
Jul 09 06:47:05 PM PDT 24 |
1299371612 ps |
T59 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1997341230 |
|
|
Jul 09 06:45:35 PM PDT 24 |
Jul 09 06:47:01 PM PDT 24 |
10870912202 ps |
T60 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1687894288 |
|
|
Jul 09 06:51:40 PM PDT 24 |
Jul 09 06:53:08 PM PDT 24 |
2728667160 ps |
T135 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.1121599124 |
|
|
Jul 09 06:46:08 PM PDT 24 |
Jul 09 06:47:35 PM PDT 24 |
11743831110 ps |
T188 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.1953684248 |
|
|
Jul 09 06:45:47 PM PDT 24 |
Jul 09 06:48:48 PM PDT 24 |
15660574574 ps |
T189 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.1165363959 |
|
|
Jul 09 06:47:13 PM PDT 24 |
Jul 09 06:48:00 PM PDT 24 |
761311933 ps |
T190 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.3083160603 |
|
|
Jul 09 06:46:04 PM PDT 24 |
Jul 09 06:46:55 PM PDT 24 |
30816723939 ps |
T191 |
/workspace/coverage/default/11.sram_ctrl_regwen.2781528482 |
|
|
Jul 09 06:44:46 PM PDT 24 |
Jul 09 06:59:28 PM PDT 24 |
30531996681 ps |
T192 |
/workspace/coverage/default/19.sram_ctrl_smoke.222436432 |
|
|
Jul 09 06:45:57 PM PDT 24 |
Jul 09 06:47:13 PM PDT 24 |
434454145 ps |
T193 |
/workspace/coverage/default/45.sram_ctrl_stress_all.863699317 |
|
|
Jul 09 06:51:15 PM PDT 24 |
Jul 09 08:32:04 PM PDT 24 |
156006561078 ps |
T194 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.4126490022 |
|
|
Jul 09 06:48:35 PM PDT 24 |
Jul 09 06:53:45 PM PDT 24 |
3975789104 ps |
T195 |
/workspace/coverage/default/47.sram_ctrl_executable.3059484178 |
|
|
Jul 09 06:51:41 PM PDT 24 |
Jul 09 07:02:44 PM PDT 24 |
17855907159 ps |
T67 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.128502704 |
|
|
Jul 09 06:51:26 PM PDT 24 |
Jul 09 06:51:34 PM PDT 24 |
602647689 ps |
T196 |
/workspace/coverage/default/37.sram_ctrl_executable.4198925607 |
|
|
Jul 09 06:49:33 PM PDT 24 |
Jul 09 07:04:20 PM PDT 24 |
38303779435 ps |
T197 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.880812472 |
|
|
Jul 09 06:50:10 PM PDT 24 |
Jul 09 06:51:47 PM PDT 24 |
54196493255 ps |
T198 |
/workspace/coverage/default/20.sram_ctrl_executable.2282200250 |
|
|
Jul 09 06:46:14 PM PDT 24 |
Jul 09 06:49:46 PM PDT 24 |
2469347514 ps |
T199 |
/workspace/coverage/default/43.sram_ctrl_alert_test.4134147750 |
|
|
Jul 09 06:50:49 PM PDT 24 |
Jul 09 06:50:50 PM PDT 24 |
28168701 ps |
T200 |
/workspace/coverage/default/5.sram_ctrl_bijection.1790764595 |
|
|
Jul 09 06:44:13 PM PDT 24 |
Jul 09 07:12:02 PM PDT 24 |
108967304769 ps |
T201 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.920900682 |
|
|
Jul 09 06:45:31 PM PDT 24 |
Jul 09 06:58:35 PM PDT 24 |
23696955360 ps |
T202 |
/workspace/coverage/default/30.sram_ctrl_smoke.2667925456 |
|
|
Jul 09 06:47:57 PM PDT 24 |
Jul 09 06:48:49 PM PDT 24 |
2003053567 ps |
T51 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3850155324 |
|
|
Jul 09 06:49:33 PM PDT 24 |
Jul 09 06:51:41 PM PDT 24 |
2477029909 ps |
T203 |
/workspace/coverage/default/15.sram_ctrl_smoke.886881894 |
|
|
Jul 09 06:45:19 PM PDT 24 |
Jul 09 06:45:27 PM PDT 24 |
5960766071 ps |
T68 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.254823154 |
|
|
Jul 09 06:44:18 PM PDT 24 |
Jul 09 06:44:34 PM PDT 24 |
428690669 ps |
T204 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.947880649 |
|
|
Jul 09 06:51:50 PM PDT 24 |
Jul 09 06:56:28 PM PDT 24 |
4298254319 ps |
T205 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4035756645 |
|
|
Jul 09 06:44:54 PM PDT 24 |
Jul 09 06:45:07 PM PDT 24 |
2810428706 ps |
T206 |
/workspace/coverage/default/5.sram_ctrl_partial_access.4012190134 |
|
|
Jul 09 06:44:14 PM PDT 24 |
Jul 09 06:44:53 PM PDT 24 |
794085208 ps |
T207 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3182079004 |
|
|
Jul 09 06:46:53 PM PDT 24 |
Jul 09 06:52:19 PM PDT 24 |
4489472572 ps |
T208 |
/workspace/coverage/default/17.sram_ctrl_alert_test.173569567 |
|
|
Jul 09 06:45:46 PM PDT 24 |
Jul 09 06:45:48 PM PDT 24 |
62818668 ps |
T209 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.234016831 |
|
|
Jul 09 06:47:16 PM PDT 24 |
Jul 09 06:47:23 PM PDT 24 |
351190753 ps |
T210 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2048114632 |
|
|
Jul 09 06:44:29 PM PDT 24 |
Jul 09 06:51:05 PM PDT 24 |
13655833671 ps |
T211 |
/workspace/coverage/default/6.sram_ctrl_bijection.112978899 |
|
|
Jul 09 06:44:17 PM PDT 24 |
Jul 09 07:12:31 PM PDT 24 |
496618453943 ps |
T61 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2048140506 |
|
|
Jul 09 06:46:36 PM PDT 24 |
Jul 09 06:47:38 PM PDT 24 |
7778004835 ps |
T212 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1177640597 |
|
|
Jul 09 06:44:42 PM PDT 24 |
Jul 09 06:56:12 PM PDT 24 |
41629759697 ps |
T213 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.3595357045 |
|
|
Jul 09 06:50:51 PM PDT 24 |
Jul 09 06:55:17 PM PDT 24 |
49260315316 ps |
T214 |
/workspace/coverage/default/41.sram_ctrl_alert_test.2346842203 |
|
|
Jul 09 06:50:22 PM PDT 24 |
Jul 09 06:50:24 PM PDT 24 |
17180856 ps |
T215 |
/workspace/coverage/default/21.sram_ctrl_stress_all.1299136056 |
|
|
Jul 09 06:46:24 PM PDT 24 |
Jul 09 09:01:05 PM PDT 24 |
49531924615 ps |
T216 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1869080315 |
|
|
Jul 09 06:47:24 PM PDT 24 |
Jul 09 08:05:35 PM PDT 24 |
220941501501 ps |
T217 |
/workspace/coverage/default/28.sram_ctrl_bijection.4221350324 |
|
|
Jul 09 06:47:41 PM PDT 24 |
Jul 09 07:23:35 PM PDT 24 |
30401529355 ps |
T218 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1170538512 |
|
|
Jul 09 06:48:49 PM PDT 24 |
Jul 09 06:50:42 PM PDT 24 |
775186217 ps |
T219 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4239948776 |
|
|
Jul 09 06:43:52 PM PDT 24 |
Jul 09 06:46:32 PM PDT 24 |
921531644 ps |
T220 |
/workspace/coverage/default/24.sram_ctrl_alert_test.188097153 |
|
|
Jul 09 06:46:58 PM PDT 24 |
Jul 09 06:47:02 PM PDT 24 |
18931240 ps |
T221 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.154165962 |
|
|
Jul 09 06:49:55 PM PDT 24 |
Jul 09 06:50:21 PM PDT 24 |
2971427560 ps |
T222 |
/workspace/coverage/default/11.sram_ctrl_executable.1359257974 |
|
|
Jul 09 06:44:47 PM PDT 24 |
Jul 09 06:53:48 PM PDT 24 |
20184894248 ps |
T223 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.2023044715 |
|
|
Jul 09 06:47:28 PM PDT 24 |
Jul 09 06:47:32 PM PDT 24 |
529830071 ps |
T224 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3353582204 |
|
|
Jul 09 06:44:17 PM PDT 24 |
Jul 09 06:46:28 PM PDT 24 |
7932265992 ps |
T225 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.747816718 |
|
|
Jul 09 06:44:07 PM PDT 24 |
Jul 09 06:45:42 PM PDT 24 |
2956470830 ps |
T226 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3119759158 |
|
|
Jul 09 06:49:55 PM PDT 24 |
Jul 09 06:50:04 PM PDT 24 |
1345433498 ps |
T227 |
/workspace/coverage/default/25.sram_ctrl_bijection.2986635830 |
|
|
Jul 09 06:47:04 PM PDT 24 |
Jul 09 06:56:34 PM PDT 24 |
8635261447 ps |
T228 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.461358831 |
|
|
Jul 09 06:44:02 PM PDT 24 |
Jul 09 06:48:09 PM PDT 24 |
4025665602 ps |
T229 |
/workspace/coverage/default/13.sram_ctrl_bijection.1157327530 |
|
|
Jul 09 06:44:58 PM PDT 24 |
Jul 09 07:01:33 PM PDT 24 |
231290172913 ps |
T230 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3944174144 |
|
|
Jul 09 06:46:05 PM PDT 24 |
Jul 09 07:04:27 PM PDT 24 |
55995230503 ps |
T231 |
/workspace/coverage/default/33.sram_ctrl_bijection.589632600 |
|
|
Jul 09 06:48:35 PM PDT 24 |
Jul 09 07:23:05 PM PDT 24 |
350087186214 ps |
T232 |
/workspace/coverage/default/33.sram_ctrl_regwen.970611763 |
|
|
Jul 09 06:48:40 PM PDT 24 |
Jul 09 06:57:44 PM PDT 24 |
4452946208 ps |
T233 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2688018827 |
|
|
Jul 09 06:46:35 PM PDT 24 |
Jul 09 06:51:30 PM PDT 24 |
5843033584 ps |
T234 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1078093774 |
|
|
Jul 09 06:51:21 PM PDT 24 |
Jul 09 06:51:22 PM PDT 24 |
99246685 ps |
T235 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.219593852 |
|
|
Jul 09 06:50:05 PM PDT 24 |
Jul 09 06:55:28 PM PDT 24 |
21583349891 ps |
T236 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.1341303913 |
|
|
Jul 09 06:46:08 PM PDT 24 |
Jul 09 06:54:58 PM PDT 24 |
24917892945 ps |
T237 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.765803036 |
|
|
Jul 09 06:45:46 PM PDT 24 |
Jul 09 06:50:07 PM PDT 24 |
3945571382 ps |
T238 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.2413065722 |
|
|
Jul 09 06:48:49 PM PDT 24 |
Jul 09 06:49:20 PM PDT 24 |
3774186605 ps |
T239 |
/workspace/coverage/default/49.sram_ctrl_partial_access.1315130843 |
|
|
Jul 09 06:52:12 PM PDT 24 |
Jul 09 06:52:39 PM PDT 24 |
7285713094 ps |
T240 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2161737636 |
|
|
Jul 09 06:50:10 PM PDT 24 |
Jul 09 06:50:31 PM PDT 24 |
710158038 ps |
T241 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2132255014 |
|
|
Jul 09 06:44:35 PM PDT 24 |
Jul 09 07:02:01 PM PDT 24 |
15042653779 ps |
T242 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1499748176 |
|
|
Jul 09 06:46:20 PM PDT 24 |
Jul 09 06:46:22 PM PDT 24 |
33721882 ps |
T243 |
/workspace/coverage/default/7.sram_ctrl_partial_access.22399126 |
|
|
Jul 09 06:44:27 PM PDT 24 |
Jul 09 06:45:46 PM PDT 24 |
4417604735 ps |
T244 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1058088560 |
|
|
Jul 09 06:44:01 PM PDT 24 |
Jul 09 06:44:07 PM PDT 24 |
343605843 ps |
T245 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.3917909618 |
|
|
Jul 09 06:45:39 PM PDT 24 |
Jul 09 06:49:04 PM PDT 24 |
13830644011 ps |
T246 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.1021969931 |
|
|
Jul 09 06:49:31 PM PDT 24 |
Jul 09 06:51:16 PM PDT 24 |
1496472665 ps |
T247 |
/workspace/coverage/default/2.sram_ctrl_partial_access.4267750341 |
|
|
Jul 09 06:44:02 PM PDT 24 |
Jul 09 06:44:33 PM PDT 24 |
1057990770 ps |
T248 |
/workspace/coverage/default/30.sram_ctrl_bijection.973910197 |
|
|
Jul 09 06:48:00 PM PDT 24 |
Jul 09 07:21:48 PM PDT 24 |
296332265833 ps |
T249 |
/workspace/coverage/default/19.sram_ctrl_alert_test.1244959278 |
|
|
Jul 09 06:46:06 PM PDT 24 |
Jul 09 06:46:08 PM PDT 24 |
32898148 ps |
T250 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2483811644 |
|
|
Jul 09 06:51:43 PM PDT 24 |
Jul 09 06:54:41 PM PDT 24 |
2364207271 ps |
T251 |
/workspace/coverage/default/29.sram_ctrl_regwen.739332693 |
|
|
Jul 09 06:47:52 PM PDT 24 |
Jul 09 06:49:34 PM PDT 24 |
547017767 ps |
T252 |
/workspace/coverage/default/44.sram_ctrl_regwen.3913372025 |
|
|
Jul 09 06:50:59 PM PDT 24 |
Jul 09 07:02:18 PM PDT 24 |
9902853566 ps |
T253 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.185196402 |
|
|
Jul 09 06:48:57 PM PDT 24 |
Jul 09 06:51:44 PM PDT 24 |
15942106502 ps |
T254 |
/workspace/coverage/default/3.sram_ctrl_executable.1657449890 |
|
|
Jul 09 06:44:08 PM PDT 24 |
Jul 09 07:02:05 PM PDT 24 |
20404390108 ps |
T255 |
/workspace/coverage/default/36.sram_ctrl_alert_test.1683556117 |
|
|
Jul 09 06:49:22 PM PDT 24 |
Jul 09 06:49:24 PM PDT 24 |
22408862 ps |
T256 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1382346784 |
|
|
Jul 09 06:44:26 PM PDT 24 |
Jul 09 06:45:32 PM PDT 24 |
41466139537 ps |
T257 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.4221767463 |
|
|
Jul 09 06:48:28 PM PDT 24 |
Jul 09 06:48:36 PM PDT 24 |
3220083528 ps |
T258 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.3236209057 |
|
|
Jul 09 06:49:23 PM PDT 24 |
Jul 09 06:49:28 PM PDT 24 |
6694365457 ps |
T259 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.902022073 |
|
|
Jul 09 06:49:54 PM PDT 24 |
Jul 09 06:54:52 PM PDT 24 |
4996018729 ps |
T260 |
/workspace/coverage/default/15.sram_ctrl_partial_access.305928781 |
|
|
Jul 09 06:45:24 PM PDT 24 |
Jul 09 06:46:27 PM PDT 24 |
2919033321 ps |
T261 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3270038958 |
|
|
Jul 09 06:46:14 PM PDT 24 |
Jul 09 06:47:36 PM PDT 24 |
3392831110 ps |
T114 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.599117008 |
|
|
Jul 09 06:47:57 PM PDT 24 |
Jul 09 06:48:27 PM PDT 24 |
1104879703 ps |
T262 |
/workspace/coverage/default/48.sram_ctrl_smoke.637542429 |
|
|
Jul 09 06:51:47 PM PDT 24 |
Jul 09 06:51:59 PM PDT 24 |
3325630582 ps |
T263 |
/workspace/coverage/default/24.sram_ctrl_stress_all.1728002122 |
|
|
Jul 09 06:46:59 PM PDT 24 |
Jul 09 07:04:14 PM PDT 24 |
12666447804 ps |
T264 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3166809187 |
|
|
Jul 09 06:44:05 PM PDT 24 |
Jul 09 06:44:10 PM PDT 24 |
2105623471 ps |
T265 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1437794919 |
|
|
Jul 09 06:44:17 PM PDT 24 |
Jul 09 06:51:07 PM PDT 24 |
21550827765 ps |
T266 |
/workspace/coverage/default/21.sram_ctrl_regwen.1168022434 |
|
|
Jul 09 06:46:24 PM PDT 24 |
Jul 09 06:57:01 PM PDT 24 |
18063615222 ps |
T267 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1903536545 |
|
|
Jul 09 06:52:23 PM PDT 24 |
Jul 09 06:52:24 PM PDT 24 |
39865365 ps |
T268 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1053385514 |
|
|
Jul 09 06:47:47 PM PDT 24 |
Jul 09 06:50:40 PM PDT 24 |
24972412945 ps |
T92 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1481205164 |
|
|
Jul 09 06:46:35 PM PDT 24 |
Jul 09 06:48:52 PM PDT 24 |
14510459977 ps |
T269 |
/workspace/coverage/default/17.sram_ctrl_bijection.3275037944 |
|
|
Jul 09 06:45:40 PM PDT 24 |
Jul 09 07:05:31 PM PDT 24 |
220336654349 ps |
T270 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2360660516 |
|
|
Jul 09 06:49:27 PM PDT 24 |
Jul 09 06:53:22 PM PDT 24 |
4020238127 ps |
T271 |
/workspace/coverage/default/27.sram_ctrl_regwen.1837652508 |
|
|
Jul 09 06:47:30 PM PDT 24 |
Jul 09 07:11:10 PM PDT 24 |
16989526888 ps |
T272 |
/workspace/coverage/default/14.sram_ctrl_partial_access.3461194644 |
|
|
Jul 09 06:45:14 PM PDT 24 |
Jul 09 06:45:40 PM PDT 24 |
6411649025 ps |
T273 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.2911787240 |
|
|
Jul 09 06:49:46 PM PDT 24 |
Jul 09 06:50:44 PM PDT 24 |
9001354014 ps |
T274 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1797787900 |
|
|
Jul 09 06:44:30 PM PDT 24 |
Jul 09 06:58:27 PM PDT 24 |
13161226286 ps |
T275 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.907367838 |
|
|
Jul 09 06:44:08 PM PDT 24 |
Jul 09 06:45:33 PM PDT 24 |
1911200315 ps |
T276 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.3606351200 |
|
|
Jul 09 06:49:02 PM PDT 24 |
Jul 09 06:49:44 PM PDT 24 |
30262663908 ps |
T277 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1972561584 |
|
|
Jul 09 06:47:59 PM PDT 24 |
Jul 09 06:50:50 PM PDT 24 |
29069310400 ps |
T278 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2526158270 |
|
|
Jul 09 06:44:55 PM PDT 24 |
Jul 09 06:45:04 PM PDT 24 |
719499842 ps |
T279 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.81790825 |
|
|
Jul 09 06:47:14 PM PDT 24 |
Jul 09 06:48:19 PM PDT 24 |
2233200599 ps |
T280 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2274491564 |
|
|
Jul 09 06:47:47 PM PDT 24 |
Jul 09 06:50:41 PM PDT 24 |
31527475105 ps |
T281 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.966081068 |
|
|
Jul 09 06:44:27 PM PDT 24 |
Jul 09 06:45:50 PM PDT 24 |
775916743 ps |
T282 |
/workspace/coverage/default/31.sram_ctrl_smoke.2188132565 |
|
|
Jul 09 06:48:11 PM PDT 24 |
Jul 09 06:49:43 PM PDT 24 |
449138799 ps |
T283 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3075117863 |
|
|
Jul 09 06:51:13 PM PDT 24 |
Jul 09 06:51:40 PM PDT 24 |
742769311 ps |
T284 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2027518985 |
|
|
Jul 09 06:45:37 PM PDT 24 |
Jul 09 06:45:39 PM PDT 24 |
41104538 ps |
T93 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3254313300 |
|
|
Jul 09 06:47:14 PM PDT 24 |
Jul 09 06:49:37 PM PDT 24 |
4997409662 ps |
T285 |
/workspace/coverage/default/41.sram_ctrl_bijection.1635161327 |
|
|
Jul 09 06:50:16 PM PDT 24 |
Jul 09 07:29:15 PM PDT 24 |
150939296385 ps |
T286 |
/workspace/coverage/default/29.sram_ctrl_alert_test.4010691356 |
|
|
Jul 09 06:47:56 PM PDT 24 |
Jul 09 06:47:58 PM PDT 24 |
71092988 ps |
T287 |
/workspace/coverage/default/15.sram_ctrl_regwen.3996959833 |
|
|
Jul 09 06:45:26 PM PDT 24 |
Jul 09 06:59:56 PM PDT 24 |
42431721900 ps |
T288 |
/workspace/coverage/default/23.sram_ctrl_regwen.3132134942 |
|
|
Jul 09 06:46:41 PM PDT 24 |
Jul 09 07:02:15 PM PDT 24 |
11768368602 ps |
T289 |
/workspace/coverage/default/11.sram_ctrl_alert_test.1604773377 |
|
|
Jul 09 06:44:54 PM PDT 24 |
Jul 09 06:44:57 PM PDT 24 |
15681849 ps |
T290 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3572481168 |
|
|
Jul 09 06:51:21 PM PDT 24 |
Jul 09 06:55:19 PM PDT 24 |
15090973905 ps |
T291 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.369439640 |
|
|
Jul 09 06:44:02 PM PDT 24 |
Jul 09 06:44:36 PM PDT 24 |
4136246627 ps |
T292 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3753135169 |
|
|
Jul 09 06:51:40 PM PDT 24 |
Jul 09 07:03:39 PM PDT 24 |
44748378329 ps |
T293 |
/workspace/coverage/default/40.sram_ctrl_regwen.3117442131 |
|
|
Jul 09 06:50:11 PM PDT 24 |
Jul 09 06:56:29 PM PDT 24 |
31977995561 ps |
T294 |
/workspace/coverage/default/22.sram_ctrl_alert_test.20095584 |
|
|
Jul 09 06:46:50 PM PDT 24 |
Jul 09 06:46:51 PM PDT 24 |
18671574 ps |
T295 |
/workspace/coverage/default/27.sram_ctrl_executable.2001099372 |
|
|
Jul 09 06:47:30 PM PDT 24 |
Jul 09 07:02:19 PM PDT 24 |
14561386359 ps |
T296 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1175471974 |
|
|
Jul 09 06:51:51 PM PDT 24 |
Jul 09 06:58:08 PM PDT 24 |
7989269416 ps |
T297 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.844641620 |
|
|
Jul 09 06:51:21 PM PDT 24 |
Jul 09 06:53:35 PM PDT 24 |
805366302 ps |
T298 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2556018659 |
|
|
Jul 09 06:45:21 PM PDT 24 |
Jul 09 06:45:26 PM PDT 24 |
1408183645 ps |
T299 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2590780261 |
|
|
Jul 09 06:51:01 PM PDT 24 |
Jul 09 06:51:03 PM PDT 24 |
15224425 ps |
T300 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.2213067265 |
|
|
Jul 09 06:48:11 PM PDT 24 |
Jul 09 07:05:24 PM PDT 24 |
41754917369 ps |
T301 |
/workspace/coverage/default/25.sram_ctrl_regwen.3111330278 |
|
|
Jul 09 06:47:09 PM PDT 24 |
Jul 09 07:06:21 PM PDT 24 |
39257135776 ps |
T302 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.2398023113 |
|
|
Jul 09 06:49:24 PM PDT 24 |
Jul 09 06:50:31 PM PDT 24 |
25137176823 ps |
T303 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3411479855 |
|
|
Jul 09 06:48:00 PM PDT 24 |
Jul 09 06:50:17 PM PDT 24 |
1636492889 ps |
T304 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.3794012704 |
|
|
Jul 09 06:48:01 PM PDT 24 |
Jul 09 07:00:22 PM PDT 24 |
12174001684 ps |
T305 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3739961643 |
|
|
Jul 09 06:43:57 PM PDT 24 |
Jul 09 07:06:13 PM PDT 24 |
14529968916 ps |
T306 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3649153393 |
|
|
Jul 09 06:51:01 PM PDT 24 |
Jul 09 06:53:40 PM PDT 24 |
32910402955 ps |
T307 |
/workspace/coverage/default/9.sram_ctrl_regwen.570889035 |
|
|
Jul 09 06:44:29 PM PDT 24 |
Jul 09 07:02:33 PM PDT 24 |
14403429651 ps |
T308 |
/workspace/coverage/default/25.sram_ctrl_executable.3964971694 |
|
|
Jul 09 06:47:10 PM PDT 24 |
Jul 09 06:50:18 PM PDT 24 |
11430328475 ps |
T309 |
/workspace/coverage/default/18.sram_ctrl_regwen.3177106832 |
|
|
Jul 09 06:46:00 PM PDT 24 |
Jul 09 06:52:34 PM PDT 24 |
13041697562 ps |
T310 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.1244820268 |
|
|
Jul 09 06:47:24 PM PDT 24 |
Jul 09 06:50:23 PM PDT 24 |
55697335855 ps |
T311 |
/workspace/coverage/default/22.sram_ctrl_executable.2478569036 |
|
|
Jul 09 06:46:28 PM PDT 24 |
Jul 09 06:56:51 PM PDT 24 |
4880192234 ps |
T312 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.651878557 |
|
|
Jul 09 06:49:14 PM PDT 24 |
Jul 09 06:51:59 PM PDT 24 |
7209823146 ps |
T115 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3690093226 |
|
|
Jul 09 06:50:59 PM PDT 24 |
Jul 09 06:51:32 PM PDT 24 |
2536170845 ps |
T313 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1532042586 |
|
|
Jul 09 06:43:58 PM PDT 24 |
Jul 09 06:44:03 PM PDT 24 |
360976685 ps |
T137 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2827513864 |
|
|
Jul 09 06:50:05 PM PDT 24 |
Jul 09 06:58:03 PM PDT 24 |
23865425732 ps |