Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16526716	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

167151609

1

T1

157199

T3

39332

T4

3252

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	90552393	1			T1	86478		T3	107802		T4	32619
values[0x0]	44922545	1			T1	41457		T3	36525		T4	10496
values[0x1]	48203387	1			T1	45134		T3	71940		T4	22187

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8419215	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

175259110

1

T1

165173

T3

128104

T4

29738

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	609170	1			T1	753		T3	911		T4	298
valid_sources[0x01]	622880	1			T1	662		T3	936		T4	286
valid_sources[0x02]	577711	1			T1	604		T3	732		T4	261
valid_sources[0x03]	1297386	1			T1	806		T3	839		T4	263
valid_sources[0x04]	581427	1			T1	651		T3	775		T4	235
valid_sources[0x05]	621159	1			T1	576		T3	894		T4	275
valid_sources[0x06]	2008557	1			T1	687		T3	863		T4	194
valid_sources[0x07]	574535	1			T1	647		T3	1099		T4	254
valid_sources[0x08]	582700	1			T1	626		T3	1027		T4	268
valid_sources[0x09]	602590	1			T1	804		T3	782		T4	236
valid_sources[0x0a]	581658	1			T1	640		T3	913		T4	221
valid_sources[0x0b]	1560212	1			T1	569		T3	1004		T4	282
valid_sources[0x0c]	572794	1			T1	634		T3	794		T4	312
valid_sources[0x0d]	575399	1			T1	654		T3	858		T4	234
valid_sources[0x0e]	644577	1			T1	692		T3	964		T4	273
valid_sources[0x0f]	606346	1			T1	642		T3	802		T4	278
valid_sources[0x10]	3353087	1			T1	584		T3	816		T4	281
valid_sources[0x11]	609264	1			T1	814		T3	881		T4	309
valid_sources[0x12]	594498	1			T1	711		T3	771		T4	261
valid_sources[0x13]	594059	1			T1	686		T3	763		T4	242
valid_sources[0x14]	833302	1			T1	545		T3	1020		T4	230
valid_sources[0x15]	591335	1			T1	718		T3	928		T4	248
valid_sources[0x16]	578476	1			T1	647		T3	834		T4	257
valid_sources[0x17]	634887	1			T1	743		T3	877		T4	261
valid_sources[0x18]	573987	1			T1	658		T3	761		T4	246
valid_sources[0x19]	598531	1			T1	577		T3	796		T4	295
valid_sources[0x1a]	593787	1			T1	633		T3	1010		T4	309
valid_sources[0x1b]	619409	1			T1	631		T3	893		T4	268
valid_sources[0x1c]	596237	1			T1	622		T3	726		T4	211
valid_sources[0x1d]	602125	1			T1	758		T3	919		T4	232
valid_sources[0x1e]	775232	1			T1	712		T3	922		T4	223
valid_sources[0x1f]	590030	1			T1	643		T3	820		T4	244
valid_sources[0x20]	577359	1			T1	778		T3	912		T4	226
valid_sources[0x21]	580703	1			T1	674		T3	844		T4	263
valid_sources[0x22]	992251	1			T1	696		T3	842		T4	265
valid_sources[0x23]	617254	1			T1	756		T3	755		T4	257
valid_sources[0x24]	586304	1			T1	646		T3	932		T4	216
valid_sources[0x25]	628589	1			T1	691		T3	827		T4	223
valid_sources[0x26]	589269	1			T1	715		T3	912		T4	266
valid_sources[0x27]	657315	1			T1	579		T3	777		T4	234
valid_sources[0x28]	586374	1			T1	620		T3	776		T4	266
valid_sources[0x29]	588751	1			T1	678		T3	879		T4	288
valid_sources[0x2a]	661829	1			T1	719		T3	868		T4	277
valid_sources[0x2b]	577727	1			T1	645		T3	804		T4	231
valid_sources[0x2c]	573949	1			T1	711		T3	892		T4	277
valid_sources[0x2d]	603082	1			T1	741		T3	714		T4	308
valid_sources[0x2e]	658309	1			T1	642		T3	745		T4	228
valid_sources[0x2f]	621959	1			T1	710		T3	887		T4	256
valid_sources[0x30]	604966	1			T1	670		T3	790		T4	272
valid_sources[0x31]	575610	1			T1	726		T3	832		T4	254
valid_sources[0x32]	584409	1			T1	737		T3	714		T4	295
valid_sources[0x33]	626732	1			T1	719		T3	885		T4	254
valid_sources[0x34]	904011	1			T1	732		T3	912		T4	216
valid_sources[0x35]	615916	1			T1	703		T3	834		T4	299
valid_sources[0x36]	606643	1			T1	651		T3	893		T4	290
valid_sources[0x37]	1258396	1			T1	733		T3	767		T4	283
valid_sources[0x38]	575084	1			T1	720		T3	763		T4	206
valid_sources[0x39]	631762	1			T1	625		T3	817		T4	209
valid_sources[0x3a]	647846	1			T1	714		T3	705		T4	199
valid_sources[0x3b]	1835333	1			T1	599		T3	845		T4	252
valid_sources[0x3c]	596657	1			T1	810		T3	803		T4	196
valid_sources[0x3d]	625192	1			T1	664		T3	713		T4	275
valid_sources[0x3e]	582371	1			T1	707		T3	904		T4	232
valid_sources[0x3f]	585941	1			T1	823		T3	683		T4	245
valid_sources[0x40]	1102786	1			T1	714		T3	688		T4	286
valid_sources[0x41]	577850	1			T1	737		T3	720		T4	288
valid_sources[0x42]	604909	1			T1	647		T3	840		T4	293
valid_sources[0x43]	627175	1			T1	594		T3	691		T4	254
valid_sources[0x44]	1208518	1			T1	737		T3	966		T4	277
valid_sources[0x45]	583030	1			T1	576		T3	939		T4	249
valid_sources[0x46]	913792	1			T1	644		T3	930		T4	301
valid_sources[0x47]	635420	1			T1	682		T3	867		T4	248
valid_sources[0x48]	633748	1			T1	689		T3	917		T4	241
valid_sources[0x49]	587840	1			T1	684		T3	799		T4	289
valid_sources[0x4a]	587012	1			T1	648		T3	878		T4	252
valid_sources[0x4b]	1975586	1			T1	682		T3	989		T4	240
valid_sources[0x4c]	2109212	1			T1	668		T3	925		T4	237
valid_sources[0x4d]	620679	1			T1	688		T3	921		T4	219
valid_sources[0x4e]	617147	1			T1	686		T3	782		T4	219
valid_sources[0x4f]	594554	1			T1	649		T3	935		T4	254
valid_sources[0x50]	636925	1			T1	657		T3	844		T4	244
valid_sources[0x51]	577047	1			T1	726		T3	782		T4	215
valid_sources[0x52]	843021	1			T1	800		T3	806		T4	204
valid_sources[0x53]	636405	1			T1	619		T3	900		T4	207
valid_sources[0x54]	629913	1			T1	601		T3	845		T4	256
valid_sources[0x55]	621596	1			T1	647		T3	937		T4	279
valid_sources[0x56]	619373	1			T1	715		T3	745		T4	276
valid_sources[0x57]	717652	1			T1	642		T3	770		T4	244
valid_sources[0x58]	574461	1			T1	609		T3	907		T4	277
valid_sources[0x59]	582505	1			T1	651		T3	796		T4	245
valid_sources[0x5a]	3279209	1			T1	693		T3	874		T4	236
valid_sources[0x5b]	1829168	1			T1	682		T3	820		T4	244
valid_sources[0x5c]	647091	1			T1	697		T3	840		T4	222
valid_sources[0x5d]	608760	1			T1	698		T3	715		T4	272
valid_sources[0x5e]	584693	1			T1	653		T3	756		T4	305
valid_sources[0x5f]	670838	1			T1	719		T3	812		T4	261
valid_sources[0x60]	604349	1			T1	635		T3	745		T4	238
valid_sources[0x61]	583913	1			T1	659		T3	806		T4	273
valid_sources[0x62]	585506	1			T1	645		T3	869		T4	271
valid_sources[0x63]	572662	1			T1	606		T3	742		T4	248
valid_sources[0x64]	593472	1			T1	737		T3	871		T4	246
valid_sources[0x65]	669823	1			T1	648		T3	919		T4	264
valid_sources[0x66]	575548	1			T1	684		T3	834		T4	253
valid_sources[0x67]	573339	1			T1	649		T3	836		T4	263
valid_sources[0x68]	577959	1			T1	731		T3	859		T4	236
valid_sources[0x69]	583228	1			T1	701		T3	775		T4	262
valid_sources[0x6a]	590736	1			T1	629		T3	947		T4	280
valid_sources[0x6b]	589435	1			T1	734		T3	817		T4	220
valid_sources[0x6c]	591095	1			T1	650		T3	717		T4	227
valid_sources[0x6d]	794630	1			T1	682		T3	853		T4	294
valid_sources[0x6e]	584592	1			T1	638		T3	796		T4	277
valid_sources[0x6f]	620518	1			T1	699		T3	883		T4	264
valid_sources[0x70]	593203	1			T1	761		T3	913		T4	257
valid_sources[0x71]	585727	1			T1	553		T3	781		T4	272
valid_sources[0x72]	609150	1			T1	677		T3	862		T4	255
valid_sources[0x73]	684382	1			T1	659		T3	788		T4	258
valid_sources[0x74]	588377	1			T1	665		T3	823		T4	205
valid_sources[0x75]	588969	1			T1	696		T3	835		T4	269
valid_sources[0x76]	616233	1			T1	630		T3	770		T4	233
valid_sources[0x77]	604629	1			T1	606		T3	824		T4	215
valid_sources[0x78]	574015	1			T1	740		T3	770		T4	273
valid_sources[0x79]	1394779	1			T1	713		T3	797		T4	288
valid_sources[0x7a]	652873	1			T1	770		T3	924		T4	245
valid_sources[0x7b]	590569	1			T1	769		T3	776		T4	297
valid_sources[0x7c]	609858	1			T1	707		T3	820		T4	242
valid_sources[0x7d]	1593893	1			T1	686		T3	851		T4	234
valid_sources[0x7e]	589132	1			T1	673		T3	918		T4	269
valid_sources[0x7f]	618886	1			T1	758		T3	886		T4	248
valid_sources[0x80]	576021	1			T1	725		T3	881		T4	255

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

82239927

1

T1

78586

T3

19631

T4

249

values[0x0]

all_enables

biggest_size

42456027

1

T1

39083

T3

9827

T4

1513

values[0x1]

all_enables

biggest_size

42455655

1

T1

39530

T3

9874

T4

1490

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44635	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

153186

1

T1

1

T3

1

T9

2

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	54126	1			T6	71		T7	48		T20	1952
values[0x0]	69368	1			T1	1		T3	2		T9	5
values[0x1]	74327	1			T1	1		T2	1		T3	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34540	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

163281

1

T1

1

T3

1

T9

3

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	550	1			T7	1		T20	34		T22	2
valid_sources[0x01]	760	1			T20	26		T22	4		T137	1
valid_sources[0x02]	903	1			T20	35		T22	4		T45	2
valid_sources[0x03]	1036	1			T7	3		T20	37		T22	4
valid_sources[0x04]	721	1			T20	44		T22	2		T54	2
valid_sources[0x05]	800	1			T20	30		T22	1		T44	1
valid_sources[0x06]	788	1			T20	35		T22	6		T45	1
valid_sources[0x07]	1119	1			T7	1		T20	35		T22	3
valid_sources[0x08]	744	1			T20	49		T22	4		T45	1
valid_sources[0x09]	692	1			T10	1		T20	32		T22	3
valid_sources[0x0a]	706	1			T20	29		T22	1		T44	1
valid_sources[0x0b]	572	1			T20	41		T22	5		T44	1
valid_sources[0x0c]	755	1			T7	1		T20	27		T22	9
valid_sources[0x0d]	706	1			T7	2		T20	37		T22	5
valid_sources[0x0e]	1237	1			T20	18		T22	2		T8	2
valid_sources[0x0f]	507	1			T7	1		T20	16		T22	4
valid_sources[0x10]	769	1			T20	25		T22	4		T138	1
valid_sources[0x11]	745	1			T7	2		T20	21		T22	2
valid_sources[0x12]	657	1			T7	1		T20	37		T22	6
valid_sources[0x13]	726	1			T20	39		T22	2		T50	1
valid_sources[0x14]	654	1			T10	2		T7	1		T20	22
valid_sources[0x15]	868	1			T7	1		T20	34		T57	1
valid_sources[0x16]	683	1			T10	1		T7	1		T20	26
valid_sources[0x17]	878	1			T7	1		T20	33		T22	1
valid_sources[0x18]	674	1			T7	2		T20	41		T57	1
valid_sources[0x19]	528	1			T7	1		T20	30		T57	1
valid_sources[0x1a]	615	1			T7	1		T20	18		T22	2
valid_sources[0x1b]	706	1			T7	2		T20	38		T22	4
valid_sources[0x1c]	648	1			T20	37		T22	3		T44	1
valid_sources[0x1d]	837	1			T9	1		T20	21		T57	2
valid_sources[0x1e]	617	1			T7	2		T20	24		T57	1
valid_sources[0x1f]	742	1			T7	1		T20	33		T21	1
valid_sources[0x20]	867	1			T7	1		T20	41		T22	3
valid_sources[0x21]	716	1			T7	2		T20	23		T22	5
valid_sources[0x22]	1043	1			T7	1		T20	41		T22	3
valid_sources[0x23]	996	1			T9	1		T7	1		T20	20
valid_sources[0x24]	755	1			T10	2		T20	40		T22	3
valid_sources[0x25]	715	1			T7	2		T20	25		T57	2
valid_sources[0x26]	1126	1			T7	2		T20	8		T22	2
valid_sources[0x27]	666	1			T20	20		T22	9		T45	2
valid_sources[0x28]	869	1			T10	5		T7	2		T20	42
valid_sources[0x29]	604	1			T20	20		T22	6		T45	2
valid_sources[0x2a]	1066	1			T7	1		T20	25		T22	6
valid_sources[0x2b]	981	1			T10	2		T7	3		T20	31
valid_sources[0x2c]	673	1			T7	1		T20	39		T22	2
valid_sources[0x2d]	880	1			T20	42		T22	4		T45	1
valid_sources[0x2e]	906	1			T7	1		T20	64		T22	7
valid_sources[0x2f]	884	1			T20	22		T22	4		T129	2
valid_sources[0x30]	749	1			T37	3		T20	26		T22	4
valid_sources[0x31]	893	1			T20	38		T21	1		T22	4
valid_sources[0x32]	705	1			T4	1		T20	35		T22	5
valid_sources[0x33]	819	1			T20	22		T39	5		T22	3
valid_sources[0x34]	780	1			T7	1		T20	19		T22	10
valid_sources[0x35]	543	1			T10	1		T20	42		T22	2
valid_sources[0x36]	834	1			T1	1		T20	42		T22	5
valid_sources[0x37]	683	1			T20	29		T22	6		T45	3
valid_sources[0x38]	1033	1			T7	2		T20	26		T22	9
valid_sources[0x39]	491	1			T2	1		T10	1		T7	1
valid_sources[0x3a]	597	1			T20	30		T22	4		T45	2
valid_sources[0x3b]	742	1			T7	1		T20	21		T22	4
valid_sources[0x3c]	654	1			T20	40		T22	5		T45	1
valid_sources[0x3d]	783	1			T20	46		T22	5		T87	2
valid_sources[0x3e]	1041	1			T7	1		T20	33		T22	3
valid_sources[0x3f]	592	1			T10	1		T20	27		T22	4
valid_sources[0x40]	727	1			T7	2		T20	39		T57	1
valid_sources[0x41]	612	1			T5	1		T20	21		T22	2
valid_sources[0x42]	618	1			T20	19		T22	3		T54	2
valid_sources[0x43]	775	1			T10	1		T20	29		T45	1
valid_sources[0x44]	749	1			T9	1		T20	12		T22	4
valid_sources[0x45]	723	1			T7	2		T20	28		T22	3
valid_sources[0x46]	740	1			T20	30		T22	10		T45	1
valid_sources[0x47]	618	1			T10	2		T7	1		T20	29
valid_sources[0x48]	549	1			T7	1		T20	51		T22	4
valid_sources[0x49]	743	1			T20	26		T22	3		T71	1
valid_sources[0x4a]	1064	1			T20	12		T22	3		T50	2
valid_sources[0x4b]	626	1			T20	27		T22	1		T44	4
valid_sources[0x4c]	779	1			T7	1		T20	37		T22	6
valid_sources[0x4d]	599	1			T20	25		T57	1		T22	4
valid_sources[0x4e]	821	1			T7	1		T20	20		T22	3
valid_sources[0x4f]	1000	1			T20	29		T22	3		T45	2
valid_sources[0x50]	608	1			T10	1		T7	1		T20	27
valid_sources[0x51]	763	1			T4	1		T7	1		T37	2
valid_sources[0x52]	553	1			T20	36		T22	4		T44	1
valid_sources[0x53]	770	1			T7	1		T20	30		T22	4
valid_sources[0x54]	777	1			T7	2		T20	47		T57	2
valid_sources[0x55]	572	1			T20	30		T22	2		T45	2
valid_sources[0x56]	858	1			T7	1		T20	34		T22	4
valid_sources[0x57]	611	1			T9	1		T20	35		T22	9
valid_sources[0x58]	847	1			T20	39		T22	4		T45	2
valid_sources[0x59]	619	1			T7	1		T20	25		T22	6
valid_sources[0x5a]	763	1			T10	3		T20	22		T22	5
valid_sources[0x5b]	1041	1			T7	1		T20	45		T22	4
valid_sources[0x5c]	1047	1			T7	3		T20	28		T22	4
valid_sources[0x5d]	739	1			T7	1		T20	36		T22	9
valid_sources[0x5e]	584	1			T7	1		T20	29		T22	5
valid_sources[0x5f]	1021	1			T20	25		T45	2		T17	8
valid_sources[0x60]	934	1			T7	1		T20	43		T22	4
valid_sources[0x61]	943	1			T7	2		T20	29		T22	3
valid_sources[0x62]	621	1			T7	1		T20	20		T22	5
valid_sources[0x63]	945	1			T10	2		T20	8		T22	2
valid_sources[0x64]	850	1			T20	51		T22	6		T45	2
valid_sources[0x65]	641	1			T20	38		T22	11		T44	2
valid_sources[0x66]	1037	1			T7	1		T20	26		T22	2
valid_sources[0x67]	760	1			T7	1		T20	31		T22	4
valid_sources[0x68]	874	1			T3	2		T20	20		T22	4
valid_sources[0x69]	432	1			T10	2		T7	1		T20	33
valid_sources[0x6a]	870	1			T20	32		T22	5		T137	2
valid_sources[0x6b]	761	1			T10	1		T20	27		T22	2
valid_sources[0x6c]	562	1			T37	1		T20	28		T22	8
valid_sources[0x6d]	900	1			T20	43		T22	4		T18	1
valid_sources[0x6e]	800	1			T7	1		T20	37		T22	3
valid_sources[0x6f]	805	1			T20	25		T22	3		T45	1
valid_sources[0x70]	1024	1			T6	290		T7	1		T20	24
valid_sources[0x71]	669	1			T10	2		T7	1		T20	27
valid_sources[0x72]	656	1			T20	30		T22	4		T44	1
valid_sources[0x73]	676	1			T7	1		T20	29		T22	4
valid_sources[0x74]	959	1			T20	44		T22	4		T129	1
valid_sources[0x75]	725	1			T20	34		T22	9		T45	2
valid_sources[0x76]	1282	1			T20	32		T22	7		T45	1
valid_sources[0x77]	670	1			T20	38		T22	4		T45	1
valid_sources[0x78]	783	1			T20	29		T22	6		T45	2
valid_sources[0x79]	741	1			T7	1		T20	40		T22	4
valid_sources[0x7a]	676	1			T7	1		T20	20		T22	5
valid_sources[0x7b]	820	1			T7	1		T20	44		T22	4
valid_sources[0x7c]	810	1			T7	1		T20	47		T22	5
valid_sources[0x7d]	1063	1			T7	2		T20	26		T22	5
valid_sources[0x7e]	710	1			T20	25		T22	5		T44	1
valid_sources[0x7f]	572	1			T20	19		T22	2		T23	4
valid_sources[0x80]	723	1			T20	10		T22	7		T45	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

40826

1

T6

31

T7

21

T20

1828

values[0x0]

all_enables

biggest_size

57623

1

T1

1

T3

1

T9

1

values[0x1]

all_enables

biggest_size

54737

1

T9

1

T4

1

T10

2