Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.97	99.19	94.27	99.72	100.00	96.03	99.12	97.44

Total tests in report: 1037

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
76.17	76.17	93.05	93.05	80.33	80.33	96.69	96.69	33.33	33.33	85.55	85.55	93.57	93.57	50.64	50.64	/workspace/coverage/default/45.sram_ctrl_stress_all.1635521171
91.21	15.04	97.55	4.50	87.80	7.46	97.76	1.07	80.95	47.62	92.65	7.11	96.20	2.63	85.56	34.92	/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2533046596
94.36	3.15	98.53	0.98	87.91	0.12	97.76	0.00	100.00	19.05	94.55	1.90	96.20	0.00	85.56	0.00	/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3172598688
95.34	0.98	98.69	0.16	88.74	0.83	97.97	0.21	100.00	0.00	95.26	0.71	96.20	0.00	90.49	4.94	/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.631693074
96.04	0.70	98.86	0.16	90.52	1.78	98.73	0.76	100.00	0.00	95.97	0.71	96.78	0.58	91.41	0.91	/workspace/coverage/default/4.sram_ctrl_sec_cm.906907196
96.60	0.56	99.10	0.25	90.52	0.00	98.73	0.00	100.00	0.00	96.21	0.24	96.93	0.15	94.70	3.29	/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2895763177
96.77	0.18	99.10	0.00	90.52	0.00	98.79	0.07	100.00	0.00	96.21	0.00	98.10	1.17	94.70	0.00	/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1842336137
96.92	0.15	99.10	0.00	90.64	0.12	98.79	0.00	100.00	0.00	96.21	0.00	98.10	0.00	95.61	0.91	/workspace/coverage/default/0.sram_ctrl_stress_all.4175888825
97.06	0.13	99.18	0.08	90.64	0.00	99.66	0.86	100.00	0.00	96.21	0.00	98.10	0.00	95.61	0.00	/workspace/coverage/default/41.sram_ctrl_ram_cfg.1213939533
97.18	0.13	99.18	0.00	90.64	0.00	99.66	0.00	100.00	0.00	96.21	0.00	98.98	0.88	95.61	0.00	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1197338318
97.29	0.10	99.18	0.00	90.64	0.00	99.66	0.00	100.00	0.00	96.21	0.00	98.98	0.00	96.34	0.73	/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3527913461
97.37	0.09	99.18	0.00	91.00	0.36	99.72	0.07	100.00	0.00	96.21	0.00	98.98	0.00	96.53	0.18	/workspace/coverage/default/37.sram_ctrl_alert_test.320255809
97.43	0.05	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	96.89	0.37	/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4188655981
97.48	0.05	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	97.26	0.37	/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1468272696
97.50	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	97.44	0.18	/workspace/coverage/default/12.sram_ctrl_lc_escalation.2460862480
97.52	0.02	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.15	97.44	0.00	/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1884744663

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.923959455
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3634444764
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3559921862
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1600333239
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2243157974
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3236833930
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3896998797
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1298135813
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2926737208
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1540369964
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3675163850
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.219032833
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4143061019
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1908743490
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4152140776
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3311380687
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2602419896
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2251566827
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2564150296
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.34592727
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2364703012
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3543198248
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1561746921
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3638230501
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.25241445
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2762887252
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1254503124
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.956328380
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3883771988
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.759213207
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1893642297
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1169673043
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2975299508
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2576185176
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3320031258
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1244634194
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.4111222256
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.653427540
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.4152864254
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4179637280
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1539865947
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1190670265
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3951350183
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3355648288
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3623208757
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2841907107
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2917610867
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3100359307
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.46562691
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.847778854
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.494111459
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.877438506
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.436691082
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1437743563
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.127584907
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3186995340
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1158684544
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2529401052
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2581749101
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1072054147
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3594387773
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1682664355
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.4123656579
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.716339557
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.713215510
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.929151835
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2564025125
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2459799592
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3315900040
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3818890593
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.948138309
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3361271540
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2075240968
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1455119368
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.951279249
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3091548587
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2555880382
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1818510010
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1369956016
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.975569586
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.351518582
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1880139881
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1322159011
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1177799019
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2656768295
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3951641291
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3591510393
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3674433884
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.290122466
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1232040860
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3216917845
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2688896559
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.648638710
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4148221822
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2998759467
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.827162499
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2451179008
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.231080842
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3397883506
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1949854429
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1177733264
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2819116201
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3010282505
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1446664500
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.4130589622
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2081682109
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2787965764
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2365977275
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1344747245
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.473699674
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3552605403
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.486885625
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2668783667
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1906538012
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.267934339
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3244932426
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2653461085
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3050403082
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.588660189
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2650873424
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.347345764
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2247154625
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3788964027
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4157259987
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3659590413
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1306433518
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3356397973
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2398256909
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1049281164
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.467041632
/workspace/coverage/default/0.sram_ctrl_alert_test.3691190339
/workspace/coverage/default/0.sram_ctrl_bijection.3011375920
/workspace/coverage/default/0.sram_ctrl_executable.4194672086
/workspace/coverage/default/0.sram_ctrl_lc_escalation.824096555
/workspace/coverage/default/0.sram_ctrl_max_throughput.2502087775
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.825268846
/workspace/coverage/default/0.sram_ctrl_mem_walk.2349855380
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2030316210
/workspace/coverage/default/0.sram_ctrl_partial_access.629552185
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2258841586
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3695524101
/workspace/coverage/default/0.sram_ctrl_regwen.860667515
/workspace/coverage/default/0.sram_ctrl_sec_cm.3633462065
/workspace/coverage/default/0.sram_ctrl_smoke.3556651027
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3243589180
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2189841672
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3505648153
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2438961450
/workspace/coverage/default/1.sram_ctrl_alert_test.1873338279
/workspace/coverage/default/1.sram_ctrl_bijection.778262157
/workspace/coverage/default/1.sram_ctrl_executable.147168889
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1467617123
/workspace/coverage/default/1.sram_ctrl_max_throughput.3036706572
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3775335236
/workspace/coverage/default/1.sram_ctrl_mem_walk.2333620865
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3083880160
/workspace/coverage/default/1.sram_ctrl_partial_access.3425413802
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.435244220
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3940111441
/workspace/coverage/default/1.sram_ctrl_regwen.567806840
/workspace/coverage/default/1.sram_ctrl_sec_cm.1965399632
/workspace/coverage/default/1.sram_ctrl_smoke.1646001849
/workspace/coverage/default/1.sram_ctrl_stress_all.621979841
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1456500332
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.721374344
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3435007309
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1614886693
/workspace/coverage/default/10.sram_ctrl_alert_test.2461448053
/workspace/coverage/default/10.sram_ctrl_bijection.3222889673
/workspace/coverage/default/10.sram_ctrl_executable.4393647
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1805061100
/workspace/coverage/default/10.sram_ctrl_max_throughput.3305784268
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3514747452
/workspace/coverage/default/10.sram_ctrl_mem_walk.3165148278
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3223301392
/workspace/coverage/default/10.sram_ctrl_partial_access.3383473748
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.68690137
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2057891009
/workspace/coverage/default/10.sram_ctrl_regwen.1068190424
/workspace/coverage/default/10.sram_ctrl_smoke.556521222
/workspace/coverage/default/10.sram_ctrl_stress_all.1069875017
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3538239907
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1702075773
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3921791221
/workspace/coverage/default/11.sram_ctrl_alert_test.3083027272
/workspace/coverage/default/11.sram_ctrl_bijection.1282839242
/workspace/coverage/default/11.sram_ctrl_executable.4029174567
/workspace/coverage/default/11.sram_ctrl_lc_escalation.309174244
/workspace/coverage/default/11.sram_ctrl_max_throughput.3647593294
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3476296157
/workspace/coverage/default/11.sram_ctrl_mem_walk.3965133882
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2523210375
/workspace/coverage/default/11.sram_ctrl_partial_access.1032115873
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3700694987
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2149277137
/workspace/coverage/default/11.sram_ctrl_regwen.185539486
/workspace/coverage/default/11.sram_ctrl_smoke.2676393175
/workspace/coverage/default/11.sram_ctrl_stress_all.1728349047
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3642656837
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3596460369
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.994870872
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1862349665
/workspace/coverage/default/12.sram_ctrl_alert_test.3209635434
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/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2928410331
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2442456310
/workspace/coverage/default/42.sram_ctrl_regwen.3905076755
/workspace/coverage/default/42.sram_ctrl_smoke.2522496614
/workspace/coverage/default/42.sram_ctrl_stress_all.3028281014
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2858602662
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.23146830
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3724016462
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1653802991
/workspace/coverage/default/43.sram_ctrl_alert_test.2973894848
/workspace/coverage/default/43.sram_ctrl_bijection.2648400264
/workspace/coverage/default/43.sram_ctrl_executable.297555992
/workspace/coverage/default/43.sram_ctrl_lc_escalation.181745187
/workspace/coverage/default/43.sram_ctrl_max_throughput.1325564684
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.669475789
/workspace/coverage/default/43.sram_ctrl_mem_walk.1547936160
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2864281995
/workspace/coverage/default/43.sram_ctrl_partial_access.2495575525
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.697822155
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2403466715
/workspace/coverage/default/43.sram_ctrl_regwen.414370827
/workspace/coverage/default/43.sram_ctrl_smoke.3207209668
/workspace/coverage/default/43.sram_ctrl_stress_all.2391613327
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2092802262
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1661174806
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3614186217
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2016249943
/workspace/coverage/default/44.sram_ctrl_alert_test.2616594413
/workspace/coverage/default/44.sram_ctrl_bijection.2230507627
/workspace/coverage/default/44.sram_ctrl_executable.2969352840
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1161734813
/workspace/coverage/default/44.sram_ctrl_max_throughput.2644291691
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3656902974
/workspace/coverage/default/44.sram_ctrl_mem_walk.3406393613
/workspace/coverage/default/44.sram_ctrl_multiple_keys.521532916
/workspace/coverage/default/44.sram_ctrl_partial_access.342920020
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1860631476
/workspace/coverage/default/44.sram_ctrl_ram_cfg.826399414
/workspace/coverage/default/44.sram_ctrl_regwen.3019339769
/workspace/coverage/default/44.sram_ctrl_smoke.2198011117
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3812842307
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3300950682
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.25062144
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3634971691
/workspace/coverage/default/45.sram_ctrl_alert_test.4080607558
/workspace/coverage/default/45.sram_ctrl_bijection.3511154188
/workspace/coverage/default/45.sram_ctrl_executable.2848235833
/workspace/coverage/default/45.sram_ctrl_lc_escalation.498675303
/workspace/coverage/default/45.sram_ctrl_max_throughput.2520002619
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3514425142
/workspace/coverage/default/45.sram_ctrl_mem_walk.848707087
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3087985409
/workspace/coverage/default/45.sram_ctrl_partial_access.1250444435
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1946602524
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2246606982
/workspace/coverage/default/45.sram_ctrl_regwen.2205411867
/workspace/coverage/default/45.sram_ctrl_smoke.3245772918
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.919691534
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1161965588
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.841019716
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.522377904
/workspace/coverage/default/46.sram_ctrl_alert_test.468217819
/workspace/coverage/default/46.sram_ctrl_bijection.1667510611
/workspace/coverage/default/46.sram_ctrl_executable.2010920633
/workspace/coverage/default/46.sram_ctrl_lc_escalation.401829584
/workspace/coverage/default/46.sram_ctrl_max_throughput.67131689
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3131363059
/workspace/coverage/default/46.sram_ctrl_mem_walk.944370943
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3011288639
/workspace/coverage/default/46.sram_ctrl_partial_access.844909993
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.95399159
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2619903843
/workspace/coverage/default/46.sram_ctrl_regwen.1720924968
/workspace/coverage/default/46.sram_ctrl_smoke.1961621051
/workspace/coverage/default/46.sram_ctrl_stress_all.3827618606
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1536099231
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.476049233
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3498626135
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3646992065
/workspace/coverage/default/47.sram_ctrl_alert_test.2242198632
/workspace/coverage/default/47.sram_ctrl_bijection.1916913569
/workspace/coverage/default/47.sram_ctrl_executable.330140230
/workspace/coverage/default/47.sram_ctrl_lc_escalation.4241449093
/workspace/coverage/default/47.sram_ctrl_max_throughput.4233406209
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3140493795
/workspace/coverage/default/47.sram_ctrl_mem_walk.1518065259
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2337930536
/workspace/coverage/default/47.sram_ctrl_partial_access.3314381784
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2408808108
/workspace/coverage/default/47.sram_ctrl_ram_cfg.174688460
/workspace/coverage/default/47.sram_ctrl_regwen.2922757229
/workspace/coverage/default/47.sram_ctrl_smoke.597428370
/workspace/coverage/default/47.sram_ctrl_stress_all.2715018758
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3728846364
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2702264100
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3710538896
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3391572174
/workspace/coverage/default/48.sram_ctrl_alert_test.2846431217
/workspace/coverage/default/48.sram_ctrl_bijection.3187696674
/workspace/coverage/default/48.sram_ctrl_executable.4153974255
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1773044682
/workspace/coverage/default/48.sram_ctrl_max_throughput.4266723961
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4149204549
/workspace/coverage/default/48.sram_ctrl_mem_walk.966505144
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2065735733
/workspace/coverage/default/48.sram_ctrl_partial_access.4187116857
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1975948092
/workspace/coverage/default/48.sram_ctrl_ram_cfg.141663090
/workspace/coverage/default/48.sram_ctrl_regwen.2099617217
/workspace/coverage/default/48.sram_ctrl_smoke.2548628129
/workspace/coverage/default/48.sram_ctrl_stress_all.1146746470
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2945164389
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2189213045
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.4231732937
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3521620565
/workspace/coverage/default/49.sram_ctrl_alert_test.2177879012
/workspace/coverage/default/49.sram_ctrl_bijection.3845009908
/workspace/coverage/default/49.sram_ctrl_executable.3340289686
/workspace/coverage/default/49.sram_ctrl_lc_escalation.958538449
/workspace/coverage/default/49.sram_ctrl_max_throughput.3319847702
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1300121936
/workspace/coverage/default/49.sram_ctrl_mem_walk.4139962386
/workspace/coverage/default/49.sram_ctrl_multiple_keys.130049962
/workspace/coverage/default/49.sram_ctrl_partial_access.2632002537
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1867989100
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4028447651
/workspace/coverage/default/49.sram_ctrl_regwen.2666522459
/workspace/coverage/default/49.sram_ctrl_smoke.2515137927
/workspace/coverage/default/49.sram_ctrl_stress_all.1772473445
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2787454825
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.504854248
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.164040748
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2138780011
/workspace/coverage/default/5.sram_ctrl_alert_test.1426044665
/workspace/coverage/default/5.sram_ctrl_bijection.3416092500
/workspace/coverage/default/5.sram_ctrl_executable.2166696782
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3742539869
/workspace/coverage/default/5.sram_ctrl_max_throughput.3842020648
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2913841844
/workspace/coverage/default/5.sram_ctrl_mem_walk.1747857378
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1200920983
/workspace/coverage/default/5.sram_ctrl_partial_access.1941900512
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2522965650
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3313865750
/workspace/coverage/default/5.sram_ctrl_regwen.1014532684
/workspace/coverage/default/5.sram_ctrl_smoke.3977368805
/workspace/coverage/default/5.sram_ctrl_stress_all.2255280219
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2180347004
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2402588342
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3427919333
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2360189805
/workspace/coverage/default/6.sram_ctrl_alert_test.3589087460
/workspace/coverage/default/6.sram_ctrl_bijection.2310719252
/workspace/coverage/default/6.sram_ctrl_executable.3337202068
/workspace/coverage/default/6.sram_ctrl_lc_escalation.74376451
/workspace/coverage/default/6.sram_ctrl_max_throughput.1291381634
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3345305759
/workspace/coverage/default/6.sram_ctrl_mem_walk.2792004259
/workspace/coverage/default/6.sram_ctrl_multiple_keys.700329694
/workspace/coverage/default/6.sram_ctrl_partial_access.4092833619
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.108270649
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1465212873
/workspace/coverage/default/6.sram_ctrl_regwen.2919958071
/workspace/coverage/default/6.sram_ctrl_smoke.404499515
/workspace/coverage/default/6.sram_ctrl_stress_all.401233146
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3502969972
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1917128811
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1243604542
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3693080956
/workspace/coverage/default/7.sram_ctrl_alert_test.4257319478
/workspace/coverage/default/7.sram_ctrl_bijection.2536572492
/workspace/coverage/default/7.sram_ctrl_executable.1180546588
/workspace/coverage/default/7.sram_ctrl_lc_escalation.127685836
/workspace/coverage/default/7.sram_ctrl_max_throughput.444423672
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3035038287
/workspace/coverage/default/7.sram_ctrl_mem_walk.2268553165
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2905915858
/workspace/coverage/default/7.sram_ctrl_partial_access.2686022525
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3278782233
/workspace/coverage/default/7.sram_ctrl_ram_cfg.152220659
/workspace/coverage/default/7.sram_ctrl_regwen.3505116976
/workspace/coverage/default/7.sram_ctrl_smoke.839166998
/workspace/coverage/default/7.sram_ctrl_stress_all.676472253
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2829880940
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2294107622
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3745948521
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.962436249
/workspace/coverage/default/8.sram_ctrl_alert_test.238631124
/workspace/coverage/default/8.sram_ctrl_bijection.2188570090
/workspace/coverage/default/8.sram_ctrl_executable.3315047690
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2326329669
/workspace/coverage/default/8.sram_ctrl_max_throughput.881597387
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.476154992
/workspace/coverage/default/8.sram_ctrl_mem_walk.2031401562
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1279124946
/workspace/coverage/default/8.sram_ctrl_partial_access.671229931
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4046396705
/workspace/coverage/default/8.sram_ctrl_ram_cfg.334145475
/workspace/coverage/default/8.sram_ctrl_regwen.514595988
/workspace/coverage/default/8.sram_ctrl_smoke.1522234134
/workspace/coverage/default/8.sram_ctrl_stress_all.3550173840
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2300569927
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3898651305
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3703420424
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1143060761
/workspace/coverage/default/9.sram_ctrl_alert_test.4208311489
/workspace/coverage/default/9.sram_ctrl_bijection.2824227374
/workspace/coverage/default/9.sram_ctrl_executable.4112711784
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2816745769
/workspace/coverage/default/9.sram_ctrl_max_throughput.1745569817
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1267374880
/workspace/coverage/default/9.sram_ctrl_mem_walk.2426863005
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1024093290
/workspace/coverage/default/9.sram_ctrl_partial_access.798924870
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.18303605
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1198230020
/workspace/coverage/default/9.sram_ctrl_regwen.2347907876
/workspace/coverage/default/9.sram_ctrl_smoke.2329796770
/workspace/coverage/default/9.sram_ctrl_stress_all.1872816376
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2645379105
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1430287521
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3748684018

Total test records in report: 1037

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/23.sram_ctrl_stress_pipeline.430091469	Jul 10 06:31:52 PM PDT 24	Jul 10 06:35:34 PM PDT 24	24483660581 ps
T2	/workspace/coverage/default/41.sram_ctrl_ram_cfg.1213939533	Jul 10 06:34:49 PM PDT 24	Jul 10 06:34:54 PM PDT 24	1354204628 ps
T3	/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4046396705	Jul 10 06:30:42 PM PDT 24	Jul 10 06:37:26 PM PDT 24	33024930917 ps
T9	/workspace/coverage/default/47.sram_ctrl_alert_test.2242198632	Jul 10 06:36:06 PM PDT 24	Jul 10 06:36:08 PM PDT 24	15365842 ps
T4	/workspace/coverage/default/39.sram_ctrl_mem_partial_access.1619358992	Jul 10 06:34:35 PM PDT 24	Jul 10 06:37:20 PM PDT 24	8723935912 ps
T5	/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3765730142	Jul 10 06:31:14 PM PDT 24	Jul 10 06:37:43 PM PDT 24	30211183151 ps
T10	/workspace/coverage/default/39.sram_ctrl_executable.4053405977	Jul 10 06:34:23 PM PDT 24	Jul 10 07:10:30 PM PDT 24	108900004766 ps
T6	/workspace/coverage/default/45.sram_ctrl_stress_all.1635521171	Jul 10 06:35:35 PM PDT 24	Jul 10 07:43:49 PM PDT 24	739077769428 ps
T11	/workspace/coverage/default/33.sram_ctrl_bijection.2690599349	Jul 10 06:33:24 PM PDT 24	Jul 10 07:08:33 PM PDT 24	30089233918 ps
T7	/workspace/coverage/default/28.sram_ctrl_stress_all.2021894543	Jul 10 06:32:50 PM PDT 24	Jul 10 07:04:02 PM PDT 24	106035507098 ps
T37	/workspace/coverage/default/37.sram_ctrl_multiple_keys.615496791	Jul 10 06:33:59 PM PDT 24	Jul 10 06:49:34 PM PDT 24	19194436799 ps
T20	/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2533046596	Jul 10 06:30:51 PM PDT 24	Jul 10 06:34:02 PM PDT 24	9041673785 ps
T57	/workspace/coverage/default/31.sram_ctrl_bijection.3345846222	Jul 10 06:33:02 PM PDT 24	Jul 10 07:18:39 PM PDT 24	146464840830 ps
T39	/workspace/coverage/default/39.sram_ctrl_stress_pipeline.3869799340	Jul 10 06:34:17 PM PDT 24	Jul 10 06:38:42 PM PDT 24	16223724912 ps
T58	/workspace/coverage/default/2.sram_ctrl_stress_pipeline.1223984177	Jul 10 06:30:22 PM PDT 24	Jul 10 06:33:49 PM PDT 24	2877183065 ps
T21	/workspace/coverage/default/34.sram_ctrl_stress_pipeline.350666240	Jul 10 06:33:32 PM PDT 24	Jul 10 06:40:10 PM PDT 24	5837957785 ps
T22	/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3606552987	Jul 10 06:31:01 PM PDT 24	Jul 10 06:31:14 PM PDT 24	249295650 ps
T38	/workspace/coverage/default/38.sram_ctrl_partial_access.1977019808	Jul 10 06:34:20 PM PDT 24	Jul 10 06:34:37 PM PDT 24	514395264 ps
T44	/workspace/coverage/default/23.sram_ctrl_mem_walk.216602826	Jul 10 06:31:51 PM PDT 24	Jul 10 06:36:45 PM PDT 24	18748449949 ps
T45	/workspace/coverage/default/38.sram_ctrl_mem_walk.2763252953	Jul 10 06:34:18 PM PDT 24	Jul 10 06:39:51 PM PDT 24	28821059621 ps
T8	/workspace/coverage/default/48.sram_ctrl_lc_escalation.1773044682	Jul 10 06:36:05 PM PDT 24	Jul 10 06:36:58 PM PDT 24	9570530739 ps
T137	/workspace/coverage/default/39.sram_ctrl_bijection.1477513158	Jul 10 06:34:19 PM PDT 24	Jul 10 07:16:16 PM PDT 24	132943374596 ps
T87	/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.333485498	Jul 10 06:32:22 PM PDT 24	Jul 10 06:38:12 PM PDT 24	10942602740 ps
T138	/workspace/coverage/default/6.sram_ctrl_smoke.404499515	Jul 10 06:30:34 PM PDT 24	Jul 10 06:30:52 PM PDT 24	1100904221 ps
T139	/workspace/coverage/default/34.sram_ctrl_bijection.525792104	Jul 10 06:33:32 PM PDT 24	Jul 10 07:15:25 PM PDT 24	301638441547 ps
T109	/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.2895763177	Jul 10 06:33:31 PM PDT 24	Jul 10 06:39:09 PM PDT 24	14644570828 ps
T12	/workspace/coverage/default/37.sram_ctrl_alert_test.320255809	Jul 10 06:34:13 PM PDT 24	Jul 10 06:34:15 PM PDT 24	35067788 ps
T140	/workspace/coverage/default/3.sram_ctrl_partial_access.53935296	Jul 10 06:30:21 PM PDT 24	Jul 10 06:30:28 PM PDT 24	1602625838 ps
T40	/workspace/coverage/default/4.sram_ctrl_access_during_key_req.1696592180	Jul 10 06:30:28 PM PDT 24	Jul 10 06:33:42 PM PDT 24	12779202891 ps
T141	/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2333278019	Jul 10 06:30:25 PM PDT 24	Jul 10 06:31:15 PM PDT 24	759641902 ps
T43	/workspace/coverage/default/15.sram_ctrl_regwen.1520339137	Jul 10 06:30:59 PM PDT 24	Jul 10 06:39:06 PM PDT 24	2690375333 ps
T71	/workspace/coverage/default/8.sram_ctrl_lc_escalation.2326329669	Jul 10 06:30:41 PM PDT 24	Jul 10 06:31:45 PM PDT 24	17364709215 ps
T110	/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2291003436	Jul 10 06:34:12 PM PDT 24	Jul 10 06:36:50 PM PDT 24	10827601452 ps
T92	/workspace/coverage/default/21.sram_ctrl_mem_partial_access.537848916	Jul 10 06:31:39 PM PDT 24	Jul 10 06:32:45 PM PDT 24	1914234839 ps
T142	/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3547097901	Jul 10 06:31:10 PM PDT 24	Jul 10 06:37:14 PM PDT 24	53162841527 ps
T143	/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3435007309	Jul 10 06:30:25 PM PDT 24	Jul 10 06:31:03 PM PDT 24	2889140343 ps
T17	/workspace/coverage/default/38.sram_ctrl_regwen.3831552391	Jul 10 06:34:21 PM PDT 24	Jul 10 06:49:14 PM PDT 24	16303546676 ps
T50	/workspace/coverage/default/8.sram_ctrl_mem_walk.2031401562	Jul 10 06:30:43 PM PDT 24	Jul 10 06:33:15 PM PDT 24	2744501328 ps
T144	/workspace/coverage/default/40.sram_ctrl_stress_pipeline.2379478860	Jul 10 06:34:41 PM PDT 24	Jul 10 06:38:33 PM PDT 24	3637469180 ps
T23	/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.4237873160	Jul 10 06:34:42 PM PDT 24	Jul 10 06:36:10 PM PDT 24	2145504665 ps
T145	/workspace/coverage/default/31.sram_ctrl_max_throughput.28386397	Jul 10 06:33:09 PM PDT 24	Jul 10 06:33:21 PM PDT 24	4572338720 ps
T18	/workspace/coverage/default/39.sram_ctrl_lc_escalation.2601151989	Jul 10 06:34:24 PM PDT 24	Jul 10 06:36:00 PM PDT 24	13183606516 ps
T146	/workspace/coverage/default/47.sram_ctrl_bijection.1916913569	Jul 10 06:35:43 PM PDT 24	Jul 10 07:03:11 PM PDT 24	100745495969 ps
T147	/workspace/coverage/default/48.sram_ctrl_smoke.2548628129	Jul 10 06:36:07 PM PDT 24	Jul 10 06:36:13 PM PDT 24	818543395 ps
T54	/workspace/coverage/default/33.sram_ctrl_mem_walk.913443502	Jul 10 06:33:30 PM PDT 24	Jul 10 06:36:02 PM PDT 24	2771892472 ps
T41	/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3521620565	Jul 10 06:36:10 PM PDT 24	Jul 10 06:54:22 PM PDT 24	13633558454 ps
T13	/workspace/coverage/default/6.sram_ctrl_alert_test.3589087460	Jul 10 06:30:31 PM PDT 24	Jul 10 06:30:34 PM PDT 24	20374934 ps
T148	/workspace/coverage/default/13.sram_ctrl_smoke.3077471622	Jul 10 06:30:49 PM PDT 24	Jul 10 06:31:09 PM PDT 24	3284992338 ps
T149	/workspace/coverage/default/39.sram_ctrl_alert_test.2353206140	Jul 10 06:34:35 PM PDT 24	Jul 10 06:34:45 PM PDT 24	47154441 ps
T150	/workspace/coverage/default/16.sram_ctrl_smoke.873918603	Jul 10 06:31:02 PM PDT 24	Jul 10 06:31:27 PM PDT 24	889444512 ps
T24	/workspace/coverage/default/30.sram_ctrl_ram_cfg.433671839	Jul 10 06:33:03 PM PDT 24	Jul 10 06:33:07 PM PDT 24	1463677747 ps
T42	/workspace/coverage/default/38.sram_ctrl_access_during_key_req.2720581988	Jul 10 06:34:17 PM PDT 24	Jul 10 07:04:22 PM PDT 24	20297483512 ps
T129	/workspace/coverage/default/10.sram_ctrl_stress_all.1069875017	Jul 10 06:30:46 PM PDT 24	Jul 10 08:14:07 PM PDT 24	53793937969 ps
T77	/workspace/coverage/default/29.sram_ctrl_stress_all.3168444572	Jul 10 06:32:50 PM PDT 24	Jul 10 07:34:51 PM PDT 24	196635034583 ps
T151	/workspace/coverage/default/27.sram_ctrl_partial_access.2554080427	Jul 10 06:32:39 PM PDT 24	Jul 10 06:33:57 PM PDT 24	518609383 ps
T152	/workspace/coverage/default/45.sram_ctrl_max_throughput.2520002619	Jul 10 06:35:30 PM PDT 24	Jul 10 06:37:34 PM PDT 24	4737825332 ps
T72	/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3862904466	Jul 10 06:34:34 PM PDT 24	Jul 10 06:34:58 PM PDT 24	2152691903 ps
T153	/workspace/coverage/default/2.sram_ctrl_executable.845142244	Jul 10 06:30:23 PM PDT 24	Jul 10 06:39:10 PM PDT 24	74975767582 ps
T154	/workspace/coverage/default/9.sram_ctrl_smoke.2329796770	Jul 10 06:30:43 PM PDT 24	Jul 10 06:30:52 PM PDT 24	731139302 ps
T155	/workspace/coverage/default/49.sram_ctrl_bijection.3845009908	Jul 10 06:36:07 PM PDT 24	Jul 10 07:05:15 PM PDT 24	26323425469 ps
T156	/workspace/coverage/default/40.sram_ctrl_smoke.865122203	Jul 10 06:34:33 PM PDT 24	Jul 10 06:36:25 PM PDT 24	10886799849 ps
T19	/workspace/coverage/default/12.sram_ctrl_lc_escalation.2460862480	Jul 10 06:30:50 PM PDT 24	Jul 10 06:31:51 PM PDT 24	45255011525 ps
T78	/workspace/coverage/default/24.sram_ctrl_regwen.4177276922	Jul 10 06:32:03 PM PDT 24	Jul 10 06:36:59 PM PDT 24	4301155383 ps
T157	/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3505648153	Jul 10 06:30:16 PM PDT 24	Jul 10 06:30:58 PM PDT 24	3056348539 ps
T25	/workspace/coverage/default/27.sram_ctrl_ram_cfg.2075901664	Jul 10 06:32:33 PM PDT 24	Jul 10 06:32:37 PM PDT 24	1458402596 ps
T93	/workspace/coverage/default/30.sram_ctrl_mem_partial_access.675640103	Jul 10 06:33:03 PM PDT 24	Jul 10 06:35:07 PM PDT 24	6559605866 ps
T158	/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2235085437	Jul 10 06:33:46 PM PDT 24	Jul 10 06:36:08 PM PDT 24	808781161 ps
T51	/workspace/coverage/default/26.sram_ctrl_mem_walk.311941991	Jul 10 06:32:20 PM PDT 24	Jul 10 06:35:13 PM PDT 24	10788817076 ps
T49	/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.468097416	Jul 10 06:30:25 PM PDT 24	Jul 10 06:31:17 PM PDT 24	4848460364 ps
T73	/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2284335241	Jul 10 06:31:46 PM PDT 24	Jul 10 06:32:02 PM PDT 24	446436520 ps
T159	/workspace/coverage/default/2.sram_ctrl_lc_escalation.1886999395	Jul 10 06:30:22 PM PDT 24	Jul 10 06:31:22 PM PDT 24	9209143744 ps
T128	/workspace/coverage/default/5.sram_ctrl_stress_all.2255280219	Jul 10 06:30:31 PM PDT 24	Jul 10 07:28:12 PM PDT 24	122192111722 ps
T160	/workspace/coverage/default/22.sram_ctrl_alert_test.2035133625	Jul 10 06:31:52 PM PDT 24	Jul 10 06:31:54 PM PDT 24	33766957 ps
T161	/workspace/coverage/default/42.sram_ctrl_bijection.1992005448	Jul 10 06:34:51 PM PDT 24	Jul 10 07:16:04 PM PDT 24	63704343811 ps
T162	/workspace/coverage/default/43.sram_ctrl_partial_access.2495575525	Jul 10 06:35:04 PM PDT 24	Jul 10 06:35:29 PM PDT 24	5324966517 ps
T136	/workspace/coverage/default/35.sram_ctrl_regwen.1274518386	Jul 10 06:33:56 PM PDT 24	Jul 10 06:35:06 PM PDT 24	2911756934 ps
T74	/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1842445600	Jul 10 06:30:30 PM PDT 24	Jul 10 06:30:43 PM PDT 24	320627812 ps
T163	/workspace/coverage/default/34.sram_ctrl_ram_cfg.4269458885	Jul 10 06:33:41 PM PDT 24	Jul 10 06:33:45 PM PDT 24	348716322 ps
T131	/workspace/coverage/default/9.sram_ctrl_executable.4112711784	Jul 10 06:30:41 PM PDT 24	Jul 10 06:43:02 PM PDT 24	16412998902 ps
T130	/workspace/coverage/default/6.sram_ctrl_regwen.2919958071	Jul 10 06:30:33 PM PDT 24	Jul 10 06:44:15 PM PDT 24	24763115412 ps
T94	/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1653802991	Jul 10 06:35:02 PM PDT 24	Jul 10 06:57:28 PM PDT 24	15159182810 ps
T164	/workspace/coverage/default/1.sram_ctrl_ram_cfg.3940111441	Jul 10 06:30:21 PM PDT 24	Jul 10 06:30:27 PM PDT 24	352114094 ps
T165	/workspace/coverage/default/18.sram_ctrl_bijection.2203396638	Jul 10 06:31:16 PM PDT 24	Jul 10 07:08:26 PM PDT 24	400206886599 ps
T95	/workspace/coverage/default/35.sram_ctrl_access_during_key_req.1323895397	Jul 10 06:33:50 PM PDT 24	Jul 10 06:43:59 PM PDT 24	20164891728 ps
T166	/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1892568089	Jul 10 06:30:26 PM PDT 24	Jul 10 06:36:50 PM PDT 24	30772972259 ps
T167	/workspace/coverage/default/33.sram_ctrl_max_throughput.3303448475	Jul 10 06:33:25 PM PDT 24	Jul 10 06:35:34 PM PDT 24	865911361 ps
T168	/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3745948521	Jul 10 06:30:36 PM PDT 24	Jul 10 06:30:45 PM PDT 24	2121463715 ps
T169	/workspace/coverage/default/17.sram_ctrl_max_throughput.1628615100	Jul 10 06:31:17 PM PDT 24	Jul 10 06:32:21 PM PDT 24	1529695903 ps
T170	/workspace/coverage/default/44.sram_ctrl_alert_test.2616594413	Jul 10 06:35:22 PM PDT 24	Jul 10 06:35:25 PM PDT 24	26268074 ps
T171	/workspace/coverage/default/32.sram_ctrl_regwen.2021313621	Jul 10 06:33:19 PM PDT 24	Jul 10 06:46:30 PM PDT 24	2743900171 ps
T172	/workspace/coverage/default/30.sram_ctrl_regwen.880854772	Jul 10 06:32:57 PM PDT 24	Jul 10 06:35:00 PM PDT 24	4455876807 ps
T173	/workspace/coverage/default/9.sram_ctrl_stress_all.1872816376	Jul 10 06:30:41 PM PDT 24	Jul 10 08:22:10 PM PDT 24	873796478505 ps
T55	/workspace/coverage/default/0.sram_ctrl_mem_walk.2349855380	Jul 10 06:30:17 PM PDT 24	Jul 10 06:35:27 PM PDT 24	20949787754 ps
T174	/workspace/coverage/default/7.sram_ctrl_smoke.839166998	Jul 10 06:30:35 PM PDT 24	Jul 10 06:32:37 PM PDT 24	11410176234 ps
T135	/workspace/coverage/default/20.sram_ctrl_regwen.2230448905	Jul 10 06:31:35 PM PDT 24	Jul 10 07:02:13 PM PDT 24	52678295655 ps
T14	/workspace/coverage/default/4.sram_ctrl_sec_cm.906907196	Jul 10 06:30:28 PM PDT 24	Jul 10 06:30:33 PM PDT 24	1665542397 ps
T28	/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3131363059	Jul 10 06:35:43 PM PDT 24	Jul 10 06:38:32 PM PDT 24	43707595675 ps
T29	/workspace/coverage/default/21.sram_ctrl_executable.7543513	Jul 10 06:31:41 PM PDT 24	Jul 10 06:43:57 PM PDT 24	11840590334 ps
T30	/workspace/coverage/default/34.sram_ctrl_executable.1617352698	Jul 10 06:33:42 PM PDT 24	Jul 10 06:37:07 PM PDT 24	17386113465 ps
T31	/workspace/coverage/default/6.sram_ctrl_max_throughput.1291381634	Jul 10 06:30:36 PM PDT 24	Jul 10 06:30:48 PM PDT 24	8507698915 ps
T32	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1197338318	Jul 10 06:31:16 PM PDT 24	Jul 10 06:51:02 PM PDT 24	39113676107 ps
T33	/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.752306815	Jul 10 06:33:25 PM PDT 24	Jul 10 06:33:37 PM PDT 24	725757385 ps
T34	/workspace/coverage/default/40.sram_ctrl_partial_access.559304559	Jul 10 06:34:42 PM PDT 24	Jul 10 06:35:44 PM PDT 24	1945348752 ps
T35	/workspace/coverage/default/12.sram_ctrl_partial_access.595874408	Jul 10 06:30:54 PM PDT 24	Jul 10 06:31:08 PM PDT 24	468566044 ps
T36	/workspace/coverage/default/25.sram_ctrl_ram_cfg.2344898717	Jul 10 06:32:09 PM PDT 24	Jul 10 06:32:13 PM PDT 24	701966534 ps
T175	/workspace/coverage/default/9.sram_ctrl_ram_cfg.1198230020	Jul 10 06:30:39 PM PDT 24	Jul 10 06:30:44 PM PDT 24	1344213829 ps
T176	/workspace/coverage/default/19.sram_ctrl_multiple_keys.1722024678	Jul 10 06:31:20 PM PDT 24	Jul 10 06:31:53 PM PDT 24	1735778107 ps
T177	/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3040313939	Jul 10 06:34:00 PM PDT 24	Jul 10 06:34:31 PM PDT 24	723950609 ps
T178	/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.63486471	Jul 10 06:32:56 PM PDT 24	Jul 10 06:34:32 PM PDT 24	795222695 ps
T179	/workspace/coverage/default/25.sram_ctrl_max_throughput.2293863337	Jul 10 06:32:07 PM PDT 24	Jul 10 06:32:15 PM PDT 24	1774665021 ps
T180	/workspace/coverage/default/46.sram_ctrl_executable.2010920633	Jul 10 06:35:38 PM PDT 24	Jul 10 06:52:12 PM PDT 24	23887014571 ps
T181	/workspace/coverage/default/42.sram_ctrl_max_throughput.871408427	Jul 10 06:34:55 PM PDT 24	Jul 10 06:37:32 PM PDT 24	820280351 ps
T132	/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3560099022	Jul 10 06:31:15 PM PDT 24	Jul 10 06:38:17 PM PDT 24	19661105746 ps
T182	/workspace/coverage/default/40.sram_ctrl_regwen.4025440726	Jul 10 06:34:41 PM PDT 24	Jul 10 06:43:51 PM PDT 24	6862298045 ps
T183	/workspace/coverage/default/12.sram_ctrl_alert_test.3209635434	Jul 10 06:30:50 PM PDT 24	Jul 10 06:30:55 PM PDT 24	17494034 ps
T184	/workspace/coverage/default/22.sram_ctrl_executable.2496827687	Jul 10 06:31:45 PM PDT 24	Jul 10 06:44:17 PM PDT 24	6686087375 ps
T185	/workspace/coverage/default/8.sram_ctrl_max_throughput.881597387	Jul 10 06:30:40 PM PDT 24	Jul 10 06:31:40 PM PDT 24	2952103032 ps
T186	/workspace/coverage/default/43.sram_ctrl_stress_all.2391613327	Jul 10 06:35:12 PM PDT 24	Jul 10 06:54:27 PM PDT 24	51266689503 ps
T187	/workspace/coverage/default/43.sram_ctrl_bijection.2648400264	Jul 10 06:35:00 PM PDT 24	Jul 10 07:25:14 PM PDT 24	459683779394 ps
T188	/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1910297642	Jul 10 06:31:14 PM PDT 24	Jul 10 06:31:59 PM PDT 24	786184191 ps
T189	/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2455839329	Jul 10 06:31:03 PM PDT 24	Jul 10 06:32:45 PM PDT 24	6376048732 ps
T190	/workspace/coverage/default/41.sram_ctrl_lc_escalation.1651992334	Jul 10 06:34:49 PM PDT 24	Jul 10 06:36:02 PM PDT 24	10776938994 ps
T191	/workspace/coverage/default/11.sram_ctrl_max_throughput.3647593294	Jul 10 06:30:52 PM PDT 24	Jul 10 06:32:29 PM PDT 24	772746912 ps
T192	/workspace/coverage/default/35.sram_ctrl_max_throughput.463245180	Jul 10 06:33:51 PM PDT 24	Jul 10 06:34:26 PM PDT 24	725005969 ps
T193	/workspace/coverage/default/28.sram_ctrl_regwen.2676711558	Jul 10 06:32:40 PM PDT 24	Jul 10 06:43:10 PM PDT 24	26901126999 ps
T106	/workspace/coverage/default/23.sram_ctrl_access_during_key_req.3359553098	Jul 10 06:31:51 PM PDT 24	Jul 10 06:43:57 PM PDT 24	9782522360 ps
T194	/workspace/coverage/default/23.sram_ctrl_bijection.4067462267	Jul 10 06:31:50 PM PDT 24	Jul 10 06:43:09 PM PDT 24	103140850162 ps
T195	/workspace/coverage/default/25.sram_ctrl_bijection.391093753	Jul 10 06:32:07 PM PDT 24	Jul 10 06:54:47 PM PDT 24	19136660427 ps
T196	/workspace/coverage/default/38.sram_ctrl_ram_cfg.3750260535	Jul 10 06:34:19 PM PDT 24	Jul 10 06:34:28 PM PDT 24	413898659 ps
T197	/workspace/coverage/default/44.sram_ctrl_partial_access.342920020	Jul 10 06:35:10 PM PDT 24	Jul 10 06:35:25 PM PDT 24	3469764285 ps
T198	/workspace/coverage/default/23.sram_ctrl_multiple_keys.3748699198	Jul 10 06:31:50 PM PDT 24	Jul 10 06:55:01 PM PDT 24	89910536510 ps
T199	/workspace/coverage/default/27.sram_ctrl_smoke.2613521974	Jul 10 06:32:30 PM PDT 24	Jul 10 06:33:47 PM PDT 24	779296779 ps
T200	/workspace/coverage/default/31.sram_ctrl_executable.488258711	Jul 10 06:33:10 PM PDT 24	Jul 10 06:52:55 PM PDT 24	44068429164 ps
T201	/workspace/coverage/default/25.sram_ctrl_partial_access.1950359190	Jul 10 06:32:09 PM PDT 24	Jul 10 06:32:16 PM PDT 24	743416345 ps
T202	/workspace/coverage/default/10.sram_ctrl_partial_access.3383473748	Jul 10 06:30:44 PM PDT 24	Jul 10 06:31:55 PM PDT 24	850775748 ps
T75	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1886739994	Jul 10 06:33:58 PM PDT 24	Jul 10 06:34:10 PM PDT 24	413333677 ps
T203	/workspace/coverage/default/45.sram_ctrl_smoke.3245772918	Jul 10 06:35:32 PM PDT 24	Jul 10 06:37:16 PM PDT 24	8862770413 ps
T204	/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1345459165	Jul 10 06:33:52 PM PDT 24	Jul 10 06:35:15 PM PDT 24	768434032 ps
T56	/workspace/coverage/default/19.sram_ctrl_mem_walk.286630507	Jul 10 06:31:28 PM PDT 24	Jul 10 06:34:03 PM PDT 24	2660193172 ps
T205	/workspace/coverage/default/16.sram_ctrl_multiple_keys.4096199267	Jul 10 06:30:59 PM PDT 24	Jul 10 06:39:51 PM PDT 24	4458864956 ps
T206	/workspace/coverage/default/29.sram_ctrl_smoke.2398223434	Jul 10 06:32:43 PM PDT 24	Jul 10 06:32:58 PM PDT 24	2786102921 ps
T107	/workspace/coverage/default/29.sram_ctrl_mem_partial_access.4218646143	Jul 10 06:32:51 PM PDT 24	Jul 10 06:35:07 PM PDT 24	1598539975 ps
T207	/workspace/coverage/default/40.sram_ctrl_ram_cfg.4230703653	Jul 10 06:34:41 PM PDT 24	Jul 10 06:34:49 PM PDT 24	709678917 ps
T208	/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2419515323	Jul 10 06:34:04 PM PDT 24	Jul 10 06:36:02 PM PDT 24	1687099089 ps
T209	/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2295959301	Jul 10 06:30:20 PM PDT 24	Jul 10 06:38:44 PM PDT 24	15190760089 ps
T210	/workspace/coverage/default/37.sram_ctrl_regwen.3621816143	Jul 10 06:34:05 PM PDT 24	Jul 10 06:43:08 PM PDT 24	8384679197 ps
T211	/workspace/coverage/default/28.sram_ctrl_bijection.888888084	Jul 10 06:32:35 PM PDT 24	Jul 10 07:04:02 PM PDT 24	431240707984 ps
T76	/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3243589180	Jul 10 06:30:17 PM PDT 24	Jul 10 06:30:28 PM PDT 24	2172626351 ps
T212	/workspace/coverage/default/4.sram_ctrl_max_throughput.1565717052	Jul 10 06:30:26 PM PDT 24	Jul 10 06:31:12 PM PDT 24	3039889687 ps
T213	/workspace/coverage/default/11.sram_ctrl_bijection.1282839242	Jul 10 06:30:44 PM PDT 24	Jul 10 07:03:13 PM PDT 24	112693118686 ps
T214	/workspace/coverage/default/21.sram_ctrl_stress_all.183559041	Jul 10 06:31:40 PM PDT 24	Jul 10 08:11:23 PM PDT 24	229063389586 ps
T215	/workspace/coverage/default/35.sram_ctrl_bijection.3496019503	Jul 10 06:33:48 PM PDT 24	Jul 10 06:48:03 PM PDT 24	48531976877 ps
T216	/workspace/coverage/default/22.sram_ctrl_smoke.1898494900	Jul 10 06:31:46 PM PDT 24	Jul 10 06:32:48 PM PDT 24	1157776294 ps
T217	/workspace/coverage/default/15.sram_ctrl_mem_walk.308980342	Jul 10 06:30:59 PM PDT 24	Jul 10 06:34:05 PM PDT 24	76823235311 ps
T218	/workspace/coverage/default/33.sram_ctrl_stress_pipeline.2584515330	Jul 10 06:33:26 PM PDT 24	Jul 10 06:38:20 PM PDT 24	4362110748 ps
T219	/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3981006984	Jul 10 06:32:15 PM PDT 24	Jul 10 06:35:05 PM PDT 24	5156121115 ps
T220	/workspace/coverage/default/28.sram_ctrl_max_throughput.2682597431	Jul 10 06:32:38 PM PDT 24	Jul 10 06:33:06 PM PDT 24	728944533 ps
T221	/workspace/coverage/default/6.sram_ctrl_ram_cfg.1465212873	Jul 10 06:30:34 PM PDT 24	Jul 10 06:30:40 PM PDT 24	695700968 ps
T222	/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2522965650	Jul 10 06:30:25 PM PDT 24	Jul 10 06:36:11 PM PDT 24	25711636416 ps
T223	/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.164040748	Jul 10 06:36:12 PM PDT 24	Jul 10 06:38:16 PM PDT 24	839661347 ps
T224	/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2891609027	Jul 10 06:32:08 PM PDT 24	Jul 10 06:48:04 PM PDT 24	16465711932 ps
T225	/workspace/coverage/default/32.sram_ctrl_access_during_key_req.262178761	Jul 10 06:33:15 PM PDT 24	Jul 10 06:49:22 PM PDT 24	39679487591 ps
T226	/workspace/coverage/default/30.sram_ctrl_bijection.3120246226	Jul 10 06:32:56 PM PDT 24	Jul 10 06:46:48 PM PDT 24	48976747200 ps
T59	/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2787454825	Jul 10 06:36:11 PM PDT 24	Jul 10 06:37:13 PM PDT 24	3906255392 ps
T227	/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1702075773	Jul 10 06:30:51 PM PDT 24	Jul 10 06:31:16 PM PDT 24	2639475900 ps
T228	/workspace/coverage/default/29.sram_ctrl_bijection.3714419144	Jul 10 06:32:49 PM PDT 24	Jul 10 07:12:45 PM PDT 24	552291875732 ps
T229	/workspace/coverage/default/31.sram_ctrl_smoke.2701630536	Jul 10 06:33:01 PM PDT 24	Jul 10 06:33:17 PM PDT 24	834061472 ps
T230	/workspace/coverage/default/45.sram_ctrl_multiple_keys.3087985409	Jul 10 06:35:29 PM PDT 24	Jul 10 06:58:36 PM PDT 24	20997387748 ps
T231	/workspace/coverage/default/25.sram_ctrl_mem_walk.654300533	Jul 10 06:32:14 PM PDT 24	Jul 10 06:36:39 PM PDT 24	16417496718 ps
T232	/workspace/coverage/default/13.sram_ctrl_ram_cfg.2449975019	Jul 10 06:31:03 PM PDT 24	Jul 10 06:31:10 PM PDT 24	1162342185 ps
T233	/workspace/coverage/default/34.sram_ctrl_access_during_key_req.3339956653	Jul 10 06:33:39 PM PDT 24	Jul 10 06:43:24 PM PDT 24	40939622360 ps
T234	/workspace/coverage/default/5.sram_ctrl_ram_cfg.3313865750	Jul 10 06:30:34 PM PDT 24	Jul 10 06:30:39 PM PDT 24	357943685 ps
T235	/workspace/coverage/default/49.sram_ctrl_multiple_keys.130049962	Jul 10 06:36:10 PM PDT 24	Jul 10 06:53:47 PM PDT 24	26768715312 ps
T236	/workspace/coverage/default/18.sram_ctrl_lc_escalation.1777776437	Jul 10 06:31:20 PM PDT 24	Jul 10 06:32:02 PM PDT 24	43930248212 ps
T237	/workspace/coverage/default/16.sram_ctrl_ram_cfg.2471797974	Jul 10 06:31:07 PM PDT 24	Jul 10 06:31:12 PM PDT 24	359453287 ps
T238	/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3738435717	Jul 10 06:33:08 PM PDT 24	Jul 10 06:39:49 PM PDT 24	28111819221 ps
T239	/workspace/coverage/default/46.sram_ctrl_smoke.1961621051	Jul 10 06:35:38 PM PDT 24	Jul 10 06:35:53 PM PDT 24	2961235422 ps
T240	/workspace/coverage/default/37.sram_ctrl_access_during_key_req.2235576466	Jul 10 06:34:04 PM PDT 24	Jul 10 06:38:40 PM PDT 24	4033868271 ps
T116	/workspace/coverage/default/32.sram_ctrl_lc_escalation.4249943501	Jul 10 06:33:19 PM PDT 24	Jul 10 06:34:06 PM PDT 24	26435101360 ps
T241	/workspace/coverage/default/21.sram_ctrl_partial_access.4010331325	Jul 10 06:31:41 PM PDT 24	Jul 10 06:31:46 PM PDT 24	358405027 ps
T242	/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3921791221	Jul 10 06:30:50 PM PDT 24	Jul 10 06:37:30 PM PDT 24	13664202283 ps
T243	/workspace/coverage/default/13.sram_ctrl_stress_pipeline.4164563803	Jul 10 06:30:51 PM PDT 24	Jul 10 06:35:46 PM PDT 24	5273226456 ps
T117	/workspace/coverage/default/16.sram_ctrl_lc_escalation.3764634001	Jul 10 06:31:08 PM PDT 24	Jul 10 06:31:48 PM PDT 24	29597145292 ps
T244	/workspace/coverage/default/34.sram_ctrl_partial_access.3388975724	Jul 10 06:33:30 PM PDT 24	Jul 10 06:33:58 PM PDT 24	1529087659 ps
T245	/workspace/coverage/default/31.sram_ctrl_stress_all.531421315	Jul 10 06:33:13 PM PDT 24	Jul 10 07:19:59 PM PDT 24	112146928113 ps
T246	/workspace/coverage/default/4.sram_ctrl_alert_test.3694444959	Jul 10 06:30:29 PM PDT 24	Jul 10 06:30:32 PM PDT 24	39490663 ps
T247	/workspace/coverage/default/43.sram_ctrl_smoke.3207209668	Jul 10 06:34:57 PM PDT 24	Jul 10 06:35:27 PM PDT 24	7158911688 ps
T248	/workspace/coverage/default/24.sram_ctrl_smoke.2805729318	Jul 10 06:31:57 PM PDT 24	Jul 10 06:34:07 PM PDT 24	2137849879 ps
T249	/workspace/coverage/default/6.sram_ctrl_multiple_keys.700329694	Jul 10 06:30:32 PM PDT 24	Jul 10 06:45:09 PM PDT 24	68932062075 ps
T250	/workspace/coverage/default/25.sram_ctrl_alert_test.4100170246	Jul 10 06:32:15 PM PDT 24	Jul 10 06:32:16 PM PDT 24	47280671 ps
T251	/workspace/coverage/default/36.sram_ctrl_smoke.1749756584	Jul 10 06:33:53 PM PDT 24	Jul 10 06:34:03 PM PDT 24	470027687 ps
T252	/workspace/coverage/default/48.sram_ctrl_stress_all.1146746470	Jul 10 06:36:08 PM PDT 24	Jul 10 07:29:12 PM PDT 24	400501277984 ps
T253	/workspace/coverage/default/48.sram_ctrl_max_throughput.4266723961	Jul 10 06:36:06 PM PDT 24	Jul 10 06:36:25 PM PDT 24	719659338 ps
T254	/workspace/coverage/default/32.sram_ctrl_executable.772360959	Jul 10 06:33:19 PM PDT 24	Jul 10 06:45:51 PM PDT 24	63982134607 ps
T255	/workspace/coverage/default/35.sram_ctrl_executable.1386035227	Jul 10 06:33:56 PM PDT 24	Jul 10 06:39:43 PM PDT 24	4091467551 ps
T256	/workspace/coverage/default/28.sram_ctrl_lc_escalation.498193593	Jul 10 06:32:38 PM PDT 24	Jul 10 06:33:24 PM PDT 24	23714646142 ps
T257	/workspace/coverage/default/40.sram_ctrl_lc_escalation.3530865319	Jul 10 06:34:42 PM PDT 24	Jul 10 06:35:56 PM PDT 24	72168337121 ps
T258	/workspace/coverage/default/19.sram_ctrl_lc_escalation.1974580375	Jul 10 06:31:26 PM PDT 24	Jul 10 06:32:09 PM PDT 24	7427838061 ps
T259	/workspace/coverage/default/23.sram_ctrl_lc_escalation.3553557248	Jul 10 06:31:53 PM PDT 24	Jul 10 06:33:19 PM PDT 24	22880738803 ps
T260	/workspace/coverage/default/18.sram_ctrl_alert_test.2976959007	Jul 10 06:31:22 PM PDT 24	Jul 10 06:31:25 PM PDT 24	17808964 ps
T261	/workspace/coverage/default/0.sram_ctrl_stress_all.4175888825	Jul 10 06:30:14 PM PDT 24	Jul 10 08:19:51 PM PDT 24	372756415153 ps
T262	/workspace/coverage/default/38.sram_ctrl_smoke.3636875036	Jul 10 06:34:11 PM PDT 24	Jul 10 06:34:22 PM PDT 24	1798561270 ps
T263	/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3656902974	Jul 10 06:35:22 PM PDT 24	Jul 10 06:37:38 PM PDT 24	10618297708 ps
T264	/workspace/coverage/default/1.sram_ctrl_smoke.1646001849	Jul 10 06:30:15 PM PDT 24	Jul 10 06:30:25 PM PDT 24	1484623956 ps
T265	/workspace/coverage/default/19.sram_ctrl_max_throughput.4154087114	Jul 10 06:31:28 PM PDT 24	Jul 10 06:31:51 PM PDT 24	1408576253 ps
T266	/workspace/coverage/default/42.sram_ctrl_stress_pipeline.23146830	Jul 10 06:34:50 PM PDT 24	Jul 10 06:39:54 PM PDT 24	22475834016 ps
T267	/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2809432802	Jul 10 06:33:20 PM PDT 24	Jul 10 06:33:32 PM PDT 24	262740522 ps
T268	/workspace/coverage/default/0.sram_ctrl_executable.4194672086	Jul 10 06:30:17 PM PDT 24	Jul 10 06:38:26 PM PDT 24	6314040348 ps
T269	/workspace/coverage/default/32.sram_ctrl_stress_pipeline.461324342	Jul 10 06:33:15 PM PDT 24	Jul 10 06:39:09 PM PDT 24	5619122092 ps
T270	/workspace/coverage/default/42.sram_ctrl_executable.2257804982	Jul 10 06:34:57 PM PDT 24	Jul 10 06:38:39 PM PDT 24	21495242929 ps
T271	/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1843354150	Jul 10 06:30:21 PM PDT 24	Jul 10 06:48:21 PM PDT 24	52518115909 ps
T52	/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1943832444	Jul 10 06:32:38 PM PDT 24	Jul 10 06:35:32 PM PDT 24	24109577923 ps
T272	/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2360189805	Jul 10 06:30:32 PM PDT 24	Jul 10 06:49:34 PM PDT 24	25638421335 ps
T273	/workspace/coverage/default/44.sram_ctrl_executable.2969352840	Jul 10 06:35:16 PM PDT 24	Jul 10 06:59:24 PM PDT 24	8279813541 ps
T274	/workspace/coverage/default/8.sram_ctrl_executable.3315047690	Jul 10 06:30:42 PM PDT 24	Jul 10 06:58:50 PM PDT 24	65776838754 ps
T275	/workspace/coverage/default/3.sram_ctrl_ram_cfg.1031145336	Jul 10 06:30:22 PM PDT 24	Jul 10 06:30:28 PM PDT 24	550982643 ps
T276	/workspace/coverage/default/14.sram_ctrl_smoke.1433947094	Jul 10 06:31:03 PM PDT 24	Jul 10 06:31:28 PM PDT 24	890783538 ps
T53	/workspace/coverage/default/44.sram_ctrl_mem_walk.3406393613	Jul 10 06:35:22 PM PDT 24	Jul 10 06:38:24 PM PDT 24	20703690047 ps
T277	/workspace/coverage/default/36.sram_ctrl_alert_test.66251120	Jul 10 06:33:59 PM PDT 24	Jul 10 06:34:03 PM PDT 24	28587287 ps
T278	/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.398283212	Jul 10 06:32:35 PM PDT 24	Jul 10 06:36:53 PM PDT 24	42836547279 ps
T279	/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1921693026	Jul 10 06:31:07 PM PDT 24	Jul 10 06:32:26 PM PDT 24	3028530908 ps
T280	/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3035038287	Jul 10 06:30:32 PM PDT 24	Jul 10 06:31:41 PM PDT 24	1008674054 ps
T281	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2098999680	Jul 10 06:34:45 PM PDT 24	Jul 10 06:35:39 PM PDT 24	778892827 ps
T282	/workspace/coverage/default/40.sram_ctrl_max_throughput.868459976	Jul 10 06:34:45 PM PDT 24	Jul 10 06:36:41 PM PDT 24	796762335 ps
T283	/workspace/coverage/default/44.sram_ctrl_ram_cfg.826399414	Jul 10 06:35:23 PM PDT 24	Jul 10 06:35:29 PM PDT 24	363347547 ps
T284	/workspace/coverage/default/17.sram_ctrl_partial_access.2512535018	Jul 10 06:31:13 PM PDT 24	Jul 10 06:32:20 PM PDT 24	1109173756 ps
T285	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1558283785	Jul 10 06:30:51 PM PDT 24	Jul 10 06:36:33 PM PDT 24	21343911783 ps
T286	/workspace/coverage/default/26.sram_ctrl_max_throughput.2660460371	Jul 10 06:32:20 PM PDT 24	Jul 10 06:33:45 PM PDT 24	3734866837 ps
T60	/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3035331349	Jul 10 06:32:02 PM PDT 24	Jul 10 06:33:18 PM PDT 24	2761607619 ps
T287	/workspace/coverage/default/18.sram_ctrl_executable.1267523157	Jul 10 06:31:20 PM PDT 24	Jul 10 06:39:02 PM PDT 24	12151362565 ps
T61	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2945164389	Jul 10 06:36:07 PM PDT 24	Jul 10 06:37:05 PM PDT 24	1701516185 ps
T288	/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2829880940	Jul 10 06:30:35 PM PDT 24	Jul 10 06:30:46 PM PDT 24	186589533 ps
T289	/workspace/coverage/default/5.sram_ctrl_smoke.3977368805	Jul 10 06:30:27 PM PDT 24	Jul 10 06:30:44 PM PDT 24	910362437 ps
T290	/workspace/coverage/default/16.sram_ctrl_regwen.1441369448	Jul 10 06:31:05 PM PDT 24	Jul 10 06:41:37 PM PDT 24	6959648951 ps
T291	/workspace/coverage/default/4.sram_ctrl_bijection.1595407550	Jul 10 06:30:29 PM PDT 24	Jul 10 07:17:16 PM PDT 24	892090847696 ps
T292	/workspace/coverage/default/18.sram_ctrl_stress_all.3892444459	Jul 10 06:31:19 PM PDT 24	Jul 10 07:45:20 PM PDT 24	180333919902 ps
T293	/workspace/coverage/default/38.sram_ctrl_max_throughput.166631252	Jul 10 06:34:21 PM PDT 24	Jul 10 06:36:02 PM PDT 24	774675433 ps
T294	/workspace/coverage/default/7.sram_ctrl_ram_cfg.152220659	Jul 10 06:30:33 PM PDT 24	Jul 10 06:30:39 PM PDT 24	534282977 ps
T295	/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.919691534	Jul 10 06:35:36 PM PDT 24	Jul 10 06:36:24 PM PDT 24	1010979643 ps
T296	/workspace/coverage/default/14.sram_ctrl_partial_access.801367882	Jul 10 06:30:54 PM PDT 24	Jul 10 06:32:43 PM PDT 24	2643495278 ps
T297	/workspace/coverage/default/19.sram_ctrl_access_during_key_req.2976020298	Jul 10 06:31:25 PM PDT 24	Jul 10 06:43:45 PM PDT 24	52753840962 ps
T298	/workspace/coverage/default/46.sram_ctrl_ram_cfg.2619903843	Jul 10 06:35:42 PM PDT 24	Jul 10 06:35:47 PM PDT 24	345972269 ps
T299	/workspace/coverage/default/9.sram_ctrl_regwen.2347907876	Jul 10 06:30:41 PM PDT 24	Jul 10 06:44:29 PM PDT 24	49773932913 ps
T300	/workspace/coverage/default/47.sram_ctrl_executable.330140230	Jul 10 06:35:51 PM PDT 24	Jul 10 06:42:45 PM PDT 24	14829050049 ps
T301	/workspace/coverage/default/4.sram_ctrl_partial_access.1058410964	Jul 10 06:30:27 PM PDT 24	Jul 10 06:30:46 PM PDT 24	875863175 ps
T302	/workspace/coverage/default/2.sram_ctrl_max_throughput.241439125	Jul 10 06:30:23 PM PDT 24	Jul 10 06:30:52 PM PDT 24	3229135626 ps
T303	/workspace/coverage/default/33.sram_ctrl_stress_all.209492963	Jul 10 06:33:32 PM PDT 24	Jul 10 08:29:16 PM PDT 24	235228385496 ps
T304	/workspace/coverage/default/3.sram_ctrl_regwen.3281961686	Jul 10 06:30:26 PM PDT 24	Jul 10 06:45:17 PM PDT 24	36567640263 ps
T305	/workspace/coverage/default/0.sram_ctrl_multiple_keys.2030316210	Jul 10 06:30:18 PM PDT 24	Jul 10 06:40:48 PM PDT 24	67267875600 ps
T306	/workspace/coverage/default/49.sram_ctrl_smoke.2515137927	Jul 10 06:36:08 PM PDT 24	Jul 10 06:36:27 PM PDT 24	3484304765 ps