Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.97	99.19	94.27	99.72	100.00	96.03	99.12	97.44

Total tests in report: 1038

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
70.77	70.77	92.23	92.23	67.42	67.42	84.71	84.71	33.33	33.33	81.52	81.52	93.57	93.57	42.60	42.60	/workspace/coverage/default/7.sram_ctrl_lc_escalation.2812611378
87.29	16.52	96.89	4.66	84.24	16.82	93.94	9.23	71.43	38.10	89.34	7.82	95.47	1.90	79.71	37.11	/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.4246483066
92.06	4.77	98.28	1.39	84.36	0.12	93.94	0.00	100.00	28.57	91.94	2.61	96.20	0.73	79.71	0.00	/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2221728540
93.63	1.57	98.28	0.00	87.09	2.73	95.80	1.86	100.00	0.00	93.60	1.66	96.20	0.00	84.46	4.75	/workspace/coverage/default/32.sram_ctrl_stress_all.1677683006
94.61	0.98	98.45	0.16	87.91	0.83	96.01	0.21	100.00	0.00	94.31	0.71	96.20	0.00	89.40	4.94	/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.357568786
95.40	0.79	98.61	0.16	90.05	2.13	96.76	0.76	100.00	0.00	95.26	0.95	96.78	0.58	90.31	0.91	/workspace/coverage/default/2.sram_ctrl_sec_cm.4276244814
96.03	0.64	98.86	0.25	90.05	0.00	96.76	0.00	100.00	0.00	95.50	0.24	96.93	0.15	94.15	3.84	/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3842688532
96.44	0.41	98.86	0.00	90.17	0.12	98.42	1.65	100.00	0.00	95.50	0.00	96.93	0.00	95.25	1.10	/workspace/coverage/default/20.sram_ctrl_stress_all.2202052155
96.72	0.28	99.10	0.25	90.28	0.12	98.42	0.00	100.00	0.00	96.21	0.71	97.81	0.88	95.25	0.00	/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1204889083
96.92	0.20	99.10	0.00	90.28	0.00	98.48	0.07	100.00	0.00	96.21	0.00	99.12	1.32	95.25	0.00	/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1985345569
97.05	0.13	99.10	0.00	90.28	0.00	98.48	0.00	100.00	0.00	96.21	0.00	99.12	0.00	96.16	0.91	/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3104291822
97.18	0.13	99.18	0.08	90.28	0.00	99.31	0.83	100.00	0.00	96.21	0.00	99.12	0.00	96.16	0.00	/workspace/coverage/default/10.sram_ctrl_ram_cfg.4178427604
97.27	0.09	99.18	0.00	90.64	0.36	99.41	0.10	100.00	0.00	96.21	0.00	99.12	0.00	96.34	0.18	/workspace/coverage/default/38.sram_ctrl_alert_test.810834402
97.36	0.09	99.18	0.00	90.88	0.24	99.41	0.00	100.00	0.00	96.21	0.00	99.12	0.00	96.71	0.37	/workspace/coverage/default/3.sram_ctrl_stress_all.2740628430
97.40	0.04	99.18	0.00	90.88	0.00	99.72	0.31	100.00	0.00	96.21	0.00	99.12	0.00	96.71	0.00	/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.502624422
97.45	0.04	99.18	0.00	91.00	0.12	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	96.89	0.18	/workspace/coverage/default/33.sram_ctrl_regwen.3517612269
97.47	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.07	0.18	/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1981021769
97.50	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.26	0.18	/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.754436155
97.52	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.44	0.18	/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2159407468

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2892237654
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2285739535
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1759146504
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.789739491
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2568103460
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3980509509
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3850378351
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.592807875
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1647810822
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2705872180
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2034025708
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2542170981
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1730075996
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2792197177
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2188710339
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.785609793
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2430860684
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4268683752
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2146100803
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2895302855
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.690294746
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3028951072
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3764643689
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1564482134
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.81098850
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1582253703
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2395255725
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3338311160
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2851795390
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.4034123759
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2747412785
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2202204008
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1815207588
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3078544902
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1426292892
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.361423703
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1315106275
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3061394524
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1432188406
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.338362561
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1639643002
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1075210633
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.829553603
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2018094380
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1598805665
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.743408457
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.4232855013
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.970284304
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2863859072
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3106761122
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3569381958
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3777015866
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2954534907
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.601483578
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1224705726
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.96938110
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3032302031
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3489291322
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.801429826
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2668052639
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3799444639
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3149620120
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.952372490
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1408352608
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4009983112
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2592546841
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1643666343
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.784505494
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1046086487
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2591737543
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1922187577
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.79369863
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2282896265
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.202114090
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.939199833
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1358787647
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2060365855
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2377092917
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1253795590
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.314401610
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3530589814
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.658784651
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4023975431
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.821835251
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3780911833
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3659813326
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3305862140
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.7512976
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1380926500
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.634832102
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.165932474
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3203966835
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2885444027
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.49484963
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.119524211
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3790492598
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3090498185
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3380114933
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1301652502
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1534584354
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3314622701
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2956084606
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1678947813
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.4289035606
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2480694031
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.991821822
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1394283098
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3580315834
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1187410732
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3576081277
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1907882731
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1145795779
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1375851582
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2240814207
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3651045704
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3596617028
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1220295496
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3556555386
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.937262885
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1630020219
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1757591225
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2405134576
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.954178849
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.417206744
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2289887642
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1237011123
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2666672470
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1395825070
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2368840293
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.974433962
/workspace/coverage/default/0.sram_ctrl_alert_test.1358319118
/workspace/coverage/default/0.sram_ctrl_bijection.2998066134
/workspace/coverage/default/0.sram_ctrl_executable.1313428967
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3663123461
/workspace/coverage/default/0.sram_ctrl_max_throughput.3907927805
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3459244662
/workspace/coverage/default/0.sram_ctrl_mem_walk.468011350
/workspace/coverage/default/0.sram_ctrl_multiple_keys.119215057
/workspace/coverage/default/0.sram_ctrl_partial_access.2893586330
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2414499713
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2096298923
/workspace/coverage/default/0.sram_ctrl_regwen.3673214254
/workspace/coverage/default/0.sram_ctrl_sec_cm.479218143
/workspace/coverage/default/0.sram_ctrl_smoke.900063054
/workspace/coverage/default/0.sram_ctrl_stress_all.1155262361
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1788680643
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2541549171
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3977470453
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4278922927
/workspace/coverage/default/1.sram_ctrl_alert_test.2787784576
/workspace/coverage/default/1.sram_ctrl_bijection.609625328
/workspace/coverage/default/1.sram_ctrl_executable.4002896038
/workspace/coverage/default/1.sram_ctrl_lc_escalation.794669458
/workspace/coverage/default/1.sram_ctrl_max_throughput.3728093985
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1075786946
/workspace/coverage/default/1.sram_ctrl_mem_walk.1303020668
/workspace/coverage/default/1.sram_ctrl_multiple_keys.430140406
/workspace/coverage/default/1.sram_ctrl_partial_access.354070702
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4036491492
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1002075794
/workspace/coverage/default/1.sram_ctrl_regwen.2073352309
/workspace/coverage/default/1.sram_ctrl_sec_cm.1170812344
/workspace/coverage/default/1.sram_ctrl_smoke.3976451369
/workspace/coverage/default/1.sram_ctrl_stress_all.2284634219
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3326760686
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.697605959
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1837114479
/workspace/coverage/default/10.sram_ctrl_alert_test.1144469653
/workspace/coverage/default/10.sram_ctrl_bijection.4284844511
/workspace/coverage/default/10.sram_ctrl_executable.4222717063
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3586126378
/workspace/coverage/default/10.sram_ctrl_max_throughput.4016180994
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.72694629
/workspace/coverage/default/10.sram_ctrl_mem_walk.2550200852
/workspace/coverage/default/10.sram_ctrl_multiple_keys.4238491980
/workspace/coverage/default/10.sram_ctrl_partial_access.1154057866
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2926566227
/workspace/coverage/default/10.sram_ctrl_regwen.3475528307
/workspace/coverage/default/10.sram_ctrl_smoke.1820811296
/workspace/coverage/default/10.sram_ctrl_stress_all.523990277
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2962005072
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3562905008
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1026915002
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3338502869
/workspace/coverage/default/11.sram_ctrl_alert_test.2007133586
/workspace/coverage/default/11.sram_ctrl_bijection.965604168
/workspace/coverage/default/11.sram_ctrl_executable.1645544499
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2757923359
/workspace/coverage/default/11.sram_ctrl_max_throughput.1265348270
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.344038011
/workspace/coverage/default/11.sram_ctrl_mem_walk.1578488582
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1476384014
/workspace/coverage/default/11.sram_ctrl_partial_access.2172977110
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/workspace/coverage/default/42.sram_ctrl_bijection.1691680577
/workspace/coverage/default/42.sram_ctrl_executable.155885418
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1229163720
/workspace/coverage/default/42.sram_ctrl_max_throughput.3775851513
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3957059390
/workspace/coverage/default/42.sram_ctrl_mem_walk.581870465
/workspace/coverage/default/42.sram_ctrl_multiple_keys.571429016
/workspace/coverage/default/42.sram_ctrl_partial_access.1008187130
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.264957195
/workspace/coverage/default/42.sram_ctrl_ram_cfg.3867803679
/workspace/coverage/default/42.sram_ctrl_regwen.3966654123
/workspace/coverage/default/42.sram_ctrl_smoke.3031638180
/workspace/coverage/default/42.sram_ctrl_stress_all.3175704550
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2057385799
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3735336277
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3205516010
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1250537381
/workspace/coverage/default/43.sram_ctrl_alert_test.706383346
/workspace/coverage/default/43.sram_ctrl_bijection.2093759926
/workspace/coverage/default/43.sram_ctrl_executable.2312041749
/workspace/coverage/default/43.sram_ctrl_lc_escalation.4217004563
/workspace/coverage/default/43.sram_ctrl_max_throughput.1609032173
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2737242851
/workspace/coverage/default/43.sram_ctrl_mem_walk.2079272220
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2470107135
/workspace/coverage/default/43.sram_ctrl_partial_access.298845643
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2607299227
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4094548229
/workspace/coverage/default/43.sram_ctrl_regwen.634316445
/workspace/coverage/default/43.sram_ctrl_smoke.2774462338
/workspace/coverage/default/43.sram_ctrl_stress_all.2926322617
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.908934018
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1971815179
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2375210586
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.543718812
/workspace/coverage/default/44.sram_ctrl_alert_test.1677376303
/workspace/coverage/default/44.sram_ctrl_bijection.1503445734
/workspace/coverage/default/44.sram_ctrl_executable.1966181947
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1714773418
/workspace/coverage/default/44.sram_ctrl_max_throughput.3653541675
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2186202596
/workspace/coverage/default/44.sram_ctrl_mem_walk.3324228311
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2082139301
/workspace/coverage/default/44.sram_ctrl_partial_access.44512624
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1097833494
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1807707560
/workspace/coverage/default/44.sram_ctrl_regwen.770571712
/workspace/coverage/default/44.sram_ctrl_smoke.2633133411
/workspace/coverage/default/44.sram_ctrl_stress_all.3963067299
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4146685496
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2173285355
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1007598829
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4039373789
/workspace/coverage/default/45.sram_ctrl_alert_test.2202132869
/workspace/coverage/default/45.sram_ctrl_bijection.1968968609
/workspace/coverage/default/45.sram_ctrl_executable.3106747127
/workspace/coverage/default/45.sram_ctrl_lc_escalation.974324523
/workspace/coverage/default/45.sram_ctrl_max_throughput.2128771264
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2148856550
/workspace/coverage/default/45.sram_ctrl_mem_walk.3708518260
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1911765964
/workspace/coverage/default/45.sram_ctrl_partial_access.2636256465
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3123579931
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2071642867
/workspace/coverage/default/45.sram_ctrl_regwen.798660081
/workspace/coverage/default/45.sram_ctrl_smoke.1936038276
/workspace/coverage/default/45.sram_ctrl_stress_all.3816875289
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3924479196
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3624364538
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.865611875
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2058980878
/workspace/coverage/default/46.sram_ctrl_alert_test.662096028
/workspace/coverage/default/46.sram_ctrl_bijection.313488130
/workspace/coverage/default/46.sram_ctrl_executable.904323721
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3461393257
/workspace/coverage/default/46.sram_ctrl_max_throughput.1886948695
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.840952272
/workspace/coverage/default/46.sram_ctrl_mem_walk.4293809302
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2859213212
/workspace/coverage/default/46.sram_ctrl_partial_access.2968449961
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4234871206
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3457221010
/workspace/coverage/default/46.sram_ctrl_regwen.3742698330
/workspace/coverage/default/46.sram_ctrl_smoke.103112254
/workspace/coverage/default/46.sram_ctrl_stress_all.3929999615
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1477201560
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4243866512
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2019664178
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1043069424
/workspace/coverage/default/47.sram_ctrl_alert_test.2631951634
/workspace/coverage/default/47.sram_ctrl_bijection.1179014533
/workspace/coverage/default/47.sram_ctrl_executable.4156575021
/workspace/coverage/default/47.sram_ctrl_lc_escalation.380195267
/workspace/coverage/default/47.sram_ctrl_max_throughput.1121917921
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1761233418
/workspace/coverage/default/47.sram_ctrl_mem_walk.1903917332
/workspace/coverage/default/47.sram_ctrl_multiple_keys.410215611
/workspace/coverage/default/47.sram_ctrl_partial_access.3255361712
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.594974811
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3125525999
/workspace/coverage/default/47.sram_ctrl_regwen.3998795202
/workspace/coverage/default/47.sram_ctrl_smoke.2718512003
/workspace/coverage/default/47.sram_ctrl_stress_all.201238633
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.432992587
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2369507872
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1253125093
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1449321655
/workspace/coverage/default/48.sram_ctrl_alert_test.4120142856
/workspace/coverage/default/48.sram_ctrl_bijection.4275785844
/workspace/coverage/default/48.sram_ctrl_executable.426135019
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1616822277
/workspace/coverage/default/48.sram_ctrl_max_throughput.2700311155
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3497515025
/workspace/coverage/default/48.sram_ctrl_mem_walk.1348545680
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3595203843
/workspace/coverage/default/48.sram_ctrl_partial_access.2673123452
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.811663630
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2552948990
/workspace/coverage/default/48.sram_ctrl_regwen.68550258
/workspace/coverage/default/48.sram_ctrl_smoke.891933198
/workspace/coverage/default/48.sram_ctrl_stress_all.4045025563
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1481698479
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3597875834
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1621249047
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2091099106
/workspace/coverage/default/49.sram_ctrl_alert_test.3653682140
/workspace/coverage/default/49.sram_ctrl_bijection.1141305334
/workspace/coverage/default/49.sram_ctrl_executable.1822472834
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1533722928
/workspace/coverage/default/49.sram_ctrl_max_throughput.1993856741
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1256523663
/workspace/coverage/default/49.sram_ctrl_mem_walk.1409920099
/workspace/coverage/default/49.sram_ctrl_multiple_keys.405681385
/workspace/coverage/default/49.sram_ctrl_partial_access.808047418
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4139174783
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3858689347
/workspace/coverage/default/49.sram_ctrl_regwen.225203327
/workspace/coverage/default/49.sram_ctrl_smoke.1531860227
/workspace/coverage/default/49.sram_ctrl_stress_all.1886111219
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.575850745
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1831074158
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4071567119
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1905255363
/workspace/coverage/default/5.sram_ctrl_alert_test.679264355
/workspace/coverage/default/5.sram_ctrl_executable.3104564145
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3775463548
/workspace/coverage/default/5.sram_ctrl_max_throughput.511091672
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.4284164064
/workspace/coverage/default/5.sram_ctrl_mem_walk.3550361581
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2411350029
/workspace/coverage/default/5.sram_ctrl_partial_access.3032475812
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1510451172
/workspace/coverage/default/5.sram_ctrl_ram_cfg.815248071
/workspace/coverage/default/5.sram_ctrl_regwen.2842217082
/workspace/coverage/default/5.sram_ctrl_smoke.427199384
/workspace/coverage/default/5.sram_ctrl_stress_all.810324587
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2067337066
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.868981759
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1926782950
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.4168362863
/workspace/coverage/default/6.sram_ctrl_alert_test.2253036508
/workspace/coverage/default/6.sram_ctrl_bijection.2626721166
/workspace/coverage/default/6.sram_ctrl_executable.3836466065
/workspace/coverage/default/6.sram_ctrl_lc_escalation.4175982435
/workspace/coverage/default/6.sram_ctrl_max_throughput.2674230073
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2277554911
/workspace/coverage/default/6.sram_ctrl_mem_walk.1561354916
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2881869167
/workspace/coverage/default/6.sram_ctrl_partial_access.3768263095
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2945121102
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3890116631
/workspace/coverage/default/6.sram_ctrl_regwen.4062795820
/workspace/coverage/default/6.sram_ctrl_smoke.4036077095
/workspace/coverage/default/6.sram_ctrl_stress_all.2008150340
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3699267825
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3194945279
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1510716926
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1978563480
/workspace/coverage/default/7.sram_ctrl_alert_test.3202149413
/workspace/coverage/default/7.sram_ctrl_bijection.4110769951
/workspace/coverage/default/7.sram_ctrl_executable.540090350
/workspace/coverage/default/7.sram_ctrl_max_throughput.2132208221
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1237890628
/workspace/coverage/default/7.sram_ctrl_mem_walk.2644015295
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1539407139
/workspace/coverage/default/7.sram_ctrl_partial_access.1097723611
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1906635777
/workspace/coverage/default/7.sram_ctrl_ram_cfg.975373532
/workspace/coverage/default/7.sram_ctrl_regwen.3372748633
/workspace/coverage/default/7.sram_ctrl_smoke.2214188723
/workspace/coverage/default/7.sram_ctrl_stress_all.1948653972
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1541408760
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2556400300
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2726078344
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1674585677
/workspace/coverage/default/8.sram_ctrl_alert_test.1937148637
/workspace/coverage/default/8.sram_ctrl_bijection.1447318448
/workspace/coverage/default/8.sram_ctrl_executable.2317420402
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1098281086
/workspace/coverage/default/8.sram_ctrl_max_throughput.1929331426
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3017500625
/workspace/coverage/default/8.sram_ctrl_mem_walk.3688292492
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2857628494
/workspace/coverage/default/8.sram_ctrl_partial_access.2428936143
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1894518355
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2893304964
/workspace/coverage/default/8.sram_ctrl_regwen.2135133022
/workspace/coverage/default/8.sram_ctrl_smoke.486997681
/workspace/coverage/default/8.sram_ctrl_stress_all.2030673323
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1547784248
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1890159928
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2998734168
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2738235517
/workspace/coverage/default/9.sram_ctrl_alert_test.72810349
/workspace/coverage/default/9.sram_ctrl_bijection.2462696831
/workspace/coverage/default/9.sram_ctrl_executable.819855370
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2283979098
/workspace/coverage/default/9.sram_ctrl_max_throughput.14565265
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1490678147
/workspace/coverage/default/9.sram_ctrl_mem_walk.3497839445
/workspace/coverage/default/9.sram_ctrl_multiple_keys.619859603
/workspace/coverage/default/9.sram_ctrl_partial_access.1469302006
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4106913835
/workspace/coverage/default/9.sram_ctrl_ram_cfg.704444436
/workspace/coverage/default/9.sram_ctrl_regwen.2676763614
/workspace/coverage/default/9.sram_ctrl_smoke.3674432727
/workspace/coverage/default/9.sram_ctrl_stress_all.1230773709
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1550565194
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3254066575
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2335146299

Total test records in report: 1038

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4278922927	Jul 14 07:22:46 PM PDT 24	Jul 14 07:38:44 PM PDT 24	49044295686 ps
T2	/workspace/coverage/default/21.sram_ctrl_access_during_key_req.2220555572	Jul 14 07:23:56 PM PDT 24	Jul 14 07:46:03 PM PDT 24	33541930346 ps
T3	/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3909532396	Jul 14 07:24:39 PM PDT 24	Jul 14 07:27:14 PM PDT 24	4914292465 ps
T5	/workspace/coverage/default/7.sram_ctrl_lc_escalation.2812611378	Jul 14 07:23:41 PM PDT 24	Jul 14 07:24:58 PM PDT 24	42511782673 ps
T4	/workspace/coverage/default/44.sram_ctrl_bijection.1503445734	Jul 14 07:25:33 PM PDT 24	Jul 14 08:05:24 PM PDT 24	127204056879 ps
T8	/workspace/coverage/default/14.sram_ctrl_ram_cfg.1419379023	Jul 14 07:23:43 PM PDT 24	Jul 14 07:24:02 PM PDT 24	363883452 ps
T9	/workspace/coverage/default/11.sram_ctrl_max_throughput.1265348270	Jul 14 07:23:11 PM PDT 24	Jul 14 07:23:44 PM PDT 24	690767986 ps
T10	/workspace/coverage/default/18.sram_ctrl_multiple_keys.3741286047	Jul 14 07:23:28 PM PDT 24	Jul 14 07:52:48 PM PDT 24	28067933630 ps
T11	/workspace/coverage/default/2.sram_ctrl_ram_cfg.1536834250	Jul 14 07:23:06 PM PDT 24	Jul 14 07:23:37 PM PDT 24	1166782452 ps
T12	/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3254066575	Jul 14 07:23:16 PM PDT 24	Jul 14 07:28:54 PM PDT 24	4615339258 ps
T38	/workspace/coverage/default/47.sram_ctrl_mem_walk.1903917332	Jul 14 07:26:02 PM PDT 24	Jul 14 07:30:56 PM PDT 24	5256033846 ps
T24	/workspace/coverage/default/34.sram_ctrl_regwen.2312530845	Jul 14 07:24:38 PM PDT 24	Jul 14 07:45:20 PM PDT 24	3362271048 ps
T23	/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.4246483066	Jul 14 07:25:05 PM PDT 24	Jul 14 07:27:06 PM PDT 24	12335422989 ps
T27	/workspace/coverage/default/10.sram_ctrl_ram_cfg.4178427604	Jul 14 07:23:25 PM PDT 24	Jul 14 07:23:48 PM PDT 24	579046986 ps
T6	/workspace/coverage/default/20.sram_ctrl_stress_all.2202052155	Jul 14 07:23:53 PM PDT 24	Jul 14 09:43:07 PM PDT 24	329199589718 ps
T40	/workspace/coverage/default/49.sram_ctrl_multiple_keys.405681385	Jul 14 07:26:07 PM PDT 24	Jul 14 07:39:56 PM PDT 24	21621985852 ps
T7	/workspace/coverage/default/31.sram_ctrl_stress_all.1422679190	Jul 14 07:24:26 PM PDT 24	Jul 14 08:01:47 PM PDT 24	205256145930 ps
T66	/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2448959434	Jul 14 07:24:04 PM PDT 24	Jul 14 07:26:37 PM PDT 24	1604229720 ps
T22	/workspace/coverage/default/3.sram_ctrl_stress_all.2740628430	Jul 14 07:23:03 PM PDT 24	Jul 14 09:00:30 PM PDT 24	310193587098 ps
T13	/workspace/coverage/default/28.sram_ctrl_alert_test.1181990592	Jul 14 07:24:10 PM PDT 24	Jul 14 07:24:18 PM PDT 24	43569526 ps
T67	/workspace/coverage/default/33.sram_ctrl_bijection.3981604427	Jul 14 07:24:34 PM PDT 24	Jul 14 08:18:25 PM PDT 24	615722939305 ps
T42	/workspace/coverage/default/32.sram_ctrl_stress_all.1677683006	Jul 14 07:24:37 PM PDT 24	Jul 14 08:20:16 PM PDT 24	43207742045 ps
T135	/workspace/coverage/default/25.sram_ctrl_ram_cfg.1748820610	Jul 14 07:24:00 PM PDT 24	Jul 14 07:24:16 PM PDT 24	1403620996 ps
T60	/workspace/coverage/default/45.sram_ctrl_lc_escalation.974324523	Jul 14 07:25:36 PM PDT 24	Jul 14 07:26:08 PM PDT 24	19457503778 ps
T136	/workspace/coverage/default/3.sram_ctrl_ram_cfg.547290588	Jul 14 07:22:55 PM PDT 24	Jul 14 07:23:28 PM PDT 24	5589466698 ps
T61	/workspace/coverage/default/13.sram_ctrl_lc_escalation.4136580098	Jul 14 07:23:28 PM PDT 24	Jul 14 07:25:30 PM PDT 24	79776964791 ps
T25	/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.93637432	Jul 14 07:23:39 PM PDT 24	Jul 14 07:24:23 PM PDT 24	2156730018 ps
T39	/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3842688532	Jul 14 07:23:46 PM PDT 24	Jul 14 07:29:54 PM PDT 24	106508965426 ps
T98	/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1885682707	Jul 14 07:24:53 PM PDT 24	Jul 14 07:28:37 PM PDT 24	21101215400 ps
T68	/workspace/coverage/default/28.sram_ctrl_lc_escalation.2291370527	Jul 14 07:24:09 PM PDT 24	Jul 14 07:24:50 PM PDT 24	21546053840 ps
T69	/workspace/coverage/default/3.sram_ctrl_regwen.929545315	Jul 14 07:22:56 PM PDT 24	Jul 14 07:36:12 PM PDT 24	52471494427 ps
T113	/workspace/coverage/default/26.sram_ctrl_smoke.2611721273	Jul 14 07:23:57 PM PDT 24	Jul 14 07:24:21 PM PDT 24	2738700487 ps
T16	/workspace/coverage/default/2.sram_ctrl_sec_cm.4276244814	Jul 14 07:22:59 PM PDT 24	Jul 14 07:23:32 PM PDT 24	974264854 ps
T30	/workspace/coverage/default/18.sram_ctrl_mem_partial_access.2482770470	Jul 14 07:23:46 PM PDT 24	Jul 14 07:25:09 PM PDT 24	4035879200 ps
T31	/workspace/coverage/default/38.sram_ctrl_bijection.3463121597	Jul 14 07:24:55 PM PDT 24	Jul 14 07:37:33 PM PDT 24	129981173539 ps
T32	/workspace/coverage/default/40.sram_ctrl_ram_cfg.1712050307	Jul 14 07:25:09 PM PDT 24	Jul 14 07:25:13 PM PDT 24	1356698708 ps
T33	/workspace/coverage/default/25.sram_ctrl_bijection.4010282197	Jul 14 07:23:52 PM PDT 24	Jul 14 07:39:30 PM PDT 24	166893010820 ps
T34	/workspace/coverage/default/27.sram_ctrl_bijection.2686871412	Jul 14 07:24:00 PM PDT 24	Jul 14 07:57:19 PM PDT 24	86532476319 ps
T35	/workspace/coverage/default/17.sram_ctrl_mem_partial_access.2245961387	Jul 14 07:23:47 PM PDT 24	Jul 14 07:26:41 PM PDT 24	5128272108 ps
T26	/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.801716495	Jul 14 07:22:55 PM PDT 24	Jul 14 07:24:46 PM PDT 24	818895936 ps
T36	/workspace/coverage/default/6.sram_ctrl_executable.3836466065	Jul 14 07:22:58 PM PDT 24	Jul 14 07:37:31 PM PDT 24	13881083300 ps
T37	/workspace/coverage/default/29.sram_ctrl_partial_access.527180504	Jul 14 07:24:09 PM PDT 24	Jul 14 07:24:24 PM PDT 24	2999958253 ps
T14	/workspace/coverage/default/38.sram_ctrl_alert_test.810834402	Jul 14 07:25:02 PM PDT 24	Jul 14 07:25:04 PM PDT 24	42711425 ps
T129	/workspace/coverage/default/40.sram_ctrl_stress_all.36956650	Jul 14 07:25:16 PM PDT 24	Jul 14 09:04:25 PM PDT 24	268496425912 ps
T62	/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1541408760	Jul 14 07:23:04 PM PDT 24	Jul 14 07:23:43 PM PDT 24	287521128 ps
T46	/workspace/coverage/default/39.sram_ctrl_mem_partial_access.3646810654	Jul 14 07:25:04 PM PDT 24	Jul 14 07:27:59 PM PDT 24	10229985813 ps
T99	/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.19123900	Jul 14 07:23:01 PM PDT 24	Jul 14 07:30:29 PM PDT 24	6716713614 ps
T137	/workspace/coverage/default/48.sram_ctrl_ram_cfg.2552948990	Jul 14 07:26:07 PM PDT 24	Jul 14 07:26:11 PM PDT 24	1165687101 ps
T47	/workspace/coverage/default/8.sram_ctrl_mem_walk.3688292492	Jul 14 07:23:07 PM PDT 24	Jul 14 07:26:32 PM PDT 24	35895442528 ps
T63	/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2257340232	Jul 14 07:23:29 PM PDT 24	Jul 14 07:24:20 PM PDT 24	1778623326 ps
T138	/workspace/coverage/default/21.sram_ctrl_partial_access.4087484697	Jul 14 07:23:46 PM PDT 24	Jul 14 07:24:12 PM PDT 24	833258641 ps
T139	/workspace/coverage/default/39.sram_ctrl_ram_cfg.592469417	Jul 14 07:25:07 PM PDT 24	Jul 14 07:25:11 PM PDT 24	1884634342 ps
T100	/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4106913835	Jul 14 07:23:16 PM PDT 24	Jul 14 07:28:15 PM PDT 24	18432451488 ps
T41	/workspace/coverage/default/20.sram_ctrl_access_during_key_req.1662284703	Jul 14 07:23:50 PM PDT 24	Jul 14 07:36:00 PM PDT 24	114904686486 ps
T140	/workspace/coverage/default/2.sram_ctrl_partial_access.3110164287	Jul 14 07:22:46 PM PDT 24	Jul 14 07:23:21 PM PDT 24	2024604919 ps
T130	/workspace/coverage/default/35.sram_ctrl_executable.4234576689	Jul 14 07:24:42 PM PDT 24	Jul 14 07:37:36 PM PDT 24	34566852859 ps
T141	/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1621249047	Jul 14 07:26:02 PM PDT 24	Jul 14 07:27:37 PM PDT 24	3607569998 ps
T142	/workspace/coverage/default/30.sram_ctrl_ram_cfg.2906397096	Jul 14 07:24:22 PM PDT 24	Jul 14 07:24:27 PM PDT 24	358448616 ps
T101	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2847862316	Jul 14 07:23:14 PM PDT 24	Jul 14 07:32:39 PM PDT 24	9569588550 ps
T102	/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.99693339	Jul 14 07:24:59 PM PDT 24	Jul 14 07:31:34 PM PDT 24	63662840208 ps
T143	/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.681211138	Jul 14 07:24:39 PM PDT 24	Jul 14 07:25:00 PM PDT 24	813380766 ps
T64	/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1297927871	Jul 14 07:24:38 PM PDT 24	Jul 14 07:24:58 PM PDT 24	521413073 ps
T103	/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1097833494	Jul 14 07:25:30 PM PDT 24	Jul 14 07:30:30 PM PDT 24	41948784324 ps
T144	/workspace/coverage/default/18.sram_ctrl_max_throughput.306867945	Jul 14 07:23:37 PM PDT 24	Jul 14 07:25:30 PM PDT 24	1525288081 ps
T65	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1481698479	Jul 14 07:26:05 PM PDT 24	Jul 14 07:26:19 PM PDT 24	470916740 ps
T145	/workspace/coverage/default/23.sram_ctrl_ram_cfg.1227577947	Jul 14 07:23:55 PM PDT 24	Jul 14 07:24:13 PM PDT 24	363736027 ps
T82	/workspace/coverage/default/31.sram_ctrl_mem_partial_access.876295038	Jul 14 07:24:23 PM PDT 24	Jul 14 07:25:29 PM PDT 24	6370510811 ps
T15	/workspace/coverage/default/9.sram_ctrl_alert_test.72810349	Jul 14 07:23:05 PM PDT 24	Jul 14 07:23:34 PM PDT 24	36414833 ps
T146	/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.865611875	Jul 14 07:25:36 PM PDT 24	Jul 14 07:27:12 PM PDT 24	807782725 ps
T147	/workspace/coverage/default/7.sram_ctrl_smoke.2214188723	Jul 14 07:22:59 PM PDT 24	Jul 14 07:24:50 PM PDT 24	850375436 ps
T19	/workspace/coverage/default/6.sram_ctrl_stress_all.2008150340	Jul 14 07:23:06 PM PDT 24	Jul 14 08:05:15 PM PDT 24	71738112154 ps
T50	/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1204889083	Jul 14 07:23:20 PM PDT 24	Jul 14 07:24:58 PM PDT 24	5175041568 ps
T132	/workspace/coverage/default/49.sram_ctrl_executable.1822472834	Jul 14 07:26:10 PM PDT 24	Jul 14 08:04:40 PM PDT 24	8364415124 ps
T148	/workspace/coverage/default/42.sram_ctrl_max_throughput.3775851513	Jul 14 07:25:18 PM PDT 24	Jul 14 07:25:37 PM PDT 24	1406233028 ps
T83	/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2275600169	Jul 14 07:24:55 PM PDT 24	Jul 14 07:26:12 PM PDT 24	2719275414 ps
T48	/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.908934018	Jul 14 07:25:31 PM PDT 24	Jul 14 07:26:02 PM PDT 24	3741349368 ps
T116	/workspace/coverage/default/26.sram_ctrl_lc_escalation.2197975800	Jul 14 07:23:59 PM PDT 24	Jul 14 07:24:59 PM PDT 24	6754458739 ps
T51	/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3947820488	Jul 14 07:24:49 PM PDT 24	Jul 14 07:25:26 PM PDT 24	2622735296 ps
T149	/workspace/coverage/default/38.sram_ctrl_max_throughput.3265709080	Jul 14 07:24:55 PM PDT 24	Jul 14 07:25:13 PM PDT 24	2760425314 ps
T94	/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2148856550	Jul 14 07:25:42 PM PDT 24	Jul 14 07:27:02 PM PDT 24	5068217916 ps
T150	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2607299227	Jul 14 07:25:27 PM PDT 24	Jul 14 07:29:23 PM PDT 24	37759275219 ps
T151	/workspace/coverage/default/4.sram_ctrl_alert_test.855189734	Jul 14 07:23:03 PM PDT 24	Jul 14 07:23:31 PM PDT 24	13855261 ps
T152	/workspace/coverage/default/14.sram_ctrl_stress_pipeline.123196302	Jul 14 07:23:22 PM PDT 24	Jul 14 07:26:25 PM PDT 24	2361868725 ps
T153	/workspace/coverage/default/43.sram_ctrl_max_throughput.1609032173	Jul 14 07:25:25 PM PDT 24	Jul 14 07:27:14 PM PDT 24	3052016182 ps
T20	/workspace/coverage/default/10.sram_ctrl_stress_all.523990277	Jul 14 07:23:09 PM PDT 24	Jul 14 07:50:34 PM PDT 24	107718600057 ps
T154	/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3002932753	Jul 14 07:24:01 PM PDT 24	Jul 14 07:25:47 PM PDT 24	1543665041 ps
T155	/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1971815179	Jul 14 07:25:29 PM PDT 24	Jul 14 07:29:55 PM PDT 24	34942596304 ps
T156	/workspace/coverage/default/24.sram_ctrl_stress_all.1878190371	Jul 14 07:23:51 PM PDT 24	Jul 14 08:36:08 PM PDT 24	111691839798 ps
T52	/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3459244662	Jul 14 07:22:50 PM PDT 24	Jul 14 07:25:48 PM PDT 24	10121946143 ps
T157	/workspace/coverage/default/42.sram_ctrl_multiple_keys.571429016	Jul 14 07:25:18 PM PDT 24	Jul 14 07:44:39 PM PDT 24	40166817725 ps
T158	/workspace/coverage/default/8.sram_ctrl_bijection.1447318448	Jul 14 07:23:17 PM PDT 24	Jul 14 07:54:57 PM PDT 24	460217133428 ps
T53	/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1177043323	Jul 14 07:25:10 PM PDT 24	Jul 14 07:26:15 PM PDT 24	1831747715 ps
T54	/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1550565194	Jul 14 07:23:25 PM PDT 24	Jul 14 07:24:14 PM PDT 24	6377575249 ps
T159	/workspace/coverage/default/18.sram_ctrl_smoke.509399505	Jul 14 07:23:24 PM PDT 24	Jul 14 07:25:47 PM PDT 24	1339652287 ps
T160	/workspace/coverage/default/41.sram_ctrl_executable.1462922163	Jul 14 07:25:11 PM PDT 24	Jul 14 07:29:57 PM PDT 24	7515750413 ps
T131	/workspace/coverage/default/29.sram_ctrl_executable.635266064	Jul 14 07:24:18 PM PDT 24	Jul 14 07:46:49 PM PDT 24	64641552622 ps
T161	/workspace/coverage/default/33.sram_ctrl_executable.3752489275	Jul 14 07:24:35 PM PDT 24	Jul 14 07:38:48 PM PDT 24	105365407088 ps
T162	/workspace/coverage/default/13.sram_ctrl_stress_pipeline.541526752	Jul 14 07:23:21 PM PDT 24	Jul 14 07:29:03 PM PDT 24	6892016586 ps
T163	/workspace/coverage/default/23.sram_ctrl_max_throughput.973549520	Jul 14 07:23:46 PM PDT 24	Jul 14 07:25:50 PM PDT 24	1534609070 ps
T164	/workspace/coverage/default/13.sram_ctrl_regwen.2679953751	Jul 14 07:23:17 PM PDT 24	Jul 14 07:28:52 PM PDT 24	4937932722 ps
T165	/workspace/coverage/default/27.sram_ctrl_lc_escalation.2429454834	Jul 14 07:24:03 PM PDT 24	Jul 14 07:24:41 PM PDT 24	8790893267 ps
T166	/workspace/coverage/default/39.sram_ctrl_smoke.1006793563	Jul 14 07:25:01 PM PDT 24	Jul 14 07:25:46 PM PDT 24	1401192432 ps
T167	/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.502624422	Jul 14 07:23:00 PM PDT 24	Jul 14 07:23:42 PM PDT 24	754590975 ps
T168	/workspace/coverage/default/39.sram_ctrl_max_throughput.1592722331	Jul 14 07:25:03 PM PDT 24	Jul 14 07:26:49 PM PDT 24	3007672505 ps
T169	/workspace/coverage/default/11.sram_ctrl_smoke.1569656781	Jul 14 07:23:13 PM PDT 24	Jul 14 07:23:46 PM PDT 24	853850718 ps
T117	/workspace/coverage/default/43.sram_ctrl_lc_escalation.4217004563	Jul 14 07:25:29 PM PDT 24	Jul 14 07:26:20 PM PDT 24	29280596725 ps
T170	/workspace/coverage/default/36.sram_ctrl_stress_pipeline.1778741179	Jul 14 07:24:53 PM PDT 24	Jul 14 07:30:57 PM PDT 24	22600108900 ps
T171	/workspace/coverage/default/16.sram_ctrl_executable.3564871516	Jul 14 07:23:44 PM PDT 24	Jul 14 07:55:51 PM PDT 24	75382947797 ps
T172	/workspace/coverage/default/38.sram_ctrl_ram_cfg.1462234038	Jul 14 07:24:59 PM PDT 24	Jul 14 07:25:05 PM PDT 24	344954042 ps
T173	/workspace/coverage/default/19.sram_ctrl_stress_pipeline.1895930520	Jul 14 07:23:50 PM PDT 24	Jul 14 07:31:31 PM PDT 24	7781229730 ps
T174	/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3310551477	Jul 14 07:23:19 PM PDT 24	Jul 14 07:40:53 PM PDT 24	30793906743 ps
T175	/workspace/coverage/default/30.sram_ctrl_partial_access.3008480353	Jul 14 07:24:14 PM PDT 24	Jul 14 07:24:43 PM PDT 24	1512387581 ps
T176	/workspace/coverage/default/8.sram_ctrl_max_throughput.1929331426	Jul 14 07:23:09 PM PDT 24	Jul 14 07:23:46 PM PDT 24	11180498433 ps
T177	/workspace/coverage/default/16.sram_ctrl_ram_cfg.1922345234	Jul 14 07:23:32 PM PDT 24	Jul 14 07:23:52 PM PDT 24	1463236183 ps
T178	/workspace/coverage/default/47.sram_ctrl_ram_cfg.3125525999	Jul 14 07:26:02 PM PDT 24	Jul 14 07:26:06 PM PDT 24	357248235 ps
T179	/workspace/coverage/default/37.sram_ctrl_partial_access.3440270907	Jul 14 07:24:54 PM PDT 24	Jul 14 07:26:00 PM PDT 24	3151603936 ps
T180	/workspace/coverage/default/40.sram_ctrl_mem_walk.1500608883	Jul 14 07:25:10 PM PDT 24	Jul 14 07:30:14 PM PDT 24	5473465561 ps
T181	/workspace/coverage/default/19.sram_ctrl_executable.1592523901	Jul 14 07:23:38 PM PDT 24	Jul 14 07:31:41 PM PDT 24	20295695955 ps
T182	/workspace/coverage/default/21.sram_ctrl_multiple_keys.3803563293	Jul 14 07:23:49 PM PDT 24	Jul 14 07:43:41 PM PDT 24	27391290855 ps
T183	/workspace/coverage/default/1.sram_ctrl_max_throughput.3728093985	Jul 14 07:22:45 PM PDT 24	Jul 14 07:23:51 PM PDT 24	4804012073 ps
T184	/workspace/coverage/default/1.sram_ctrl_multiple_keys.430140406	Jul 14 07:22:57 PM PDT 24	Jul 14 07:33:01 PM PDT 24	77002747125 ps
T185	/workspace/coverage/default/0.sram_ctrl_bijection.2998066134	Jul 14 07:22:49 PM PDT 24	Jul 14 07:48:02 PM PDT 24	21344418806 ps
T186	/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3455509967	Jul 14 07:23:02 PM PDT 24	Jul 14 07:29:51 PM PDT 24	5464457385 ps
T187	/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1248364210	Jul 14 07:25:00 PM PDT 24	Jul 14 07:29:15 PM PDT 24	11417036080 ps
T188	/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3161213302	Jul 14 07:24:18 PM PDT 24	Jul 14 07:27:19 PM PDT 24	15667919068 ps
T189	/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3878726265	Jul 14 07:24:35 PM PDT 24	Jul 14 07:27:12 PM PDT 24	20831278729 ps
T190	/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2394222974	Jul 14 07:23:09 PM PDT 24	Jul 14 07:31:59 PM PDT 24	83839570230 ps
T191	/workspace/coverage/default/31.sram_ctrl_lc_escalation.756097110	Jul 14 07:24:22 PM PDT 24	Jul 14 07:24:53 PM PDT 24	20382903206 ps
T192	/workspace/coverage/default/16.sram_ctrl_regwen.964985396	Jul 14 07:23:27 PM PDT 24	Jul 14 07:29:00 PM PDT 24	1915829354 ps
T193	/workspace/coverage/default/31.sram_ctrl_alert_test.3000888558	Jul 14 07:24:23 PM PDT 24	Jul 14 07:24:25 PM PDT 24	142893800 ps
T194	/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.3810848614	Jul 14 07:23:50 PM PDT 24	Jul 14 07:24:56 PM PDT 24	2970017077 ps
T195	/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.844453832	Jul 14 07:23:02 PM PDT 24	Jul 14 07:26:23 PM PDT 24	1596114077 ps
T196	/workspace/coverage/default/12.sram_ctrl_mem_walk.2572496258	Jul 14 07:23:23 PM PDT 24	Jul 14 07:28:10 PM PDT 24	16422657901 ps
T197	/workspace/coverage/default/27.sram_ctrl_max_throughput.286812194	Jul 14 07:23:59 PM PDT 24	Jul 14 07:24:18 PM PDT 24	700963060 ps
T198	/workspace/coverage/default/4.sram_ctrl_executable.1040395526	Jul 14 07:22:58 PM PDT 24	Jul 14 07:24:39 PM PDT 24	1423461508 ps
T199	/workspace/coverage/default/14.sram_ctrl_bijection.1884268288	Jul 14 07:23:23 PM PDT 24	Jul 14 07:40:28 PM PDT 24	112539044778 ps
T200	/workspace/coverage/default/18.sram_ctrl_stress_pipeline.1021617068	Jul 14 07:23:37 PM PDT 24	Jul 14 07:30:33 PM PDT 24	6026297181 ps
T201	/workspace/coverage/default/12.sram_ctrl_lc_escalation.1075306155	Jul 14 07:23:19 PM PDT 24	Jul 14 07:24:20 PM PDT 24	21705940766 ps
T202	/workspace/coverage/default/39.sram_ctrl_stress_pipeline.3660587012	Jul 14 07:24:59 PM PDT 24	Jul 14 07:29:55 PM PDT 24	28601447074 ps
T21	/workspace/coverage/default/4.sram_ctrl_stress_all.2333115362	Jul 14 07:22:58 PM PDT 24	Jul 14 08:32:34 PM PDT 24	578773370237 ps
T203	/workspace/coverage/default/36.sram_ctrl_mem_partial_access.326021632	Jul 14 07:24:50 PM PDT 24	Jul 14 07:26:09 PM PDT 24	2368567524 ps
T204	/workspace/coverage/default/11.sram_ctrl_partial_access.2172977110	Jul 14 07:23:10 PM PDT 24	Jul 14 07:23:55 PM PDT 24	9321038563 ps
T205	/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.594974811	Jul 14 07:25:52 PM PDT 24	Jul 14 07:31:39 PM PDT 24	66007500967 ps
T206	/workspace/coverage/default/13.sram_ctrl_executable.258521800	Jul 14 07:23:21 PM PDT 24	Jul 14 07:28:31 PM PDT 24	24225639428 ps
T207	/workspace/coverage/default/17.sram_ctrl_lc_escalation.4108507439	Jul 14 07:23:36 PM PDT 24	Jul 14 07:24:58 PM PDT 24	52068495640 ps
T208	/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4071567119	Jul 14 07:26:11 PM PDT 24	Jul 14 07:26:18 PM PDT 24	4452624762 ps
T209	/workspace/coverage/default/20.sram_ctrl_multiple_keys.2149928552	Jul 14 07:23:38 PM PDT 24	Jul 14 07:44:28 PM PDT 24	36318504551 ps
T210	/workspace/coverage/default/28.sram_ctrl_access_during_key_req.4071621849	Jul 14 07:24:03 PM PDT 24	Jul 14 07:28:26 PM PDT 24	5504596782 ps
T211	/workspace/coverage/default/11.sram_ctrl_mem_partial_access.344038011	Jul 14 07:23:12 PM PDT 24	Jul 14 07:26:24 PM PDT 24	4950807493 ps
T212	/workspace/coverage/default/35.sram_ctrl_smoke.1113016159	Jul 14 07:24:39 PM PDT 24	Jul 14 07:24:57 PM PDT 24	3233424126 ps
T213	/workspace/coverage/default/7.sram_ctrl_ram_cfg.975373532	Jul 14 07:23:04 PM PDT 24	Jul 14 07:23:35 PM PDT 24	2034916896 ps
T214	/workspace/coverage/default/33.sram_ctrl_mem_walk.3993141331	Jul 14 07:24:38 PM PDT 24	Jul 14 07:28:49 PM PDT 24	4241422001 ps
T215	/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1025481386	Jul 14 07:23:52 PM PDT 24	Jul 14 07:32:49 PM PDT 24	37691697286 ps
T216	/workspace/coverage/default/4.sram_ctrl_mem_walk.4283561420	Jul 14 07:23:04 PM PDT 24	Jul 14 07:26:15 PM PDT 24	27657215996 ps
T217	/workspace/coverage/default/42.sram_ctrl_partial_access.1008187130	Jul 14 07:25:17 PM PDT 24	Jul 14 07:27:41 PM PDT 24	1281769302 ps
T218	/workspace/coverage/default/5.sram_ctrl_lc_escalation.3775463548	Jul 14 07:23:01 PM PDT 24	Jul 14 07:24:38 PM PDT 24	41647876408 ps
T219	/workspace/coverage/default/47.sram_ctrl_alert_test.2631951634	Jul 14 07:26:01 PM PDT 24	Jul 14 07:26:03 PM PDT 24	44630658 ps
T220	/workspace/coverage/default/49.sram_ctrl_smoke.1531860227	Jul 14 07:26:07 PM PDT 24	Jul 14 07:28:17 PM PDT 24	1436800431 ps
T221	/workspace/coverage/default/7.sram_ctrl_stress_all.1948653972	Jul 14 07:23:08 PM PDT 24	Jul 14 09:12:03 PM PDT 24	54106001048 ps
T49	/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1658003863	Jul 14 07:22:48 PM PDT 24	Jul 14 07:24:34 PM PDT 24	3188551569 ps
T222	/workspace/coverage/default/8.sram_ctrl_regwen.2135133022	Jul 14 07:23:09 PM PDT 24	Jul 14 07:25:15 PM PDT 24	987332912 ps
T223	/workspace/coverage/default/20.sram_ctrl_bijection.3497970239	Jul 14 07:23:38 PM PDT 24	Jul 14 07:49:41 PM PDT 24	87305687613 ps
T133	/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2414499713	Jul 14 07:22:47 PM PDT 24	Jul 14 07:26:17 PM PDT 24	16808954960 ps
T224	/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1261259442	Jul 14 07:23:45 PM PDT 24	Jul 14 07:30:38 PM PDT 24	5821278587 ps
T225	/workspace/coverage/default/23.sram_ctrl_mem_walk.2309639079	Jul 14 07:23:50 PM PDT 24	Jul 14 07:29:07 PM PDT 24	10506628769 ps
T226	/workspace/coverage/default/17.sram_ctrl_smoke.3822664194	Jul 14 07:23:37 PM PDT 24	Jul 14 07:23:56 PM PDT 24	358433161 ps
T227	/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3026612448	Jul 14 07:23:41 PM PDT 24	Jul 14 07:29:19 PM PDT 24	34963876564 ps
T228	/workspace/coverage/default/39.sram_ctrl_regwen.1338128510	Jul 14 07:25:06 PM PDT 24	Jul 14 07:46:45 PM PDT 24	28547345388 ps
T229	/workspace/coverage/default/40.sram_ctrl_bijection.1635486518	Jul 14 07:25:05 PM PDT 24	Jul 14 07:50:46 PM PDT 24	89816186572 ps
T230	/workspace/coverage/default/1.sram_ctrl_smoke.3976451369	Jul 14 07:22:52 PM PDT 24	Jul 14 07:23:32 PM PDT 24	3107436261 ps
T231	/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1765862241	Jul 14 07:23:39 PM PDT 24	Jul 14 07:27:26 PM PDT 24	8363826970 ps
T232	/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1048270708	Jul 14 07:24:22 PM PDT 24	Jul 14 07:24:30 PM PDT 24	673503820 ps
T233	/workspace/coverage/default/9.sram_ctrl_partial_access.1469302006	Jul 14 07:23:08 PM PDT 24	Jul 14 07:23:56 PM PDT 24	1708963865 ps
T234	/workspace/coverage/default/7.sram_ctrl_multiple_keys.1539407139	Jul 14 07:23:09 PM PDT 24	Jul 14 07:37:38 PM PDT 24	74895750174 ps
T235	/workspace/coverage/default/42.sram_ctrl_regwen.3966654123	Jul 14 07:25:21 PM PDT 24	Jul 14 07:37:17 PM PDT 24	21990444310 ps
T236	/workspace/coverage/default/11.sram_ctrl_stress_all.2721176484	Jul 14 07:23:18 PM PDT 24	Jul 14 08:21:09 PM PDT 24	129712078842 ps
T237	/workspace/coverage/default/17.sram_ctrl_regwen.3580050299	Jul 14 07:23:40 PM PDT 24	Jul 14 07:27:25 PM PDT 24	2295837172 ps
T238	/workspace/coverage/default/5.sram_ctrl_stress_all.810324587	Jul 14 07:23:02 PM PDT 24	Jul 14 08:45:38 PM PDT 24	2117518055714 ps
T239	/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3924479196	Jul 14 07:25:46 PM PDT 24	Jul 14 07:25:59 PM PDT 24	278972321 ps
T240	/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2998734168	Jul 14 07:23:09 PM PDT 24	Jul 14 07:24:57 PM PDT 24	3173516916 ps
T241	/workspace/coverage/default/19.sram_ctrl_regwen.3558025918	Jul 14 07:23:49 PM PDT 24	Jul 14 07:25:52 PM PDT 24	3647463954 ps
T242	/workspace/coverage/default/14.sram_ctrl_partial_access.3772669625	Jul 14 07:23:38 PM PDT 24	Jul 14 07:25:33 PM PDT 24	1345834828 ps
T243	/workspace/coverage/default/26.sram_ctrl_executable.2698734163	Jul 14 07:23:57 PM PDT 24	Jul 14 07:30:51 PM PDT 24	6623511886 ps
T244	/workspace/coverage/default/16.sram_ctrl_alert_test.3324753337	Jul 14 07:23:31 PM PDT 24	Jul 14 07:23:50 PM PDT 24	17001184 ps
T245	/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3624364538	Jul 14 07:25:37 PM PDT 24	Jul 14 07:28:38 PM PDT 24	16059340488 ps
T246	/workspace/coverage/default/33.sram_ctrl_regwen.3517612269	Jul 14 07:24:34 PM PDT 24	Jul 14 07:28:20 PM PDT 24	2603889944 ps
T247	/workspace/coverage/default/12.sram_ctrl_stress_all.270702208	Jul 14 07:23:14 PM PDT 24	Jul 14 07:46:55 PM PDT 24	15561713272 ps
T248	/workspace/coverage/default/30.sram_ctrl_stress_pipeline.3697087492	Jul 14 07:24:13 PM PDT 24	Jul 14 07:29:59 PM PDT 24	21791118358 ps
T249	/workspace/coverage/default/3.sram_ctrl_bijection.3902286746	Jul 14 07:22:55 PM PDT 24	Jul 14 08:00:43 PM PDT 24	30494943808 ps
T250	/workspace/coverage/default/2.sram_ctrl_alert_test.3299359770	Jul 14 07:22:53 PM PDT 24	Jul 14 07:23:21 PM PDT 24	15479704 ps
T251	/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3326760686	Jul 14 07:22:51 PM PDT 24	Jul 14 07:27:22 PM PDT 24	7882418050 ps
T252	/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2258932346	Jul 14 07:23:37 PM PDT 24	Jul 14 07:29:47 PM PDT 24	5512299576 ps
T253	/workspace/coverage/default/15.sram_ctrl_max_throughput.1857074777	Jul 14 07:23:27 PM PDT 24	Jul 14 07:23:53 PM PDT 24	2568923089 ps
T254	/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2057385799	Jul 14 07:25:21 PM PDT 24	Jul 14 07:28:41 PM PDT 24	1302562551 ps
T255	/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3252222643	Jul 14 07:23:49 PM PDT 24	Jul 14 07:24:19 PM PDT 24	721075390 ps
T256	/workspace/coverage/default/30.sram_ctrl_smoke.950766924	Jul 14 07:24:12 PM PDT 24	Jul 14 07:24:25 PM PDT 24	392920606 ps
T257	/workspace/coverage/default/37.sram_ctrl_max_throughput.975697303	Jul 14 07:24:54 PM PDT 24	Jul 14 07:26:43 PM PDT 24	1716196942 ps
T258	/workspace/coverage/default/2.sram_ctrl_executable.81995550	Jul 14 07:23:00 PM PDT 24	Jul 14 07:29:21 PM PDT 24	7971600409 ps
T259	/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.735917614	Jul 14 07:23:39 PM PDT 24	Jul 14 07:25:26 PM PDT 24	3457429026 ps
T260	/workspace/coverage/default/42.sram_ctrl_bijection.1691680577	Jul 14 07:25:15 PM PDT 24	Jul 14 07:46:48 PM PDT 24	352836748162 ps
T261	/workspace/coverage/default/45.sram_ctrl_ram_cfg.2071642867	Jul 14 07:25:44 PM PDT 24	Jul 14 07:25:47 PM PDT 24	361565993 ps
T262	/workspace/coverage/default/0.sram_ctrl_multiple_keys.119215057	Jul 14 07:22:46 PM PDT 24	Jul 14 07:26:58 PM PDT 24	9211489150 ps
T263	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.4174611786	Jul 14 07:25:08 PM PDT 24	Jul 14 07:27:47 PM PDT 24	820469080 ps
T264	/workspace/coverage/default/45.sram_ctrl_regwen.798660081	Jul 14 07:25:44 PM PDT 24	Jul 14 07:29:53 PM PDT 24	2829338686 ps
T265	/workspace/coverage/default/11.sram_ctrl_executable.1645544499	Jul 14 07:23:16 PM PDT 24	Jul 14 07:47:31 PM PDT 24	135548886356 ps
T266	/workspace/coverage/default/32.sram_ctrl_bijection.976232255	Jul 14 07:24:23 PM PDT 24	Jul 14 07:43:04 PM PDT 24	50745886505 ps
T267	/workspace/coverage/default/19.sram_ctrl_max_throughput.1274958858	Jul 14 07:23:48 PM PDT 24	Jul 14 07:24:50 PM PDT 24	761130202 ps
T268	/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.4161769385	Jul 14 07:23:46 PM PDT 24	Jul 14 07:28:58 PM PDT 24	25358456536 ps
T269	/workspace/coverage/default/48.sram_ctrl_executable.426135019	Jul 14 07:26:02 PM PDT 24	Jul 14 07:34:58 PM PDT 24	5992472389 ps
T270	/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.2392539292	Jul 14 07:23:42 PM PDT 24	Jul 14 07:25:03 PM PDT 24	4299186144 ps
T271	/workspace/coverage/default/22.sram_ctrl_lc_escalation.3817266926	Jul 14 07:23:47 PM PDT 24	Jul 14 07:26:01 PM PDT 24	94763870187 ps
T272	/workspace/coverage/default/3.sram_ctrl_multiple_keys.3934180991	Jul 14 07:22:48 PM PDT 24	Jul 14 07:36:54 PM PDT 24	60814481001 ps
T273	/workspace/coverage/default/25.sram_ctrl_executable.3723796588	Jul 14 07:23:50 PM PDT 24	Jul 14 07:36:31 PM PDT 24	34932814163 ps
T274	/workspace/coverage/default/29.sram_ctrl_regwen.4253878456	Jul 14 07:24:20 PM PDT 24	Jul 14 07:38:20 PM PDT 24	25176318631 ps
T275	/workspace/coverage/default/45.sram_ctrl_multiple_keys.1911765964	Jul 14 07:25:36 PM PDT 24	Jul 14 07:36:37 PM PDT 24	8563136901 ps
T276	/workspace/coverage/default/26.sram_ctrl_bijection.666242370	Jul 14 07:23:59 PM PDT 24	Jul 14 07:52:37 PM PDT 24	138253011950 ps
T277	/workspace/coverage/default/26.sram_ctrl_regwen.1125116864	Jul 14 07:23:59 PM PDT 24	Jul 14 07:40:50 PM PDT 24	70968073086 ps
T278	/workspace/coverage/default/41.sram_ctrl_smoke.4065897665	Jul 14 07:25:10 PM PDT 24	Jul 14 07:26:13 PM PDT 24	1236724526 ps
T279	/workspace/coverage/default/37.sram_ctrl_mem_walk.2826184792	Jul 14 07:25:00 PM PDT 24	Jul 14 07:29:17 PM PDT 24	43753001031 ps
T280	/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3590679594	Jul 14 07:22:55 PM PDT 24	Jul 14 07:25:25 PM PDT 24	807264022 ps
T281	/workspace/coverage/default/32.sram_ctrl_ram_cfg.3447561981	Jul 14 07:24:28 PM PDT 24	Jul 14 07:24:33 PM PDT 24	1473029999 ps
T282	/workspace/coverage/default/15.sram_ctrl_access_during_key_req.4038421155	Jul 14 07:23:41 PM PDT 24	Jul 14 07:39:40 PM PDT 24	15353583146 ps
T283	/workspace/coverage/default/6.sram_ctrl_multiple_keys.2881869167	Jul 14 07:22:59 PM PDT 24	Jul 14 07:32:16 PM PDT 24	11572184857 ps
T284	/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1510451172	Jul 14 07:22:58 PM PDT 24	Jul 14 07:30:04 PM PDT 24	7626603338 ps
T285	/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3026665975	Jul 14 07:25:11 PM PDT 24	Jul 14 07:31:54 PM PDT 24	7394660054 ps
T286	/workspace/coverage/default/10.sram_ctrl_regwen.3475528307	Jul 14 07:23:17 PM PDT 24	Jul 14 07:41:14 PM PDT 24	13358053987 ps
T287	/workspace/coverage/default/31.sram_ctrl_max_throughput.877350054	Jul 14 07:24:20 PM PDT 24	Jul 14 07:24:31 PM PDT 24	1492610336 ps
T288	/workspace/coverage/default/35.sram_ctrl_mem_partial_access.1515492429	Jul 14 07:24:49 PM PDT 24	Jul 14 07:26:18 PM PDT 24	12697960536 ps
T289	/workspace/coverage/default/6.sram_ctrl_regwen.4062795820	Jul 14 07:23:09 PM PDT 24	Jul 14 07:37:47 PM PDT 24	26838942879 ps
T290	/workspace/coverage/default/38.sram_ctrl_access_during_key_req.1286687900	Jul 14 07:25:01 PM PDT 24	Jul 14 07:33:30 PM PDT 24	10913760528 ps
T134	/workspace/coverage/default/37.sram_ctrl_multiple_keys.704024357	Jul 14 07:24:57 PM PDT 24	Jul 14 07:36:04 PM PDT 24	14062834093 ps
T291	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4146685496	Jul 14 07:25:38 PM PDT 24	Jul 14 07:25:46 PM PDT 24	229631433 ps
T292	/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1831074158	Jul 14 07:26:09 PM PDT 24	Jul 14 07:31:23 PM PDT 24	16263082995 ps
T293	/workspace/coverage/default/22.sram_ctrl_access_during_key_req.1226161781	Jul 14 07:23:52 PM PDT 24	Jul 14 07:44:40 PM PDT 24	15176434332 ps
T294	/workspace/coverage/default/26.sram_ctrl_stress_all.4142264191	Jul 14 07:23:59 PM PDT 24	Jul 14 07:58:02 PM PDT 24	94280231503 ps
T295	/workspace/coverage/default/41.sram_ctrl_ram_cfg.1862739774	Jul 14 07:25:12 PM PDT 24	Jul 14 07:25:16 PM PDT 24	632065952 ps
T296	/workspace/coverage/default/11.sram_ctrl_multiple_keys.1476384014	Jul 14 07:23:08 PM PDT 24	Jul 14 07:41:27 PM PDT 24	19161580368 ps
T297	/workspace/coverage/default/29.sram_ctrl_mem_walk.1181373819	Jul 14 07:24:12 PM PDT 24	Jul 14 07:29:34 PM PDT 24	14414881171 ps
T298	/workspace/coverage/default/9.sram_ctrl_lc_escalation.2283979098	Jul 14 07:23:16 PM PDT 24	Jul 14 07:24:10 PM PDT 24	4334841372 ps
T299	/workspace/coverage/default/31.sram_ctrl_mem_walk.4146834912	Jul 14 07:24:22 PM PDT 24	Jul 14 07:29:38 PM PDT 24	23072881432 ps
T300	/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2058980878	Jul 14 07:25:46 PM PDT 24	Jul 14 07:30:18 PM PDT 24	8801599890 ps
T301	/workspace/coverage/default/30.sram_ctrl_multiple_keys.1074062580	Jul 14 07:24:20 PM PDT 24	Jul 14 07:45:42 PM PDT 24	75826317808 ps
T302	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.666393158	Jul 14 07:23:20 PM PDT 24	Jul 14 07:33:02 PM PDT 24	81232611925 ps
T43	/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2221728540	Jul 14 07:23:13 PM PDT 24	Jul 14 07:24:34 PM PDT 24	4141875886 ps
T303	/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2959893025	Jul 14 07:23:42 PM PDT 24	Jul 14 07:24:39 PM PDT 24	22340890328 ps
T304	/workspace/coverage/default/42.sram_ctrl_ram_cfg.3867803679	Jul 14 07:25:21 PM PDT 24	Jul 14 07:25:26 PM PDT 24	707200168 ps
T305	/workspace/coverage/default/9.sram_ctrl_stress_all.1230773709	Jul 14 07:23:22 PM PDT 24	Jul 14 07:59:06 PM PDT 24	50492892638 ps
T306	/workspace/coverage/default/4.sram_ctrl_lc_escalation.4184635618	Jul 14 07:22:58 PM PDT 24	Jul 14 07:24:29 PM PDT 24	88176014246 ps
T307	/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2430448037	Jul 14 07:24:10 PM PDT 24	Jul 14 07:27:08 PM PDT 24	5858062975 ps
T308	/workspace/coverage/default/40.sram_ctrl_regwen.3539365383	Jul 14 07:25:10 PM PDT 24	Jul 14 07:29:56 PM PDT 24	2137848336 ps