Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1033
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
88.11 88.11 97.06 97.06 82.82 82.82 94.77 94.77 85.71 85.71 89.57 89.57 94.44 94.44 72.39 72.39 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1038565175
92.05 3.94 98.28 1.23 85.31 2.49 95.87 1.10 100.00 14.29 92.65 3.08 95.47 1.02 76.78 4.39 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3999243835
93.75 1.70 98.53 0.25 87.80 2.49 96.90 1.03 100.00 0.00 94.55 1.90 95.47 0.00 83.00 6.22 /workspace/coverage/default/44.sram_ctrl_regwen.2181624165
94.69 0.94 98.69 0.16 88.39 0.59 97.11 0.21 100.00 0.00 95.26 0.71 95.47 0.00 87.93 4.94 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.958572735
95.43 0.74 98.94 0.25 88.39 0.00 98.00 0.90 100.00 0.00 95.50 0.24 95.61 0.15 91.59 3.66 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.200124452
96.13 0.70 99.10 0.16 90.17 1.78 98.76 0.76 100.00 0.00 96.21 0.71 96.20 0.58 92.50 0.91 /workspace/coverage/default/2.sram_ctrl_sec_cm.1439351580
96.45 0.31 99.10 0.00 90.17 0.00 98.76 0.00 100.00 0.00 96.21 0.00 96.20 0.00 94.70 2.19 /workspace/coverage/default/0.sram_ctrl_stress_all.3242743004
96.71 0.26 99.10 0.00 90.40 0.24 98.83 0.07 100.00 0.00 96.21 0.00 97.51 1.32 94.88 0.18 /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.308660195
96.88 0.18 99.10 0.00 90.40 0.00 98.83 0.00 100.00 0.00 96.21 0.00 98.39 0.88 95.25 0.37 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.451420514
97.01 0.13 99.10 0.00 90.40 0.00 98.83 0.00 100.00 0.00 96.21 0.00 99.12 0.73 95.43 0.18 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.220044035
97.14 0.13 99.18 0.08 90.40 0.00 99.66 0.83 100.00 0.00 96.21 0.00 99.12 0.00 95.43 0.00 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2471944746
97.22 0.08 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 95.98 0.55 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3590935070
97.30 0.08 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.53 0.55 /workspace/coverage/default/37.sram_ctrl_executable.3465308410
97.36 0.06 99.18 0.00 90.76 0.36 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.00 96.53 0.00 /workspace/coverage/default/14.sram_ctrl_alert_test.1212862818
97.41 0.05 99.18 0.00 90.76 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.85879034
97.45 0.03 99.18 0.00 91.00 0.24 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.89 0.00 /workspace/coverage/default/0.sram_ctrl_lc_escalation.415855139
97.47 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.4122573581
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.33522507
97.52 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/11.sram_ctrl_regwen.2163742053


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.666910300
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1017782865
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1631194265
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3909983536
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1881732303
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1017925747
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3848315019
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2224382763
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2350190967
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2713272174
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1468776622
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3856174596
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2670115202
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1840057431
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2630689016
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1673218606
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2256471698
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1164584355
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2000507826
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3358359420
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4080541028
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2115877543
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.348078340
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2903328931
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.882962233
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2012369253
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.493949342
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.847015535
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.721988593
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1869962436
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1962900461
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.350637262
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.937588520
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.184724443
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1670413229
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1395887558
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2698276470
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3273631719
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2675998490
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1393752367
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2394892452
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2125543217
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1536816875
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2534001099
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1228778817
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3192248208
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3794502886
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.852612114
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.131661724
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2343256504
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.841710815
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1277110000
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.336459386
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.416882588
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1454200532
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2495654400
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1492373416
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3076645107
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2706594780
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3884078048
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.4058334173
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.89446619
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1802805496
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.690124498
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3119431914
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3877578893
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4293906021
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1008420725
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1587599940
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1928965057
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3477842113
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1370577230
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2160152622
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2175498627
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3639151953
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1774083386
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2757485167
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.488490881
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1543610444
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2749673855
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1405747635
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3659707649
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1689343969
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3615429100
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.636153708
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2673761644
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1030392892
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1350054407
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3209073290
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2091222898
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4248076969
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2223657201
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1642848633
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1891565953
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3035925265
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2752288806
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2884771666
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.871718928
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.469447559
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1580125323
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.250479464
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1873602155
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1678083238
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2865711297
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2163731533
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3924499485
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3477550786
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1035500385
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.931094995
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.343334827
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.4185125696
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3872385263
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.4167875902
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.214503059
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3009554304
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1817074912
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2866217850
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1528494212
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.649496038
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2899920036
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.949297523
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3816005893
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2822143959
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3485725426
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.60161756
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.532148090
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.765953973
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3865909132
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3315809894
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.4100442598
/workspace/coverage/default/0.sram_ctrl_alert_test.1335982082
/workspace/coverage/default/0.sram_ctrl_bijection.1090867410
/workspace/coverage/default/0.sram_ctrl_executable.4130880158
/workspace/coverage/default/0.sram_ctrl_max_throughput.2850911863
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.279580569
/workspace/coverage/default/0.sram_ctrl_mem_walk.284822476
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3602969517
/workspace/coverage/default/0.sram_ctrl_partial_access.3195244126
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1188796033
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1913732849
/workspace/coverage/default/0.sram_ctrl_regwen.509597888
/workspace/coverage/default/0.sram_ctrl_sec_cm.146933094
/workspace/coverage/default/0.sram_ctrl_smoke.706802324
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3395865982
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.696207791
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3752041065
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2875007395
/workspace/coverage/default/1.sram_ctrl_alert_test.3693235034
/workspace/coverage/default/1.sram_ctrl_bijection.388660924
/workspace/coverage/default/1.sram_ctrl_executable.2443390462
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1432267308
/workspace/coverage/default/1.sram_ctrl_max_throughput.1238494605
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.588658176
/workspace/coverage/default/1.sram_ctrl_mem_walk.286462386
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2289895625
/workspace/coverage/default/1.sram_ctrl_partial_access.2786049470
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.208252232
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3259143972
/workspace/coverage/default/1.sram_ctrl_regwen.1088100224
/workspace/coverage/default/1.sram_ctrl_sec_cm.581266741
/workspace/coverage/default/1.sram_ctrl_smoke.1980414079
/workspace/coverage/default/1.sram_ctrl_stress_all.547227779
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.432557947
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2561090854
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.405586800
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.568651755
/workspace/coverage/default/10.sram_ctrl_alert_test.2566141051
/workspace/coverage/default/10.sram_ctrl_bijection.1144380900
/workspace/coverage/default/10.sram_ctrl_executable.3899552401
/workspace/coverage/default/10.sram_ctrl_max_throughput.3571914682
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3144660896
/workspace/coverage/default/10.sram_ctrl_mem_walk.3110930556
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3542963250
/workspace/coverage/default/10.sram_ctrl_partial_access.673657230
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3553369686
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1577243020
/workspace/coverage/default/10.sram_ctrl_regwen.1838423527
/workspace/coverage/default/10.sram_ctrl_smoke.4180084380
/workspace/coverage/default/10.sram_ctrl_stress_all.70765916
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.584856454
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3758698884
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3870209773
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2639237604
/workspace/coverage/default/11.sram_ctrl_alert_test.3364923534
/workspace/coverage/default/11.sram_ctrl_bijection.2737419603
/workspace/coverage/default/11.sram_ctrl_executable.140903158
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2360255757
/workspace/coverage/default/11.sram_ctrl_max_throughput.2317400978
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2885556806
/workspace/coverage/default/11.sram_ctrl_mem_walk.2919420814
/workspace/coverage/default/11.sram_ctrl_multiple_keys.376638395
/workspace/coverage/default/11.sram_ctrl_partial_access.769278401
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2819526549
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2938496499
/workspace/coverage/default/11.sram_ctrl_smoke.321839642
/workspace/coverage/default/11.sram_ctrl_stress_all.4049019068
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3159780932
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1832633616
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.694736605
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1555034450
/workspace/coverage/default/12.sram_ctrl_alert_test.3843071458
/workspace/coverage/default/12.sram_ctrl_bijection.1322702723
/workspace/coverage/default/12.sram_ctrl_executable.1582173783
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2915067278
/workspace/coverage/default/12.sram_ctrl_max_throughput.610485285
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2148595462
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/workspace/coverage/default/43.sram_ctrl_alert_test.2336087748
/workspace/coverage/default/43.sram_ctrl_executable.2837707205
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2655093455
/workspace/coverage/default/43.sram_ctrl_max_throughput.1573914117
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.839589979
/workspace/coverage/default/43.sram_ctrl_mem_walk.1734249827
/workspace/coverage/default/43.sram_ctrl_multiple_keys.4075185089
/workspace/coverage/default/43.sram_ctrl_partial_access.102315721
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.337435664
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3063421108
/workspace/coverage/default/43.sram_ctrl_regwen.1305553631
/workspace/coverage/default/43.sram_ctrl_smoke.1166436642
/workspace/coverage/default/43.sram_ctrl_stress_all.1988805908
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3689556299
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.588905599
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4202135711
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1624189128
/workspace/coverage/default/44.sram_ctrl_alert_test.1422696644
/workspace/coverage/default/44.sram_ctrl_bijection.1313045580
/workspace/coverage/default/44.sram_ctrl_executable.4084954532
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3319180162
/workspace/coverage/default/44.sram_ctrl_max_throughput.91162879
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1039636342
/workspace/coverage/default/44.sram_ctrl_mem_walk.1968480105
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2479037759
/workspace/coverage/default/44.sram_ctrl_partial_access.2491593581
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1510958585
/workspace/coverage/default/44.sram_ctrl_ram_cfg.459615965
/workspace/coverage/default/44.sram_ctrl_smoke.2035638599
/workspace/coverage/default/44.sram_ctrl_stress_all.13650494
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3437347541
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2786719692
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2196510905
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4131497436
/workspace/coverage/default/45.sram_ctrl_alert_test.3955735498
/workspace/coverage/default/45.sram_ctrl_bijection.2332775013
/workspace/coverage/default/45.sram_ctrl_executable.2877999998
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3228036608
/workspace/coverage/default/45.sram_ctrl_max_throughput.132493566
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1849847951
/workspace/coverage/default/45.sram_ctrl_mem_walk.3411393792
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4188739528
/workspace/coverage/default/45.sram_ctrl_partial_access.2958759495
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.830915544
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2502691247
/workspace/coverage/default/45.sram_ctrl_regwen.907682316
/workspace/coverage/default/45.sram_ctrl_smoke.750858430
/workspace/coverage/default/45.sram_ctrl_stress_all.962152861
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2973686401
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2049149246
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2898875756
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1043543349
/workspace/coverage/default/46.sram_ctrl_alert_test.2711961095
/workspace/coverage/default/46.sram_ctrl_bijection.880634287
/workspace/coverage/default/46.sram_ctrl_executable.1059107782
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2467772263
/workspace/coverage/default/46.sram_ctrl_max_throughput.987019854
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1125848941
/workspace/coverage/default/46.sram_ctrl_mem_walk.3901365485
/workspace/coverage/default/46.sram_ctrl_multiple_keys.94852375
/workspace/coverage/default/46.sram_ctrl_partial_access.733504030
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1683870541
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2600169682
/workspace/coverage/default/46.sram_ctrl_regwen.366838305
/workspace/coverage/default/46.sram_ctrl_smoke.4194365021
/workspace/coverage/default/46.sram_ctrl_stress_all.3823622342
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1456033623
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3966594673
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1155699191
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.4151407686
/workspace/coverage/default/47.sram_ctrl_alert_test.3427034080
/workspace/coverage/default/47.sram_ctrl_bijection.398787785
/workspace/coverage/default/47.sram_ctrl_executable.3595318387
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1419958170
/workspace/coverage/default/47.sram_ctrl_max_throughput.3849721737
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2371889224
/workspace/coverage/default/47.sram_ctrl_mem_walk.2030731161
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3026300863
/workspace/coverage/default/47.sram_ctrl_partial_access.122139485
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2676098775
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3385186580
/workspace/coverage/default/47.sram_ctrl_regwen.1502739231
/workspace/coverage/default/47.sram_ctrl_smoke.1099247817
/workspace/coverage/default/47.sram_ctrl_stress_all.2005356976
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2717731778
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3930348434
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.9099043
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1527374784
/workspace/coverage/default/48.sram_ctrl_alert_test.2097153324
/workspace/coverage/default/48.sram_ctrl_bijection.4120219343
/workspace/coverage/default/48.sram_ctrl_executable.1846193345
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2638277534
/workspace/coverage/default/48.sram_ctrl_max_throughput.1076141007
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4112692321
/workspace/coverage/default/48.sram_ctrl_mem_walk.374554580
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2716091155
/workspace/coverage/default/48.sram_ctrl_partial_access.1444268623
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2975437015
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1836674538
/workspace/coverage/default/48.sram_ctrl_regwen.3225234242
/workspace/coverage/default/48.sram_ctrl_smoke.2349937654
/workspace/coverage/default/48.sram_ctrl_stress_all.1211540619
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3044738138
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3160196385
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2929835780
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1332091099
/workspace/coverage/default/49.sram_ctrl_alert_test.1172217522
/workspace/coverage/default/49.sram_ctrl_bijection.55233995
/workspace/coverage/default/49.sram_ctrl_executable.1603882120
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1284589144
/workspace/coverage/default/49.sram_ctrl_max_throughput.3846252003
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2375428972
/workspace/coverage/default/49.sram_ctrl_mem_walk.4153405449
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1642988062
/workspace/coverage/default/49.sram_ctrl_partial_access.4022563606
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3023772771
/workspace/coverage/default/49.sram_ctrl_ram_cfg.580791920
/workspace/coverage/default/49.sram_ctrl_regwen.1797536163
/workspace/coverage/default/49.sram_ctrl_smoke.3922176680
/workspace/coverage/default/49.sram_ctrl_stress_all.1535647386
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3796933856
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1932998042
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1515374438
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2476505056
/workspace/coverage/default/5.sram_ctrl_alert_test.178474367
/workspace/coverage/default/5.sram_ctrl_bijection.1837330344
/workspace/coverage/default/5.sram_ctrl_executable.233163071
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1207679648
/workspace/coverage/default/5.sram_ctrl_max_throughput.417015017
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.832931563
/workspace/coverage/default/5.sram_ctrl_mem_walk.1176520376
/workspace/coverage/default/5.sram_ctrl_multiple_keys.157620251
/workspace/coverage/default/5.sram_ctrl_partial_access.3753564788
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3296401836
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3792011732
/workspace/coverage/default/5.sram_ctrl_regwen.2024633235
/workspace/coverage/default/5.sram_ctrl_smoke.2635414916
/workspace/coverage/default/5.sram_ctrl_stress_all.4112993933
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.759855884
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2409774941
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2119704729
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2474823507
/workspace/coverage/default/6.sram_ctrl_alert_test.2398886305
/workspace/coverage/default/6.sram_ctrl_bijection.2475214909
/workspace/coverage/default/6.sram_ctrl_executable.4229050585
/workspace/coverage/default/6.sram_ctrl_lc_escalation.4194940384
/workspace/coverage/default/6.sram_ctrl_max_throughput.4068671457
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1144586851
/workspace/coverage/default/6.sram_ctrl_mem_walk.744563859
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1149625114
/workspace/coverage/default/6.sram_ctrl_partial_access.1973640883
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2502475559
/workspace/coverage/default/6.sram_ctrl_ram_cfg.186257564
/workspace/coverage/default/6.sram_ctrl_regwen.3850293654
/workspace/coverage/default/6.sram_ctrl_smoke.225627991
/workspace/coverage/default/6.sram_ctrl_stress_all.1869343775
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1774051554
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1567291658
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.85762858
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.17116347
/workspace/coverage/default/7.sram_ctrl_alert_test.1572225174
/workspace/coverage/default/7.sram_ctrl_executable.1747471699
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1290617897
/workspace/coverage/default/7.sram_ctrl_max_throughput.3420402828
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2691787896
/workspace/coverage/default/7.sram_ctrl_mem_walk.4048374554
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3506636494
/workspace/coverage/default/7.sram_ctrl_partial_access.3498975592
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2757831613
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3516606711
/workspace/coverage/default/7.sram_ctrl_regwen.982458241
/workspace/coverage/default/7.sram_ctrl_smoke.2226050012
/workspace/coverage/default/7.sram_ctrl_stress_all.2678238422
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3094235832
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1469385379
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4014139004
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.4276826381
/workspace/coverage/default/8.sram_ctrl_alert_test.697300344
/workspace/coverage/default/8.sram_ctrl_bijection.1491167410
/workspace/coverage/default/8.sram_ctrl_executable.4252979113
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2284402932
/workspace/coverage/default/8.sram_ctrl_max_throughput.2694155358
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1912183481
/workspace/coverage/default/8.sram_ctrl_mem_walk.878300912
/workspace/coverage/default/8.sram_ctrl_partial_access.398350527
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1728072059
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3128682545
/workspace/coverage/default/8.sram_ctrl_regwen.64982962
/workspace/coverage/default/8.sram_ctrl_smoke.3521668181
/workspace/coverage/default/8.sram_ctrl_stress_all.3515384509
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2787669838
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1087397515
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3771282760
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.713026765
/workspace/coverage/default/9.sram_ctrl_alert_test.4090105185
/workspace/coverage/default/9.sram_ctrl_bijection.3072632186
/workspace/coverage/default/9.sram_ctrl_executable.702141061
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1338843112
/workspace/coverage/default/9.sram_ctrl_max_throughput.3589915093
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.676838095
/workspace/coverage/default/9.sram_ctrl_mem_walk.492535635
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3351616846
/workspace/coverage/default/9.sram_ctrl_partial_access.871293378
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4127107865
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1218639894
/workspace/coverage/default/9.sram_ctrl_regwen.1116835227
/workspace/coverage/default/9.sram_ctrl_smoke.3049428809
/workspace/coverage/default/9.sram_ctrl_stress_all.3132618603
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3235439381
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1343067566
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2706395070




Total test records in report: 1033
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/16.sram_ctrl_bijection.1990463946 Jul 16 07:28:54 PM PDT 24 Jul 16 07:46:13 PM PDT 24 86963387659 ps
T2 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3999243835 Jul 16 07:28:20 PM PDT 24 Jul 16 07:29:09 PM PDT 24 36469325635 ps
T3 /workspace/coverage/default/17.sram_ctrl_executable.2011184465 Jul 16 07:28:49 PM PDT 24 Jul 16 07:36:51 PM PDT 24 13156460254 ps
T4 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1038565175 Jul 16 07:31:52 PM PDT 24 Jul 16 07:32:40 PM PDT 24 5943349410 ps
T8 /workspace/coverage/default/10.sram_ctrl_multiple_keys.3542963250 Jul 16 07:28:17 PM PDT 24 Jul 16 07:41:39 PM PDT 24 28576466007 ps
T9 /workspace/coverage/default/0.sram_ctrl_alert_test.1335982082 Jul 16 07:27:54 PM PDT 24 Jul 16 07:28:08 PM PDT 24 20764805 ps
T10 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.182875475 Jul 16 07:30:43 PM PDT 24 Jul 16 07:33:46 PM PDT 24 25562471411 ps
T11 /workspace/coverage/default/32.sram_ctrl_smoke.3492985555 Jul 16 07:30:30 PM PDT 24 Jul 16 07:32:24 PM PDT 24 5464688874 ps
T12 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1912183481 Jul 16 07:28:12 PM PDT 24 Jul 16 07:29:51 PM PDT 24 5687423218 ps
T13 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2074207646 Jul 16 07:31:27 PM PDT 24 Jul 16 07:36:58 PM PDT 24 10208679813 ps
T38 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1538556250 Jul 16 07:29:01 PM PDT 24 Jul 16 07:36:25 PM PDT 24 5476957230 ps
T40 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.3011207003 Jul 16 07:28:38 PM PDT 24 Jul 16 07:34:58 PM PDT 24 8433082908 ps
T19 /workspace/coverage/default/32.sram_ctrl_bijection.1206517240 Jul 16 07:30:28 PM PDT 24 Jul 16 07:58:31 PM PDT 24 99737521665 ps
T26 /workspace/coverage/default/11.sram_ctrl_regwen.2163742053 Jul 16 07:28:21 PM PDT 24 Jul 16 07:42:23 PM PDT 24 2542498367 ps
T59 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.4013150247 Jul 16 07:29:01 PM PDT 24 Jul 16 07:35:14 PM PDT 24 6170725564 ps
T77 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.694736605 Jul 16 07:28:21 PM PDT 24 Jul 16 07:30:18 PM PDT 24 3043989896 ps
T76 /workspace/coverage/default/22.sram_ctrl_multiple_keys.2609305163 Jul 16 07:28:56 PM PDT 24 Jul 16 07:39:29 PM PDT 24 5985690904 ps
T21 /workspace/coverage/default/1.sram_ctrl_regwen.1088100224 Jul 16 07:27:55 PM PDT 24 Jul 16 07:32:20 PM PDT 24 19138282994 ps
T22 /workspace/coverage/default/44.sram_ctrl_regwen.2181624165 Jul 16 07:32:17 PM PDT 24 Jul 16 07:57:04 PM PDT 24 203458537596 ps
T5 /workspace/coverage/default/40.sram_ctrl_stress_all.2466184279 Jul 16 07:31:50 PM PDT 24 Jul 16 07:34:23 PM PDT 24 9022350255 ps
T39 /workspace/coverage/default/28.sram_ctrl_mem_walk.843207784 Jul 16 07:30:12 PM PDT 24 Jul 16 07:33:05 PM PDT 24 10369190878 ps
T23 /workspace/coverage/default/36.sram_ctrl_regwen.3142811309 Jul 16 07:31:27 PM PDT 24 Jul 16 07:39:52 PM PDT 24 18689010000 ps
T14 /workspace/coverage/default/33.sram_ctrl_alert_test.3204774793 Jul 16 07:30:42 PM PDT 24 Jul 16 07:30:48 PM PDT 24 28470787 ps
T131 /workspace/coverage/default/28.sram_ctrl_max_throughput.2653467403 Jul 16 07:29:54 PM PDT 24 Jul 16 07:30:25 PM PDT 24 2952789891 ps
T130 /workspace/coverage/default/26.sram_ctrl_partial_access.510085992 Jul 16 07:29:35 PM PDT 24 Jul 16 07:30:18 PM PDT 24 1232081922 ps
T63 /workspace/coverage/default/41.sram_ctrl_regwen.580162424 Jul 16 07:31:53 PM PDT 24 Jul 16 07:42:05 PM PDT 24 10385103740 ps
T129 /workspace/coverage/default/37.sram_ctrl_executable.3465308410 Jul 16 07:31:26 PM PDT 24 Jul 16 07:43:11 PM PDT 24 171266026987 ps
T132 /workspace/coverage/default/21.sram_ctrl_smoke.4021607839 Jul 16 07:28:58 PM PDT 24 Jul 16 07:29:15 PM PDT 24 772728562 ps
T15 /workspace/coverage/default/31.sram_ctrl_alert_test.1173495938 Jul 16 07:30:27 PM PDT 24 Jul 16 07:30:32 PM PDT 24 14950994 ps
T16 /workspace/coverage/default/43.sram_ctrl_alert_test.2336087748 Jul 16 07:32:17 PM PDT 24 Jul 16 07:32:42 PM PDT 24 55978681 ps
T57 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.972090868 Jul 16 07:29:08 PM PDT 24 Jul 16 07:33:04 PM PDT 24 20607432158 ps
T58 /workspace/coverage/default/46.sram_ctrl_multiple_keys.94852375 Jul 16 07:32:38 PM PDT 24 Jul 16 07:42:19 PM PDT 24 21853869747 ps
T93 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.200124452 Jul 16 07:31:53 PM PDT 24 Jul 16 07:39:59 PM PDT 24 103615339259 ps
T7 /workspace/coverage/default/2.sram_ctrl_sec_cm.1439351580 Jul 16 07:27:53 PM PDT 24 Jul 16 07:28:11 PM PDT 24 420954938 ps
T6 /workspace/coverage/default/1.sram_ctrl_lc_escalation.1432267308 Jul 16 07:27:54 PM PDT 24 Jul 16 07:28:58 PM PDT 24 31966711365 ps
T27 /workspace/coverage/default/49.sram_ctrl_ram_cfg.580791920 Jul 16 07:33:28 PM PDT 24 Jul 16 07:33:54 PM PDT 24 623380063 ps
T32 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2148595462 Jul 16 07:28:40 PM PDT 24 Jul 16 07:31:32 PM PDT 24 12085425225 ps
T33 /workspace/coverage/default/28.sram_ctrl_regwen.1728943033 Jul 16 07:30:12 PM PDT 24 Jul 16 07:41:43 PM PDT 24 5999648978 ps
T28 /workspace/coverage/default/34.sram_ctrl_ram_cfg.3982136417 Jul 16 07:31:00 PM PDT 24 Jul 16 07:31:07 PM PDT 24 1764980718 ps
T34 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1713020955 Jul 16 07:28:59 PM PDT 24 Jul 16 07:35:04 PM PDT 24 15636595960 ps
T35 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.3160196385 Jul 16 07:33:08 PM PDT 24 Jul 16 07:40:44 PM PDT 24 59553498343 ps
T36 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.2786719692 Jul 16 07:32:25 PM PDT 24 Jul 16 07:36:54 PM PDT 24 74094992822 ps
T37 /workspace/coverage/default/3.sram_ctrl_smoke.672449682 Jul 16 07:27:55 PM PDT 24 Jul 16 07:28:29 PM PDT 24 1894004942 ps
T123 /workspace/coverage/default/9.sram_ctrl_alert_test.4090105185 Jul 16 07:28:21 PM PDT 24 Jul 16 07:28:36 PM PDT 24 46238806 ps
T24 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2484548890 Jul 16 07:29:00 PM PDT 24 Jul 16 07:30:54 PM PDT 24 8289505530 ps
T133 /workspace/coverage/default/26.sram_ctrl_max_throughput.2090792228 Jul 16 07:29:36 PM PDT 24 Jul 16 07:31:57 PM PDT 24 6370197720 ps
T134 /workspace/coverage/default/0.sram_ctrl_max_throughput.2850911863 Jul 16 07:27:55 PM PDT 24 Jul 16 07:28:43 PM PDT 24 913998867 ps
T25 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.4008103257 Jul 16 07:31:00 PM PDT 24 Jul 16 07:31:14 PM PDT 24 318929064 ps
T102 /workspace/coverage/default/31.sram_ctrl_executable.3391613387 Jul 16 07:30:11 PM PDT 24 Jul 16 07:44:35 PM PDT 24 15087260050 ps
T20 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1653695763 Jul 16 07:28:48 PM PDT 24 Jul 16 07:30:11 PM PDT 24 12596645198 ps
T81 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.451420514 Jul 16 07:31:00 PM PDT 24 Jul 16 07:33:40 PM PDT 24 5122484017 ps
T44 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1690135125 Jul 16 07:31:52 PM PDT 24 Jul 16 07:32:50 PM PDT 24 907606117 ps
T103 /workspace/coverage/default/22.sram_ctrl_max_throughput.3077840248 Jul 16 07:28:56 PM PDT 24 Jul 16 07:30:02 PM PDT 24 743455472 ps
T29 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3385186580 Jul 16 07:32:49 PM PDT 24 Jul 16 07:33:23 PM PDT 24 2112529891 ps
T104 /workspace/coverage/default/17.sram_ctrl_alert_test.3932379321 Jul 16 07:28:57 PM PDT 24 Jul 16 07:29:09 PM PDT 24 15697278 ps
T105 /workspace/coverage/default/15.sram_ctrl_stress_all.3258617694 Jul 16 07:28:54 PM PDT 24 Jul 16 08:03:54 PM PDT 24 164350090416 ps
T94 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.2206545256 Jul 16 07:31:33 PM PDT 24 Jul 16 07:37:08 PM PDT 24 8000604015 ps
T124 /workspace/coverage/default/19.sram_ctrl_regwen.2673957315 Jul 16 07:28:56 PM PDT 24 Jul 16 07:45:18 PM PDT 24 20217140628 ps
T45 /workspace/coverage/default/35.sram_ctrl_mem_walk.1366604909 Jul 16 07:31:01 PM PDT 24 Jul 16 07:36:18 PM PDT 24 28213534709 ps
T126 /workspace/coverage/default/10.sram_ctrl_executable.3899552401 Jul 16 07:28:19 PM PDT 24 Jul 16 07:39:51 PM PDT 24 66493471415 ps
T135 /workspace/coverage/default/1.sram_ctrl_bijection.388660924 Jul 16 07:27:54 PM PDT 24 Jul 16 07:42:26 PM PDT 24 37792870786 ps
T136 /workspace/coverage/default/22.sram_ctrl_lc_escalation.2402016266 Jul 16 07:28:55 PM PDT 24 Jul 16 07:29:18 PM PDT 24 1871880169 ps
T137 /workspace/coverage/default/24.sram_ctrl_alert_test.4066623721 Jul 16 07:29:21 PM PDT 24 Jul 16 07:29:32 PM PDT 24 43334358 ps
T138 /workspace/coverage/default/6.sram_ctrl_executable.4229050585 Jul 16 07:28:10 PM PDT 24 Jul 16 07:42:56 PM PDT 24 31692651968 ps
T139 /workspace/coverage/default/32.sram_ctrl_ram_cfg.3976579548 Jul 16 07:30:29 PM PDT 24 Jul 16 07:30:37 PM PDT 24 1764443650 ps
T46 /workspace/coverage/default/31.sram_ctrl_mem_walk.3829819281 Jul 16 07:30:26 PM PDT 24 Jul 16 07:33:09 PM PDT 24 7223819472 ps
T140 /workspace/coverage/default/7.sram_ctrl_multiple_keys.3506636494 Jul 16 07:28:12 PM PDT 24 Jul 16 07:42:24 PM PDT 24 18364817138 ps
T125 /workspace/coverage/default/40.sram_ctrl_executable.362429217 Jul 16 07:31:57 PM PDT 24 Jul 16 07:53:20 PM PDT 24 23043770265 ps
T127 /workspace/coverage/default/0.sram_ctrl_stress_all.3242743004 Jul 16 07:27:52 PM PDT 24 Jul 16 09:11:27 PM PDT 24 350341084573 ps
T141 /workspace/coverage/default/4.sram_ctrl_partial_access.4052442351 Jul 16 07:28:05 PM PDT 24 Jul 16 07:28:31 PM PDT 24 1033408589 ps
T142 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.158494052 Jul 16 07:29:52 PM PDT 24 Jul 16 07:36:20 PM PDT 24 28119393255 ps
T64 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.220044035 Jul 16 07:30:28 PM PDT 24 Jul 16 07:30:59 PM PDT 24 3764883984 ps
T143 /workspace/coverage/default/7.sram_ctrl_max_throughput.3420402828 Jul 16 07:28:09 PM PDT 24 Jul 16 07:28:34 PM PDT 24 719838674 ps
T47 /workspace/coverage/default/36.sram_ctrl_mem_walk.3608602932 Jul 16 07:31:33 PM PDT 24 Jul 16 07:36:33 PM PDT 24 5777222306 ps
T128 /workspace/coverage/default/13.sram_ctrl_regwen.709288526 Jul 16 07:28:39 PM PDT 24 Jul 16 07:42:02 PM PDT 24 10714351075 ps
T144 /workspace/coverage/default/32.sram_ctrl_max_throughput.2545385700 Jul 16 07:30:26 PM PDT 24 Jul 16 07:31:01 PM PDT 24 715615188 ps
T145 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1359209130 Jul 16 07:28:41 PM PDT 24 Jul 16 07:33:14 PM PDT 24 7912074321 ps
T146 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1683870541 Jul 16 07:32:39 PM PDT 24 Jul 16 07:38:49 PM PDT 24 192515417106 ps
T147 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.2959497561 Jul 16 07:30:11 PM PDT 24 Jul 16 07:32:47 PM PDT 24 10549885132 ps
T148 /workspace/coverage/default/20.sram_ctrl_bijection.3770954214 Jul 16 07:29:00 PM PDT 24 Jul 16 07:54:27 PM PDT 24 66535996327 ps
T149 /workspace/coverage/default/25.sram_ctrl_executable.2588326389 Jul 16 07:29:21 PM PDT 24 Jul 16 07:44:08 PM PDT 24 40322621734 ps
T150 /workspace/coverage/default/33.sram_ctrl_mem_walk.3937267531 Jul 16 07:30:41 PM PDT 24 Jul 16 07:32:53 PM PDT 24 3658945016 ps
T151 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.2686925155 Jul 16 07:27:55 PM PDT 24 Jul 16 07:32:39 PM PDT 24 8355864028 ps
T152 /workspace/coverage/default/47.sram_ctrl_partial_access.122139485 Jul 16 07:32:50 PM PDT 24 Jul 16 07:34:22 PM PDT 24 3627332389 ps
T65 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1774051554 Jul 16 07:28:13 PM PDT 24 Jul 16 07:28:36 PM PDT 24 1077223591 ps
T153 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.588905599 Jul 16 07:32:02 PM PDT 24 Jul 16 07:35:21 PM PDT 24 3167019595 ps
T154 /workspace/coverage/default/24.sram_ctrl_partial_access.3616605284 Jul 16 07:29:12 PM PDT 24 Jul 16 07:29:46 PM PDT 24 3003383344 ps
T155 /workspace/coverage/default/44.sram_ctrl_ram_cfg.459615965 Jul 16 07:32:17 PM PDT 24 Jul 16 07:32:44 PM PDT 24 1352834337 ps
T156 /workspace/coverage/default/27.sram_ctrl_partial_access.3990803182 Jul 16 07:29:55 PM PDT 24 Jul 16 07:30:38 PM PDT 24 740742106 ps
T157 /workspace/coverage/default/11.sram_ctrl_multiple_keys.376638395 Jul 16 07:28:17 PM PDT 24 Jul 16 07:42:23 PM PDT 24 62790366927 ps
T158 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.405586800 Jul 16 07:27:54 PM PDT 24 Jul 16 07:30:38 PM PDT 24 1814919641 ps
T159 /workspace/coverage/default/1.sram_ctrl_partial_access.2786049470 Jul 16 07:27:52 PM PDT 24 Jul 16 07:28:25 PM PDT 24 3651748469 ps
T160 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.451197986 Jul 16 07:28:40 PM PDT 24 Jul 16 07:32:22 PM PDT 24 9133344764 ps
T161 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2350070421 Jul 16 07:29:37 PM PDT 24 Jul 16 07:30:48 PM PDT 24 10896343522 ps
T162 /workspace/coverage/default/14.sram_ctrl_multiple_keys.1615696578 Jul 16 07:28:40 PM PDT 24 Jul 16 07:40:25 PM PDT 24 12884318378 ps
T82 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1651815656 Jul 16 07:29:00 PM PDT 24 Jul 16 07:30:18 PM PDT 24 4015090150 ps
T41 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.4276826381 Jul 16 07:28:14 PM PDT 24 Jul 16 07:37:49 PM PDT 24 9723340860 ps
T163 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.3416845586 Jul 16 07:29:53 PM PDT 24 Jul 16 07:33:26 PM PDT 24 11833626463 ps
T42 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.706706605 Jul 16 07:29:14 PM PDT 24 Jul 16 07:53:17 PM PDT 24 310010486533 ps
T164 /workspace/coverage/default/23.sram_ctrl_max_throughput.3148924767 Jul 16 07:29:10 PM PDT 24 Jul 16 07:30:04 PM PDT 24 3022045687 ps
T48 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2148547701 Jul 16 07:29:36 PM PDT 24 Jul 16 07:31:09 PM PDT 24 6276683291 ps
T165 /workspace/coverage/default/11.sram_ctrl_bijection.2737419603 Jul 16 07:28:21 PM PDT 24 Jul 16 07:51:01 PM PDT 24 77874175384 ps
T49 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1670075974 Jul 16 07:31:28 PM PDT 24 Jul 16 07:32:37 PM PDT 24 1779849012 ps
T166 /workspace/coverage/default/45.sram_ctrl_smoke.750858430 Jul 16 07:32:16 PM PDT 24 Jul 16 07:34:46 PM PDT 24 1062932217 ps
T167 /workspace/coverage/default/28.sram_ctrl_stress_all.3561930463 Jul 16 07:30:10 PM PDT 24 Jul 16 08:24:48 PM PDT 24 46897411096 ps
T106 /workspace/coverage/default/25.sram_ctrl_stress_all.1628232449 Jul 16 07:29:36 PM PDT 24 Jul 16 09:07:00 PM PDT 24 173368762930 ps
T168 /workspace/coverage/default/11.sram_ctrl_lc_escalation.2360255757 Jul 16 07:28:20 PM PDT 24 Jul 16 07:29:23 PM PDT 24 27282969013 ps
T169 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1570039000 Jul 16 07:30:27 PM PDT 24 Jul 16 07:42:49 PM PDT 24 457928144884 ps
T170 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3351616846 Jul 16 07:28:15 PM PDT 24 Jul 16 07:42:23 PM PDT 24 62170167388 ps
T171 /workspace/coverage/default/3.sram_ctrl_lc_escalation.4093081596 Jul 16 07:27:58 PM PDT 24 Jul 16 07:28:31 PM PDT 24 2796046659 ps
T172 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3267104805 Jul 16 07:28:38 PM PDT 24 Jul 16 07:33:36 PM PDT 24 16203926218 ps
T50 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.3208048446 Jul 16 07:29:22 PM PDT 24 Jul 16 07:31:59 PM PDT 24 2435903716 ps
T173 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.606048290 Jul 16 07:28:59 PM PDT 24 Jul 16 07:36:09 PM PDT 24 77608154916 ps
T174 /workspace/coverage/default/21.sram_ctrl_alert_test.358061869 Jul 16 07:29:09 PM PDT 24 Jul 16 07:29:20 PM PDT 24 40120447 ps
T51 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.338388082 Jul 16 07:30:43 PM PDT 24 Jul 16 07:31:23 PM PDT 24 4141400229 ps
T175 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2394079292 Jul 16 07:31:55 PM PDT 24 Jul 16 07:34:35 PM PDT 24 11062088159 ps
T176 /workspace/coverage/default/37.sram_ctrl_multiple_keys.2957844806 Jul 16 07:31:33 PM PDT 24 Jul 16 07:52:49 PM PDT 24 30045611093 ps
T177 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2611155881 Jul 16 07:28:50 PM PDT 24 Jul 16 07:34:08 PM PDT 24 5724333331 ps
T178 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2304657220 Jul 16 07:30:32 PM PDT 24 Jul 16 07:33:56 PM PDT 24 7682924819 ps
T179 /workspace/coverage/default/26.sram_ctrl_multiple_keys.4168543871 Jul 16 07:29:35 PM PDT 24 Jul 16 07:42:15 PM PDT 24 69558178977 ps
T180 /workspace/coverage/default/16.sram_ctrl_executable.2921957265 Jul 16 07:28:54 PM PDT 24 Jul 16 07:41:29 PM PDT 24 44968717340 ps
T181 /workspace/coverage/default/25.sram_ctrl_mem_walk.953195578 Jul 16 07:29:34 PM PDT 24 Jul 16 07:34:51 PM PDT 24 37503837735 ps
T107 /workspace/coverage/default/17.sram_ctrl_stress_all.1482577650 Jul 16 07:28:55 PM PDT 24 Jul 16 08:16:33 PM PDT 24 74162619868 ps
T52 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3015063760 Jul 16 07:28:54 PM PDT 24 Jul 16 07:30:24 PM PDT 24 19828666392 ps
T182 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2907293945 Jul 16 07:27:55 PM PDT 24 Jul 16 07:35:01 PM PDT 24 23814877161 ps
T183 /workspace/coverage/default/35.sram_ctrl_regwen.3694102865 Jul 16 07:30:59 PM PDT 24 Jul 16 07:45:24 PM PDT 24 74567159330 ps
T184 /workspace/coverage/default/26.sram_ctrl_smoke.1455673858 Jul 16 07:29:34 PM PDT 24 Jul 16 07:29:58 PM PDT 24 4670725831 ps
T185 /workspace/coverage/default/40.sram_ctrl_multiple_keys.4183286896 Jul 16 07:31:52 PM PDT 24 Jul 16 07:42:22 PM PDT 24 39014225741 ps
T186 /workspace/coverage/default/14.sram_ctrl_alert_test.1212862818 Jul 16 07:28:39 PM PDT 24 Jul 16 07:28:50 PM PDT 24 25275380 ps
T187 /workspace/coverage/default/44.sram_ctrl_mem_walk.1968480105 Jul 16 07:32:17 PM PDT 24 Jul 16 07:35:10 PM PDT 24 2635525833 ps
T188 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.4100442598 Jul 16 07:27:55 PM PDT 24 Jul 16 07:35:05 PM PDT 24 11346427728 ps
T189 /workspace/coverage/default/3.sram_ctrl_alert_test.1868503879 Jul 16 07:27:53 PM PDT 24 Jul 16 07:28:07 PM PDT 24 12224858 ps
T66 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.514409833 Jul 16 07:28:00 PM PDT 24 Jul 16 07:29:27 PM PDT 24 4543665404 ps
T190 /workspace/coverage/default/11.sram_ctrl_alert_test.3364923534 Jul 16 07:28:37 PM PDT 24 Jul 16 07:28:48 PM PDT 24 56824659 ps
T91 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.4151407686 Jul 16 07:32:58 PM PDT 24 Jul 16 07:46:58 PM PDT 24 42313906969 ps
T191 /workspace/coverage/default/49.sram_ctrl_multiple_keys.1642988062 Jul 16 07:33:16 PM PDT 24 Jul 16 07:45:00 PM PDT 24 17536253545 ps
T192 /workspace/coverage/default/28.sram_ctrl_multiple_keys.867008134 Jul 16 07:29:56 PM PDT 24 Jul 16 07:41:22 PM PDT 24 24308679584 ps
T193 /workspace/coverage/default/48.sram_ctrl_regwen.3225234242 Jul 16 07:33:16 PM PDT 24 Jul 16 07:53:51 PM PDT 24 49977630045 ps
T194 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1797307691 Jul 16 07:28:56 PM PDT 24 Jul 16 07:29:53 PM PDT 24 5269948702 ps
T195 /workspace/coverage/default/42.sram_ctrl_executable.2593884633 Jul 16 07:32:09 PM PDT 24 Jul 16 07:38:20 PM PDT 24 17354396633 ps
T53 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2455108414 Jul 16 07:29:53 PM PDT 24 Jul 16 07:31:50 PM PDT 24 12769769084 ps
T196 /workspace/coverage/default/2.sram_ctrl_bijection.1563160104 Jul 16 07:27:56 PM PDT 24 Jul 16 07:40:37 PM PDT 24 92708001270 ps
T97 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2958246551 Jul 16 07:29:35 PM PDT 24 Jul 16 07:29:52 PM PDT 24 366718417 ps
T197 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3395865982 Jul 16 07:27:50 PM PDT 24 Jul 16 07:31:32 PM PDT 24 5150360139 ps
T198 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2294371825 Jul 16 07:30:31 PM PDT 24 Jul 16 07:31:41 PM PDT 24 2478270890 ps
T199 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.9099043 Jul 16 07:32:49 PM PDT 24 Jul 16 07:34:01 PM PDT 24 6735940778 ps
T200 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.85762858 Jul 16 07:28:05 PM PDT 24 Jul 16 07:29:43 PM PDT 24 789308855 ps
T201 /workspace/coverage/default/15.sram_ctrl_regwen.325445132 Jul 16 07:28:41 PM PDT 24 Jul 16 07:37:35 PM PDT 24 2791906878 ps
T202 /workspace/coverage/default/45.sram_ctrl_max_throughput.132493566 Jul 16 07:32:37 PM PDT 24 Jul 16 07:34:30 PM PDT 24 766373353 ps
T92 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.17116347 Jul 16 07:28:11 PM PDT 24 Jul 16 07:33:18 PM PDT 24 13286350251 ps
T203 /workspace/coverage/default/40.sram_ctrl_max_throughput.3937859586 Jul 16 07:31:49 PM PDT 24 Jul 16 07:32:14 PM PDT 24 2907049361 ps
T204 /workspace/coverage/default/15.sram_ctrl_mem_walk.2876370189 Jul 16 07:28:48 PM PDT 24 Jul 16 07:35:11 PM PDT 24 44005358024 ps
T83 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.3113134791 Jul 16 07:29:35 PM PDT 24 Jul 16 07:32:35 PM PDT 24 5523303496 ps
T205 /workspace/coverage/default/0.sram_ctrl_multiple_keys.3602969517 Jul 16 07:27:43 PM PDT 24 Jul 16 08:11:23 PM PDT 24 90775160738 ps
T206 /workspace/coverage/default/48.sram_ctrl_mem_walk.374554580 Jul 16 07:33:16 PM PDT 24 Jul 16 07:38:22 PM PDT 24 21882319010 ps
T207 /workspace/coverage/default/45.sram_ctrl_alert_test.3955735498 Jul 16 07:32:37 PM PDT 24 Jul 16 07:33:09 PM PDT 24 15436952 ps
T208 /workspace/coverage/default/4.sram_ctrl_executable.2798613090 Jul 16 07:28:04 PM PDT 24 Jul 16 07:30:52 PM PDT 24 16012642237 ps
T209 /workspace/coverage/default/38.sram_ctrl_mem_walk.3478588137 Jul 16 07:31:50 PM PDT 24 Jul 16 07:34:31 PM PDT 24 7000874872 ps
T210 /workspace/coverage/default/7.sram_ctrl_lc_escalation.1290617897 Jul 16 07:28:12 PM PDT 24 Jul 16 07:28:53 PM PDT 24 9240610868 ps
T211 /workspace/coverage/default/11.sram_ctrl_stress_all.4049019068 Jul 16 07:28:41 PM PDT 24 Jul 16 09:08:37 PM PDT 24 242620972245 ps
T212 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1895347347 Jul 16 07:30:43 PM PDT 24 Jul 16 07:31:26 PM PDT 24 1542431255 ps
T213 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.1591388582 Jul 16 07:31:49 PM PDT 24 Jul 16 07:50:27 PM PDT 24 16353372948 ps
T108 /workspace/coverage/default/0.sram_ctrl_lc_escalation.415855139 Jul 16 07:27:57 PM PDT 24 Jul 16 07:28:48 PM PDT 24 11702176295 ps
T214 /workspace/coverage/default/16.sram_ctrl_ram_cfg.44653139 Jul 16 07:28:58 PM PDT 24 Jul 16 07:29:15 PM PDT 24 372633960 ps
T215 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1360239065 Jul 16 07:28:53 PM PDT 24 Jul 16 07:33:13 PM PDT 24 12236647935 ps
T216 /workspace/coverage/default/19.sram_ctrl_multiple_keys.4493537 Jul 16 07:28:56 PM PDT 24 Jul 16 07:41:24 PM PDT 24 33888949333 ps
T217 /workspace/coverage/default/40.sram_ctrl_smoke.1346384563 Jul 16 07:31:51 PM PDT 24 Jul 16 07:33:16 PM PDT 24 1134829908 ps
T218 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1155699191 Jul 16 07:32:50 PM PDT 24 Jul 16 07:34:10 PM PDT 24 856985501 ps
T219 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4014139004 Jul 16 07:28:08 PM PDT 24 Jul 16 07:29:10 PM PDT 24 3896481653 ps
T220 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.431584870 Jul 16 07:29:55 PM PDT 24 Jul 16 07:35:33 PM PDT 24 5286361889 ps
T221 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3796933856 Jul 16 07:33:29 PM PDT 24 Jul 16 07:34:05 PM PDT 24 1477956301 ps
T222 /workspace/coverage/default/17.sram_ctrl_mem_walk.2934657631 Jul 16 07:28:47 PM PDT 24 Jul 16 07:34:23 PM PDT 24 57640747638 ps
T223 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2471944746 Jul 16 07:28:42 PM PDT 24 Jul 16 07:28:57 PM PDT 24 384866514 ps
T98 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1501612001 Jul 16 07:30:09 PM PDT 24 Jul 16 07:31:12 PM PDT 24 12699466191 ps
T224 /workspace/coverage/default/39.sram_ctrl_executable.1176598045 Jul 16 07:31:50 PM PDT 24 Jul 16 07:41:55 PM PDT 24 51466962693 ps
T225 /workspace/coverage/default/48.sram_ctrl_max_throughput.1076141007 Jul 16 07:33:09 PM PDT 24 Jul 16 07:34:26 PM PDT 24 1488565116 ps
T226 /workspace/coverage/default/25.sram_ctrl_bijection.938701553 Jul 16 07:29:22 PM PDT 24 Jul 16 07:51:24 PM PDT 24 37405166450 ps
T227 /workspace/coverage/default/8.sram_ctrl_lc_escalation.2284402932 Jul 16 07:28:07 PM PDT 24 Jul 16 07:29:37 PM PDT 24 43204975166 ps
T228 /workspace/coverage/default/24.sram_ctrl_multiple_keys.1365624900 Jul 16 07:29:09 PM PDT 24 Jul 16 07:40:11 PM PDT 24 8919826087 ps
T229 /workspace/coverage/default/10.sram_ctrl_bijection.1144380900 Jul 16 07:28:21 PM PDT 24 Jul 16 07:49:27 PM PDT 24 18721154908 ps
T230 /workspace/coverage/default/9.sram_ctrl_max_throughput.3589915093 Jul 16 07:28:08 PM PDT 24 Jul 16 07:29:14 PM PDT 24 937611608 ps
T231 /workspace/coverage/default/33.sram_ctrl_max_throughput.248198316 Jul 16 07:30:45 PM PDT 24 Jul 16 07:31:07 PM PDT 24 8776473112 ps
T232 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.2982348426 Jul 16 07:29:55 PM PDT 24 Jul 16 07:45:21 PM PDT 24 10253635305 ps
T233 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2975437015 Jul 16 07:33:10 PM PDT 24 Jul 16 07:39:46 PM PDT 24 60238584608 ps
T234 /workspace/coverage/default/25.sram_ctrl_partial_access.1894230831 Jul 16 07:29:26 PM PDT 24 Jul 16 07:29:43 PM PDT 24 424063825 ps
T235 /workspace/coverage/default/10.sram_ctrl_regwen.1838423527 Jul 16 07:28:20 PM PDT 24 Jul 16 07:34:15 PM PDT 24 6935208939 ps
T236 /workspace/coverage/default/44.sram_ctrl_stress_all.13650494 Jul 16 07:32:15 PM PDT 24 Jul 16 09:48:30 PM PDT 24 684982401433 ps
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T238 /workspace/coverage/default/3.sram_ctrl_ram_cfg.2620658824 Jul 16 07:27:58 PM PDT 24 Jul 16 07:28:14 PM PDT 24 356460353 ps
T239 /workspace/coverage/default/6.sram_ctrl_smoke.225627991 Jul 16 07:28:05 PM PDT 24 Jul 16 07:30:48 PM PDT 24 5243858495 ps
T240 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2092700146 Jul 16 07:27:56 PM PDT 24 Jul 16 07:30:01 PM PDT 24 790083931 ps
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T242 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3175590698 Jul 16 07:30:12 PM PDT 24 Jul 16 07:30:22 PM PDT 24 2242665743 ps
T243 /workspace/coverage/default/7.sram_ctrl_stress_all.2678238422 Jul 16 07:28:14 PM PDT 24 Jul 16 08:01:40 PM PDT 24 53808570840 ps
T244 /workspace/coverage/default/24.sram_ctrl_ram_cfg.409387219 Jul 16 07:29:27 PM PDT 24 Jul 16 07:29:39 PM PDT 24 1364133655 ps
T245 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.2843644453 Jul 16 07:29:28 PM PDT 24 Jul 16 07:53:48 PM PDT 24 25989621134 ps
T246 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1661869435 Jul 16 07:31:27 PM PDT 24 Jul 16 07:35:56 PM PDT 24 12467122644 ps
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T248 /workspace/coverage/default/39.sram_ctrl_ram_cfg.2760646067 Jul 16 07:31:52 PM PDT 24 Jul 16 07:32:08 PM PDT 24 795250832 ps
T43 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3159076861 Jul 16 07:28:54 PM PDT 24 Jul 16 07:29:40 PM PDT 24 2545484077 ps
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T250 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.789361319 Jul 16 07:30:13 PM PDT 24 Jul 16 07:31:30 PM PDT 24 1395173946 ps
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T252 /workspace/coverage/default/36.sram_ctrl_multiple_keys.331817128 Jul 16 07:31:27 PM PDT 24 Jul 16 07:39:56 PM PDT 24 28638778072 ps
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T255 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.588658176 Jul 16 07:27:58 PM PDT 24 Jul 16 07:29:28 PM PDT 24 9449924543 ps
T256 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.1855060918 Jul 16 07:29:08 PM PDT 24 Jul 16 07:30:32 PM PDT 24 1445285968 ps
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T258 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.1263428328 Jul 16 07:28:51 PM PDT 24 Jul 16 07:33:30 PM PDT 24 4629251867 ps
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T261 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1535586014 Jul 16 07:28:49 PM PDT 24 Jul 16 07:29:21 PM PDT 24 837539285 ps
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T263 /workspace/coverage/default/6.sram_ctrl_partial_access.1973640883 Jul 16 07:28:11 PM PDT 24 Jul 16 07:29:18 PM PDT 24 843487605 ps
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T268 /workspace/coverage/default/38.sram_ctrl_bijection.904272388 Jul 16 07:31:29 PM PDT 24 Jul 16 07:52:02 PM PDT 24 72403333975 ps
T269 /workspace/coverage/default/38.sram_ctrl_executable.3172965924 Jul 16 07:31:33 PM PDT 24 Jul 16 07:35:27 PM PDT 24 10190137092 ps
T270 /workspace/coverage/default/26.sram_ctrl_bijection.1523471510 Jul 16 07:29:36 PM PDT 24 Jul 16 07:56:30 PM PDT 24 70585494873 ps
T271 /workspace/coverage/default/42.sram_ctrl_smoke.3872715755 Jul 16 07:32:10 PM PDT 24 Jul 16 07:33:06 PM PDT 24 1012976100 ps
T272 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3553571062 Jul 16 07:30:28 PM PDT 24 Jul 16 07:32:43 PM PDT 24 14499337223 ps
T273 /workspace/coverage/default/10.sram_ctrl_ram_cfg.1577243020 Jul 16 07:28:21 PM PDT 24 Jul 16 07:28:38 PM PDT 24 356361493 ps
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T277 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.830915544 Jul 16 07:32:39 PM PDT 24 Jul 16 07:41:24 PM PDT 24 87749619429 ps
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T281 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.2158393920 Jul 16 07:30:41 PM PDT 24 Jul 16 07:43:25 PM PDT 24 13464489662 ps
T282 /workspace/coverage/default/41.sram_ctrl_bijection.2865555961 Jul 16 07:31:53 PM PDT 24 Jul 16 07:54:48 PM PDT 24 20009179152 ps
T283 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1832633616 Jul 16 07:28:20 PM PDT 24 Jul 16 07:33:06 PM PDT 24 5116582092 ps
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T285 /workspace/coverage/default/22.sram_ctrl_bijection.940481574 Jul 16 07:29:02 PM PDT 24 Jul 16 07:45:24 PM PDT 24 277555914378 ps
T286 /workspace/coverage/default/4.sram_ctrl_ram_cfg.3742754943 Jul 16 07:28:05 PM PDT 24 Jul 16 07:28:22 PM PDT 24 1533666115 ps
T287 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1245443911 Jul 16 07:29:55 PM PDT 24 Jul 16 07:36:43 PM PDT 24 16571018437 ps
T288 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3771282760 Jul 16 07:28:12 PM PDT 24 Jul 16 07:28:54 PM PDT 24 751583586 ps
T289 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2788446340 Jul 16 07:29:34 PM PDT 24 Jul 16 07:31:30 PM PDT 24 7502576976 ps
T290 /workspace/coverage/default/49.sram_ctrl_mem_walk.4153405449 Jul 16 07:33:29 PM PDT 24 Jul 16 07:39:22 PM PDT 24 35976254019 ps
T291 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3689556299 Jul 16 07:32:18 PM PDT 24 Jul 16 07:36:14 PM PDT 24 2016138468 ps
T292 /workspace/coverage/default/48.sram_ctrl_multiple_keys.2716091155 Jul 16 07:33:16 PM PDT 24 Jul 16 07:55:59 PM PDT 24 11090299799 ps
T293 /workspace/coverage/default/27.sram_ctrl_lc_escalation.3889295766 Jul 16 07:29:54 PM PDT 24 Jul 16 07:30:31 PM PDT 24 5121218848 ps
T294 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1682645519 Jul 16 07:29:05 PM PDT 24 Jul 16 07:29:46 PM PDT 24 807000069 ps
T295 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.75406388 Jul 16 07:28:35 PM PDT 24 Jul 16 07:29:12 PM PDT 24 3262712302 ps
T296 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1451844090 Jul 16 07:31:31 PM PDT 24 Jul 16 07:34:03 PM PDT 24 4558543456 ps
T297 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.1043543349 Jul 16 07:32:49 PM PDT 24 Jul 16 07:33:50 PM PDT 24 4985095021 ps
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