| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3573029148 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.27509012 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.654472206 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1406066235 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1605272648 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1179439271 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2568157432 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1088191738 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1842399803 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2265167705 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.599585083 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.4241258450 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1412937365 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.61421759 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2502164061 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1445092 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3804412099 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.411398541 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3825323087 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2047887180 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.767557594 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.184858334 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3400759255 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2666406618 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.359588892 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1947406916 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1265145624 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.215012736 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.438017503 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2766588453 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2458835486 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3799081223 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.781360570 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3499523605 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1122047768 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4087313808 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.386496476 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3720858825 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.4011166735 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1019394208 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.244991538 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3481192043 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3502102863 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1186542857 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2158390090 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4256611953 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1200944721 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1934890569 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2950430111 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.96064383 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.215808048 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.762047197 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2555939460 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.555404594 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2718152730 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2199776770 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1070285857 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2452064256 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3124715207 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.509497135 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3968882519 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1797070009 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2716993525 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1727614083 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.220306759 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2959957940 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1480498169 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3903450841 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.559735668 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1859035005 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4285181334 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4099632589 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3462981867 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2282083021 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2452616746 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2446550848 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3454907033 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3706563800 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3849241983 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.342343928 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.824744749 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1071167480 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2372049553 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3841332122 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1111055600 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1235395461 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2438118967 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2769028830 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2895452253 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2779521429 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.37224532 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1552020019 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.10089396 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3225733123 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3429895287 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4060639415 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.756365834 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1567293789 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1621044244 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1648622109 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3480691684 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1734989240 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.365740450 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1337694244 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2595996504 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3630329557 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3276423992 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2697764877 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1632548623 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3323199949 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2513841798 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.810890940 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4155160772 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3928244183 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.114640609 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3134777648 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.920701296 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1076542445 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2990921 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.754495801 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3098659109 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1039133219 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1255436987 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3628000761 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2026277455 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2492881286 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.23843700 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3281527245 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3953643032 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.572991581 |
| /workspace/coverage/default/0.sram_ctrl_bijection.3835404920 |
| /workspace/coverage/default/0.sram_ctrl_executable.948811851 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.3106167131 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.1465047163 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.3611262385 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.4258240515 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.1280355142 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.2709573892 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.432399322 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.1241852187 |
| /workspace/coverage/default/0.sram_ctrl_regwen.3738621435 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.3392275827 |
| /workspace/coverage/default/0.sram_ctrl_smoke.611159183 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.3639001383 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2037790626 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.694420280 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1568021902 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2396113493 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.1262899468 |
| /workspace/coverage/default/1.sram_ctrl_bijection.4014540795 |
| /workspace/coverage/default/1.sram_ctrl_executable.775855885 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.1530566051 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.2120091084 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1577568088 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.1933840171 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.3749344819 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.1136777015 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.619316523 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.2451326643 |
| /workspace/coverage/default/1.sram_ctrl_regwen.1621803458 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.1225715268 |
| /workspace/coverage/default/1.sram_ctrl_smoke.274595698 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.2031865319 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.93602009 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1593969029 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3706773059 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.2114799564 |
| /workspace/coverage/default/10.sram_ctrl_bijection.3152266059 |
| /workspace/coverage/default/10.sram_ctrl_executable.3551938597 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.69164639 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.3848215614 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2139530859 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.1206640145 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.704580728 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.2376128317 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1630973511 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.2926045701 |
| /workspace/coverage/default/10.sram_ctrl_regwen.435626766 |
| /workspace/coverage/default/10.sram_ctrl_smoke.2039261140 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.2385606453 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.3044378790 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3757545065 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.4127107000 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.1607671560 |
| /workspace/coverage/default/11.sram_ctrl_bijection.859973707 |
| /workspace/coverage/default/11.sram_ctrl_executable.1119080472 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.779644363 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.470838328 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.843322121 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.186795013 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.1409032565 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.3692728716 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.1562341309 |
| /workspace/coverage/default/11.sram_ctrl_regwen.108241480 |
| /workspace/coverage/default/11.sram_ctrl_smoke.522515823 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.2795329198 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2880453297 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.547465959 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2258844181 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.2422313651 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.166428664 |
| /workspace/coverage/default/12.sram_ctrl_bijection.4280189579 |
| /workspace/coverage/default/12.sram_ctrl_executable.1881604705 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.855765526 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.3867377251 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.1038554435 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.2349539570 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.2479046129 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.3296294537 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1436994214 |
| /workspace/coverage/default/12.sram_ctrl_regwen.3900693915 |
| /workspace/coverage/default/12.sram_ctrl_smoke.932447720 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.1502035139 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4231037946 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.4086266657 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.4008880400 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2228387665 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.1195753877 |
| /workspace/coverage/default/13.sram_ctrl_bijection.2492194926 |
| /workspace/coverage/default/13.sram_ctrl_executable.3348251893 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.3519287360 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.1464230367 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.3655843417 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.2469155605 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.2276827217 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.1894511514 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3236250018 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.1296455802 |
| /workspace/coverage/default/13.sram_ctrl_regwen.1890182924 |
| /workspace/coverage/default/13.sram_ctrl_smoke.4213591723 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.187308226 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3481458321 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3790231206 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.27182005 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.3502406152 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.3280104388 |
| /workspace/coverage/default/14.sram_ctrl_bijection.3163452976 |
| /workspace/coverage/default/14.sram_ctrl_executable.1887887485 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.636980718 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.2970706680 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.524845215 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.2379752236 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.2580931090 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.2513337045 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2229706937 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.948804957 |
| /workspace/coverage/default/14.sram_ctrl_regwen.3121947245 |
| /workspace/coverage/default/14.sram_ctrl_smoke.2237696818 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.1434542545 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1088241638 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.3779690189 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.717124007 |
| /workspace/coverage/default/15.sram_ctrl_access_during_key_req.711729550 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.3397418615 |
| /workspace/coverage/default/15.sram_ctrl_bijection.1725769973 |
| /workspace/coverage/default/15.sram_ctrl_executable.335245420 |
| /workspace/coverage/default/15.sram_ctrl_max_throughput.2050883862 |
| /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2936678633 |
| /workspace/coverage/default/15.sram_ctrl_mem_walk.3298961510 |
| /workspace/coverage/default/15.sram_ctrl_multiple_keys.1088331849 |
| /workspace/coverage/default/15.sram_ctrl_partial_access.133403038 |
| /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3138474726 |
| /workspace/coverage/default/15.sram_ctrl_ram_cfg.322655275 |
| /workspace/coverage/default/15.sram_ctrl_regwen.1438858132 |
| /workspace/coverage/default/15.sram_ctrl_smoke.3472542151 |
| /workspace/coverage/default/15.sram_ctrl_stress_all.610488591 |
| /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.478110939 |
| /workspace/coverage/default/15.sram_ctrl_stress_pipeline.4100398613 |
| /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2242653172 |
| /workspace/coverage/default/16.sram_ctrl_access_during_key_req.2432026562 |
| /workspace/coverage/default/16.sram_ctrl_alert_test.2839511389 |
| /workspace/coverage/default/16.sram_ctrl_bijection.2901779209 |
| /workspace/coverage/default/16.sram_ctrl_executable.1776666849 |
| /workspace/coverage/default/16.sram_ctrl_lc_escalation.1576902625 |
| /workspace/coverage/default/16.sram_ctrl_max_throughput.2696605201 |
| /workspace/coverage/default/16.sram_ctrl_mem_partial_access.3147345692 |
| /workspace/coverage/default/16.sram_ctrl_mem_walk.2109259361 |
| /workspace/coverage/default/16.sram_ctrl_multiple_keys.1029274722 |
| /workspace/coverage/default/16.sram_ctrl_partial_access.1368917305 |
| /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1464289307 |
| /workspace/coverage/default/16.sram_ctrl_ram_cfg.2753358561 |
| /workspace/coverage/default/16.sram_ctrl_regwen.2698926600 |
| /workspace/coverage/default/16.sram_ctrl_smoke.1586784256 |
| /workspace/coverage/default/16.sram_ctrl_stress_all.936831397 |
| /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3702748330 |
| /workspace/coverage/default/16.sram_ctrl_stress_pipeline.4147042724 |
| /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1169355635 |
| /workspace/coverage/default/17.sram_ctrl_access_during_key_req.701465861 |
| /workspace/coverage/default/17.sram_ctrl_alert_test.1150271522 |
| /workspace/coverage/default/17.sram_ctrl_bijection.1769030873 |
| /workspace/coverage/default/17.sram_ctrl_executable.1588192267 |
| /workspace/coverage/default/17.sram_ctrl_lc_escalation.338835853 |
| /workspace/coverage/default/17.sram_ctrl_max_throughput.965253247 |
| /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3721565778 |
| /workspace/coverage/default/17.sram_ctrl_mem_walk.1352073721 |
| /workspace/coverage/default/17.sram_ctrl_multiple_keys.3381811583 |
| /workspace/coverage/default/17.sram_ctrl_partial_access.304134219 |
| /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2774997031 |
| /workspace/coverage/default/17.sram_ctrl_ram_cfg.1972902897 |
| /workspace/coverage/default/17.sram_ctrl_regwen.2236993074 |
| /workspace/coverage/default/17.sram_ctrl_smoke.3378186308 |
| /workspace/coverage/default/17.sram_ctrl_stress_all.1764449176 |
| /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2974915860 |
| /workspace/coverage/default/17.sram_ctrl_stress_pipeline.4081524040 |
| /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.476799558 |
| /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1649981252 |
| /workspace/coverage/default/18.sram_ctrl_alert_test.1874487373 |
| /workspace/coverage/default/18.sram_ctrl_bijection.3936389272 |
| /workspace/coverage/default/18.sram_ctrl_executable.2723723635 |
| /workspace/coverage/default/18.sram_ctrl_lc_escalation.3686490211 |
| /workspace/coverage/default/18.sram_ctrl_max_throughput.290632806 |
| /workspace/coverage/default/18.sram_ctrl_mem_partial_access.3898533820 |
| /workspace/coverage/default/18.sram_ctrl_mem_walk.599615492 |
| /workspace/coverage/default/18.sram_ctrl_multiple_keys.240316600 |
| /workspace/coverage/default/18.sram_ctrl_partial_access.1377314283 |
| /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3221710405 |
| /workspace/coverage/default/18.sram_ctrl_ram_cfg.3277917529 |
| /workspace/coverage/default/18.sram_ctrl_smoke.1280137024 |
| /workspace/coverage/default/18.sram_ctrl_stress_all.445531827 |
| /workspace/coverage/default/18.sram_ctrl_stress_pipeline.233329790 |
| /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.963517805 |
| /workspace/coverage/default/19.sram_ctrl_access_during_key_req.773620978 |
| /workspace/coverage/default/19.sram_ctrl_bijection.2016927968 |
| /workspace/coverage/default/19.sram_ctrl_executable.2050621772 |
| /workspace/coverage/default/19.sram_ctrl_lc_escalation.4257298389 |
| /workspace/coverage/default/19.sram_ctrl_max_throughput.2286721482 |
| /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1384723606 |
| /workspace/coverage/default/19.sram_ctrl_mem_walk.3489788482 |
| /workspace/coverage/default/19.sram_ctrl_multiple_keys.1490488171 |
| /workspace/coverage/default/19.sram_ctrl_partial_access.1875924111 |
| /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2937801106 |
| /workspace/coverage/default/19.sram_ctrl_ram_cfg.3393019944 |
| /workspace/coverage/default/19.sram_ctrl_regwen.3421891471 |
| /workspace/coverage/default/19.sram_ctrl_smoke.2034895146 |
| /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1214043797 |
| /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2669205040 |
| /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2212681523 |
| /workspace/coverage/default/2.sram_ctrl_access_during_key_req.2633911551 |
| /workspace/coverage/default/2.sram_ctrl_alert_test.1229986211 |
| /workspace/coverage/default/2.sram_ctrl_bijection.1152001074 |
| /workspace/coverage/default/2.sram_ctrl_executable.2453469232 |
| /workspace/coverage/default/2.sram_ctrl_lc_escalation.1634275268 |
| /workspace/coverage/default/2.sram_ctrl_max_throughput.291070354 |
| /workspace/coverage/default/2.sram_ctrl_mem_partial_access.220165500 |
| /workspace/coverage/default/2.sram_ctrl_mem_walk.1327223928 |
| /workspace/coverage/default/2.sram_ctrl_multiple_keys.2791736663 |
| /workspace/coverage/default/2.sram_ctrl_partial_access.2393258526 |
| /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3456172577 |
| /workspace/coverage/default/2.sram_ctrl_ram_cfg.4110554219 |
| /workspace/coverage/default/2.sram_ctrl_regwen.363557299 |
| /workspace/coverage/default/2.sram_ctrl_sec_cm.173812499 |
| /workspace/coverage/default/2.sram_ctrl_smoke.852975984 |
| /workspace/coverage/default/2.sram_ctrl_stress_all.368214893 |
| /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3766897377 |
| /workspace/coverage/default/2.sram_ctrl_stress_pipeline.2583806996 |
| /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.412312785 |
| /workspace/coverage/default/20.sram_ctrl_access_during_key_req.876755782 |
| /workspace/coverage/default/20.sram_ctrl_alert_test.2636985457 |
| /workspace/coverage/default/20.sram_ctrl_bijection.135991682 |
| /workspace/coverage/default/20.sram_ctrl_executable.2831702853 |
| /workspace/coverage/default/20.sram_ctrl_lc_escalation.2219163721 |
| /workspace/coverage/default/20.sram_ctrl_max_throughput.476125255 |
| /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2738735857 |
| /workspace/coverage/default/20.sram_ctrl_mem_walk.3334385227 |
| /workspace/coverage/default/20.sram_ctrl_multiple_keys.4125618389 |
| /workspace/coverage/default/20.sram_ctrl_partial_access.1513366951 |
| /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.155715856 |
| /workspace/coverage/default/20.sram_ctrl_ram_cfg.1931252724 |
| /workspace/coverage/default/20.sram_ctrl_regwen.1744212861 |
| /workspace/coverage/default/20.sram_ctrl_smoke.1360596984 |
| /workspace/coverage/default/20.sram_ctrl_stress_all.4051614048 |
| /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1605177371 |
| /workspace/coverage/default/20.sram_ctrl_stress_pipeline.228919597 |
| /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2138053672 |
| /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1562946741 |
| /workspace/coverage/default/21.sram_ctrl_alert_test.2128615062 |
| /workspace/coverage/default/21.sram_ctrl_bijection.2032172928 |
| /workspace/coverage/default/21.sram_ctrl_executable.3255954602 |
| /workspace/coverage/default/21.sram_ctrl_lc_escalation.3352168276 |
| /workspace/coverage/default/21.sram_ctrl_max_throughput.4185950510 |
| /workspace/coverage/default/21.sram_ctrl_mem_partial_access.1907790041 |
| /workspace/coverage/default/21.sram_ctrl_mem_walk.280152739 |
| /workspace/coverage/default/21.sram_ctrl_multiple_keys.4279096456 |
| /workspace/coverage/default/21.sram_ctrl_partial_access.3929121751 |
| /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.836394720 |
| /workspace/coverage/default/21.sram_ctrl_ram_cfg.3377695680 |
| /workspace/coverage/default/21.sram_ctrl_regwen.1438450282 |
| /workspace/coverage/default/21.sram_ctrl_smoke.3970912192 |
| /workspace/coverage/default/21.sram_ctrl_stress_all.3111265626 |
| /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.935852026 |
| /workspace/coverage/default/21.sram_ctrl_stress_pipeline.3913303939 |
| /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2490653658 |
| /workspace/coverage/default/22.sram_ctrl_access_during_key_req.3949658533 |
| /workspace/coverage/default/22.sram_ctrl_alert_test.2973683913 |
| /workspace/coverage/default/22.sram_ctrl_bijection.3569022434 |
| /workspace/coverage/default/22.sram_ctrl_executable.3803508829 |
| /workspace/coverage/default/22.sram_ctrl_lc_escalation.906439067 |
| /workspace/coverage/default/22.sram_ctrl_max_throughput.773579154 |
| /workspace/coverage/default/22.sram_ctrl_mem_partial_access.1645722809 |
| /workspace/coverage/default/22.sram_ctrl_mem_walk.1329044619 |
| /workspace/coverage/default/22.sram_ctrl_multiple_keys.1990024696 |
| /workspace/coverage/default/22.sram_ctrl_partial_access.3851612825 |
| /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3441983870 |
| /workspace/coverage/default/22.sram_ctrl_ram_cfg.2558613127 |
| /workspace/coverage/default/22.sram_ctrl_regwen.793496346 |
| /workspace/coverage/default/22.sram_ctrl_smoke.3635710106 |
| /workspace/coverage/default/22.sram_ctrl_stress_all.1958909975 |
| /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1084690025 |
| /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3182681102 |
| /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1510358313 |
| /workspace/coverage/default/23.sram_ctrl_access_during_key_req.1661370322 |
| /workspace/coverage/default/23.sram_ctrl_alert_test.3438573344 |
| /workspace/coverage/default/23.sram_ctrl_bijection.1399415124 |
| /workspace/coverage/default/23.sram_ctrl_executable.3289439229 |
| /workspace/coverage/default/23.sram_ctrl_lc_escalation.946539160 |
| /workspace/coverage/default/23.sram_ctrl_max_throughput.2068224241 |
| /workspace/coverage/default/23.sram_ctrl_mem_partial_access.3618747033 |
| /workspace/coverage/default/23.sram_ctrl_mem_walk.3758448371 |
| /workspace/coverage/default/23.sram_ctrl_multiple_keys.278998088 |
| /workspace/coverage/default/23.sram_ctrl_partial_access.3631019843 |
| /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.2058852934 |
| /workspace/coverage/default/23.sram_ctrl_ram_cfg.599652961 |
| /workspace/coverage/default/23.sram_ctrl_regwen.4264027904 |
| /workspace/coverage/default/23.sram_ctrl_smoke.4057018330 |
| /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3634642717 |
| /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1994586845 |
| /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1341385731 |
| /workspace/coverage/default/24.sram_ctrl_access_during_key_req.2363499337 |
| /workspace/coverage/default/24.sram_ctrl_alert_test.4054577133 |
| /workspace/coverage/default/24.sram_ctrl_bijection.1965537448 |
| /workspace/coverage/default/24.sram_ctrl_executable.1121823341 |
| /workspace/coverage/default/24.sram_ctrl_lc_escalation.3740969648 |
| /workspace/coverage/default/24.sram_ctrl_max_throughput.3714162549 |
| /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2079387999 |
| /workspace/coverage/default/24.sram_ctrl_mem_walk.569594976 |
| /workspace/coverage/default/24.sram_ctrl_multiple_keys.3805040052 |
| /workspace/coverage/default/24.sram_ctrl_partial_access.2960660707 |
| /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.9136014 |
| /workspace/coverage/default/24.sram_ctrl_ram_cfg.2380824772 |
| /workspace/coverage/default/24.sram_ctrl_regwen.3049595277 |
| /workspace/coverage/default/24.sram_ctrl_smoke.3989292412 |
| /workspace/coverage/default/24.sram_ctrl_stress_all.3027798944 |
| /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1316013618 |
| /workspace/coverage/default/24.sram_ctrl_stress_pipeline.2227622043 |
| /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.410243460 |
| /workspace/coverage/default/25.sram_ctrl_access_during_key_req.494777338 |
| /workspace/coverage/default/25.sram_ctrl_alert_test.356649313 |
| /workspace/coverage/default/25.sram_ctrl_bijection.3800845091 |
| /workspace/coverage/default/25.sram_ctrl_executable.1443356029 |
| /workspace/coverage/default/25.sram_ctrl_lc_escalation.3504817524 |
| /workspace/coverage/default/25.sram_ctrl_max_throughput.2357856614 |
| /workspace/coverage/default/25.sram_ctrl_mem_walk.2311072524 |
| /workspace/coverage/default/25.sram_ctrl_multiple_keys.370596502 |
| /workspace/coverage/default/25.sram_ctrl_partial_access.2750325807 |
| /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3205371866 |
| /workspace/coverage/default/25.sram_ctrl_ram_cfg.1508658241 |
| /workspace/coverage/default/25.sram_ctrl_regwen.1406369614 |
| /workspace/coverage/default/25.sram_ctrl_smoke.2052593145 |
| /workspace/coverage/default/25.sram_ctrl_stress_all.1302570591 |
| /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1741940870 |
| /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2938179480 |
| /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2511879662 |
| /workspace/coverage/default/26.sram_ctrl_access_during_key_req.2107580078 |
| /workspace/coverage/default/26.sram_ctrl_alert_test.1910607889 |
| /workspace/coverage/default/26.sram_ctrl_bijection.4260681689 |
| /workspace/coverage/default/26.sram_ctrl_executable.339763957 |
| /workspace/coverage/default/26.sram_ctrl_lc_escalation.2116563509 |
| /workspace/coverage/default/26.sram_ctrl_max_throughput.2029878791 |
| /workspace/coverage/default/26.sram_ctrl_mem_partial_access.1761278003 |
| /workspace/coverage/default/26.sram_ctrl_mem_walk.3998787518 |
| /workspace/coverage/default/26.sram_ctrl_multiple_keys.3203813037 |
| /workspace/coverage/default/26.sram_ctrl_partial_access.2667889037 |
| /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1902130496 |
| /workspace/coverage/default/26.sram_ctrl_ram_cfg.4090228415 |
| /workspace/coverage/default/26.sram_ctrl_regwen.1230572719 |
| /workspace/coverage/default/26.sram_ctrl_smoke.1159843305 |
| /workspace/coverage/default/26.sram_ctrl_stress_all.494707489 |
| /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.687324025 |
| /workspace/coverage/default/26.sram_ctrl_stress_pipeline.2490986501 |
| /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1321186178 |
| /workspace/coverage/default/27.sram_ctrl_access_during_key_req.4269446532 |
| /workspace/coverage/default/27.sram_ctrl_alert_test.3638302377 |
| /workspace/coverage/default/27.sram_ctrl_bijection.923878126 |
| /workspace/coverage/default/27.sram_ctrl_executable.204307802 |
| /workspace/coverage/default/27.sram_ctrl_lc_escalation.1536251692 |
| /workspace/coverage/default/27.sram_ctrl_max_throughput.4000207999 |
| /workspace/coverage/default/27.sram_ctrl_mem_partial_access.1198453486 |
| /workspace/coverage/default/27.sram_ctrl_mem_walk.2859510292 |
| /workspace/coverage/default/27.sram_ctrl_multiple_keys.4057611901 |
| /workspace/coverage/default/27.sram_ctrl_partial_access.4232173138 |
| /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1016847488 |
| /workspace/coverage/default/27.sram_ctrl_ram_cfg.4026863269 |
| /workspace/coverage/default/27.sram_ctrl_regwen.2011990294 |
| /workspace/coverage/default/27.sram_ctrl_smoke.2373006369 |
| /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1861534147 |
| /workspace/coverage/default/27.sram_ctrl_stress_pipeline.616764962 |
| /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.553830447 |
| /workspace/coverage/default/28.sram_ctrl_access_during_key_req.559112194 |
| /workspace/coverage/default/28.sram_ctrl_alert_test.2539934015 |
| /workspace/coverage/default/28.sram_ctrl_bijection.1819229079 |
| /workspace/coverage/default/28.sram_ctrl_executable.3948439886 |
| /workspace/coverage/default/28.sram_ctrl_lc_escalation.3939181319 |
| /workspace/coverage/default/28.sram_ctrl_max_throughput.3846719218 |
| /workspace/coverage/default/28.sram_ctrl_mem_partial_access.2029993860 |
| /workspace/coverage/default/28.sram_ctrl_mem_walk.3218018928 |
| /workspace/coverage/default/28.sram_ctrl_multiple_keys.2122948282 |
| /workspace/coverage/default/28.sram_ctrl_partial_access.3882590270 |
| /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1531109052 |
| /workspace/coverage/default/28.sram_ctrl_ram_cfg.3521364819 |
| /workspace/coverage/default/28.sram_ctrl_regwen.1187258331 |
| /workspace/coverage/default/28.sram_ctrl_smoke.1782477266 |
| /workspace/coverage/default/28.sram_ctrl_stress_all.1154496720 |
| /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3814618759 |
| /workspace/coverage/default/28.sram_ctrl_stress_pipeline.4113345948 |
| /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.9329419 |
| /workspace/coverage/default/29.sram_ctrl_access_during_key_req.2989994187 |
| /workspace/coverage/default/29.sram_ctrl_alert_test.1320031875 |
| /workspace/coverage/default/29.sram_ctrl_bijection.4118012891 |
| /workspace/coverage/default/29.sram_ctrl_executable.159096713 |
| /workspace/coverage/default/29.sram_ctrl_lc_escalation.1208055730 |
| /workspace/coverage/default/29.sram_ctrl_max_throughput.3212253515 |
| /workspace/coverage/default/29.sram_ctrl_mem_partial_access.3017340850 |
| /workspace/coverage/default/29.sram_ctrl_mem_walk.1428637351 |
| /workspace/coverage/default/29.sram_ctrl_multiple_keys.723575421 |
| /workspace/coverage/default/29.sram_ctrl_partial_access.4088370140 |
| /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.4058640054 |
| /workspace/coverage/default/29.sram_ctrl_ram_cfg.684757885 |
| /workspace/coverage/default/29.sram_ctrl_regwen.2679936829 |
| /workspace/coverage/default/29.sram_ctrl_smoke.3684478903 |
| /workspace/coverage/default/29.sram_ctrl_stress_all.3765764366 |
| /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2590832312 |
| /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2461141675 |
| /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2071049781 |
| /workspace/coverage/default/3.sram_ctrl_access_during_key_req.2628482748 |
| /workspace/coverage/default/3.sram_ctrl_alert_test.2034977815 |
| /workspace/coverage/default/3.sram_ctrl_bijection.1314711098 |
| /workspace/coverage/default/3.sram_ctrl_executable.72588374 |
| /workspace/coverage/default/3.sram_ctrl_lc_escalation.469639924 |
| /workspace/coverage/default/3.sram_ctrl_max_throughput.2650237258 |
| /workspace/coverage/default/3.sram_ctrl_mem_partial_access.486397450 |
| /workspace/coverage/default/3.sram_ctrl_mem_walk.4200656861 |
| /workspace/coverage/default/3.sram_ctrl_multiple_keys.3813467438 |
| /workspace/coverage/default/3.sram_ctrl_partial_access.1122418992 |
| /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.4102871672 |
| /workspace/coverage/default/3.sram_ctrl_ram_cfg.4247035594 |
| /workspace/coverage/default/3.sram_ctrl_regwen.458513495 |
| /workspace/coverage/default/3.sram_ctrl_smoke.1094573806 |
| /workspace/coverage/default/3.sram_ctrl_stress_all.522210661 |
| /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3821920291 |
| /workspace/coverage/default/3.sram_ctrl_stress_pipeline.4053420599 |
| /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.990752097 |
| /workspace/coverage/default/30.sram_ctrl_access_during_key_req.1024700256 |
| /workspace/coverage/default/30.sram_ctrl_alert_test.184607784 |
| /workspace/coverage/default/30.sram_ctrl_executable.1625494481 |
| /workspace/coverage/default/30.sram_ctrl_lc_escalation.277532674 |
| /workspace/coverage/default/30.sram_ctrl_max_throughput.2025830676 |
| /workspace/coverage/default/30.sram_ctrl_mem_partial_access.783860376 |
| /workspace/coverage/default/30.sram_ctrl_mem_walk.4146511386 |
| /workspace/coverage/default/30.sram_ctrl_multiple_keys.2106125195 |
| /workspace/coverage/default/30.sram_ctrl_partial_access.2610646852 |
| /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1182492276 |
| /workspace/coverage/default/30.sram_ctrl_ram_cfg.2768779512 |
| /workspace/coverage/default/30.sram_ctrl_regwen.1828171643 |
| /workspace/coverage/default/30.sram_ctrl_smoke.299057765 |
| /workspace/coverage/default/30.sram_ctrl_stress_all.3697858154 |
| /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1116442457 |
| /workspace/coverage/default/30.sram_ctrl_stress_pipeline.29466823 |
| /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3518414262 |
| /workspace/coverage/default/31.sram_ctrl_access_during_key_req.3429239059 |
| /workspace/coverage/default/31.sram_ctrl_alert_test.140978601 |
| /workspace/coverage/default/31.sram_ctrl_bijection.2750378440 |
| /workspace/coverage/default/31.sram_ctrl_executable.724481499 |
| /workspace/coverage/default/31.sram_ctrl_lc_escalation.1987175956 |
| /workspace/coverage/default/31.sram_ctrl_max_throughput.2702534559 |
| /workspace/coverage/default/31.sram_ctrl_mem_partial_access.4104229712 |
| /workspace/coverage/default/31.sram_ctrl_mem_walk.3101880991 |
| /workspace/coverage/default/31.sram_ctrl_multiple_keys.1831902132 |
| /workspace/coverage/default/31.sram_ctrl_partial_access.1377541811 |
| /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2027998709 |
| /workspace/coverage/default/31.sram_ctrl_ram_cfg.2260329513 |
| /workspace/coverage/default/31.sram_ctrl_regwen.1072262673 |
| /workspace/coverage/default/31.sram_ctrl_smoke.2724901065 |
| /workspace/coverage/default/31.sram_ctrl_stress_all.3848292208 |
| /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1904351698 |
| /workspace/coverage/default/31.sram_ctrl_stress_pipeline.4219276470 |
| /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2364136881 |
| /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3758881962 |
| /workspace/coverage/default/32.sram_ctrl_alert_test.3606086435 |
| /workspace/coverage/default/32.sram_ctrl_bijection.2513169732 |
| /workspace/coverage/default/32.sram_ctrl_executable.1920146469 |
| /workspace/coverage/default/32.sram_ctrl_lc_escalation.3326400085 |
| /workspace/coverage/default/32.sram_ctrl_max_throughput.3532720267 |
| /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3715167437 |
| /workspace/coverage/default/32.sram_ctrl_mem_walk.1887195596 |
| /workspace/coverage/default/32.sram_ctrl_multiple_keys.678870131 |
| /workspace/coverage/default/32.sram_ctrl_partial_access.2746138924 |
| /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1383629534 |
| /workspace/coverage/default/32.sram_ctrl_ram_cfg.1155040568 |
| /workspace/coverage/default/32.sram_ctrl_regwen.2245739110 |
| /workspace/coverage/default/32.sram_ctrl_smoke.2622817006 |
| /workspace/coverage/default/32.sram_ctrl_stress_all.713987752 |
| /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1126849252 |
| /workspace/coverage/default/32.sram_ctrl_stress_pipeline.4145017185 |
| /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2402985009 |
| /workspace/coverage/default/33.sram_ctrl_access_during_key_req.3398818535 |
| /workspace/coverage/default/33.sram_ctrl_alert_test.2756144166 |
| /workspace/coverage/default/33.sram_ctrl_bijection.275473325 |
| /workspace/coverage/default/33.sram_ctrl_executable.3171031376 |
| /workspace/coverage/default/33.sram_ctrl_lc_escalation.3762818381 |
| /workspace/coverage/default/33.sram_ctrl_max_throughput.3331315410 |
| /workspace/coverage/default/33.sram_ctrl_mem_partial_access.4159212853 |
| /workspace/coverage/default/33.sram_ctrl_mem_walk.4058686082 |
| /workspace/coverage/default/33.sram_ctrl_multiple_keys.633824897 |
| /workspace/coverage/default/33.sram_ctrl_partial_access.4292871893 |
| /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2483575240 |
| /workspace/coverage/default/33.sram_ctrl_ram_cfg.334240496 |
| /workspace/coverage/default/33.sram_ctrl_regwen.3887087403 |
| /workspace/coverage/default/33.sram_ctrl_smoke.1880814448 |
| /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3304106731 |
| /workspace/coverage/default/33.sram_ctrl_stress_pipeline.1523539268 |
| /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.2206560852 |
| /workspace/coverage/default/34.sram_ctrl_access_during_key_req.1131390909 |
| /workspace/coverage/default/34.sram_ctrl_alert_test.2813593553 |
| /workspace/coverage/default/34.sram_ctrl_bijection.3334998739 |
| /workspace/coverage/default/34.sram_ctrl_executable.105540474 |
| /workspace/coverage/default/34.sram_ctrl_lc_escalation.3815622067 |
| /workspace/coverage/default/34.sram_ctrl_max_throughput.3742761950 |
| /workspace/coverage/default/34.sram_ctrl_mem_partial_access.3255661120 |
| /workspace/coverage/default/34.sram_ctrl_mem_walk.2871227076 |
| /workspace/coverage/default/34.sram_ctrl_multiple_keys.4076551869 |
| /workspace/coverage/default/34.sram_ctrl_partial_access.879941162 |
| /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3807068307 |
| /workspace/coverage/default/34.sram_ctrl_ram_cfg.3618891027 |
| /workspace/coverage/default/34.sram_ctrl_regwen.2215881176 |
| /workspace/coverage/default/34.sram_ctrl_smoke.2357748407 |
| /workspace/coverage/default/34.sram_ctrl_stress_all.3076759198 |
| /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.980521779 |
| /workspace/coverage/default/34.sram_ctrl_stress_pipeline.3398535276 |
| /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.832099616 |
| /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2152328880 |
| /workspace/coverage/default/35.sram_ctrl_alert_test.3971664829 |
| /workspace/coverage/default/35.sram_ctrl_bijection.3727326886 |
| /workspace/coverage/default/35.sram_ctrl_executable.2639175549 |
| /workspace/coverage/default/35.sram_ctrl_lc_escalation.1935373098 |
| /workspace/coverage/default/35.sram_ctrl_max_throughput.2406947363 |
| /workspace/coverage/default/35.sram_ctrl_mem_partial_access.26525850 |
| /workspace/coverage/default/35.sram_ctrl_mem_walk.3510228043 |
| /workspace/coverage/default/35.sram_ctrl_multiple_keys.1394988363 |
| /workspace/coverage/default/35.sram_ctrl_partial_access.1275029659 |
| /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3836767306 |
| /workspace/coverage/default/35.sram_ctrl_ram_cfg.3765314898 |
| /workspace/coverage/default/35.sram_ctrl_regwen.1483974261 |
| /workspace/coverage/default/35.sram_ctrl_smoke.2268975152 |
| /workspace/coverage/default/35.sram_ctrl_stress_all.3338178778 |
| /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.4038215706 |
| /workspace/coverage/default/35.sram_ctrl_stress_pipeline.1289165310 |
| /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.458358630 |
| /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1537338507 |
| /workspace/coverage/default/36.sram_ctrl_alert_test.3921056541 |
| /workspace/coverage/default/36.sram_ctrl_bijection.1155030643 |
| /workspace/coverage/default/36.sram_ctrl_executable.364379954 |
| /workspace/coverage/default/36.sram_ctrl_lc_escalation.3923029379 |
| /workspace/coverage/default/36.sram_ctrl_max_throughput.1337540874 |
| /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2167376155 |
| /workspace/coverage/default/36.sram_ctrl_mem_walk.520161913 |
| /workspace/coverage/default/36.sram_ctrl_multiple_keys.2517884931 |
| /workspace/coverage/default/36.sram_ctrl_partial_access.3326851849 |
| /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2296786386 |
| /workspace/coverage/default/36.sram_ctrl_ram_cfg.2798988552 |
| /workspace/coverage/default/36.sram_ctrl_regwen.933380856 |
| /workspace/coverage/default/36.sram_ctrl_smoke.2271323102 |
| /workspace/coverage/default/36.sram_ctrl_stress_all.3465952625 |
| /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3520364656 |
| /workspace/coverage/default/36.sram_ctrl_stress_pipeline.1681279580 |
| /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1332130707 |
| /workspace/coverage/default/37.sram_ctrl_access_during_key_req.4024521677 |
| /workspace/coverage/default/37.sram_ctrl_alert_test.1458658406 |
| /workspace/coverage/default/37.sram_ctrl_bijection.1566811433 |
| /workspace/coverage/default/37.sram_ctrl_executable.1718860930 |
| /workspace/coverage/default/37.sram_ctrl_lc_escalation.181797546 |
| /workspace/coverage/default/37.sram_ctrl_max_throughput.2959871527 |
| /workspace/coverage/default/37.sram_ctrl_mem_partial_access.3527605457 |
| /workspace/coverage/default/37.sram_ctrl_mem_walk.1923894978 |
| /workspace/coverage/default/37.sram_ctrl_multiple_keys.2384876578 |
| /workspace/coverage/default/37.sram_ctrl_partial_access.210445819 |
| /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2776665043 |
| /workspace/coverage/default/37.sram_ctrl_ram_cfg.1752013148 |
| /workspace/coverage/default/37.sram_ctrl_regwen.3622214728 |
| /workspace/coverage/default/37.sram_ctrl_smoke.3210571825 |
| /workspace/coverage/default/37.sram_ctrl_stress_all.3357961929 |
| /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.793116952 |
| /workspace/coverage/default/37.sram_ctrl_stress_pipeline.2352489642 |
| /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3438999955 |
| /workspace/coverage/default/38.sram_ctrl_access_during_key_req.3131267064 |
| /workspace/coverage/default/38.sram_ctrl_alert_test.121408774 |
| /workspace/coverage/default/38.sram_ctrl_bijection.974540482 |
| /workspace/coverage/default/38.sram_ctrl_executable.356345006 |
| /workspace/coverage/default/38.sram_ctrl_lc_escalation.2786087889 |
| /workspace/coverage/default/38.sram_ctrl_max_throughput.935797084 |
| /workspace/coverage/default/38.sram_ctrl_mem_partial_access.3191129295 |
| /workspace/coverage/default/38.sram_ctrl_mem_walk.699290079 |
| /workspace/coverage/default/38.sram_ctrl_multiple_keys.3599090289 |
| /workspace/coverage/default/38.sram_ctrl_partial_access.2716680023 |
| /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1822763037 |
| /workspace/coverage/default/38.sram_ctrl_ram_cfg.3745691487 |
| /workspace/coverage/default/38.sram_ctrl_regwen.491010249 |
| /workspace/coverage/default/38.sram_ctrl_smoke.2168075961 |
| /workspace/coverage/default/38.sram_ctrl_stress_all.2838980287 |
| /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.4288776250 |
| /workspace/coverage/default/38.sram_ctrl_stress_pipeline.2226675989 |
| /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1267816889 |
| /workspace/coverage/default/39.sram_ctrl_access_during_key_req.295658467 |
| /workspace/coverage/default/39.sram_ctrl_alert_test.2656316038 |
| /workspace/coverage/default/39.sram_ctrl_bijection.2957693596 |
| /workspace/coverage/default/39.sram_ctrl_executable.1969494896 |
| /workspace/coverage/default/39.sram_ctrl_lc_escalation.3727519439 |
| /workspace/coverage/default/39.sram_ctrl_max_throughput.3240690211 |
| /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1233900562 |
| /workspace/coverage/default/39.sram_ctrl_mem_walk.951266849 |
| /workspace/coverage/default/39.sram_ctrl_multiple_keys.739693412 |
| /workspace/coverage/default/39.sram_ctrl_partial_access.2267161980 |
| /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2467921210 |
| /workspace/coverage/default/39.sram_ctrl_ram_cfg.2206689307 |
| /workspace/coverage/default/39.sram_ctrl_regwen.2396554439 |
| /workspace/coverage/default/39.sram_ctrl_smoke.1563662803 |
| /workspace/coverage/default/39.sram_ctrl_stress_all.669369662 |
| /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2903225777 |
| /workspace/coverage/default/39.sram_ctrl_stress_pipeline.259597588 |
| /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3773461155 |
| /workspace/coverage/default/4.sram_ctrl_access_during_key_req.154777205 |
| /workspace/coverage/default/4.sram_ctrl_alert_test.4039030538 |
| /workspace/coverage/default/4.sram_ctrl_bijection.846732739 |
| /workspace/coverage/default/4.sram_ctrl_executable.2104644724 |
| /workspace/coverage/default/4.sram_ctrl_lc_escalation.325681572 |
| /workspace/coverage/default/4.sram_ctrl_max_throughput.1122428553 |
| /workspace/coverage/default/4.sram_ctrl_mem_partial_access.3571536534 |
| /workspace/coverage/default/4.sram_ctrl_mem_walk.774731165 |
| /workspace/coverage/default/4.sram_ctrl_multiple_keys.3373498318 |
| /workspace/coverage/default/4.sram_ctrl_partial_access.3127791907 |
| /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2782428826 |
| /workspace/coverage/default/4.sram_ctrl_ram_cfg.2487739742 |
| /workspace/coverage/default/4.sram_ctrl_regwen.1920611016 |
| /workspace/coverage/default/4.sram_ctrl_sec_cm.821149725 |
| /workspace/coverage/default/4.sram_ctrl_smoke.1778924918 |
| /workspace/coverage/default/4.sram_ctrl_stress_all.500377749 |
| /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3264447309 |
| /workspace/coverage/default/4.sram_ctrl_stress_pipeline.1926798567 |
| /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1176320320 |
| /workspace/coverage/default/40.sram_ctrl_access_during_key_req.3467090199 |
| /workspace/coverage/default/40.sram_ctrl_alert_test.3762946942 |
| /workspace/coverage/default/40.sram_ctrl_executable.445635792 |
| /workspace/coverage/default/40.sram_ctrl_lc_escalation.4095530125 |
| /workspace/coverage/default/40.sram_ctrl_max_throughput.2548602355 |
| /workspace/coverage/default/40.sram_ctrl_mem_partial_access.3139709792 |
| /workspace/coverage/default/40.sram_ctrl_mem_walk.2655000658 |
| /workspace/coverage/default/40.sram_ctrl_multiple_keys.2958449279 |
| /workspace/coverage/default/40.sram_ctrl_partial_access.3525494453 |
| /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.4256146168 |
| /workspace/coverage/default/40.sram_ctrl_ram_cfg.3412963124 |
| /workspace/coverage/default/40.sram_ctrl_regwen.963519050 |
| /workspace/coverage/default/40.sram_ctrl_smoke.1493974065 |
| /workspace/coverage/default/40.sram_ctrl_stress_all.850005910 |
| /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3340293443 |
| /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3591617580 |
| /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3745565887 |
| /workspace/coverage/default/41.sram_ctrl_access_during_key_req.3124898843 |
| /workspace/coverage/default/41.sram_ctrl_alert_test.1021157844 |
| /workspace/coverage/default/41.sram_ctrl_bijection.4243582059 |
| /workspace/coverage/default/41.sram_ctrl_executable.2783891599 |
| /workspace/coverage/default/41.sram_ctrl_lc_escalation.3364799123 |
| /workspace/coverage/default/41.sram_ctrl_max_throughput.1947172894 |
| /workspace/coverage/default/41.sram_ctrl_mem_partial_access.3822869214 |
| /workspace/coverage/default/41.sram_ctrl_mem_walk.654667910 |
| /workspace/coverage/default/41.sram_ctrl_multiple_keys.1677945024 |
| /workspace/coverage/default/41.sram_ctrl_partial_access.1573942476 |
| /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2976388121 |
| /workspace/coverage/default/41.sram_ctrl_ram_cfg.3510005072 |
| /workspace/coverage/default/41.sram_ctrl_regwen.514620536 |
| /workspace/coverage/default/41.sram_ctrl_smoke.3229250924 |
| /workspace/coverage/default/41.sram_ctrl_stress_all.676046689 |
| /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3298490292 |
| /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3258882864 |
| /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.418374422 |
| /workspace/coverage/default/42.sram_ctrl_access_during_key_req.3839541962 |
| /workspace/coverage/default/42.sram_ctrl_alert_test.2920933995 |
| /workspace/coverage/default/42.sram_ctrl_bijection.2493492220 |
| /workspace/coverage/default/42.sram_ctrl_executable.2433553560 |
| /workspace/coverage/default/42.sram_ctrl_lc_escalation.1205726214 |
| /workspace/coverage/default/42.sram_ctrl_max_throughput.1046973867 |
| /workspace/coverage/default/42.sram_ctrl_mem_partial_access.21795649 |
| /workspace/coverage/default/42.sram_ctrl_mem_walk.2440352963 |
| /workspace/coverage/default/42.sram_ctrl_multiple_keys.3008591720 |
| /workspace/coverage/default/42.sram_ctrl_partial_access.1804148583 |
| /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.82397702 |
| /workspace/coverage/default/42.sram_ctrl_ram_cfg.3889811948 |
| /workspace/coverage/default/42.sram_ctrl_regwen.3612185834 |
| /workspace/coverage/default/42.sram_ctrl_smoke.3191471965 |
| /workspace/coverage/default/42.sram_ctrl_stress_all.1228522087 |
| /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.813932399 |
| /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1150278778 |
| /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1805688092 |
| /workspace/coverage/default/43.sram_ctrl_access_during_key_req.193673789 |
| /workspace/coverage/default/43.sram_ctrl_alert_test.4276931691 |
| /workspace/coverage/default/43.sram_ctrl_bijection.3194008925 |
| /workspace/coverage/default/43.sram_ctrl_executable.1212861426 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.2693322408 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.3378658970 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2973674951 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.1298004787 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.2421449174 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.3869670461 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.694488893 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.2535254203 |
| /workspace/coverage/default/43.sram_ctrl_regwen.2490710275 |
| /workspace/coverage/default/43.sram_ctrl_smoke.3736247289 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.1405040046 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.823321694 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2104431415 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.602611539 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.1292542405 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.4121575397 |
| /workspace/coverage/default/44.sram_ctrl_bijection.685304673 |
| /workspace/coverage/default/44.sram_ctrl_executable.1228542088 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.1497230629 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.114623175 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2410073331 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.3672663921 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.4005013816 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.3874010028 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1290712804 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.1266883748 |
| /workspace/coverage/default/44.sram_ctrl_regwen.959745395 |
| /workspace/coverage/default/44.sram_ctrl_smoke.3237722458 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.3070632195 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.728722371 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.1044174529 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1104533912 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3873391469 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.1274834840 |
| /workspace/coverage/default/45.sram_ctrl_bijection.1978181236 |
| /workspace/coverage/default/45.sram_ctrl_executable.2950856813 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.2399538613 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.4287884122 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.842116065 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.3923535116 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1296003994 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.292479801 |
| /workspace/coverage/default/45.sram_ctrl_regwen.2499378051 |
| /workspace/coverage/default/45.sram_ctrl_smoke.3511398828 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.728689886 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3962286733 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.3735554035 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2497862308 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.3719830353 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.3877995361 |
| /workspace/coverage/default/46.sram_ctrl_bijection.2506553018 |
| /workspace/coverage/default/46.sram_ctrl_executable.2816552463 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.2802988197 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.2718877877 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.3164358423 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.3142809199 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.666201538 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.3453903955 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1993463508 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.3829276043 |
| /workspace/coverage/default/46.sram_ctrl_regwen.2981943319 |
| /workspace/coverage/default/46.sram_ctrl_smoke.1629658004 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.2006343315 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3398865353 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.585471275 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.252439417 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.627574647 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.4135646683 |
| /workspace/coverage/default/47.sram_ctrl_bijection.1351738703 |
| /workspace/coverage/default/47.sram_ctrl_executable.1502653383 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.1560300019 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.1101563490 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.556681973 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.4263770560 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.4201280083 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.3779385471 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.330668621 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.152929713 |
| /workspace/coverage/default/47.sram_ctrl_regwen.1181756411 |
| /workspace/coverage/default/47.sram_ctrl_smoke.4196461644 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.4063913755 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3525847847 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.2489622735 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4174093635 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.2999961081 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.1561493630 |
| /workspace/coverage/default/48.sram_ctrl_bijection.2477307652 |
| /workspace/coverage/default/48.sram_ctrl_executable.2928439636 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.428844378 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.2796852443 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.465595358 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.4047923834 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.3918731586 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.3993850561 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3301414544 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.2928270130 |
| /workspace/coverage/default/48.sram_ctrl_regwen.2926192481 |
| /workspace/coverage/default/48.sram_ctrl_smoke.3598840752 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.2631034086 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1536219020 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.3332577766 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2401463006 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.493535140 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.3641947680 |
| /workspace/coverage/default/49.sram_ctrl_bijection.2346341921 |
| /workspace/coverage/default/49.sram_ctrl_executable.816164177 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.3020306196 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.2471052831 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.3911735794 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.1888798066 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.2432330855 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.2950725421 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.76861661 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.1634265027 |
| /workspace/coverage/default/49.sram_ctrl_regwen.159331505 |
| /workspace/coverage/default/49.sram_ctrl_smoke.3689092880 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4255888108 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1583220384 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.850722913 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.4198444949 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.1355140058 |
| /workspace/coverage/default/5.sram_ctrl_executable.490496988 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.11949179 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.3536640378 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3429596028 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.145553398 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.3455356483 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.1219336365 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3471497399 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.2398040542 |
| /workspace/coverage/default/5.sram_ctrl_regwen.538217781 |
| /workspace/coverage/default/5.sram_ctrl_smoke.1441857074 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.4270355414 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1017018304 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3291960227 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3477223974 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.3837985802 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.718065879 |
| /workspace/coverage/default/6.sram_ctrl_bijection.2923398884 |
| /workspace/coverage/default/6.sram_ctrl_executable.4181893130 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.1405836685 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.3443536944 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2612242809 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.4184872622 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.2724855534 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.98202120 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2724668297 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.332912187 |
| /workspace/coverage/default/6.sram_ctrl_regwen.1458635176 |
| /workspace/coverage/default/6.sram_ctrl_smoke.3991359235 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.1197322414 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.249524904 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.601814004 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4247385866 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.620534566 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.765464003 |
| /workspace/coverage/default/7.sram_ctrl_bijection.1039070234 |
| /workspace/coverage/default/7.sram_ctrl_executable.461160000 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.1806878326 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.2295881162 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1961030805 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.1354324604 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.4231652541 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.3618288235 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3996908734 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.4106101594 |
| /workspace/coverage/default/7.sram_ctrl_regwen.3058646989 |
| /workspace/coverage/default/7.sram_ctrl_smoke.596528792 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.1668005189 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2934127601 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1177792416 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2050393813 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.497078681 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.2348621910 |
| /workspace/coverage/default/8.sram_ctrl_bijection.1140606564 |
| /workspace/coverage/default/8.sram_ctrl_executable.3279540720 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.444018911 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.2453207174 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1193806434 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.468863231 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.3263042910 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.638644494 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1813124518 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.3289626008 |
| /workspace/coverage/default/8.sram_ctrl_regwen.3687467937 |
| /workspace/coverage/default/8.sram_ctrl_smoke.3969897278 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.759491022 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3501193911 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.825159559 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3914135265 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1472351195 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.18388833 |
| /workspace/coverage/default/9.sram_ctrl_bijection.253019367 |
| /workspace/coverage/default/9.sram_ctrl_executable.3774354410 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.1984015789 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.2134761041 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1656645182 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.1812597493 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.1609219792 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.414242343 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2982555977 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.3828123642 |
| /workspace/coverage/default/9.sram_ctrl_regwen.4273128067 |
| /workspace/coverage/default/9.sram_ctrl_smoke.2253410080 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.1468810374 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2864019002 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.3288723519 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1215224068 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1994586845 |
|
|
Jul 22 07:34:21 PM PDT 24 |
Jul 22 07:40:04 PM PDT 24 |
5139617396 ps |
| T2 |
/workspace/coverage/default/20.sram_ctrl_executable.2831702853 |
|
|
Jul 22 07:33:48 PM PDT 24 |
Jul 22 07:56:02 PM PDT 24 |
32042125321 ps |
| T3 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.114623175 |
|
|
Jul 22 07:38:58 PM PDT 24 |
Jul 22 07:39:05 PM PDT 24 |
671048852 ps |
| T4 |
/workspace/coverage/default/48.sram_ctrl_regwen.2926192481 |
|
|
Jul 22 07:40:03 PM PDT 24 |
Jul 22 07:58:24 PM PDT 24 |
23151286344 ps |
| T5 |
/workspace/coverage/default/9.sram_ctrl_partial_access.414242343 |
|
|
Jul 22 07:32:31 PM PDT 24 |
Jul 22 07:33:04 PM PDT 24 |
1240098163 ps |
| T9 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.2295881162 |
|
|
Jul 22 07:32:23 PM PDT 24 |
Jul 22 07:32:44 PM PDT 24 |
11473394986 ps |
| T10 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.3101880991 |
|
|
Jul 22 07:36:03 PM PDT 24 |
Jul 22 07:41:26 PM PDT 24 |
32818599070 ps |
| T11 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.4125618389 |
|
|
Jul 22 07:33:35 PM PDT 24 |
Jul 22 07:39:37 PM PDT 24 |
27044869738 ps |
| T6 |
/workspace/coverage/default/49.sram_ctrl_stress_all.195645152 |
|
|
Jul 22 07:40:21 PM PDT 24 |
Jul 22 09:00:16 PM PDT 24 |
338935912166 ps |
| T12 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.3203813037 |
|
|
Jul 22 07:34:40 PM PDT 24 |
Jul 22 07:36:55 PM PDT 24 |
6418608255 ps |
| T41 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.2791736663 |
|
|
Jul 22 07:32:05 PM PDT 24 |
Jul 22 07:47:19 PM PDT 24 |
43624692707 ps |
| T19 |
/workspace/coverage/default/47.sram_ctrl_bijection.1351738703 |
|
|
Jul 22 07:39:34 PM PDT 24 |
Jul 22 08:17:09 PM PDT 24 |
546235784010 ps |
| T40 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3749344819 |
|
|
Jul 22 07:32:06 PM PDT 24 |
Jul 22 07:35:30 PM PDT 24 |
20726663920 ps |
| T7 |
/workspace/coverage/default/23.sram_ctrl_stress_all.3488573225 |
|
|
Jul 22 07:34:18 PM PDT 24 |
Jul 22 08:43:15 PM PDT 24 |
52901823735 ps |
| T58 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.1490488171 |
|
|
Jul 22 07:33:36 PM PDT 24 |
Jul 22 07:54:45 PM PDT 24 |
46464557249 ps |
| T59 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.3331315410 |
|
|
Jul 22 07:36:17 PM PDT 24 |
Jul 22 07:36:37 PM PDT 24 |
1479182255 ps |
| T92 |
/workspace/coverage/default/1.sram_ctrl_smoke.274595698 |
|
|
Jul 22 07:32:03 PM PDT 24 |
Jul 22 07:34:36 PM PDT 24 |
473955670 ps |
| T70 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.4201280083 |
|
|
Jul 22 07:40:30 PM PDT 24 |
Jul 22 07:44:18 PM PDT 24 |
32400242311 ps |
| T45 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.3822869214 |
|
|
Jul 22 07:38:27 PM PDT 24 |
Jul 22 07:41:01 PM PDT 24 |
3510375575 ps |
| T42 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4198444949 |
|
|
Jul 22 07:32:50 PM PDT 24 |
Jul 22 07:51:56 PM PDT 24 |
11373686155 ps |
| T64 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2474250421 |
|
|
Jul 22 07:39:09 PM PDT 24 |
Jul 22 07:46:08 PM PDT 24 |
41581625756 ps |
| T8 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.3939181319 |
|
|
Jul 22 07:35:23 PM PDT 24 |
Jul 22 07:35:46 PM PDT 24 |
43613863606 ps |
| T20 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1530566051 |
|
|
Jul 22 07:32:37 PM PDT 24 |
Jul 22 07:33:55 PM PDT 24 |
13052379138 ps |
| T65 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1289165310 |
|
|
Jul 22 07:36:44 PM PDT 24 |
Jul 22 07:41:03 PM PDT 24 |
3857071794 ps |
| T66 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.4113345948 |
|
|
Jul 22 07:35:05 PM PDT 24 |
Jul 22 07:41:05 PM PDT 24 |
4807948916 ps |
| T46 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.3489788482 |
|
|
Jul 22 07:33:37 PM PDT 24 |
Jul 22 07:36:20 PM PDT 24 |
35909732320 ps |
| T21 |
/workspace/coverage/default/18.sram_ctrl_regwen.1449432291 |
|
|
Jul 22 07:33:37 PM PDT 24 |
Jul 22 07:41:05 PM PDT 24 |
2984172324 ps |
| T22 |
/workspace/coverage/default/30.sram_ctrl_regwen.1828171643 |
|
|
Jul 22 07:38:48 PM PDT 24 |
Jul 22 07:47:10 PM PDT 24 |
50073390571 ps |
| T163 |
/workspace/coverage/default/40.sram_ctrl_executable.445635792 |
|
|
Jul 22 07:38:06 PM PDT 24 |
Jul 22 07:40:14 PM PDT 24 |
972559804 ps |
| T23 |
/workspace/coverage/default/29.sram_ctrl_stress_all.3765764366 |
|
|
Jul 22 07:35:41 PM PDT 24 |
Jul 22 09:18:34 PM PDT 24 |
268488271189 ps |
| T164 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.2050883862 |
|
|
Jul 22 07:33:00 PM PDT 24 |
Jul 22 07:33:12 PM PDT 24 |
2335432523 ps |
| T151 |
/workspace/coverage/default/9.sram_ctrl_executable.3774354410 |
|
|
Jul 22 07:32:30 PM PDT 24 |
Jul 22 07:44:27 PM PDT 24 |
69533044526 ps |
| T24 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1605177371 |
|
|
Jul 22 07:33:49 PM PDT 24 |
Jul 22 07:34:01 PM PDT 24 |
251446868 ps |
| T50 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2349539570 |
|
|
Jul 22 07:32:38 PM PDT 24 |
Jul 22 07:35:38 PM PDT 24 |
86321304317 ps |
| T78 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2258844181 |
|
|
Jul 22 07:32:25 PM PDT 24 |
Jul 22 07:32:38 PM PDT 24 |
6728193208 ps |
| T79 |
/workspace/coverage/default/39.sram_ctrl_executable.1969494896 |
|
|
Jul 22 07:37:51 PM PDT 24 |
Jul 22 07:55:37 PM PDT 24 |
36249478879 ps |
| T73 |
/workspace/coverage/default/28.sram_ctrl_stress_all.1154496720 |
|
|
Jul 22 07:35:24 PM PDT 24 |
Jul 22 08:25:37 PM PDT 24 |
87496471670 ps |
| T43 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.2152328880 |
|
|
Jul 22 07:36:54 PM PDT 24 |
Jul 22 07:56:49 PM PDT 24 |
10246530974 ps |
| T80 |
/workspace/coverage/default/17.sram_ctrl_bijection.1769030873 |
|
|
Jul 22 07:32:58 PM PDT 24 |
Jul 22 07:53:17 PM PDT 24 |
317237679305 ps |
| T81 |
/workspace/coverage/default/19.sram_ctrl_stress_all.1826671993 |
|
|
Jul 22 07:33:34 PM PDT 24 |
Jul 22 08:46:35 PM PDT 24 |
163189172912 ps |
| T82 |
/workspace/coverage/default/3.sram_ctrl_stress_all.522210661 |
|
|
Jul 22 07:32:12 PM PDT 24 |
Jul 22 08:09:05 PM PDT 24 |
125180081763 ps |
| T83 |
/workspace/coverage/default/10.sram_ctrl_bijection.3152266059 |
|
|
Jul 22 07:32:26 PM PDT 24 |
Jul 22 07:53:53 PM PDT 24 |
97515040544 ps |
| T25 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2739466133 |
|
|
Jul 22 07:33:35 PM PDT 24 |
Jul 22 07:35:30 PM PDT 24 |
29667217967 ps |
| T165 |
/workspace/coverage/default/16.sram_ctrl_partial_access.1368917305 |
|
|
Jul 22 07:32:58 PM PDT 24 |
Jul 22 07:33:27 PM PDT 24 |
2760967596 ps |
| T44 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.3502406152 |
|
|
Jul 22 07:32:49 PM PDT 24 |
Jul 22 07:39:27 PM PDT 24 |
10016914849 ps |
| T135 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.779644363 |
|
|
Jul 22 07:32:29 PM PDT 24 |
Jul 22 07:32:52 PM PDT 24 |
10381749077 ps |
| T152 |
/workspace/coverage/default/36.sram_ctrl_regwen.933380856 |
|
|
Jul 22 07:37:29 PM PDT 24 |
Jul 22 07:56:13 PM PDT 24 |
20060897911 ps |
| T150 |
/workspace/coverage/default/26.sram_ctrl_regwen.1230572719 |
|
|
Jul 22 07:34:55 PM PDT 24 |
Jul 22 07:53:24 PM PDT 24 |
32054344167 ps |
| T158 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.1987175956 |
|
|
Jul 22 07:35:52 PM PDT 24 |
Jul 22 07:36:55 PM PDT 24 |
9209875877 ps |
| T166 |
/workspace/coverage/default/14.sram_ctrl_smoke.2237696818 |
|
|
Jul 22 07:32:59 PM PDT 24 |
Jul 22 07:33:24 PM PDT 24 |
1537442137 ps |
| T167 |
/workspace/coverage/default/47.sram_ctrl_smoke.4196461644 |
|
|
Jul 22 07:39:32 PM PDT 24 |
Jul 22 07:41:47 PM PDT 24 |
5288545882 ps |
| T27 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1634265027 |
|
|
Jul 22 07:40:11 PM PDT 24 |
Jul 22 07:40:14 PM PDT 24 |
355216946 ps |
| T160 |
/workspace/coverage/default/26.sram_ctrl_executable.339763957 |
|
|
Jul 22 07:34:47 PM PDT 24 |
Jul 22 07:38:48 PM PDT 24 |
33460040271 ps |
| T115 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3456172577 |
|
|
Jul 22 07:31:59 PM PDT 24 |
Jul 22 07:37:57 PM PDT 24 |
38133715473 ps |
| T13 |
/workspace/coverage/default/36.sram_ctrl_alert_test.3921056541 |
|
|
Jul 22 07:37:07 PM PDT 24 |
Jul 22 07:37:09 PM PDT 24 |
11010102 ps |
| T136 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.3769333914 |
|
|
Jul 22 07:32:59 PM PDT 24 |
Jul 22 07:34:57 PM PDT 24 |
148650410975 ps |
| T97 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3467090199 |
|
|
Jul 22 07:38:06 PM PDT 24 |
Jul 22 07:57:31 PM PDT 24 |
56039608365 ps |
| T161 |
/workspace/coverage/default/8.sram_ctrl_smoke.3969897278 |
|
|
Jul 22 07:32:26 PM PDT 24 |
Jul 22 07:34:25 PM PDT 24 |
5963756228 ps |
| T116 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.259597588 |
|
|
Jul 22 07:37:37 PM PDT 24 |
Jul 22 07:40:57 PM PDT 24 |
2854993410 ps |
| T159 |
/workspace/coverage/default/42.sram_ctrl_stress_all.1228522087 |
|
|
Jul 22 07:39:01 PM PDT 24 |
Jul 22 08:20:49 PM PDT 24 |
35934588216 ps |
| T162 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.4057611901 |
|
|
Jul 22 07:34:56 PM PDT 24 |
Jul 22 07:47:25 PM PDT 24 |
83202971227 ps |
| T28 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2260329513 |
|
|
Jul 22 07:36:04 PM PDT 24 |
Jul 22 07:36:08 PM PDT 24 |
1786006686 ps |
| T49 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3618747033 |
|
|
Jul 22 07:34:13 PM PDT 24 |
Jul 22 07:36:39 PM PDT 24 |
11625194671 ps |
| T29 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.207658449 |
|
|
Jul 22 07:32:38 PM PDT 24 |
Jul 22 07:32:45 PM PDT 24 |
1405824259 ps |
| T117 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.2669205040 |
|
|
Jul 22 07:33:37 PM PDT 24 |
Jul 22 07:38:18 PM PDT 24 |
8563121506 ps |
| T56 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.599615492 |
|
|
Jul 22 07:33:35 PM PDT 24 |
Jul 22 07:38:27 PM PDT 24 |
5309234597 ps |
| T168 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.832099616 |
|
|
Jul 22 07:36:42 PM PDT 24 |
Jul 22 07:38:02 PM PDT 24 |
9340399708 ps |
| T118 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2226675989 |
|
|
Jul 22 07:37:38 PM PDT 24 |
Jul 22 07:40:23 PM PDT 24 |
8591419328 ps |
| T169 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.1935373098 |
|
|
Jul 22 07:36:56 PM PDT 24 |
Jul 22 07:37:36 PM PDT 24 |
11134231693 ps |
| T170 |
/workspace/coverage/default/39.sram_ctrl_smoke.1563662803 |
|
|
Jul 22 07:37:39 PM PDT 24 |
Jul 22 07:37:56 PM PDT 24 |
1498848926 ps |
| T171 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2432330855 |
|
|
Jul 22 07:40:03 PM PDT 24 |
Jul 22 07:55:42 PM PDT 24 |
49833370158 ps |
| T172 |
/workspace/coverage/default/46.sram_ctrl_smoke.1629658004 |
|
|
Jul 22 07:39:20 PM PDT 24 |
Jul 22 07:39:25 PM PDT 24 |
851634173 ps |
| T16 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.2890498387 |
|
|
Jul 22 07:32:07 PM PDT 24 |
Jul 22 07:32:13 PM PDT 24 |
140929943 ps |
| T32 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2776665043 |
|
|
Jul 22 07:37:21 PM PDT 24 |
Jul 22 07:42:25 PM PDT 24 |
5598571318 ps |
| T33 |
/workspace/coverage/default/41.sram_ctrl_bijection.4243582059 |
|
|
Jul 22 07:38:17 PM PDT 24 |
Jul 22 08:11:14 PM PDT 24 |
296089294073 ps |
| T34 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.965253247 |
|
|
Jul 22 07:33:00 PM PDT 24 |
Jul 22 07:33:13 PM PDT 24 |
1494976388 ps |
| T35 |
/workspace/coverage/default/6.sram_ctrl_regwen.1458635176 |
|
|
Jul 22 07:32:17 PM PDT 24 |
Jul 22 07:52:49 PM PDT 24 |
11032077363 ps |
| T36 |
/workspace/coverage/default/28.sram_ctrl_bijection.1819229079 |
|
|
Jul 22 07:35:05 PM PDT 24 |
Jul 22 08:22:47 PM PDT 24 |
574314600755 ps |
| T37 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2393258526 |
|
|
Jul 22 07:32:03 PM PDT 24 |
Jul 22 07:32:16 PM PDT 24 |
3248480762 ps |
| T38 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.3745691487 |
|
|
Jul 22 07:37:39 PM PDT 24 |
Jul 22 07:37:43 PM PDT 24 |
1256949374 ps |
| T26 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1017018304 |
|
|
Jul 22 07:32:11 PM PDT 24 |
Jul 22 07:32:31 PM PDT 24 |
2882109733 ps |
| T39 |
/workspace/coverage/default/22.sram_ctrl_regwen.793496346 |
|
|
Jul 22 07:34:01 PM PDT 24 |
Jul 22 07:50:52 PM PDT 24 |
29136573376 ps |
| T173 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.1752013148 |
|
|
Jul 22 07:37:24 PM PDT 24 |
Jul 22 07:37:28 PM PDT 24 |
408740687 ps |
| T14 |
/workspace/coverage/default/19.sram_ctrl_alert_test.4284198772 |
|
|
Jul 22 07:33:37 PM PDT 24 |
Jul 22 07:33:41 PM PDT 24 |
26047209 ps |
| T174 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3288723519 |
|
|
Jul 22 07:33:48 PM PDT 24 |
Jul 22 07:36:51 PM PDT 24 |
13728679486 ps |
| T74 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3304106731 |
|
|
Jul 22 07:36:29 PM PDT 24 |
Jul 22 07:36:41 PM PDT 24 |
1163480257 ps |
| T127 |
/workspace/coverage/default/38.sram_ctrl_bijection.974540482 |
|
|
Jul 22 07:37:38 PM PDT 24 |
Jul 22 08:17:27 PM PDT 24 |
33454597709 ps |
| T128 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3745565887 |
|
|
Jul 22 07:38:06 PM PDT 24 |
Jul 22 07:38:36 PM PDT 24 |
3257220506 ps |
| T129 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2242653172 |
|
|
Jul 22 07:32:59 PM PDT 24 |
Jul 22 07:33:20 PM PDT 24 |
14011704997 ps |
| T130 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1593969029 |
|
|
Jul 22 07:32:00 PM PDT 24 |
Jul 22 07:37:25 PM PDT 24 |
34148119377 ps |
| T98 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2633911551 |
|
|
Jul 22 07:32:08 PM PDT 24 |
Jul 22 07:49:43 PM PDT 24 |
38436518061 ps |
| T131 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1465047163 |
|
|
Jul 22 07:32:03 PM PDT 24 |
Jul 22 07:34:25 PM PDT 24 |
776299457 ps |
| T132 |
/workspace/coverage/default/29.sram_ctrl_partial_access.4088370140 |
|
|
Jul 22 07:35:48 PM PDT 24 |
Jul 22 07:36:04 PM PDT 24 |
818305300 ps |
| T133 |
/workspace/coverage/default/45.sram_ctrl_bijection.1978181236 |
|
|
Jul 22 07:39:10 PM PDT 24 |
Jul 22 08:00:33 PM PDT 24 |
124119046177 ps |
| T134 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.9329419 |
|
|
Jul 22 07:38:34 PM PDT 24 |
Jul 22 07:40:29 PM PDT 24 |
2110580973 ps |
| T175 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1536251692 |
|
|
Jul 22 07:34:53 PM PDT 24 |
Jul 22 07:36:04 PM PDT 24 |
11134788279 ps |
| T53 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2469155605 |
|
|
Jul 22 07:32:41 PM PDT 24 |
Jul 22 07:39:07 PM PDT 24 |
69114407702 ps |
| T176 |
/workspace/coverage/default/24.sram_ctrl_bijection.1965537448 |
|
|
Jul 22 07:34:56 PM PDT 24 |
Jul 22 07:57:23 PM PDT 24 |
77865773790 ps |
| T177 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1332130707 |
|
|
Jul 22 07:36:52 PM PDT 24 |
Jul 22 07:39:43 PM PDT 24 |
3187474893 ps |
| T178 |
/workspace/coverage/default/13.sram_ctrl_smoke.4213591723 |
|
|
Jul 22 07:32:38 PM PDT 24 |
Jul 22 07:34:21 PM PDT 24 |
4853217787 ps |
| T179 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4174093635 |
|
|
Jul 22 07:39:46 PM PDT 24 |
Jul 22 07:41:04 PM PDT 24 |
1101045085 ps |
| T54 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.220165500 |
|
|
Jul 22 07:32:08 PM PDT 24 |
Jul 22 07:34:36 PM PDT 24 |
9751141577 ps |
| T180 |
/workspace/coverage/default/31.sram_ctrl_regwen.1072262673 |
|
|
Jul 22 07:36:27 PM PDT 24 |
Jul 22 08:00:44 PM PDT 24 |
4725232634 ps |
| T181 |
/workspace/coverage/default/49.sram_ctrl_bijection.2346341921 |
|
|
Jul 22 07:40:04 PM PDT 24 |
Jul 22 08:25:29 PM PDT 24 |
548369288557 ps |
| T182 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.4090228415 |
|
|
Jul 22 07:35:11 PM PDT 24 |
Jul 22 07:35:15 PM PDT 24 |
347369766 ps |
| T57 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3142809199 |
|
|
Jul 22 07:39:42 PM PDT 24 |
Jul 22 07:42:53 PM PDT 24 |
76891881941 ps |
| T75 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4255888108 |
|
|
Jul 22 07:40:24 PM PDT 24 |
Jul 22 07:40:48 PM PDT 24 |
2740671427 ps |
| T183 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3332577766 |
|
|
Jul 22 07:39:55 PM PDT 24 |
Jul 22 07:47:20 PM PDT 24 |
106549454867 ps |
| T60 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.980521779 |
|
|
Jul 22 07:37:07 PM PDT 24 |
Jul 22 07:37:38 PM PDT 24 |
3768052341 ps |
| T184 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.547465959 |
|
|
Jul 22 07:32:27 PM PDT 24 |
Jul 22 07:35:46 PM PDT 24 |
3306812821 ps |
| T185 |
/workspace/coverage/default/25.sram_ctrl_bijection.3800845091 |
|
|
Jul 22 07:34:28 PM PDT 24 |
Jul 22 07:59:50 PM PDT 24 |
22682267310 ps |
| T186 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.1972902897 |
|
|
Jul 22 07:33:22 PM PDT 24 |
Jul 22 07:33:28 PM PDT 24 |
1366621048 ps |
| T187 |
/workspace/coverage/default/13.sram_ctrl_executable.3348251893 |
|
|
Jul 22 07:32:38 PM PDT 24 |
Jul 22 07:51:57 PM PDT 24 |
87376970283 ps |
| T188 |
/workspace/coverage/default/19.sram_ctrl_partial_access.1875924111 |
|
|
Jul 22 07:33:36 PM PDT 24 |
Jul 22 07:34:08 PM PDT 24 |
676390203 ps |
| T189 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.2440352963 |
|
|
Jul 22 07:38:45 PM PDT 24 |
Jul 22 07:44:49 PM PDT 24 |
37338271681 ps |
| T99 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4172211207 |
|
|
Jul 22 07:33:48 PM PDT 24 |
Jul 22 07:50:49 PM PDT 24 |
62590366074 ps |
| T61 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1116442457 |
|
|
Jul 22 07:35:42 PM PDT 24 |
Jul 22 07:36:30 PM PDT 24 |
1102915487 ps |
| T153 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.76861661 |
|
|
Jul 22 07:40:14 PM PDT 24 |
Jul 22 07:45:15 PM PDT 24 |
106860959228 ps |
| T100 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.154777205 |
|
|
Jul 22 07:32:09 PM PDT 24 |
Jul 22 07:52:16 PM PDT 24 |
14382076218 ps |
| T190 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.233329790 |
|
|
Jul 22 07:33:20 PM PDT 24 |
Jul 22 07:39:32 PM PDT 24 |
23132526269 ps |
| T62 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.249524904 |
|
|
Jul 22 07:34:39 PM PDT 24 |
Jul 22 07:38:32 PM PDT 24 |
9994025706 ps |
| T191 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.948804957 |
|
|
Jul 22 07:32:51 PM PDT 24 |
Jul 22 07:33:01 PM PDT 24 |
1406862879 ps |
| T192 |
/workspace/coverage/default/47.sram_ctrl_stress_all.4063913755 |
|
|
Jul 22 07:40:09 PM PDT 24 |
Jul 22 08:10:42 PM PDT 24 |
526243110311 ps |
| T193 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.4147042724 |
|
|
Jul 22 07:33:01 PM PDT 24 |
Jul 22 07:36:22 PM PDT 24 |
12768643800 ps |
| T194 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.4058686082 |
|
|
Jul 22 07:36:20 PM PDT 24 |
Jul 22 07:39:17 PM PDT 24 |
14425241285 ps |
| T195 |
/workspace/coverage/default/23.sram_ctrl_executable.3289439229 |
|
|
Jul 22 07:34:15 PM PDT 24 |
Jul 22 07:51:24 PM PDT 24 |
12914258253 ps |
| T196 |
/workspace/coverage/default/18.sram_ctrl_stress_all.445531827 |
|
|
Jul 22 07:33:36 PM PDT 24 |
Jul 22 09:11:31 PM PDT 24 |
241085333578 ps |
| T197 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3706773059 |
|
|
Jul 22 07:32:06 PM PDT 24 |
Jul 22 07:33:36 PM PDT 24 |
1618167152 ps |
| T198 |
/workspace/coverage/default/35.sram_ctrl_regwen.1483974261 |
|
|
Jul 22 07:36:55 PM PDT 24 |
Jul 22 07:58:58 PM PDT 24 |
14472392342 ps |
| T199 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.4110554219 |
|
|
Jul 22 07:32:10 PM PDT 24 |
Jul 22 07:32:17 PM PDT 24 |
374498404 ps |
| T15 |
/workspace/coverage/default/4.sram_ctrl_alert_test.4039030538 |
|
|
Jul 22 07:32:17 PM PDT 24 |
Jul 22 07:32:23 PM PDT 24 |
28901211 ps |
| T200 |
/workspace/coverage/default/18.sram_ctrl_smoke.1280137024 |
|
|
Jul 22 07:33:22 PM PDT 24 |
Jul 22 07:33:37 PM PDT 24 |
486301737 ps |
| T201 |
/workspace/coverage/default/18.sram_ctrl_executable.2723723635 |
|
|
Jul 22 07:33:36 PM PDT 24 |
Jul 22 08:01:02 PM PDT 24 |
71456740644 ps |
| T202 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.2406947363 |
|
|
Jul 22 07:36:54 PM PDT 24 |
Jul 22 07:39:53 PM PDT 24 |
4029371672 ps |
| T203 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.458358630 |
|
|
Jul 22 07:36:56 PM PDT 24 |
Jul 22 07:38:05 PM PDT 24 |
778943895 ps |
| T55 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2167376155 |
|
|
Jul 22 07:37:06 PM PDT 24 |
Jul 22 07:38:30 PM PDT 24 |
27805609082 ps |
| T204 |
/workspace/coverage/default/44.sram_ctrl_smoke.3237722458 |
|
|
Jul 22 07:38:53 PM PDT 24 |
Jul 22 07:39:32 PM PDT 24 |
1036857879 ps |
| T205 |
/workspace/coverage/default/8.sram_ctrl_bijection.1140606564 |
|
|
Jul 22 07:32:26 PM PDT 24 |
Jul 22 08:18:21 PM PDT 24 |
269837332479 ps |
| T154 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1188950463 |
|
|
Jul 22 07:32:50 PM PDT 24 |
Jul 22 07:38:56 PM PDT 24 |
17392777732 ps |
| T206 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.3258882864 |
|
|
Jul 22 07:38:19 PM PDT 24 |
Jul 22 07:44:58 PM PDT 24 |
21368892529 ps |
| T207 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3618288235 |
|
|
Jul 22 07:32:17 PM PDT 24 |
Jul 22 07:32:39 PM PDT 24 |
2996421512 ps |
| T208 |
/workspace/coverage/default/34.sram_ctrl_regwen.2215881176 |
|
|
Jul 22 07:36:41 PM PDT 24 |
Jul 22 07:51:16 PM PDT 24 |
4104392743 ps |
| T209 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.4145017185 |
|
|
Jul 22 07:36:02 PM PDT 24 |
Jul 22 07:39:55 PM PDT 24 |
6045091808 ps |
| T210 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2774997031 |
|
|
Jul 22 07:33:00 PM PDT 24 |
Jul 22 07:38:41 PM PDT 24 |
12945010061 ps |
| T211 |
/workspace/coverage/default/45.sram_ctrl_stress_all.728689886 |
|
|
Jul 22 07:39:22 PM PDT 24 |
Jul 22 08:32:05 PM PDT 24 |
211725892744 ps |
| T212 |
/workspace/coverage/default/16.sram_ctrl_stress_all.936831397 |
|
|
Jul 22 07:32:59 PM PDT 24 |
Jul 22 09:10:01 PM PDT 24 |
328201732421 ps |
| T51 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.100456027 |
|
|
Jul 22 07:34:40 PM PDT 24 |
Jul 22 07:37:38 PM PDT 24 |
5630347299 ps |
| T76 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.93602009 |
|
|
Jul 22 07:32:00 PM PDT 24 |
Jul 22 07:32:24 PM PDT 24 |
8085355370 ps |
| T213 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2212681523 |
|
|
Jul 22 07:34:15 PM PDT 24 |
Jul 22 07:34:47 PM PDT 24 |
761590082 ps |
| T63 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1577568088 |
|
|
Jul 22 07:32:01 PM PDT 24 |
Jul 22 07:34:38 PM PDT 24 |
2555513618 ps |
| T214 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1649981252 |
|
|
Jul 22 07:33:34 PM PDT 24 |
Jul 22 08:00:21 PM PDT 24 |
25454654385 ps |
| T77 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.687324025 |
|
|
Jul 22 07:34:51 PM PDT 24 |
Jul 22 07:35:51 PM PDT 24 |
2943515418 ps |
| T215 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.1337540874 |
|
|
Jul 22 07:36:54 PM PDT 24 |
Jul 22 07:38:24 PM PDT 24 |
12241587110 ps |
| T216 |
/workspace/coverage/default/25.sram_ctrl_alert_test.356649313 |
|
|
Jul 22 07:34:41 PM PDT 24 |
Jul 22 07:34:43 PM PDT 24 |
18248132 ps |
| T121 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3481458321 |
|
|
Jul 22 07:32:49 PM PDT 24 |
Jul 22 07:33:03 PM PDT 24 |
935566284 ps |
| T217 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.1131390909 |
|
|
Jul 22 07:36:42 PM PDT 24 |
Jul 22 07:50:29 PM PDT 24 |
11340588421 ps |
| T155 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3301414544 |
|
|
Jul 22 07:39:54 PM PDT 24 |
Jul 22 07:45:18 PM PDT 24 |
56745504363 ps |
| T218 |
/workspace/coverage/default/4.sram_ctrl_executable.2104644724 |
|
|
Jul 22 07:32:12 PM PDT 24 |
Jul 22 08:10:39 PM PDT 24 |
94319664305 ps |
| T219 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.4263770560 |
|
|
Jul 22 07:39:47 PM PDT 24 |
Jul 22 07:45:25 PM PDT 24 |
36452205123 ps |
| T220 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.4005013816 |
|
|
Jul 22 07:38:52 PM PDT 24 |
Jul 22 07:46:18 PM PDT 24 |
22959069346 ps |
| T122 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1214043797 |
|
|
Jul 22 07:33:37 PM PDT 24 |
Jul 22 07:35:17 PM PDT 24 |
3036448112 ps |
| T221 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1341385731 |
|
|
Jul 22 07:34:17 PM PDT 24 |
Jul 22 07:36:48 PM PDT 24 |
3252165763 ps |
| T222 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.3298961510 |
|
|
Jul 22 07:32:50 PM PDT 24 |
Jul 22 07:38:47 PM PDT 24 |
21572833010 ps |
| T223 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.4200656861 |
|
|
Jul 22 07:32:18 PM PDT 24 |
Jul 22 07:38:04 PM PDT 24 |
22981556116 ps |
| T224 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2364136881 |
|
|
Jul 22 07:35:52 PM PDT 24 |
Jul 22 07:36:28 PM PDT 24 |
1461549590 ps |
| T225 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1609219792 |
|
|
Jul 22 07:32:32 PM PDT 24 |
Jul 22 07:42:15 PM PDT 24 |
32489892909 ps |
| T226 |
/workspace/coverage/default/2.sram_ctrl_regwen.363557299 |
|
|
Jul 22 07:32:10 PM PDT 24 |
Jul 22 07:35:03 PM PDT 24 |
9744262601 ps |
| T227 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1296003994 |
|
|
Jul 22 07:40:18 PM PDT 24 |
Jul 22 07:41:47 PM PDT 24 |
2059551361 ps |
| T228 |
/workspace/coverage/default/12.sram_ctrl_bijection.4280189579 |
|
|
Jul 22 07:32:38 PM PDT 24 |
Jul 22 08:04:47 PM PDT 24 |
111547801265 ps |
| T156 |
/workspace/coverage/default/3.sram_ctrl_executable.72588374 |
|
|
Jul 22 07:32:10 PM PDT 24 |
Jul 22 07:53:13 PM PDT 24 |
28601828691 ps |
| T229 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.4257298389 |
|
|
Jul 22 07:33:37 PM PDT 24 |
Jul 22 07:34:40 PM PDT 24 |
35616817547 ps |
| T230 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2709573892 |
|
|
Jul 22 07:32:01 PM PDT 24 |
Jul 22 07:32:17 PM PDT 24 |
766102190 ps |
| T231 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2718877877 |
|
|
Jul 22 07:39:31 PM PDT 24 |
Jul 22 07:41:20 PM PDT 24 |
2567073439 ps |
| T232 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2903225777 |
|
|
Jul 22 07:37:50 PM PDT 24 |
Jul 22 07:39:13 PM PDT 24 |
2986872787 ps |
| T233 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1806878326 |
|
|
Jul 22 07:32:24 PM PDT 24 |
Jul 22 07:33:56 PM PDT 24 |
50476631282 ps |
| T234 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.599652961 |
|
|
Jul 22 07:34:12 PM PDT 24 |
Jul 22 07:34:16 PM PDT 24 |
347601072 ps |
| T235 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3837985802 |
|
|
Jul 22 07:32:19 PM PDT 24 |
Jul 22 07:51:18 PM PDT 24 |
50747868123 ps |
| T236 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.654667910 |
|
|
Jul 22 07:38:19 PM PDT 24 |
Jul 22 07:42:52 PM PDT 24 |
16423170958 ps |
| T237 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1177792416 |
|
|
Jul 22 07:32:20 PM PDT 24 |
Jul 22 07:39:24 PM PDT 24 |
5445065193 ps |
| T238 |
/workspace/coverage/default/38.sram_ctrl_partial_access.2716680023 |
|
|
Jul 22 07:37:39 PM PDT 24 |
Jul 22 07:37:54 PM PDT 24 |
560506397 ps |
| T239 |
/workspace/coverage/default/24.sram_ctrl_executable.1121823341 |
|
|
Jul 22 07:34:29 PM PDT 24 |
Jul 22 07:42:25 PM PDT 24 |
21924205823 ps |
| T240 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.4008880400 |
|
|
Jul 22 07:32:40 PM PDT 24 |
Jul 22 07:32:54 PM PDT 24 |
2865058589 ps |
| T241 |
/workspace/coverage/default/49.sram_ctrl_regwen.159331505 |
|
|
Jul 22 07:40:13 PM PDT 24 |
Jul 22 07:50:00 PM PDT 24 |
3784094304 ps |
| T242 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3364799123 |
|
|
Jul 22 07:38:18 PM PDT 24 |
Jul 22 07:40:14 PM PDT 24 |
16723005632 ps |
| T243 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3758881962 |
|
|
Jul 22 07:36:04 PM PDT 24 |
Jul 22 07:43:09 PM PDT 24 |
5048092278 ps |
| T244 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2401463006 |
|
|
Jul 22 07:40:09 PM PDT 24 |
Jul 22 07:41:35 PM PDT 24 |
796421534 ps |
| T245 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.4279096456 |
|
|
Jul 22 07:33:49 PM PDT 24 |
Jul 22 08:15:11 PM PDT 24 |
32097148535 ps |
| T246 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.4038215706 |
|
|
Jul 22 07:36:54 PM PDT 24 |
Jul 22 07:37:08 PM PDT 24 |
714899252 ps |
| T247 |
/workspace/coverage/default/14.sram_ctrl_regwen.3121947245 |
|
|
Jul 22 07:32:59 PM PDT 24 |
Jul 22 07:43:51 PM PDT 24 |
14101957582 ps |
| T248 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2782428826 |
|
|
Jul 22 07:32:08 PM PDT 24 |
Jul 22 07:36:31 PM PDT 24 |
18677828352 ps |
| T249 |
/workspace/coverage/default/8.sram_ctrl_partial_access.638644494 |
|
|
Jul 22 07:34:10 PM PDT 24 |
Jul 22 07:35:52 PM PDT 24 |
15300158330 ps |
| T250 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.616764962 |
|
|
Jul 22 07:34:56 PM PDT 24 |
Jul 22 07:37:26 PM PDT 24 |
2671804290 ps |
| T251 |
/workspace/coverage/default/3.sram_ctrl_smoke.1094573806 |
|
|
Jul 22 07:32:08 PM PDT 24 |
Jul 22 07:32:37 PM PDT 24 |
6342501390 ps |
| T157 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1290712804 |
|
|
Jul 22 07:38:53 PM PDT 24 |
Jul 22 07:43:57 PM PDT 24 |
59132298673 ps |
| T252 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.4247035594 |
|
|
Jul 22 07:32:09 PM PDT 24 |
Jul 22 07:32:18 PM PDT 24 |
3342295092 ps |
| T253 |
/workspace/coverage/default/22.sram_ctrl_executable.3803508829 |
|
|
Jul 22 07:34:09 PM PDT 24 |
Jul 22 07:51:03 PM PDT 24 |
13524682272 ps |
| T254 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1874487373 |
|
|
Jul 22 07:33:34 PM PDT 24 |
Jul 22 07:33:36 PM PDT 24 |
22476381 ps |
| T255 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.29466823 |
|
|
Jul 22 07:38:48 PM PDT 24 |
Jul 22 07:40:35 PM PDT 24 |
12684443098 ps |
| T256 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1126849252 |
|
|
Jul 22 07:36:06 PM PDT 24 |
Jul 22 07:38:41 PM PDT 24 |
3355041383 ps |
| T257 |
/workspace/coverage/default/33.sram_ctrl_smoke.1880814448 |
|
|
Jul 22 07:36:16 PM PDT 24 |
Jul 22 07:36:37 PM PDT 24 |
9100004821 ps |
| T258 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1206640145 |
|
|
Jul 22 07:32:28 PM PDT 24 |
Jul 22 07:36:47 PM PDT 24 |
4432312550 ps |
| T259 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.678870131 |
|
|
Jul 22 07:36:31 PM PDT 24 |
Jul 22 07:48:55 PM PDT 24 |
41698299788 ps |
| T260 |
/workspace/coverage/default/40.sram_ctrl_regwen.963519050 |
|
|
Jul 22 07:38:06 PM PDT 24 |
Jul 22 07:53:03 PM PDT 24 |
16144176026 ps |
| T261 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.2029993860 |
|
|
Jul 22 07:35:26 PM PDT 24 |
Jul 22 07:36:49 PM PDT 24 |
2778013765 ps |
| T262 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1084690025 |
|
|
Jul 22 07:34:02 PM PDT 24 |
Jul 22 07:34:43 PM PDT 24 |
1779459257 ps |
| T263 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3106167131 |
|
|
Jul 22 07:32:01 PM PDT 24 |
Jul 22 07:33:18 PM PDT 24 |
24662105756 ps |
| T264 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3719830353 |
|
|
Jul 22 07:39:32 PM PDT 24 |
Jul 22 07:58:53 PM PDT 24 |
33969961102 ps |
| T265 |
/workspace/coverage/default/34.sram_ctrl_smoke.2357748407 |
|
|
Jul 22 07:37:49 PM PDT 24 |
Jul 22 07:39:48 PM PDT 24 |
3678237705 ps |
| T266 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.2352489642 |
|
|
Jul 22 07:37:06 PM PDT 24 |
Jul 22 07:40:27 PM PDT 24 |
4430769599 ps |
| T267 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1292542405 |
|
|
Jul 22 07:39:03 PM PDT 24 |
Jul 22 07:48:12 PM PDT 24 |
73665645886 ps |
| T268 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.3591617580 |
|
|
Jul 22 07:38:06 PM PDT 24 |
Jul 22 07:42:10 PM PDT 24 |
4119323039 ps |
| T269 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.476125255 |
|
|
Jul 22 07:34:01 PM PDT 24 |
Jul 22 07:34:10 PM PDT 24 |
700065120 ps |
| T270 |
/workspace/coverage/default/4.sram_ctrl_regwen.1920611016 |
|
|
Jul 22 07:32:17 PM PDT 24 |
Jul 22 07:45:31 PM PDT 24 |
25339862377 ps |
| T271 |
/workspace/coverage/default/44.sram_ctrl_executable.1228542088 |
|
|
Jul 22 07:39:01 PM PDT 24 |
Jul 22 07:42:17 PM PDT 24 |
8603068201 ps |
| T272 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2227622043 |
|
|
Jul 22 07:34:28 PM PDT 24 |
Jul 22 07:38:18 PM PDT 24 |
12131234709 ps |
| T273 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1761278003 |
|
|
Jul 22 07:34:52 PM PDT 24 |
Jul 22 07:36:01 PM PDT 24 |
2035086611 ps |
| T274 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1984015789 |
|
|
Jul 22 07:32:27 PM PDT 24 |
Jul 22 07:34:13 PM PDT 24 |
139419954791 ps |
| T275 |
/workspace/coverage/default/27.sram_ctrl_smoke.2373006369 |
|
|
Jul 22 07:34:53 PM PDT 24 |
Jul 22 07:35:17 PM PDT 24 |
896608126 ps |
| T276 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.3765314898 |
|
|
Jul 22 07:36:53 PM PDT 24 |
Jul 22 07:36:57 PM PDT 24 |
1465295085 ps |
| T277 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.2122948282 |
|
|
Jul 22 07:38:34 PM PDT 24 |
Jul 22 08:04:26 PM PDT 24 |
41856935019 ps |
| T52 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3429596028 |
|
|
Jul 22 07:32:14 PM PDT 24 |
Jul 22 07:33:47 PM PDT 24 |
15528896978 ps |
| T278 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.4106101594 |
|
|
Jul 22 07:32:23 PM PDT 24 |
Jul 22 07:32:31 PM PDT 24 |
1354150835 ps |
| T279 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.1923894978 |
|
|
Jul 22 07:38:04 PM PDT 24 |
Jul 22 07:40:15 PM PDT 24 |
4292387243 ps |
| T280 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.701465861 |
|
|
Jul 22 07:33:21 PM PDT 24 |
Jul 22 07:52:43 PM PDT 24 |
163790393385 ps |
| T281 |
/workspace/coverage/default/17.sram_ctrl_stress_all.1764449176 |
|
|
Jul 22 07:33:20 PM PDT 24 |
Jul 22 09:04:17 PM PDT 24 |
461477763881 ps |
| T282 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.4184872622 |
|
|
Jul 22 07:34:44 PM PDT 24 |
Jul 22 07:40:58 PM PDT 24 |
43987818461 ps |
| T283 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.1576902625 |
|
|
Jul 22 07:32:59 PM PDT 24 |
Jul 22 07:33:36 PM PDT 24 |
11367490927 ps |
| T284 |
/workspace/coverage/default/12.sram_ctrl_regwen.3900693915 |
|
|
Jul 22 07:32:40 PM PDT 24 |
Jul 22 07:47:46 PM PDT 24 |
7041965297 ps |
| T285 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3263042910 |
|
|
Jul 22 07:32:50 PM PDT 24 |
Jul 22 07:49:06 PM PDT 24 |
35983880928 ps |
| T286 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.2583806996 |
|
|
Jul 22 07:32:04 PM PDT 24 |
Jul 22 07:36:06 PM PDT 24 |
13565211194 ps |
| T287 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.2025830676 |
|
|
Jul 22 07:38:46 PM PDT 24 |
Jul 22 07:41:09 PM PDT 24 |
3181963443 ps |
| T288 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.3212253515 |
|
|
Jul 22 07:35:33 PM PDT 24 |
Jul 22 07:37:50 PM PDT 24 |
760245355 ps |
| T289 |
/workspace/coverage/default/31.sram_ctrl_executable.724481499 |
|
|
Jul 22 07:35:52 PM PDT 24 |
Jul 22 07:37:05 PM PDT 24 |
5615223244 ps |
| T290 |
/workspace/coverage/default/33.sram_ctrl_bijection.275473325 |
|
|
Jul 22 07:36:42 PM PDT 24 |
Jul 22 07:44:09 PM PDT 24 |
14431883448 ps |
| T291 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.946539160 |
|
|
Jul 22 07:34:15 PM PDT 24 |
Jul 22 07:35:29 PM PDT 24 |
29114186667 ps |
| T292 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.850722913 |
|
|
Jul 22 07:40:12 PM PDT 24 |
Jul 22 07:42:26 PM PDT 24 |
795494494 ps |
| T293 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3520364656 |
|
|
Jul 22 07:37:08 PM PDT 24 |
Jul 22 07:37:48 PM PDT 24 |
8670227339 ps |
| T294 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4231037946 |
|
|
Jul 22 07:32:38 PM PDT 24 |
Jul 22 07:33:45 PM PDT 24 |
4723118733 ps |
| T295 |
/workspace/coverage/default/0.sram_ctrl_alert_test.572991581 |
|
|
Jul 22 07:32:03 PM PDT 24 |
Jul 22 07:32:09 PM PDT 24 |
12593347 ps |
| T296 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2511879662 |
|
|
Jul 22 07:34:40 PM PDT 24 |
Jul 22 07:35:26 PM PDT 24 |
4848099767 ps |
| T297 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3455356483 |
|
|
Jul 22 07:32:11 PM PDT 24 |
Jul 22 07:39:33 PM PDT 24 |
15807243991 ps |
| T298 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2937801106 |
|
|
Jul 22 07:33:35 PM PDT 24 |
Jul 22 07:37:42 PM PDT 24 |
38945187253 ps |
| T299 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.2753358561 |
|
|
Jul 22 07:32:57 PM PDT 24 |
Jul 22 07:33:04 PM PDT 24 |
2407830284 ps |
| T300 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.3393019944 |
|
|
Jul 22 07:33:37 PM PDT 24 |
Jul 22 07:33:43 PM PDT 24 |
376609745 ps |
| T301 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1274834840 |
|
|
Jul 22 07:39:22 PM PDT 24 |
Jul 22 07:39:23 PM PDT 24 |
45061227 ps |
| T302 |
/workspace/coverage/default/21.sram_ctrl_alert_test.2128615062 |
|
|
Jul 22 07:33:48 PM PDT 24 |
Jul 22 07:33:52 PM PDT 24 |
13002709 ps |
| T303 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1568021902 |
|
|
Jul 22 07:32:03 PM PDT 24 |
Jul 22 07:32:29 PM PDT 24 |
721027693 ps |
| T304 |
/workspace/coverage/default/37.sram_ctrl_alert_test.1458658406 |
|
|
Jul 22 07:37:22 PM PDT 24 |
Jul 22 07:37:23 PM PDT 24 |
35940259 ps |
| T305 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3807068307 |
|
|
Jul 22 07:36:30 PM PDT 24 |
Jul 22 07:41:36 PM PDT 24 |
5317238229 ps |
| T306 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1355140058 |
|
|
Jul 22 07:32:09 PM PDT 24 |
Jul 22 07:32:14 PM PDT 24 |
63467665 ps |