Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16580087	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

154373476

1

T1

1289

T2

110375

T3

359985

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	84142910	1			T1	736		T2	60520		T3	180638
values[0x0]	41763830	1			T1	311		T2	29512		T3	902379
values[0x1]	45046823	1			T1	370		T2	31438		T3	903963

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8435962	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

162517601

1

T1

1349

T2

115991

T3

360626

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	586087	1			T2	492		T3	14075		T6	9
valid_sources[0x01]	554783	1			T1	1		T2	438		T3	13953
valid_sources[0x02]	581502	1			T1	2		T2	436		T3	14004
valid_sources[0x03]	560692	1			T1	5		T2	529		T3	14234
valid_sources[0x04]	566052	1			T1	35		T2	453		T3	14235
valid_sources[0x05]	543044	1			T1	7		T2	456		T3	14255
valid_sources[0x06]	545849	1			T1	1		T2	491		T3	14083
valid_sources[0x07]	556128	1			T2	453		T3	13911		T6	9
valid_sources[0x08]	564063	1			T1	8		T2	492		T3	13915
valid_sources[0x09]	567028	1			T1	25		T2	408		T3	13902
valid_sources[0x0a]	556106	1			T1	1		T2	469		T3	14197
valid_sources[0x0b]	1265981	1			T2	462		T3	14078		T6	9
valid_sources[0x0c]	623961	1			T2	518		T3	14601		T6	9
valid_sources[0x0d]	523611	1			T1	27		T2	480		T3	14042
valid_sources[0x0e]	525985	1			T2	564		T3	14238		T6	12
valid_sources[0x0f]	550440	1			T1	21		T2	432		T3	13972
valid_sources[0x10]	525121	1			T2	501		T3	13912		T6	7
valid_sources[0x11]	662842	1			T2	494		T3	13730		T6	9
valid_sources[0x12]	521682	1			T1	34		T2	470		T3	14284
valid_sources[0x13]	555857	1			T1	5		T2	425		T3	13896
valid_sources[0x14]	587540	1			T1	6		T2	480		T3	13804
valid_sources[0x15]	1240477	1			T1	12		T2	448		T3	14037
valid_sources[0x16]	523273	1			T1	7		T2	440		T3	14467
valid_sources[0x17]	569986	1			T1	2		T2	511		T3	14376
valid_sources[0x18]	547104	1			T1	8		T2	430		T3	14255
valid_sources[0x19]	525036	1			T2	495		T3	14219		T6	7
valid_sources[0x1a]	537661	1			T2	473		T3	14094		T6	13
valid_sources[0x1b]	528028	1			T2	476		T3	14311		T6	13
valid_sources[0x1c]	553474	1			T1	7		T2	448		T3	13851
valid_sources[0x1d]	1919740	1			T2	459		T3	13950		T6	13
valid_sources[0x1e]	553234	1			T1	17		T2	502		T3	13878
valid_sources[0x1f]	580341	1			T1	6		T2	433		T3	14145
valid_sources[0x20]	575961	1			T1	17		T2	490		T3	13926
valid_sources[0x21]	548584	1			T2	402		T3	13993		T6	15
valid_sources[0x22]	565506	1			T2	498		T3	14009		T6	8
valid_sources[0x23]	530003	1			T1	8		T2	403		T3	14315
valid_sources[0x24]	560607	1			T1	7		T2	411		T3	14072
valid_sources[0x25]	573331	1			T1	8		T2	452		T3	14098
valid_sources[0x26]	1602303	1			T2	521		T3	14230		T6	8
valid_sources[0x27]	544946	1			T2	497		T3	14039		T6	21
valid_sources[0x28]	739399	1			T1	3		T2	470		T3	14026
valid_sources[0x29]	548896	1			T2	469		T3	14236		T6	18
valid_sources[0x2a]	518201	1			T1	1		T2	520		T3	14016
valid_sources[0x2b]	518276	1			T2	442		T3	14070		T6	13
valid_sources[0x2c]	528221	1			T1	4		T2	472		T3	13916
valid_sources[0x2d]	525858	1			T1	9		T2	450		T3	14191
valid_sources[0x2e]	524602	1			T1	9		T2	464		T3	14157
valid_sources[0x2f]	1860389	1			T1	14		T2	504		T3	14138
valid_sources[0x30]	551201	1			T2	483		T3	14309		T6	8
valid_sources[0x31]	536300	1			T1	14		T2	471		T3	13928
valid_sources[0x32]	586944	1			T1	12		T2	504		T3	14015
valid_sources[0x33]	531994	1			T2	476		T3	14074		T6	8
valid_sources[0x34]	567413	1			T2	454		T3	14413		T6	7
valid_sources[0x35]	1177038	1			T1	28		T2	457		T3	13868
valid_sources[0x36]	542581	1			T2	464		T3	14118		T6	9
valid_sources[0x37]	620094	1			T2	507		T3	14308		T6	15
valid_sources[0x38]	560621	1			T2	521		T3	13985		T6	5
valid_sources[0x39]	539236	1			T1	5		T2	532		T3	14066
valid_sources[0x3a]	566412	1			T1	2		T2	501		T3	14564
valid_sources[0x3b]	1305809	1			T1	11		T2	461		T3	14315
valid_sources[0x3c]	565656	1			T1	13		T2	449		T3	14254
valid_sources[0x3d]	516823	1			T2	492		T3	13884		T6	8
valid_sources[0x3e]	539119	1			T1	26		T2	514		T3	14136
valid_sources[0x3f]	717639	1			T2	494		T3	14018		T6	7
valid_sources[0x40]	554254	1			T1	2		T2	459		T3	14000
valid_sources[0x41]	717882	1			T2	517		T3	14061		T6	5
valid_sources[0x42]	523738	1			T1	14		T2	530		T3	13982
valid_sources[0x43]	545878	1			T1	1		T2	496		T3	14407
valid_sources[0x44]	583658	1			T2	416		T3	14147		T6	19
valid_sources[0x45]	542886	1			T1	1		T2	476		T3	14369
valid_sources[0x46]	538030	1			T1	3		T2	524		T3	13858
valid_sources[0x47]	571245	1			T2	528		T3	13719		T6	7
valid_sources[0x48]	526832	1			T1	7		T2	487		T3	13913
valid_sources[0x49]	581037	1			T2	532		T3	14136		T6	12
valid_sources[0x4a]	4203406	1			T1	5		T2	478		T3	14286
valid_sources[0x4b]	555151	1			T2	475		T3	13899		T6	8
valid_sources[0x4c]	535213	1			T1	2		T2	467		T3	14127
valid_sources[0x4d]	526006	1			T1	1		T2	456		T3	14196
valid_sources[0x4e]	768329	1			T2	462		T3	14338		T6	16
valid_sources[0x4f]	525271	1			T1	16		T2	458		T3	13991
valid_sources[0x50]	550528	1			T2	477		T3	14051		T6	14
valid_sources[0x51]	519673	1			T2	535		T3	13863		T6	11
valid_sources[0x52]	528458	1			T1	18		T2	509		T3	13965
valid_sources[0x53]	532659	1			T1	2		T2	509		T3	14088
valid_sources[0x54]	596039	1			T2	519		T3	14146		T6	16
valid_sources[0x55]	524941	1			T2	472		T3	14318		T6	17
valid_sources[0x56]	521268	1			T2	422		T3	14104		T6	12
valid_sources[0x57]	595098	1			T1	6		T2	498		T3	14006
valid_sources[0x58]	553819	1			T1	4		T2	466		T3	14264
valid_sources[0x59]	613967	1			T1	17		T2	454		T3	13988
valid_sources[0x5a]	560602	1			T1	13		T2	488		T3	14124
valid_sources[0x5b]	522809	1			T1	1		T2	542		T3	14527
valid_sources[0x5c]	527618	1			T2	437		T3	14363		T6	16
valid_sources[0x5d]	521177	1			T2	437		T3	14511		T6	10
valid_sources[0x5e]	529015	1			T1	17		T2	446		T3	14060
valid_sources[0x5f]	561504	1			T2	487		T3	13978		T6	12
valid_sources[0x60]	530798	1			T2	425		T3	14217		T6	13
valid_sources[0x61]	562792	1			T1	12		T2	464		T3	14425
valid_sources[0x62]	589053	1			T2	548		T3	14230		T6	10
valid_sources[0x63]	519814	1			T1	3		T2	482		T3	14101
valid_sources[0x64]	876744	1			T2	420		T3	14171		T6	10
valid_sources[0x65]	650442	1			T2	475		T3	13983		T6	11
valid_sources[0x66]	531796	1			T1	4		T2	450		T3	14237
valid_sources[0x67]	538980	1			T1	6		T2	445		T3	14424
valid_sources[0x68]	1814103	1			T2	463		T3	14436		T6	6
valid_sources[0x69]	631019	1			T1	14		T2	405		T3	14148
valid_sources[0x6a]	517520	1			T1	10		T2	506		T3	13671
valid_sources[0x6b]	550794	1			T2	448		T3	13797		T6	14
valid_sources[0x6c]	541685	1			T1	11		T2	451		T3	13959
valid_sources[0x6d]	566149	1			T1	4		T2	462		T3	14576
valid_sources[0x6e]	566507	1			T1	4		T2	514		T3	13714
valid_sources[0x6f]	539633	1			T2	475		T3	14101		T6	6
valid_sources[0x70]	541690	1			T2	422		T3	14357		T6	7
valid_sources[0x71]	562921	1			T1	29		T2	521		T3	13861
valid_sources[0x72]	553221	1			T1	7		T2	466		T3	13801
valid_sources[0x73]	538958	1			T2	506		T3	14107		T6	9
valid_sources[0x74]	532609	1			T1	2		T2	518		T3	14049
valid_sources[0x75]	539535	1			T2	472		T3	14124		T6	12
valid_sources[0x76]	566801	1			T1	6		T2	471		T3	13769
valid_sources[0x77]	2412722	1			T2	471		T3	13976		T6	10
valid_sources[0x78]	531178	1			T1	2		T2	437		T3	13940
valid_sources[0x79]	522449	1			T1	12		T2	479		T3	13877
valid_sources[0x7a]	573214	1			T2	411		T3	14156		T6	8
valid_sources[0x7b]	553107	1			T2	469		T3	14177		T6	14
valid_sources[0x7c]	551052	1			T1	9		T2	379		T3	14160
valid_sources[0x7d]	572295	1			T2	407		T3	14061		T6	5
valid_sources[0x7e]	523835	1			T2	489		T3	14193		T6	12
valid_sources[0x7f]	618058	1			T1	2		T2	499		T3	13780
valid_sources[0x80]	555450	1			T1	29		T2	475		T3	14237

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

75809281

1

T1

681

T2

54945

T3

179994

values[0x0]

all_enables

biggest_size

39291084

1

T1

292

T2

27842

T3

900448

values[0x1]

all_enables

biggest_size

39273111

1

T1

316

T2

27588

T3

899460

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	43216	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

150603

1

T1

1

T2

3

T3

47

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	53163	1			T3	31		T9	1119		T4	12
values[0x0]	67853	1			T1	1		T2	5		T3	50
values[0x1]	72803	1			T1	1		T2	3		T3	59

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33313	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

160506

1

T1

2

T2

5

T3

59

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	975	1			T9	11		T23	10		T45	1
valid_sources[0x01]	915	1			T26	1		T23	22		T17	3
valid_sources[0x02]	770	1			T26	2		T23	11		T20	1
valid_sources[0x03]	765	1			T42	1		T69	1		T23	9
valid_sources[0x04]	954	1			T23	19		T17	1		T18	1
valid_sources[0x05]	781	1			T9	6		T11	2		T41	4
valid_sources[0x06]	754	1			T9	82		T23	14		T78	2
valid_sources[0x07]	953	1			T7	1		T9	1		T23	6
valid_sources[0x08]	926	1			T9	2		T42	3		T26	2
valid_sources[0x09]	491	1			T9	7		T23	10		T45	1
valid_sources[0x0a]	955	1			T9	29		T25	3		T23	5
valid_sources[0x0b]	575	1			T26	1		T23	14		T24	13
valid_sources[0x0c]	656	1			T9	1		T23	12		T18	1
valid_sources[0x0d]	762	1			T9	56		T4	3		T23	5
valid_sources[0x0e]	585	1			T23	5		T45	1		T18	1
valid_sources[0x0f]	766	1			T9	1		T23	4		T18	1
valid_sources[0x10]	833	1			T8	1		T9	49		T23	8
valid_sources[0x11]	545	1			T26	1		T23	10		T14	5
valid_sources[0x12]	565	1			T9	40		T69	1		T23	19
valid_sources[0x13]	765	1			T7	2		T23	14		T45	1
valid_sources[0x14]	956	1			T8	3		T9	134		T23	3
valid_sources[0x15]	775	1			T9	115		T23	18		T14	1
valid_sources[0x16]	466	1			T23	4		T17	1		T18	1
valid_sources[0x17]	664	1			T113	2		T23	7		T24	3
valid_sources[0x18]	1010	1			T7	1		T9	107		T23	14
valid_sources[0x19]	768	1			T9	1		T26	1		T23	8
valid_sources[0x1a]	579	1			T9	2		T23	23		T17	1
valid_sources[0x1b]	822	1			T8	1		T9	2		T26	1
valid_sources[0x1c]	513	1			T9	13		T153	1		T23	1
valid_sources[0x1d]	529	1			T23	27		T17	1		T18	3
valid_sources[0x1e]	706	1			T26	1		T23	11		T20	2
valid_sources[0x1f]	495	1			T9	22		T26	1		T78	2
valid_sources[0x20]	655	1			T9	4		T23	17		T20	1
valid_sources[0x21]	955	1			T23	13		T20	1		T17	1
valid_sources[0x22]	624	1			T8	1		T9	3		T23	1
valid_sources[0x23]	691	1			T9	2		T23	2		T18	1
valid_sources[0x24]	836	1			T9	82		T77	1		T26	1
valid_sources[0x25]	496	1			T42	2		T23	7		T17	2
valid_sources[0x26]	895	1			T9	39		T23	20		T24	9
valid_sources[0x27]	984	1			T9	57		T69	1		T23	15
valid_sources[0x28]	779	1			T9	28		T23	21		T18	4
valid_sources[0x29]	773	1			T9	23		T20	1		T78	1
valid_sources[0x2a]	925	1			T23	3		T18	3		T24	7
valid_sources[0x2b]	799	1			T9	55		T42	3		T23	4
valid_sources[0x2c]	1051	1			T9	146		T23	12		T45	2
valid_sources[0x2d]	668	1			T42	3		T23	4		T20	1
valid_sources[0x2e]	840	1			T9	33		T23	9		T18	2
valid_sources[0x2f]	565	1			T26	1		T69	2		T23	2
valid_sources[0x30]	828	1			T69	1		T23	7		T20	1
valid_sources[0x31]	815	1			T26	1		T23	10		T24	12
valid_sources[0x32]	644	1			T9	1		T23	16		T45	1
valid_sources[0x33]	726	1			T8	2		T154	1		T23	9
valid_sources[0x34]	870	1			T9	138		T111	4		T23	10
valid_sources[0x35]	1329	1			T23	8		T17	2		T19	2
valid_sources[0x36]	649	1			T26	1		T23	11		T155	1
valid_sources[0x37]	1013	1			T65	4		T23	6		T17	2
valid_sources[0x38]	1051	1			T23	9		T20	1		T17	1
valid_sources[0x39]	693	1			T9	4		T23	1		T18	1
valid_sources[0x3a]	797	1			T9	26		T42	2		T26	1
valid_sources[0x3b]	1236	1			T9	13		T23	5		T45	1
valid_sources[0x3c]	532	1			T69	1		T23	14		T17	3
valid_sources[0x3d]	1004	1			T23	26		T18	1		T24	12
valid_sources[0x3e]	827	1			T9	37		T23	24		T45	2
valid_sources[0x3f]	553	1			T7	1		T9	1		T23	4
valid_sources[0x40]	815	1			T9	25		T23	4		T17	1
valid_sources[0x41]	1249	1			T23	7		T17	2		T37	1
valid_sources[0x42]	646	1			T26	1		T23	25		T45	1
valid_sources[0x43]	780	1			T23	9		T45	2		T24	11
valid_sources[0x44]	906	1			T9	101		T69	1		T23	5
valid_sources[0x45]	743	1			T9	1		T26	1		T23	20
valid_sources[0x46]	888	1			T23	10		T17	1		T14	3
valid_sources[0x47]	917	1			T8	2		T9	32		T26	2
valid_sources[0x48]	964	1			T8	1		T9	16		T153	1
valid_sources[0x49]	1034	1			T9	16		T23	9		T17	1
valid_sources[0x4a]	730	1			T26	1		T23	8		T24	10
valid_sources[0x4b]	588	1			T9	24		T69	1		T23	7
valid_sources[0x4c]	618	1			T8	3		T9	34		T23	7
valid_sources[0x4d]	501	1			T23	10		T17	2		T14	2
valid_sources[0x4e]	651	1			T8	1		T9	21		T26	1
valid_sources[0x4f]	661	1			T8	1		T69	1		T23	10
valid_sources[0x50]	723	1			T26	3		T23	5		T20	1
valid_sources[0x51]	562	1			T8	1		T9	19		T23	5
valid_sources[0x52]	878	1			T9	39		T25	1		T69	1
valid_sources[0x53]	794	1			T42	1		T156	2		T23	7
valid_sources[0x54]	714	1			T23	7		T18	1		T24	8
valid_sources[0x55]	762	1			T42	2		T23	16		T20	4
valid_sources[0x56]	807	1			T10	1		T23	13		T20	1
valid_sources[0x57]	548	1			T4	5		T26	1		T23	5
valid_sources[0x58]	506	1			T23	8		T17	4		T78	1
valid_sources[0x59]	754	1			T26	1		T23	15		T43	8
valid_sources[0x5a]	521	1			T23	6		T24	14		T72	12
valid_sources[0x5b]	820	1			T8	1		T23	5		T157	2
valid_sources[0x5c]	581	1			T23	12		T18	2		T19	1
valid_sources[0x5d]	1130	1			T9	69		T4	3		T69	1
valid_sources[0x5e]	612	1			T8	1		T9	2		T27	1
valid_sources[0x5f]	690	1			T9	11		T23	4		T18	1
valid_sources[0x60]	806	1			T23	12		T78	1		T24	10
valid_sources[0x61]	794	1			T23	8		T20	2		T17	4
valid_sources[0x62]	782	1			T69	1		T23	17		T20	1
valid_sources[0x63]	889	1			T9	31		T23	14		T45	2
valid_sources[0x64]	570	1			T9	1		T26	1		T23	18
valid_sources[0x65]	643	1			T9	72		T23	5		T20	1
valid_sources[0x66]	898	1			T26	1		T23	6		T18	4
valid_sources[0x67]	767	1			T23	6		T20	3		T18	3
valid_sources[0x68]	755	1			T8	1		T69	1		T23	1
valid_sources[0x69]	953	1			T9	55		T23	10		T18	1
valid_sources[0x6a]	655	1			T8	1		T9	2		T23	6
valid_sources[0x6b]	855	1			T23	1		T20	1		T17	1
valid_sources[0x6c]	671	1			T69	4		T23	8		T17	2
valid_sources[0x6d]	613	1			T9	1		T23	7		T45	2
valid_sources[0x6e]	868	1			T9	25		T69	1		T23	20
valid_sources[0x6f]	995	1			T7	1		T9	8		T26	2
valid_sources[0x70]	574	1			T26	1		T158	1		T23	9
valid_sources[0x71]	697	1			T7	1		T9	2		T40	1
valid_sources[0x72]	707	1			T9	7		T23	17		T24	15
valid_sources[0x73]	570	1			T9	5		T23	4		T17	2
valid_sources[0x74]	710	1			T9	91		T23	16		T17	2
valid_sources[0x75]	599	1			T6	1		T23	11		T18	1
valid_sources[0x76]	823	1			T9	31		T23	15		T18	2
valid_sources[0x77]	653	1			T9	13		T23	7		T45	1
valid_sources[0x78]	469	1			T9	1		T23	1		T18	1
valid_sources[0x79]	567	1			T23	16		T24	8		T72	5
valid_sources[0x7a]	685	1			T9	20		T25	1		T23	16
valid_sources[0x7b]	621	1			T26	1		T23	17		T24	19
valid_sources[0x7c]	713	1			T26	1		T23	7		T18	2
valid_sources[0x7d]	655	1			T9	73		T26	1		T23	16
valid_sources[0x7e]	730	1			T9	3		T23	7		T18	1
valid_sources[0x7f]	951	1			T9	129		T69	1		T23	15
valid_sources[0x80]	793	1			T8	1		T9	31		T23	4

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

40699

1

T3

16

T9

1037

T4

6

values[0x0]

all_enables

biggest_size

56394

1

T1

1

T2

3

T3

17

values[0x1]

all_enables

biggest_size

53510

1

T3

14

T7

3

T8

5