Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.92 99.19 94.27 99.72 100.00 96.03 99.12 97.07


Total tests in report: 1037
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
75.77 75.77 92.40 92.40 80.45 80.45 92.84 92.84 23.81 23.81 82.70 82.70 93.86 93.86 64.35 64.35 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2836288949
87.62 11.85 97.14 4.74 83.41 2.96 92.84 0.00 90.48 66.67 89.81 7.11 95.32 1.46 64.35 0.00 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.2477971284
92.37 4.75 98.69 1.55 87.44 4.03 93.87 1.03 100.00 9.52 93.60 3.79 95.47 0.15 77.51 13.16 /workspace/coverage/default/15.sram_ctrl_stress_all.827983791
93.42 1.05 99.02 0.33 89.45 2.01 95.39 1.52 100.00 0.00 95.02 1.42 96.05 0.58 78.98 1.46 /workspace/coverage/default/2.sram_ctrl_sec_cm.3701013695
94.23 0.81 99.10 0.08 89.57 0.12 96.56 1.17 100.00 0.00 95.50 0.47 96.78 0.73 82.08 3.11 /workspace/coverage/default/3.sram_ctrl_multiple_keys.4112595072
94.99 0.76 99.10 0.00 89.57 0.00 97.52 0.96 100.00 0.00 95.50 0.00 96.78 0.00 86.47 4.39 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3346084263
95.73 0.74 99.10 0.00 90.17 0.59 97.52 0.00 100.00 0.00 95.50 0.00 96.78 0.00 91.04 4.57 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2831024541
96.35 0.62 99.10 0.00 90.17 0.00 98.76 1.24 100.00 0.00 95.73 0.24 96.93 0.15 93.78 2.74 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3015244570
96.56 0.21 99.10 0.00 90.17 0.00 98.76 0.00 100.00 0.00 95.73 0.00 96.93 0.00 95.25 1.46 /workspace/coverage/default/6.sram_ctrl_stress_all.2971120896
96.76 0.20 99.10 0.00 90.17 0.00 98.83 0.07 100.00 0.00 95.73 0.00 98.25 1.32 95.25 0.00 /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.914426473
96.95 0.19 99.10 0.00 90.28 0.12 98.83 0.00 100.00 0.00 96.21 0.47 98.98 0.73 95.25 0.00 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.627124999
97.08 0.13 99.10 0.00 90.28 0.00 98.83 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.16 0.91 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4103100328
97.21 0.13 99.18 0.08 90.28 0.00 99.66 0.83 100.00 0.00 96.21 0.00 98.98 0.00 96.16 0.00 /workspace/coverage/default/14.sram_ctrl_ram_cfg.3845410793
97.28 0.07 99.18 0.00 90.64 0.36 99.66 0.00 100.00 0.00 96.21 0.00 99.12 0.15 96.16 0.00 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3850597240
97.34 0.06 99.18 0.00 91.00 0.36 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.00 96.16 0.00 /workspace/coverage/default/0.sram_ctrl_alert_test.1646802565
97.39 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.53 0.37 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.994969159
97.45 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3067206515
97.47 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2732906708

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2041707555
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.166074178
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1816869299
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1286836404
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3585967751
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1641220820
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.743273297
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4004122086
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2622627668
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.4002515730
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.48583973
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.998719537
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1084887789
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2100195900
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.195488705
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1635391413
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4174507951
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2855257654
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1374675674
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.485087463
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3886429426
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2356960942
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1893234008
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1663610162
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1432281844
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3974223018
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2176337726
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3244855029
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4057900930
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3171159211
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.159477210
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.4215261120
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.260039381
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3281257269
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.4203342806
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1016820844
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2065138063
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2682779892
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.147837236
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.4193786582
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.348706435
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.250168125
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4017968113
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3617757759
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1687944624
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1954548488
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3705638283
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3195952422
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1717251633
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2252954434
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.823406242
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1234485420
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.497176549
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1744416907
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2731788961
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.505470347
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2721696828
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1991478050
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1305828256
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2367127912
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.661861445
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.293584261
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1207541048
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1090671631
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.367735829
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3927596260
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1783435840
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2469096833
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3336173759
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3672420658
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3041096538
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.768908006
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1974774317
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1030489407
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4108206448
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2494257470
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2627988330
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.611412620
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3209103381
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2521338307
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1139587725
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.986086029
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.775064467
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2925530468
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.8398135
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.620327
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1707556281
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.977842317
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3748873027
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2075112207
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.653739191
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2753476688
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.30304044
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2386396543
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1720382931
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.477004834
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.817723186
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1500481130
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2489761071
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3097954974
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2628105039
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2152265078
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.572561255
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3881620408
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1984349845
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2309638800
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1420534722
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3200981258
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3608918833
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2205811015
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3608219657
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.264094177
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1096995091
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2858925792
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3716354988
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1216272601
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.822342164
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1079210774
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2496188234
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3098024743
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2032706347
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1400284693
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2621993906
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1667095707
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4210000325
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2340853350
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1950154849
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2167444945
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3344370151
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1114922352
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.4244534646
/workspace/coverage/default/0.sram_ctrl_bijection.2876398194
/workspace/coverage/default/0.sram_ctrl_executable.3736808880
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3446300731
/workspace/coverage/default/0.sram_ctrl_max_throughput.1565760890
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.360557455
/workspace/coverage/default/0.sram_ctrl_mem_walk.3939749587
/workspace/coverage/default/0.sram_ctrl_multiple_keys.58562828
/workspace/coverage/default/0.sram_ctrl_partial_access.1944476029
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1753289032
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3480416176
/workspace/coverage/default/0.sram_ctrl_regwen.3756000463
/workspace/coverage/default/0.sram_ctrl_sec_cm.3670496842
/workspace/coverage/default/0.sram_ctrl_smoke.1693401392
/workspace/coverage/default/0.sram_ctrl_stress_all.1687791488
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.913744151
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2626129634
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.956444654
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2394745849
/workspace/coverage/default/1.sram_ctrl_alert_test.2515739806
/workspace/coverage/default/1.sram_ctrl_bijection.471649993
/workspace/coverage/default/1.sram_ctrl_executable.1071431568
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3919139229
/workspace/coverage/default/1.sram_ctrl_max_throughput.2304439592
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1611662633
/workspace/coverage/default/1.sram_ctrl_mem_walk.1135145630
/workspace/coverage/default/1.sram_ctrl_multiple_keys.817392839
/workspace/coverage/default/1.sram_ctrl_partial_access.206523004
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2337703427
/workspace/coverage/default/1.sram_ctrl_ram_cfg.162976754
/workspace/coverage/default/1.sram_ctrl_regwen.2331702253
/workspace/coverage/default/1.sram_ctrl_sec_cm.1584566513
/workspace/coverage/default/1.sram_ctrl_smoke.3740132865
/workspace/coverage/default/1.sram_ctrl_stress_all.2918554428
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.986487478
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2757013011
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.744451666
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1582204643
/workspace/coverage/default/10.sram_ctrl_alert_test.2780509667
/workspace/coverage/default/10.sram_ctrl_bijection.2556445526
/workspace/coverage/default/10.sram_ctrl_executable.748270567
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3088364124
/workspace/coverage/default/10.sram_ctrl_max_throughput.2772994350
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1039186922
/workspace/coverage/default/10.sram_ctrl_mem_walk.1901840302
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3233203716
/workspace/coverage/default/10.sram_ctrl_partial_access.3066932485
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1894675560
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2839527273
/workspace/coverage/default/10.sram_ctrl_regwen.1045922394
/workspace/coverage/default/10.sram_ctrl_smoke.2261134849
/workspace/coverage/default/10.sram_ctrl_stress_all.3082529327
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2832986424
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.723621848
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1829111677
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.4109729973
/workspace/coverage/default/11.sram_ctrl_alert_test.2490429957
/workspace/coverage/default/11.sram_ctrl_bijection.1439536036
/workspace/coverage/default/11.sram_ctrl_executable.4287852793
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4005928368
/workspace/coverage/default/11.sram_ctrl_max_throughput.1091307649
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3311319218
/workspace/coverage/default/11.sram_ctrl_mem_walk.1207788164
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2280645916
/workspace/coverage/default/11.sram_ctrl_partial_access.905824139
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3767074243
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2471445861
/workspace/coverage/default/11.sram_ctrl_regwen.2719804815
/workspace/coverage/default/11.sram_ctrl_smoke.2240483691
/workspace/coverage/default/11.sram_ctrl_stress_all.4098686810
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2997938708
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1179734665
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.703174332
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3586922050
/workspace/coverage/default/12.sram_ctrl_alert_test.2685603302
/workspace/coverage/default/12.sram_ctrl_bijection.985593313
/workspace/coverage/default/12.sram_ctrl_executable.2442128647
/workspace/coverage/default/12.sram_ctrl_lc_escalation.500047497
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/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2500894470
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1513639322
/workspace/coverage/default/43.sram_ctrl_alert_test.4227945001
/workspace/coverage/default/43.sram_ctrl_bijection.4211228966
/workspace/coverage/default/43.sram_ctrl_executable.982585146
/workspace/coverage/default/43.sram_ctrl_lc_escalation.602773362
/workspace/coverage/default/43.sram_ctrl_max_throughput.3622388064
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3117826420
/workspace/coverage/default/43.sram_ctrl_mem_walk.4238955287
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1356475129
/workspace/coverage/default/43.sram_ctrl_partial_access.3243930946
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.345301813
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1457512354
/workspace/coverage/default/43.sram_ctrl_regwen.589565065
/workspace/coverage/default/43.sram_ctrl_smoke.2888614331
/workspace/coverage/default/43.sram_ctrl_stress_all.42388830
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.4224379097
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.931540601
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.682601169
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1098760835
/workspace/coverage/default/44.sram_ctrl_alert_test.1114068788
/workspace/coverage/default/44.sram_ctrl_bijection.2121714845
/workspace/coverage/default/44.sram_ctrl_executable.908048776
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1112914336
/workspace/coverage/default/44.sram_ctrl_max_throughput.1420107289
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1125174458
/workspace/coverage/default/44.sram_ctrl_mem_walk.680239891
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1833192110
/workspace/coverage/default/44.sram_ctrl_partial_access.193652512
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2549152919
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3777344968
/workspace/coverage/default/44.sram_ctrl_regwen.3439365384
/workspace/coverage/default/44.sram_ctrl_smoke.2988684532
/workspace/coverage/default/44.sram_ctrl_stress_all.4011813940
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.602082901
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2580926678
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.239998019
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2348945422
/workspace/coverage/default/45.sram_ctrl_alert_test.2995100066
/workspace/coverage/default/45.sram_ctrl_bijection.3728918306
/workspace/coverage/default/45.sram_ctrl_executable.2693576002
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3173749385
/workspace/coverage/default/45.sram_ctrl_max_throughput.3431730414
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2436497284
/workspace/coverage/default/45.sram_ctrl_mem_walk.2358455154
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2166140511
/workspace/coverage/default/45.sram_ctrl_partial_access.3728853232
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1229554225
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2958777077
/workspace/coverage/default/45.sram_ctrl_regwen.3419820785
/workspace/coverage/default/45.sram_ctrl_smoke.1166873494
/workspace/coverage/default/45.sram_ctrl_stress_all.3408234975
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1944180747
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2218256651
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3978969929
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.258297962
/workspace/coverage/default/46.sram_ctrl_alert_test.837582017
/workspace/coverage/default/46.sram_ctrl_bijection.895432540
/workspace/coverage/default/46.sram_ctrl_executable.726126657
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3030025690
/workspace/coverage/default/46.sram_ctrl_max_throughput.1567145635
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.673434224
/workspace/coverage/default/46.sram_ctrl_mem_walk.1076589949
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1312603398
/workspace/coverage/default/46.sram_ctrl_partial_access.1951698788
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2712252346
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1436227166
/workspace/coverage/default/46.sram_ctrl_regwen.4050361277
/workspace/coverage/default/46.sram_ctrl_smoke.2612907067
/workspace/coverage/default/46.sram_ctrl_stress_all.307385099
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2484018401
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.19570977
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1911097176
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2463085980
/workspace/coverage/default/47.sram_ctrl_alert_test.55868777
/workspace/coverage/default/47.sram_ctrl_bijection.3264193619
/workspace/coverage/default/47.sram_ctrl_executable.3150908884
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1495646679
/workspace/coverage/default/47.sram_ctrl_max_throughput.2146359524
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3242385268
/workspace/coverage/default/47.sram_ctrl_mem_walk.1829257624
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3431479923
/workspace/coverage/default/47.sram_ctrl_partial_access.3701737391
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1198276923
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1166825144
/workspace/coverage/default/47.sram_ctrl_regwen.1996800262
/workspace/coverage/default/47.sram_ctrl_smoke.4037405732
/workspace/coverage/default/47.sram_ctrl_stress_all.1613225706
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1400316937
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.70723830
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1727587246
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.460716128
/workspace/coverage/default/48.sram_ctrl_alert_test.3467279614
/workspace/coverage/default/48.sram_ctrl_bijection.1906596174
/workspace/coverage/default/48.sram_ctrl_executable.2129146418
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2052735083
/workspace/coverage/default/48.sram_ctrl_max_throughput.2864220514
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1790439036
/workspace/coverage/default/48.sram_ctrl_mem_walk.3018035650
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2282480080
/workspace/coverage/default/48.sram_ctrl_partial_access.561534009
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3183572346
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1487260012
/workspace/coverage/default/48.sram_ctrl_regwen.2756041992
/workspace/coverage/default/48.sram_ctrl_smoke.1561718542
/workspace/coverage/default/48.sram_ctrl_stress_all.3571760510
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.775829379
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.776837585
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3557357805
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2944498126
/workspace/coverage/default/49.sram_ctrl_alert_test.78928591
/workspace/coverage/default/49.sram_ctrl_executable.2815049661
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3509988692
/workspace/coverage/default/49.sram_ctrl_max_throughput.2118535050
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3602098646
/workspace/coverage/default/49.sram_ctrl_mem_walk.691084821
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3132610807
/workspace/coverage/default/49.sram_ctrl_partial_access.799728241
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.465054553
/workspace/coverage/default/49.sram_ctrl_ram_cfg.251025846
/workspace/coverage/default/49.sram_ctrl_regwen.69637468
/workspace/coverage/default/49.sram_ctrl_smoke.427163618
/workspace/coverage/default/49.sram_ctrl_stress_all.3950127725
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.434457513
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.887787963
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1300590095
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2909194287
/workspace/coverage/default/5.sram_ctrl_alert_test.3433745001
/workspace/coverage/default/5.sram_ctrl_bijection.1796088501
/workspace/coverage/default/5.sram_ctrl_executable.1077582560
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3583569391
/workspace/coverage/default/5.sram_ctrl_max_throughput.2128818628
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3362025135
/workspace/coverage/default/5.sram_ctrl_mem_walk.2197782748
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2670260977
/workspace/coverage/default/5.sram_ctrl_partial_access.1203308654
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3941622069
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4100626209
/workspace/coverage/default/5.sram_ctrl_regwen.243623705
/workspace/coverage/default/5.sram_ctrl_smoke.2199138634
/workspace/coverage/default/5.sram_ctrl_stress_all.2855181181
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1434851844
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2349345449
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1398969652
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.599373339
/workspace/coverage/default/6.sram_ctrl_alert_test.1738268884
/workspace/coverage/default/6.sram_ctrl_bijection.1559812405
/workspace/coverage/default/6.sram_ctrl_executable.250276905
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2951444056
/workspace/coverage/default/6.sram_ctrl_max_throughput.800469513
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1139447623
/workspace/coverage/default/6.sram_ctrl_mem_walk.4162359904
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2762645863
/workspace/coverage/default/6.sram_ctrl_partial_access.1833306674
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.870020806
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2106513178
/workspace/coverage/default/6.sram_ctrl_regwen.3055473842
/workspace/coverage/default/6.sram_ctrl_smoke.1114856897
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3339891486
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1985076553
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3467972632
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3055368608
/workspace/coverage/default/7.sram_ctrl_alert_test.252042970
/workspace/coverage/default/7.sram_ctrl_bijection.2874674974
/workspace/coverage/default/7.sram_ctrl_executable.458971199
/workspace/coverage/default/7.sram_ctrl_lc_escalation.864772400
/workspace/coverage/default/7.sram_ctrl_max_throughput.1115083178
/workspace/coverage/default/7.sram_ctrl_mem_walk.1456873615
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1920095685
/workspace/coverage/default/7.sram_ctrl_partial_access.3661008435
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3752856559
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3138771310
/workspace/coverage/default/7.sram_ctrl_regwen.2637200578
/workspace/coverage/default/7.sram_ctrl_smoke.1410282953
/workspace/coverage/default/7.sram_ctrl_stress_all.2552375681
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1076785871
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.385876978
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1405894245
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3002796887
/workspace/coverage/default/8.sram_ctrl_alert_test.3645689634
/workspace/coverage/default/8.sram_ctrl_bijection.790344011
/workspace/coverage/default/8.sram_ctrl_executable.292261526
/workspace/coverage/default/8.sram_ctrl_lc_escalation.344510992
/workspace/coverage/default/8.sram_ctrl_max_throughput.4268764199
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1086489025
/workspace/coverage/default/8.sram_ctrl_mem_walk.3536426340
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4167264930
/workspace/coverage/default/8.sram_ctrl_partial_access.3600467233
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1912967149
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1065276863
/workspace/coverage/default/8.sram_ctrl_regwen.584988992
/workspace/coverage/default/8.sram_ctrl_smoke.1813472244
/workspace/coverage/default/8.sram_ctrl_stress_all.1469600644
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2859589493
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2565176742
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.805891660
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4275247479
/workspace/coverage/default/9.sram_ctrl_alert_test.4043949477
/workspace/coverage/default/9.sram_ctrl_bijection.4072645129
/workspace/coverage/default/9.sram_ctrl_executable.1639240664
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3196748017
/workspace/coverage/default/9.sram_ctrl_max_throughput.2948878138
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.537360764
/workspace/coverage/default/9.sram_ctrl_mem_walk.2581694256
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2015487610
/workspace/coverage/default/9.sram_ctrl_partial_access.1827894693
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.660629832
/workspace/coverage/default/9.sram_ctrl_ram_cfg.57858088
/workspace/coverage/default/9.sram_ctrl_regwen.4265373869
/workspace/coverage/default/9.sram_ctrl_smoke.1318694246
/workspace/coverage/default/9.sram_ctrl_stress_all.1180520809
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3261400593
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2740668899
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1771411134



Total test records in report: 1037
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/31.sram_ctrl_smoke.1961247051 Jul 23 06:11:38 PM PDT 24 Jul 23 06:11:49 PM PDT 24 796371407 ps
T2 /workspace/coverage/default/3.sram_ctrl_multiple_keys.4112595072 Jul 23 06:10:27 PM PDT 24 Jul 23 06:23:07 PM PDT 24 45179646947 ps
T3 /workspace/coverage/default/45.sram_ctrl_stress_all.3408234975 Jul 23 06:13:25 PM PDT 24 Jul 23 08:07:47 PM PDT 24 2224278258331 ps
T6 /workspace/coverage/default/22.sram_ctrl_smoke.3178032497 Jul 23 06:11:12 PM PDT 24 Jul 23 06:11:24 PM PDT 24 1740517561 ps
T7 /workspace/coverage/default/11.sram_ctrl_bijection.1439536036 Jul 23 06:10:47 PM PDT 24 Jul 23 06:44:43 PM PDT 24 116105361769 ps
T8 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.317224160 Jul 23 06:11:14 PM PDT 24 Jul 23 06:33:35 PM PDT 24 18315164260 ps
T9 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2836288949 Jul 23 06:11:28 PM PDT 24 Jul 23 06:12:11 PM PDT 24 2225070673 ps
T10 /workspace/coverage/default/47.sram_ctrl_alert_test.55868777 Jul 23 06:13:41 PM PDT 24 Jul 23 06:13:42 PM PDT 24 29711642 ps
T4 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3850597240 Jul 23 06:11:11 PM PDT 24 Jul 23 06:11:48 PM PDT 24 10439169602 ps
T11 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2173711393 Jul 23 06:10:55 PM PDT 24 Jul 23 06:11:08 PM PDT 24 707200983 ps
T40 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1405894245 Jul 23 06:10:33 PM PDT 24 Jul 23 06:11:59 PM PDT 24 800182168 ps
T41 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3480793619 Jul 23 06:11:59 PM PDT 24 Jul 23 06:16:16 PM PDT 24 4740248110 ps
T76 /workspace/coverage/default/43.sram_ctrl_partial_access.3243930946 Jul 23 06:12:56 PM PDT 24 Jul 23 06:14:21 PM PDT 24 3638452164 ps
T77 /workspace/coverage/default/33.sram_ctrl_max_throughput.1109035272 Jul 23 06:11:47 PM PDT 24 Jul 23 06:13:51 PM PDT 24 3008501135 ps
T42 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.4176668501 Jul 23 06:10:28 PM PDT 24 Jul 23 06:19:37 PM PDT 24 8363197248 ps
T5 /workspace/coverage/default/33.sram_ctrl_lc_escalation.2032185965 Jul 23 06:11:51 PM PDT 24 Jul 23 06:13:01 PM PDT 24 82530451000 ps
T21 /workspace/coverage/default/44.sram_ctrl_partial_access.193652512 Jul 23 06:13:06 PM PDT 24 Jul 23 06:14:26 PM PDT 24 3294891293 ps
T22 /workspace/coverage/default/5.sram_ctrl_lc_escalation.3583569391 Jul 23 06:10:36 PM PDT 24 Jul 23 06:12:18 PM PDT 24 49243209240 ps
T25 /workspace/coverage/default/18.sram_ctrl_executable.2854743058 Jul 23 06:10:54 PM PDT 24 Jul 23 06:26:49 PM PDT 24 5593996846 ps
T27 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1463357995 Jul 23 06:10:13 PM PDT 24 Jul 23 06:10:19 PM PDT 24 349884988 ps
T88 /workspace/coverage/default/13.sram_ctrl_smoke.3868856905 Jul 23 06:10:49 PM PDT 24 Jul 23 06:11:07 PM PDT 24 3129152554 ps
T159 /workspace/coverage/default/28.sram_ctrl_max_throughput.2383358920 Jul 23 06:11:26 PM PDT 24 Jul 23 06:11:38 PM PDT 24 2627890813 ps
T154 /workspace/coverage/default/6.sram_ctrl_smoke.1114856897 Jul 23 06:10:46 PM PDT 24 Jul 23 06:10:57 PM PDT 24 757496205 ps
T65 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3555371007 Jul 23 06:11:23 PM PDT 24 Jul 23 06:21:54 PM PDT 24 109132940448 ps
T26 /workspace/coverage/default/45.sram_ctrl_regwen.3419820785 Jul 23 06:13:25 PM PDT 24 Jul 23 06:31:02 PM PDT 24 144070449251 ps
T158 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.805891660 Jul 23 06:10:36 PM PDT 24 Jul 23 06:11:52 PM PDT 24 1556759229 ps
T156 /workspace/coverage/default/47.sram_ctrl_smoke.4037405732 Jul 23 06:13:38 PM PDT 24 Jul 23 06:13:45 PM PDT 24 3108854516 ps
T153 /workspace/coverage/default/14.sram_ctrl_smoke.1191432491 Jul 23 06:10:45 PM PDT 24 Jul 23 06:11:06 PM PDT 24 868187560 ps
T69 /workspace/coverage/default/3.sram_ctrl_lc_escalation.2343149062 Jul 23 06:10:26 PM PDT 24 Jul 23 06:11:20 PM PDT 24 29793249788 ps
T160 /workspace/coverage/default/6.sram_ctrl_partial_access.1833306674 Jul 23 06:10:32 PM PDT 24 Jul 23 06:10:43 PM PDT 24 1026672427 ps
T12 /workspace/coverage/default/0.sram_ctrl_alert_test.1646802565 Jul 23 06:10:33 PM PDT 24 Jul 23 06:10:41 PM PDT 24 14582298 ps
T111 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.2626129634 Jul 23 06:10:16 PM PDT 24 Jul 23 06:16:12 PM PDT 24 18501007010 ps
T112 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3015244570 Jul 23 06:11:00 PM PDT 24 Jul 23 06:18:29 PM PDT 24 34105157204 ps
T113 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2549152919 Jul 23 06:13:05 PM PDT 24 Jul 23 06:20:10 PM PDT 24 16685085735 ps
T23 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.800186602 Jul 23 06:12:23 PM PDT 24 Jul 23 06:12:42 PM PDT 24 427650593 ps
T161 /workspace/coverage/default/1.sram_ctrl_smoke.3740132865 Jul 23 06:10:19 PM PDT 24 Jul 23 06:13:08 PM PDT 24 4016195670 ps
T43 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.91952642 Jul 23 06:12:50 PM PDT 24 Jul 23 06:22:21 PM PDT 24 42352770890 ps
T157 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.4051395441 Jul 23 06:12:20 PM PDT 24 Jul 23 06:13:25 PM PDT 24 749926960 ps
T44 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.2477971284 Jul 23 06:10:30 PM PDT 24 Jul 23 06:13:23 PM PDT 24 20707087284 ps
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T59 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.3878233580 Jul 23 06:11:16 PM PDT 24 Jul 23 06:24:00 PM PDT 24 6015370490 ps
T60 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.444565625 Jul 23 06:12:13 PM PDT 24 Jul 23 06:12:21 PM PDT 24 5189823657 ps
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T46 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3362025135 Jul 23 06:10:43 PM PDT 24 Jul 23 06:13:17 PM PDT 24 4771345280 ps
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T18 /workspace/coverage/default/6.sram_ctrl_stress_all.2971120896 Jul 23 06:10:25 PM PDT 24 Jul 23 07:37:57 PM PDT 24 221518689910 ps
T78 /workspace/coverage/default/41.sram_ctrl_stress_all.74978136 Jul 23 06:12:45 PM PDT 24 Jul 23 07:34:21 PM PDT 24 62064301611 ps
T28 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3595051228 Jul 23 06:12:24 PM PDT 24 Jul 23 06:12:28 PM PDT 24 359392090 ps
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T162 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3609596461 Jul 23 06:10:25 PM PDT 24 Jul 23 06:10:42 PM PDT 24 6701084010 ps
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T33 /workspace/coverage/default/19.sram_ctrl_regwen.4163674736 Jul 23 06:11:11 PM PDT 24 Jul 23 06:23:48 PM PDT 24 13628460130 ps
T34 /workspace/coverage/default/49.sram_ctrl_partial_access.799728241 Jul 23 06:13:57 PM PDT 24 Jul 23 06:14:06 PM PDT 24 3184222647 ps
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T39 /workspace/coverage/default/13.sram_ctrl_partial_access.1340208901 Jul 23 06:10:42 PM PDT 24 Jul 23 06:11:08 PM PDT 24 418147194 ps
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T163 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.4121767865 Jul 23 06:10:25 PM PDT 24 Jul 23 06:10:53 PM PDT 24 719557241 ps
T164 /workspace/coverage/default/24.sram_ctrl_max_throughput.1650072940 Jul 23 06:11:14 PM PDT 24 Jul 23 06:11:25 PM PDT 24 721085619 ps
T71 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.986487478 Jul 23 06:10:12 PM PDT 24 Jul 23 06:10:23 PM PDT 24 623814572 ps
T72 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1076785871 Jul 23 06:10:30 PM PDT 24 Jul 23 06:10:56 PM PDT 24 1223253088 ps
T147 /workspace/coverage/default/35.sram_ctrl_stress_all.2616327972 Jul 23 06:12:03 PM PDT 24 Jul 23 07:22:54 PM PDT 24 297621290211 ps
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T152 /workspace/coverage/default/44.sram_ctrl_stress_all.4011813940 Jul 23 06:13:12 PM PDT 24 Jul 23 07:20:53 PM PDT 24 48369624730 ps
T165 /workspace/coverage/default/16.sram_ctrl_max_throughput.1295458574 Jul 23 06:11:00 PM PDT 24 Jul 23 06:11:29 PM PDT 24 3225154501 ps
T115 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.887787963 Jul 23 06:13:58 PM PDT 24 Jul 23 06:18:38 PM PDT 24 24578517095 ps
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T97 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.4276222553 Jul 23 06:12:07 PM PDT 24 Jul 23 06:24:44 PM PDT 24 147876973507 ps
T146 /workspace/coverage/default/23.sram_ctrl_executable.4130685297 Jul 23 06:11:19 PM PDT 24 Jul 23 06:22:10 PM PDT 24 31638419275 ps
T98 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.60075282 Jul 23 06:12:27 PM PDT 24 Jul 23 06:18:55 PM PDT 24 51924377423 ps
T150 /workspace/coverage/default/9.sram_ctrl_regwen.4265373869 Jul 23 06:10:39 PM PDT 24 Jul 23 06:24:08 PM PDT 24 37986981295 ps
T168 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3948312066 Jul 23 06:11:38 PM PDT 24 Jul 23 06:11:43 PM PDT 24 344224628 ps
T169 /workspace/coverage/default/34.sram_ctrl_max_throughput.1707593870 Jul 23 06:11:56 PM PDT 24 Jul 23 06:14:34 PM PDT 24 778498900 ps
T50 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3346084263 Jul 23 06:11:15 PM PDT 24 Jul 23 06:11:42 PM PDT 24 1743306024 ps
T170 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1707156602 Jul 23 06:11:51 PM PDT 24 Jul 23 06:13:16 PM PDT 24 1546992419 ps
T171 /workspace/coverage/default/29.sram_ctrl_bijection.919674446 Jul 23 06:11:30 PM PDT 24 Jul 23 06:36:52 PM PDT 24 22217718696 ps
T51 /workspace/coverage/default/5.sram_ctrl_mem_walk.2197782748 Jul 23 06:10:39 PM PDT 24 Jul 23 06:16:25 PM PDT 24 13840239523 ps
T73 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3246591782 Jul 23 06:12:50 PM PDT 24 Jul 23 06:13:05 PM PDT 24 754941897 ps
T56 /workspace/coverage/default/44.sram_ctrl_mem_walk.680239891 Jul 23 06:13:11 PM PDT 24 Jul 23 06:16:00 PM PDT 24 36404375773 ps
T172 /workspace/coverage/default/31.sram_ctrl_bijection.389167861 Jul 23 06:11:36 PM PDT 24 Jul 23 06:40:18 PM PDT 24 107908761548 ps
T173 /workspace/coverage/default/30.sram_ctrl_bijection.4263412374 Jul 23 06:11:31 PM PDT 24 Jul 23 06:42:26 PM PDT 24 163030913198 ps
T174 /workspace/coverage/default/6.sram_ctrl_regwen.3055473842 Jul 23 06:10:25 PM PDT 24 Jul 23 06:31:43 PM PDT 24 11658255561 ps
T149 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1198276923 Jul 23 06:13:42 PM PDT 24 Jul 23 06:17:45 PM PDT 24 10449899538 ps
T175 /workspace/coverage/default/43.sram_ctrl_bijection.4211228966 Jul 23 06:12:56 PM PDT 24 Jul 23 06:31:07 PM PDT 24 47161173474 ps
T176 /workspace/coverage/default/0.sram_ctrl_regwen.3756000463 Jul 23 06:10:28 PM PDT 24 Jul 23 06:26:30 PM PDT 24 21378884891 ps
T177 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1411102133 Jul 23 06:12:21 PM PDT 24 Jul 23 06:17:35 PM PDT 24 23465830397 ps
T178 /workspace/coverage/default/49.sram_ctrl_max_throughput.2118535050 Jul 23 06:13:54 PM PDT 24 Jul 23 06:16:09 PM PDT 24 3635456958 ps
T74 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3847000461 Jul 23 06:10:56 PM PDT 24 Jul 23 06:11:11 PM PDT 24 522357680 ps
T179 /workspace/coverage/default/34.sram_ctrl_regwen.1307816635 Jul 23 06:11:59 PM PDT 24 Jul 23 06:24:29 PM PDT 24 18873360466 ps
T180 /workspace/coverage/default/44.sram_ctrl_bijection.2121714845 Jul 23 06:13:07 PM PDT 24 Jul 23 06:57:35 PM PDT 24 323831224377 ps
T151 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1329396686 Jul 23 06:11:13 PM PDT 24 Jul 23 06:16:48 PM PDT 24 19633997347 ps
T57 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.397787080 Jul 23 06:11:04 PM PDT 24 Jul 23 06:12:35 PM PDT 24 1992216191 ps
T181 /workspace/coverage/default/9.sram_ctrl_max_throughput.2948878138 Jul 23 06:10:42 PM PDT 24 Jul 23 06:12:00 PM PDT 24 1571021182 ps
T182 /workspace/coverage/default/35.sram_ctrl_multiple_keys.1147698394 Jul 23 06:11:56 PM PDT 24 Jul 23 06:23:13 PM PDT 24 54020575486 ps
T183 /workspace/coverage/default/32.sram_ctrl_alert_test.2324200992 Jul 23 06:11:44 PM PDT 24 Jul 23 06:11:46 PM PDT 24 16365148 ps
T184 /workspace/coverage/default/0.sram_ctrl_max_throughput.1565760890 Jul 23 06:10:17 PM PDT 24 Jul 23 06:11:34 PM PDT 24 3227165730 ps
T185 /workspace/coverage/default/30.sram_ctrl_lc_escalation.726436477 Jul 23 06:11:40 PM PDT 24 Jul 23 06:12:07 PM PDT 24 4041614993 ps
T75 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3828879454 Jul 23 06:12:34 PM PDT 24 Jul 23 06:12:52 PM PDT 24 3084419087 ps
T186 /workspace/coverage/default/17.sram_ctrl_ram_cfg.1073103394 Jul 23 06:11:05 PM PDT 24 Jul 23 06:11:09 PM PDT 24 359912593 ps
T99 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.851471198 Jul 23 06:10:49 PM PDT 24 Jul 23 06:29:09 PM PDT 24 86585699920 ps
T187 /workspace/coverage/default/35.sram_ctrl_alert_test.84443176 Jul 23 06:12:06 PM PDT 24 Jul 23 06:12:08 PM PDT 24 18466222 ps
T188 /workspace/coverage/default/33.sram_ctrl_partial_access.3659237473 Jul 23 06:11:48 PM PDT 24 Jul 23 06:11:57 PM PDT 24 717486550 ps
T189 /workspace/coverage/default/25.sram_ctrl_multiple_keys.1831688209 Jul 23 06:11:23 PM PDT 24 Jul 23 06:59:39 PM PDT 24 114079034995 ps
T190 /workspace/coverage/default/2.sram_ctrl_executable.1329468716 Jul 23 06:10:24 PM PDT 24 Jul 23 06:28:33 PM PDT 24 80379173671 ps
T191 /workspace/coverage/default/42.sram_ctrl_ram_cfg.970556588 Jul 23 06:12:50 PM PDT 24 Jul 23 06:12:54 PM PDT 24 486324653 ps
T192 /workspace/coverage/default/28.sram_ctrl_executable.1668361600 Jul 23 06:11:30 PM PDT 24 Jul 23 06:22:51 PM PDT 24 44572618810 ps
T193 /workspace/coverage/default/14.sram_ctrl_partial_access.1744547383 Jul 23 06:10:52 PM PDT 24 Jul 23 06:11:11 PM PDT 24 2286234102 ps
T194 /workspace/coverage/default/9.sram_ctrl_bijection.4072645129 Jul 23 06:10:40 PM PDT 24 Jul 23 06:32:43 PM PDT 24 76010660772 ps
T195 /workspace/coverage/default/38.sram_ctrl_bijection.365721698 Jul 23 06:12:15 PM PDT 24 Jul 23 06:35:51 PM PDT 24 60422530988 ps
T196 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.723621848 Jul 23 06:10:36 PM PDT 24 Jul 23 06:13:54 PM PDT 24 3564314847 ps
T197 /workspace/coverage/default/47.sram_ctrl_lc_escalation.1495646679 Jul 23 06:13:42 PM PDT 24 Jul 23 06:14:35 PM PDT 24 18494434035 ps
T198 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.776837585 Jul 23 06:13:45 PM PDT 24 Jul 23 06:18:29 PM PDT 24 8907213126 ps
T100 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1513639322 Jul 23 06:13:00 PM PDT 24 Jul 23 06:31:40 PM PDT 24 26760765540 ps
T199 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.388202872 Jul 23 06:10:52 PM PDT 24 Jul 23 06:12:54 PM PDT 24 9750420197 ps
T200 /workspace/coverage/default/41.sram_ctrl_ram_cfg.3922861535 Jul 23 06:12:48 PM PDT 24 Jul 23 06:12:53 PM PDT 24 3742522935 ps
T201 /workspace/coverage/default/48.sram_ctrl_lc_escalation.2052735083 Jul 23 06:13:47 PM PDT 24 Jul 23 06:15:36 PM PDT 24 18433118879 ps
T202 /workspace/coverage/default/48.sram_ctrl_alert_test.3467279614 Jul 23 06:13:52 PM PDT 24 Jul 23 06:13:53 PM PDT 24 36536643 ps
T203 /workspace/coverage/default/48.sram_ctrl_executable.2129146418 Jul 23 06:13:45 PM PDT 24 Jul 23 06:24:22 PM PDT 24 11715480229 ps
T204 /workspace/coverage/default/12.sram_ctrl_max_throughput.1083527753 Jul 23 06:10:46 PM PDT 24 Jul 23 06:11:49 PM PDT 24 2903363770 ps
T205 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3941622069 Jul 23 06:10:33 PM PDT 24 Jul 23 06:14:16 PM PDT 24 35008742220 ps
T206 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3557357805 Jul 23 06:13:44 PM PDT 24 Jul 23 06:13:55 PM PDT 24 1469715227 ps
T207 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.2757013011 Jul 23 06:10:25 PM PDT 24 Jul 23 06:13:43 PM PDT 24 3066131491 ps
T54 /workspace/coverage/default/35.sram_ctrl_mem_walk.731104208 Jul 23 06:12:01 PM PDT 24 Jul 23 06:15:05 PM PDT 24 10351622712 ps
T55 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1139447623 Jul 23 06:10:27 PM PDT 24 Jul 23 06:11:57 PM PDT 24 1453434712 ps
T208 /workspace/coverage/default/49.sram_ctrl_smoke.427163618 Jul 23 06:13:54 PM PDT 24 Jul 23 06:16:25 PM PDT 24 5545713133 ps
T209 /workspace/coverage/default/42.sram_ctrl_max_throughput.3632444962 Jul 23 06:12:53 PM PDT 24 Jul 23 06:13:01 PM PDT 24 701321177 ps
T58 /workspace/coverage/default/15.sram_ctrl_mem_walk.3107150187 Jul 23 06:10:46 PM PDT 24 Jul 23 06:13:35 PM PDT 24 7063788616 ps
T210 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3369233669 Jul 23 06:10:43 PM PDT 24 Jul 23 06:11:36 PM PDT 24 2528363722 ps
T211 /workspace/coverage/default/49.sram_ctrl_executable.2815049661 Jul 23 06:13:58 PM PDT 24 Jul 23 06:21:00 PM PDT 24 31561872320 ps
T212 /workspace/coverage/default/14.sram_ctrl_max_throughput.938144663 Jul 23 06:10:55 PM PDT 24 Jul 23 06:11:05 PM PDT 24 694736777 ps
T213 /workspace/coverage/default/11.sram_ctrl_executable.4287852793 Jul 23 06:10:47 PM PDT 24 Jul 23 06:27:42 PM PDT 24 25189495777 ps
T214 /workspace/coverage/default/20.sram_ctrl_smoke.2255010547 Jul 23 06:11:03 PM PDT 24 Jul 23 06:11:52 PM PDT 24 769946973 ps
T215 /workspace/coverage/default/24.sram_ctrl_partial_access.3200711236 Jul 23 06:11:19 PM PDT 24 Jul 23 06:11:27 PM PDT 24 692595724 ps
T216 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1161870211 Jul 23 06:10:59 PM PDT 24 Jul 23 06:11:36 PM PDT 24 4823333364 ps
T117 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3261400593 Jul 23 06:10:40 PM PDT 24 Jul 23 06:10:56 PM PDT 24 357506877 ps
T126 /workspace/coverage/default/5.sram_ctrl_stress_all.2855181181 Jul 23 06:10:43 PM PDT 24 Jul 23 06:46:31 PM PDT 24 240561858542 ps
T127 /workspace/coverage/default/28.sram_ctrl_smoke.1757877211 Jul 23 06:11:28 PM PDT 24 Jul 23 06:11:41 PM PDT 24 3909303383 ps
T128 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2407729236 Jul 23 06:12:46 PM PDT 24 Jul 23 06:18:22 PM PDT 24 6249685849 ps
T129 /workspace/coverage/default/11.sram_ctrl_smoke.2240483691 Jul 23 06:10:46 PM PDT 24 Jul 23 06:13:28 PM PDT 24 4443848846 ps
T130 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2712252346 Jul 23 06:13:31 PM PDT 24 Jul 23 06:19:46 PM PDT 24 28097413722 ps
T52 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2254800452 Jul 23 06:10:50 PM PDT 24 Jul 23 06:13:43 PM PDT 24 10934561013 ps
T131 /workspace/coverage/default/32.sram_ctrl_stress_all.1982364700 Jul 23 06:11:44 PM PDT 24 Jul 23 07:12:53 PM PDT 24 162792357111 ps
T132 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1031410839 Jul 23 06:11:16 PM PDT 24 Jul 23 06:12:27 PM PDT 24 20875456065 ps
T133 /workspace/coverage/default/26.sram_ctrl_smoke.3302992093 Jul 23 06:11:22 PM PDT 24 Jul 23 06:12:59 PM PDT 24 1885745899 ps
T217 /workspace/coverage/default/37.sram_ctrl_lc_escalation.3833032096 Jul 23 06:12:24 PM PDT 24 Jul 23 06:13:34 PM PDT 24 11679721613 ps
T218 /workspace/coverage/default/8.sram_ctrl_regwen.584988992 Jul 23 06:10:37 PM PDT 24 Jul 23 06:27:41 PM PDT 24 16674640493 ps
T53 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2956403235 Jul 23 06:10:56 PM PDT 24 Jul 23 06:12:23 PM PDT 24 3016577383 ps
T219 /workspace/coverage/default/47.sram_ctrl_max_throughput.2146359524 Jul 23 06:13:40 PM PDT 24 Jul 23 06:14:49 PM PDT 24 8103212696 ps
T220 /workspace/coverage/default/0.sram_ctrl_bijection.2876398194 Jul 23 06:10:12 PM PDT 24 Jul 23 06:52:40 PM PDT 24 295468399395 ps
T221 /workspace/coverage/default/42.sram_ctrl_regwen.2470182776 Jul 23 06:12:51 PM PDT 24 Jul 23 06:24:25 PM PDT 24 16115189729 ps
T222 /workspace/coverage/default/45.sram_ctrl_alert_test.2995100066 Jul 23 06:13:26 PM PDT 24 Jul 23 06:13:27 PM PDT 24 16647638 ps
T223 /workspace/coverage/default/23.sram_ctrl_alert_test.1291459584 Jul 23 06:11:14 PM PDT 24 Jul 23 06:11:17 PM PDT 24 29450021 ps
T15 /workspace/coverage/default/3.sram_ctrl_sec_cm.1003909726 Jul 23 06:10:32 PM PDT 24 Jul 23 06:10:42 PM PDT 24 457910228 ps
T63 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.931840033 Jul 23 06:10:56 PM PDT 24 Jul 23 06:11:31 PM PDT 24 862761084 ps
T224 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3965712948 Jul 23 06:11:07 PM PDT 24 Jul 23 06:11:18 PM PDT 24 1374913675 ps
T225 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2217748994 Jul 23 06:10:45 PM PDT 24 Jul 23 06:22:24 PM PDT 24 29204899351 ps
T226 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3067206515 Jul 23 06:10:55 PM PDT 24 Jul 23 06:21:28 PM PDT 24 233071124838 ps
T227 /workspace/coverage/default/15.sram_ctrl_smoke.3786126710 Jul 23 06:10:52 PM PDT 24 Jul 23 06:11:11 PM PDT 24 881092859 ps
T228 /workspace/coverage/default/35.sram_ctrl_smoke.4129093146 Jul 23 06:11:55 PM PDT 24 Jul 23 06:12:04 PM PDT 24 570623645 ps
T229 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.987779879 Jul 23 06:12:48 PM PDT 24 Jul 23 06:17:54 PM PDT 24 5417670769 ps
T230 /workspace/coverage/default/17.sram_ctrl_smoke.1295184201 Jul 23 06:10:59 PM PDT 24 Jul 23 06:11:13 PM PDT 24 1450186339 ps
T231 /workspace/coverage/default/38.sram_ctrl_alert_test.3186362952 Jul 23 06:12:21 PM PDT 24 Jul 23 06:12:23 PM PDT 24 37814227 ps
T232 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1195273073 Jul 23 06:12:32 PM PDT 24 Jul 23 06:23:26 PM PDT 24 54027889356 ps
T233 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3196748017 Jul 23 06:10:37 PM PDT 24 Jul 23 06:11:13 PM PDT 24 3933994137 ps
T234 /workspace/coverage/default/27.sram_ctrl_multiple_keys.2812466802 Jul 23 06:11:28 PM PDT 24 Jul 23 06:42:52 PM PDT 24 46537808381 ps
T235 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.4223215341 Jul 23 06:11:00 PM PDT 24 Jul 23 06:15:50 PM PDT 24 45434898015 ps
T236 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3002796887 Jul 23 06:10:26 PM PDT 24 Jul 23 06:27:33 PM PDT 24 28977009181 ps
T237 /workspace/coverage/default/7.sram_ctrl_regwen.2637200578 Jul 23 06:10:23 PM PDT 24 Jul 23 06:11:20 PM PDT 24 1624102137 ps
T238 /workspace/coverage/default/45.sram_ctrl_smoke.1166873494 Jul 23 06:13:16 PM PDT 24 Jul 23 06:13:37 PM PDT 24 2946031922 ps
T239 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2134014175 Jul 23 06:11:50 PM PDT 24 Jul 23 06:15:54 PM PDT 24 3895070286 ps
T240 /workspace/coverage/default/32.sram_ctrl_multiple_keys.217561686 Jul 23 06:11:43 PM PDT 24 Jul 23 06:52:34 PM PDT 24 32170414568 ps
T241 /workspace/coverage/default/40.sram_ctrl_max_throughput.3696572828 Jul 23 06:12:28 PM PDT 24 Jul 23 06:13:21 PM PDT 24 2890049700 ps
T242 /workspace/coverage/default/34.sram_ctrl_bijection.4257183803 Jul 23 06:11:51 PM PDT 24 Jul 23 06:26:11 PM PDT 24 44956642471 ps
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T244 /workspace/coverage/default/14.sram_ctrl_ram_cfg.3845410793 Jul 23 06:10:42 PM PDT 24 Jul 23 06:10:50 PM PDT 24 351607988 ps
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