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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total test records in report: 1031
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T316 /workspace/coverage/default/22.sram_ctrl_partial_access.1714656182 Jul 26 07:03:32 PM PDT 24 Jul 26 07:03:38 PM PDT 24 4101313036 ps
T317 /workspace/coverage/default/33.sram_ctrl_max_throughput.1191570777 Jul 26 07:04:54 PM PDT 24 Jul 26 07:06:14 PM PDT 24 798759623 ps
T318 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3754078230 Jul 26 07:04:53 PM PDT 24 Jul 26 07:04:56 PM PDT 24 994386087 ps
T319 /workspace/coverage/default/45.sram_ctrl_mem_walk.2160275806 Jul 26 07:07:13 PM PDT 24 Jul 26 07:12:20 PM PDT 24 5904844155 ps
T320 /workspace/coverage/default/11.sram_ctrl_alert_test.653825502 Jul 26 07:03:03 PM PDT 24 Jul 26 07:03:03 PM PDT 24 47579482 ps
T321 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2865858693 Jul 26 07:03:07 PM PDT 24 Jul 26 07:04:12 PM PDT 24 1996457736 ps
T322 /workspace/coverage/default/23.sram_ctrl_executable.683118695 Jul 26 07:03:45 PM PDT 24 Jul 26 07:08:47 PM PDT 24 28628975163 ps
T323 /workspace/coverage/default/14.sram_ctrl_stress_all.2509337101 Jul 26 07:03:11 PM PDT 24 Jul 26 08:49:51 PM PDT 24 630740821996 ps
T324 /workspace/coverage/default/7.sram_ctrl_regwen.2940146825 Jul 26 07:02:47 PM PDT 24 Jul 26 07:16:10 PM PDT 24 6989117617 ps
T325 /workspace/coverage/default/26.sram_ctrl_stress_all.323304537 Jul 26 07:04:04 PM PDT 24 Jul 26 08:32:43 PM PDT 24 285912268637 ps
T326 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.348427067 Jul 26 07:05:01 PM PDT 24 Jul 26 07:06:56 PM PDT 24 5096502256 ps
T327 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3900780433 Jul 26 07:03:10 PM PDT 24 Jul 26 07:05:12 PM PDT 24 6806994855 ps
T328 /workspace/coverage/default/16.sram_ctrl_partial_access.3874577681 Jul 26 07:03:11 PM PDT 24 Jul 26 07:04:44 PM PDT 24 2008920799 ps
T329 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1814795837 Jul 26 07:03:27 PM PDT 24 Jul 26 07:03:31 PM PDT 24 694221463 ps
T330 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2751132409 Jul 26 07:03:04 PM PDT 24 Jul 26 07:16:45 PM PDT 24 147156608872 ps
T331 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3822510773 Jul 26 07:04:55 PM PDT 24 Jul 26 07:05:50 PM PDT 24 8404179191 ps
T332 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3212630345 Jul 26 07:02:35 PM PDT 24 Jul 26 07:04:28 PM PDT 24 5572050359 ps
T333 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1527695140 Jul 26 07:02:42 PM PDT 24 Jul 26 07:08:55 PM PDT 24 16980983256 ps
T334 /workspace/coverage/default/31.sram_ctrl_regwen.3905873848 Jul 26 07:04:46 PM PDT 24 Jul 26 07:15:48 PM PDT 24 10238106864 ps
T116 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.55153270 Jul 26 07:07:46 PM PDT 24 Jul 26 07:07:53 PM PDT 24 374023943 ps
T335 /workspace/coverage/default/42.sram_ctrl_max_throughput.306417500 Jul 26 07:06:47 PM PDT 24 Jul 26 07:07:26 PM PDT 24 723878810 ps
T336 /workspace/coverage/default/19.sram_ctrl_regwen.2369290019 Jul 26 07:03:21 PM PDT 24 Jul 26 07:14:34 PM PDT 24 10794820102 ps
T337 /workspace/coverage/default/24.sram_ctrl_bijection.3307556758 Jul 26 07:03:44 PM PDT 24 Jul 26 07:13:26 PM PDT 24 15777434495 ps
T338 /workspace/coverage/default/2.sram_ctrl_bijection.2056863870 Jul 26 07:02:29 PM PDT 24 Jul 26 07:21:03 PM PDT 24 18272055161 ps
T339 /workspace/coverage/default/28.sram_ctrl_partial_access.2837602209 Jul 26 07:04:11 PM PDT 24 Jul 26 07:04:15 PM PDT 24 365659572 ps
T340 /workspace/coverage/default/22.sram_ctrl_mem_walk.2931971343 Jul 26 07:03:33 PM PDT 24 Jul 26 07:08:49 PM PDT 24 57712384625 ps
T341 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1297615076 Jul 26 07:04:05 PM PDT 24 Jul 26 07:04:08 PM PDT 24 3059642068 ps
T342 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.629179631 Jul 26 07:03:04 PM PDT 24 Jul 26 07:06:36 PM PDT 24 6693513745 ps
T343 /workspace/coverage/default/43.sram_ctrl_stress_all.1880671275 Jul 26 07:06:58 PM PDT 24 Jul 26 07:29:57 PM PDT 24 65011720823 ps
T344 /workspace/coverage/default/17.sram_ctrl_multiple_keys.1929138078 Jul 26 07:03:04 PM PDT 24 Jul 26 07:10:53 PM PDT 24 6407396365 ps
T345 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.1513725466 Jul 26 07:03:25 PM PDT 24 Jul 26 07:09:24 PM PDT 24 4666418901 ps
T346 /workspace/coverage/default/5.sram_ctrl_executable.1146402494 Jul 26 07:02:50 PM PDT 24 Jul 26 07:09:26 PM PDT 24 3352647159 ps
T347 /workspace/coverage/default/19.sram_ctrl_executable.3123226595 Jul 26 07:03:17 PM PDT 24 Jul 26 07:25:23 PM PDT 24 20988106395 ps
T348 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.317237155 Jul 26 07:07:00 PM PDT 24 Jul 26 07:09:31 PM PDT 24 10205605764 ps
T349 /workspace/coverage/default/19.sram_ctrl_lc_escalation.2740791435 Jul 26 07:03:15 PM PDT 24 Jul 26 07:04:00 PM PDT 24 48285593806 ps
T350 /workspace/coverage/default/4.sram_ctrl_executable.534659604 Jul 26 07:02:39 PM PDT 24 Jul 26 07:24:02 PM PDT 24 44987825674 ps
T351 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.3039455597 Jul 26 07:04:47 PM PDT 24 Jul 26 07:10:22 PM PDT 24 45315037762 ps
T352 /workspace/coverage/default/21.sram_ctrl_bijection.1274439631 Jul 26 07:03:23 PM PDT 24 Jul 26 07:40:03 PM PDT 24 136658800668 ps
T353 /workspace/coverage/default/2.sram_ctrl_smoke.749527948 Jul 26 07:02:28 PM PDT 24 Jul 26 07:02:44 PM PDT 24 3157704851 ps
T117 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2823894578 Jul 26 07:04:20 PM PDT 24 Jul 26 07:04:33 PM PDT 24 720960824 ps
T354 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2156975055 Jul 26 07:03:18 PM PDT 24 Jul 26 07:03:32 PM PDT 24 698270947 ps
T355 /workspace/coverage/default/18.sram_ctrl_partial_access.430603552 Jul 26 07:03:18 PM PDT 24 Jul 26 07:03:35 PM PDT 24 1925598707 ps
T356 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2172989788 Jul 26 07:02:57 PM PDT 24 Jul 26 07:07:43 PM PDT 24 25946575234 ps
T357 /workspace/coverage/default/15.sram_ctrl_stress_all.4126637237 Jul 26 07:02:59 PM PDT 24 Jul 26 08:30:51 PM PDT 24 66694884332 ps
T358 /workspace/coverage/default/45.sram_ctrl_multiple_keys.3074922884 Jul 26 07:07:07 PM PDT 24 Jul 26 07:22:48 PM PDT 24 17366218587 ps
T359 /workspace/coverage/default/11.sram_ctrl_partial_access.2152460666 Jul 26 07:03:06 PM PDT 24 Jul 26 07:03:24 PM PDT 24 2423535062 ps
T360 /workspace/coverage/default/22.sram_ctrl_bijection.2533269421 Jul 26 07:03:31 PM PDT 24 Jul 26 07:12:52 PM PDT 24 34172402778 ps
T361 /workspace/coverage/default/5.sram_ctrl_multiple_keys.424833987 Jul 26 07:02:42 PM PDT 24 Jul 26 07:17:39 PM PDT 24 58688220694 ps
T362 /workspace/coverage/default/8.sram_ctrl_stress_all.248896027 Jul 26 07:02:51 PM PDT 24 Jul 26 08:58:25 PM PDT 24 706821012925 ps
T363 /workspace/coverage/default/42.sram_ctrl_stress_all.700714819 Jul 26 07:06:58 PM PDT 24 Jul 26 08:17:40 PM PDT 24 376355891512 ps
T364 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.649682715 Jul 26 07:02:51 PM PDT 24 Jul 26 07:06:28 PM PDT 24 14312624337 ps
T365 /workspace/coverage/default/35.sram_ctrl_executable.1668073660 Jul 26 07:05:18 PM PDT 24 Jul 26 07:25:30 PM PDT 24 44276735944 ps
T366 /workspace/coverage/default/40.sram_ctrl_alert_test.2109778406 Jul 26 07:06:14 PM PDT 24 Jul 26 07:06:15 PM PDT 24 38670791 ps
T367 /workspace/coverage/default/10.sram_ctrl_lc_escalation.2273336278 Jul 26 07:02:59 PM PDT 24 Jul 26 07:04:23 PM PDT 24 55621011722 ps
T368 /workspace/coverage/default/5.sram_ctrl_smoke.977072140 Jul 26 07:02:35 PM PDT 24 Jul 26 07:04:06 PM PDT 24 753001111 ps
T369 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.723303857 Jul 26 07:04:29 PM PDT 24 Jul 26 07:05:22 PM PDT 24 3120696669 ps
T370 /workspace/coverage/default/46.sram_ctrl_mem_walk.582580743 Jul 26 07:07:24 PM PDT 24 Jul 26 07:10:04 PM PDT 24 10342430996 ps
T371 /workspace/coverage/default/15.sram_ctrl_mem_walk.2769800910 Jul 26 07:03:05 PM PDT 24 Jul 26 07:09:01 PM PDT 24 18696092104 ps
T372 /workspace/coverage/default/31.sram_ctrl_mem_walk.1369958641 Jul 26 07:04:47 PM PDT 24 Jul 26 07:07:23 PM PDT 24 6912653204 ps
T373 /workspace/coverage/default/37.sram_ctrl_alert_test.1837669407 Jul 26 07:05:42 PM PDT 24 Jul 26 07:05:42 PM PDT 24 24659244 ps
T374 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1307616825 Jul 26 07:06:54 PM PDT 24 Jul 26 07:08:26 PM PDT 24 4073038119 ps
T375 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.2860496987 Jul 26 07:05:42 PM PDT 24 Jul 26 07:29:45 PM PDT 24 32520875159 ps
T376 /workspace/coverage/default/38.sram_ctrl_alert_test.3142344169 Jul 26 07:05:54 PM PDT 24 Jul 26 07:05:54 PM PDT 24 161422132 ps
T377 /workspace/coverage/default/13.sram_ctrl_bijection.4177240523 Jul 26 07:03:09 PM PDT 24 Jul 26 07:13:27 PM PDT 24 60996756905 ps
T378 /workspace/coverage/default/22.sram_ctrl_regwen.94284096 Jul 26 07:03:31 PM PDT 24 Jul 26 07:23:28 PM PDT 24 7925514866 ps
T118 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2895106835 Jul 26 07:05:19 PM PDT 24 Jul 26 07:05:48 PM PDT 24 1108841494 ps
T379 /workspace/coverage/default/34.sram_ctrl_mem_walk.1760882950 Jul 26 07:05:13 PM PDT 24 Jul 26 07:10:48 PM PDT 24 25560146741 ps
T380 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.949762526 Jul 26 07:02:56 PM PDT 24 Jul 26 07:04:14 PM PDT 24 4812800852 ps
T381 /workspace/coverage/default/29.sram_ctrl_max_throughput.2752050746 Jul 26 07:04:21 PM PDT 24 Jul 26 07:05:24 PM PDT 24 2222255553 ps
T382 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1373632128 Jul 26 07:03:08 PM PDT 24 Jul 26 07:06:06 PM PDT 24 20359222444 ps
T15 /workspace/coverage/default/3.sram_ctrl_sec_cm.3652342124 Jul 26 07:02:35 PM PDT 24 Jul 26 07:02:37 PM PDT 24 122103725 ps
T31 /workspace/coverage/default/23.sram_ctrl_multiple_keys.3710449060 Jul 26 07:03:45 PM PDT 24 Jul 26 07:28:55 PM PDT 24 15965468282 ps
T32 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.837603495 Jul 26 07:03:08 PM PDT 24 Jul 26 07:04:25 PM PDT 24 5790677468 ps
T33 /workspace/coverage/default/39.sram_ctrl_partial_access.62655289 Jul 26 07:05:56 PM PDT 24 Jul 26 07:07:36 PM PDT 24 819465931 ps
T34 /workspace/coverage/default/5.sram_ctrl_lc_escalation.370205145 Jul 26 07:02:48 PM PDT 24 Jul 26 07:03:15 PM PDT 24 17004152987 ps
T35 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1225550853 Jul 26 07:05:54 PM PDT 24 Jul 26 07:06:18 PM PDT 24 556791979 ps
T36 /workspace/coverage/default/14.sram_ctrl_bijection.1878764588 Jul 26 07:03:04 PM PDT 24 Jul 26 07:45:21 PM PDT 24 440842546026 ps
T37 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.647388930 Jul 26 07:07:06 PM PDT 24 Jul 26 07:07:40 PM PDT 24 2498636983 ps
T38 /workspace/coverage/default/25.sram_ctrl_multiple_keys.3315477732 Jul 26 07:04:03 PM PDT 24 Jul 26 07:05:56 PM PDT 24 974211425 ps
T39 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.2675670420 Jul 26 07:04:02 PM PDT 24 Jul 26 07:07:16 PM PDT 24 14815072564 ps
T383 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.378006535 Jul 26 07:02:53 PM PDT 24 Jul 26 07:04:09 PM PDT 24 5307256111 ps
T384 /workspace/coverage/default/16.sram_ctrl_mem_walk.2154325074 Jul 26 07:03:04 PM PDT 24 Jul 26 07:05:48 PM PDT 24 7205191449 ps
T385 /workspace/coverage/default/37.sram_ctrl_mem_walk.451334726 Jul 26 07:05:41 PM PDT 24 Jul 26 07:08:28 PM PDT 24 12608848145 ps
T386 /workspace/coverage/default/14.sram_ctrl_ram_cfg.3170955847 Jul 26 07:03:05 PM PDT 24 Jul 26 07:03:08 PM PDT 24 360454707 ps
T387 /workspace/coverage/default/3.sram_ctrl_partial_access.3100274237 Jul 26 07:02:30 PM PDT 24 Jul 26 07:02:56 PM PDT 24 6506997404 ps
T388 /workspace/coverage/default/28.sram_ctrl_stress_all.2968803054 Jul 26 07:04:19 PM PDT 24 Jul 26 08:38:11 PM PDT 24 125840936556 ps
T389 /workspace/coverage/default/32.sram_ctrl_smoke.2521644423 Jul 26 07:04:50 PM PDT 24 Jul 26 07:04:58 PM PDT 24 3080036564 ps
T390 /workspace/coverage/default/8.sram_ctrl_mem_walk.330704695 Jul 26 07:02:52 PM PDT 24 Jul 26 07:08:39 PM PDT 24 179644029978 ps
T391 /workspace/coverage/default/24.sram_ctrl_multiple_keys.518314626 Jul 26 07:03:46 PM PDT 24 Jul 26 07:22:17 PM PDT 24 13380258707 ps
T392 /workspace/coverage/default/12.sram_ctrl_smoke.1617101124 Jul 26 07:03:01 PM PDT 24 Jul 26 07:03:10 PM PDT 24 2810513283 ps
T393 /workspace/coverage/default/38.sram_ctrl_max_throughput.2449769604 Jul 26 07:05:41 PM PDT 24 Jul 26 07:07:33 PM PDT 24 893188655 ps
T394 /workspace/coverage/default/3.sram_ctrl_lc_escalation.2050181549 Jul 26 07:02:37 PM PDT 24 Jul 26 07:02:58 PM PDT 24 3170193728 ps
T395 /workspace/coverage/default/45.sram_ctrl_max_throughput.2803234197 Jul 26 07:07:15 PM PDT 24 Jul 26 07:07:23 PM PDT 24 2615014613 ps
T396 /workspace/coverage/default/8.sram_ctrl_alert_test.3936637138 Jul 26 07:03:02 PM PDT 24 Jul 26 07:03:02 PM PDT 24 18401436 ps
T397 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1328320315 Jul 26 07:04:37 PM PDT 24 Jul 26 07:06:52 PM PDT 24 4305536637 ps
T398 /workspace/coverage/default/46.sram_ctrl_multiple_keys.2912306448 Jul 26 07:07:24 PM PDT 24 Jul 26 07:30:23 PM PDT 24 67234510849 ps
T399 /workspace/coverage/default/12.sram_ctrl_regwen.1575588281 Jul 26 07:03:08 PM PDT 24 Jul 26 07:28:23 PM PDT 24 12729099896 ps
T400 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2288942114 Jul 26 07:03:04 PM PDT 24 Jul 26 07:11:09 PM PDT 24 51451344268 ps
T401 /workspace/coverage/default/36.sram_ctrl_lc_escalation.2056061700 Jul 26 07:05:30 PM PDT 24 Jul 26 07:05:47 PM PDT 24 7931079443 ps
T402 /workspace/coverage/default/28.sram_ctrl_executable.3431630919 Jul 26 07:04:14 PM PDT 24 Jul 26 07:18:46 PM PDT 24 40765235434 ps
T403 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1835645444 Jul 26 07:05:52 PM PDT 24 Jul 26 07:08:33 PM PDT 24 4995055876 ps
T404 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3702090276 Jul 26 07:05:04 PM PDT 24 Jul 26 07:05:57 PM PDT 24 36567740536 ps
T405 /workspace/coverage/default/31.sram_ctrl_max_throughput.2142534317 Jul 26 07:04:39 PM PDT 24 Jul 26 07:07:15 PM PDT 24 1637882828 ps
T406 /workspace/coverage/default/9.sram_ctrl_bijection.277533821 Jul 26 07:02:47 PM PDT 24 Jul 26 07:16:43 PM PDT 24 63037523503 ps
T407 /workspace/coverage/default/32.sram_ctrl_partial_access.1354202074 Jul 26 07:04:47 PM PDT 24 Jul 26 07:06:46 PM PDT 24 3936801662 ps
T408 /workspace/coverage/default/16.sram_ctrl_max_throughput.2132436071 Jul 26 07:03:02 PM PDT 24 Jul 26 07:03:16 PM PDT 24 696998523 ps
T409 /workspace/coverage/default/15.sram_ctrl_multiple_keys.472764715 Jul 26 07:03:05 PM PDT 24 Jul 26 07:26:55 PM PDT 24 51496274643 ps
T410 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1244807161 Jul 26 07:06:05 PM PDT 24 Jul 26 07:06:16 PM PDT 24 275733088 ps
T411 /workspace/coverage/default/48.sram_ctrl_partial_access.1096007774 Jul 26 07:07:49 PM PDT 24 Jul 26 07:08:11 PM PDT 24 4081791872 ps
T412 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1246699304 Jul 26 07:02:29 PM PDT 24 Jul 26 07:04:13 PM PDT 24 3243579792 ps
T413 /workspace/coverage/default/15.sram_ctrl_smoke.850045241 Jul 26 07:03:02 PM PDT 24 Jul 26 07:03:19 PM PDT 24 6071763864 ps
T414 /workspace/coverage/default/38.sram_ctrl_partial_access.3729967646 Jul 26 07:05:41 PM PDT 24 Jul 26 07:05:58 PM PDT 24 2178699445 ps
T415 /workspace/coverage/default/13.sram_ctrl_regwen.2191250296 Jul 26 07:03:05 PM PDT 24 Jul 26 07:15:18 PM PDT 24 55892049533 ps
T416 /workspace/coverage/default/39.sram_ctrl_executable.2902067767 Jul 26 07:06:04 PM PDT 24 Jul 26 07:15:22 PM PDT 24 7753173439 ps
T417 /workspace/coverage/default/22.sram_ctrl_ram_cfg.3597521871 Jul 26 07:03:36 PM PDT 24 Jul 26 07:03:39 PM PDT 24 1063214850 ps
T47 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.3156626852 Jul 26 07:04:11 PM PDT 24 Jul 26 07:04:47 PM PDT 24 4778868407 ps
T418 /workspace/coverage/default/19.sram_ctrl_max_throughput.3334745028 Jul 26 07:03:17 PM PDT 24 Jul 26 07:03:27 PM PDT 24 690041352 ps
T419 /workspace/coverage/default/44.sram_ctrl_executable.1639413444 Jul 26 07:07:11 PM PDT 24 Jul 26 07:28:33 PM PDT 24 10850734157 ps
T420 /workspace/coverage/default/41.sram_ctrl_mem_walk.3617870260 Jul 26 07:06:35 PM PDT 24 Jul 26 07:12:21 PM PDT 24 86319010397 ps
T421 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.450029556 Jul 26 07:04:47 PM PDT 24 Jul 26 07:28:58 PM PDT 24 72880763794 ps
T422 /workspace/coverage/default/2.sram_ctrl_lc_escalation.3446489276 Jul 26 07:02:27 PM PDT 24 Jul 26 07:03:36 PM PDT 24 10751082642 ps
T423 /workspace/coverage/default/1.sram_ctrl_bijection.196816575 Jul 26 07:02:39 PM PDT 24 Jul 26 07:24:48 PM PDT 24 117841371918 ps
T424 /workspace/coverage/default/4.sram_ctrl_partial_access.3497271680 Jul 26 07:02:39 PM PDT 24 Jul 26 07:03:45 PM PDT 24 803045726 ps
T425 /workspace/coverage/default/31.sram_ctrl_multiple_keys.3108964787 Jul 26 07:04:38 PM PDT 24 Jul 26 07:15:05 PM PDT 24 3777944215 ps
T426 /workspace/coverage/default/47.sram_ctrl_mem_walk.3984075829 Jul 26 07:07:46 PM PDT 24 Jul 26 07:13:07 PM PDT 24 92123444335 ps
T427 /workspace/coverage/default/11.sram_ctrl_bijection.434782238 Jul 26 07:02:49 PM PDT 24 Jul 26 07:37:16 PM PDT 24 496613859453 ps
T428 /workspace/coverage/default/32.sram_ctrl_regwen.2089245613 Jul 26 07:04:48 PM PDT 24 Jul 26 07:05:03 PM PDT 24 3619026572 ps
T429 /workspace/coverage/default/6.sram_ctrl_executable.3882536152 Jul 26 07:02:43 PM PDT 24 Jul 26 07:06:04 PM PDT 24 14622875824 ps
T430 /workspace/coverage/default/45.sram_ctrl_stress_all.1451308936 Jul 26 07:07:15 PM PDT 24 Jul 26 08:03:43 PM PDT 24 13578235667 ps
T431 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.103818895 Jul 26 07:04:21 PM PDT 24 Jul 26 07:04:36 PM PDT 24 735650238 ps
T432 /workspace/coverage/default/41.sram_ctrl_max_throughput.2911538955 Jul 26 07:06:24 PM PDT 24 Jul 26 07:06:51 PM PDT 24 1418011383 ps
T433 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2689398019 Jul 26 07:02:45 PM PDT 24 Jul 26 07:10:23 PM PDT 24 82670605483 ps
T434 /workspace/coverage/default/18.sram_ctrl_regwen.565994364 Jul 26 07:03:14 PM PDT 24 Jul 26 07:07:19 PM PDT 24 5162887495 ps
T435 /workspace/coverage/default/3.sram_ctrl_regwen.3444787222 Jul 26 07:02:36 PM PDT 24 Jul 26 07:34:16 PM PDT 24 39163253575 ps
T436 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.4072339936 Jul 26 07:03:45 PM PDT 24 Jul 26 07:04:27 PM PDT 24 2167203660 ps
T437 /workspace/coverage/default/28.sram_ctrl_alert_test.864236490 Jul 26 07:04:19 PM PDT 24 Jul 26 07:04:20 PM PDT 24 23684494 ps
T438 /workspace/coverage/default/14.sram_ctrl_executable.2117395037 Jul 26 07:03:03 PM PDT 24 Jul 26 07:14:57 PM PDT 24 11677939841 ps
T439 /workspace/coverage/default/27.sram_ctrl_regwen.3611911159 Jul 26 07:04:04 PM PDT 24 Jul 26 07:48:43 PM PDT 24 34879488027 ps
T440 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.76136633 Jul 26 07:05:31 PM PDT 24 Jul 26 07:06:47 PM PDT 24 1608089618 ps
T441 /workspace/coverage/default/41.sram_ctrl_stress_all.2821339741 Jul 26 07:06:35 PM PDT 24 Jul 26 07:19:59 PM PDT 24 51512270555 ps
T442 /workspace/coverage/default/11.sram_ctrl_executable.2071395146 Jul 26 07:02:53 PM PDT 24 Jul 26 07:28:16 PM PDT 24 24055213563 ps
T443 /workspace/coverage/default/48.sram_ctrl_stress_all.3637344176 Jul 26 07:08:02 PM PDT 24 Jul 26 08:37:41 PM PDT 24 273461260762 ps
T444 /workspace/coverage/default/23.sram_ctrl_stress_all.458034733 Jul 26 07:03:44 PM PDT 24 Jul 26 08:32:00 PM PDT 24 63613574357 ps
T445 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3025336657 Jul 26 07:06:47 PM PDT 24 Jul 26 07:06:59 PM PDT 24 3293458082 ps
T446 /workspace/coverage/default/46.sram_ctrl_executable.1015887256 Jul 26 07:07:26 PM PDT 24 Jul 26 07:46:49 PM PDT 24 25944420801 ps
T447 /workspace/coverage/default/40.sram_ctrl_partial_access.3045220833 Jul 26 07:06:05 PM PDT 24 Jul 26 07:06:44 PM PDT 24 779350586 ps
T448 /workspace/coverage/default/26.sram_ctrl_regwen.4135465066 Jul 26 07:04:04 PM PDT 24 Jul 26 07:16:50 PM PDT 24 10166705439 ps
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T451 /workspace/coverage/default/17.sram_ctrl_lc_escalation.3870331432 Jul 26 07:03:09 PM PDT 24 Jul 26 07:03:18 PM PDT 24 9536175605 ps
T452 /workspace/coverage/default/18.sram_ctrl_max_throughput.795462476 Jul 26 07:03:12 PM PDT 24 Jul 26 07:04:44 PM PDT 24 10631546970 ps
T453 /workspace/coverage/default/36.sram_ctrl_bijection.3873355773 Jul 26 07:05:17 PM PDT 24 Jul 26 07:34:53 PM PDT 24 307301886824 ps
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T455 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.3606715170 Jul 26 07:03:04 PM PDT 24 Jul 26 07:15:48 PM PDT 24 13614941863 ps
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T464 /workspace/coverage/default/16.sram_ctrl_ram_cfg.1097446895 Jul 26 07:03:02 PM PDT 24 Jul 26 07:03:06 PM PDT 24 355007204 ps
T465 /workspace/coverage/default/47.sram_ctrl_partial_access.3972543217 Jul 26 07:07:35 PM PDT 24 Jul 26 07:07:44 PM PDT 24 780850517 ps
T466 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.107878023 Jul 26 07:02:51 PM PDT 24 Jul 26 07:03:47 PM PDT 24 2965263016 ps
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T471 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1121874578 Jul 26 07:06:58 PM PDT 24 Jul 26 07:20:13 PM PDT 24 10568313175 ps
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T477 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.553781210 Jul 26 07:06:45 PM PDT 24 Jul 26 07:14:51 PM PDT 24 30830399095 ps
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T94 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.135286066 Jul 26 07:03:19 PM PDT 24 Jul 26 07:04:48 PM PDT 24 9904704487 ps
T482 /workspace/coverage/default/2.sram_ctrl_regwen.3101379224 Jul 26 07:02:28 PM PDT 24 Jul 26 07:19:06 PM PDT 24 16028778340 ps
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T487 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3275150430 Jul 26 07:03:27 PM PDT 24 Jul 26 07:09:50 PM PDT 24 194164038234 ps
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T496 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1734660000 Jul 26 07:02:32 PM PDT 24 Jul 26 07:10:08 PM PDT 24 20394719791 ps
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T501 /workspace/coverage/default/14.sram_ctrl_partial_access.3268505511 Jul 26 07:03:06 PM PDT 24 Jul 26 07:03:11 PM PDT 24 776521048 ps
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T504 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3208601543 Jul 26 07:02:26 PM PDT 24 Jul 26 07:03:01 PM PDT 24 12614376472 ps
T505 /workspace/coverage/default/37.sram_ctrl_partial_access.2549799624 Jul 26 07:05:42 PM PDT 24 Jul 26 07:06:02 PM PDT 24 1083421512 ps
T506 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1533988412 Jul 26 07:03:53 PM PDT 24 Jul 26 07:05:21 PM PDT 24 6407544158 ps
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T511 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.56696269 Jul 26 07:07:01 PM PDT 24 Jul 26 07:10:57 PM PDT 24 10203426504 ps
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T513 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1424294595 Jul 26 07:07:35 PM PDT 24 Jul 26 07:08:16 PM PDT 24 2957863236 ps
T514 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.406342856 Jul 26 07:03:16 PM PDT 24 Jul 26 07:12:16 PM PDT 24 88197966982 ps
T515 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.776506624 Jul 26 07:04:11 PM PDT 24 Jul 26 07:10:14 PM PDT 24 295773321195 ps
T516 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2342686071 Jul 26 07:03:17 PM PDT 24 Jul 26 07:04:35 PM PDT 24 10117486340 ps
T517 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.765662177 Jul 26 07:07:26 PM PDT 24 Jul 26 07:08:18 PM PDT 24 1480018886 ps
T518 /workspace/coverage/default/23.sram_ctrl_max_throughput.48718521 Jul 26 07:03:48 PM PDT 24 Jul 26 07:04:05 PM PDT 24 1451954271 ps
T519 /workspace/coverage/default/20.sram_ctrl_lc_escalation.668410973 Jul 26 07:03:23 PM PDT 24 Jul 26 07:05:24 PM PDT 24 18616855531 ps
T520 /workspace/coverage/default/42.sram_ctrl_partial_access.1483267141 Jul 26 07:06:47 PM PDT 24 Jul 26 07:07:01 PM PDT 24 1555751827 ps
T521 /workspace/coverage/default/48.sram_ctrl_max_throughput.1713047916 Jul 26 07:07:56 PM PDT 24 Jul 26 07:08:01 PM PDT 24 700962771 ps
T16 /workspace/coverage/default/1.sram_ctrl_sec_cm.1169656909 Jul 26 07:02:36 PM PDT 24 Jul 26 07:02:38 PM PDT 24 91947821 ps
T522 /workspace/coverage/default/47.sram_ctrl_smoke.3063469388 Jul 26 07:07:36 PM PDT 24 Jul 26 07:07:46 PM PDT 24 763277818 ps
T523 /workspace/coverage/default/40.sram_ctrl_executable.730982258 Jul 26 07:06:16 PM PDT 24 Jul 26 07:20:02 PM PDT 24 64974348795 ps
T524 /workspace/coverage/default/7.sram_ctrl_lc_escalation.1793591034 Jul 26 07:02:46 PM PDT 24 Jul 26 07:04:04 PM PDT 24 22414313686 ps
T525 /workspace/coverage/default/9.sram_ctrl_alert_test.3192302369 Jul 26 07:03:01 PM PDT 24 Jul 26 07:03:02 PM PDT 24 36431593 ps
T526 /workspace/coverage/default/11.sram_ctrl_regwen.246568156 Jul 26 07:02:53 PM PDT 24 Jul 26 07:35:18 PM PDT 24 66438409355 ps
T527 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3925265880 Jul 26 07:05:43 PM PDT 24 Jul 26 07:09:58 PM PDT 24 8974896692 ps
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T529 /workspace/coverage/default/2.sram_ctrl_partial_access.2173148547 Jul 26 07:02:27 PM PDT 24 Jul 26 07:04:16 PM PDT 24 5327315277 ps
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T531 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3026875584 Jul 26 07:05:30 PM PDT 24 Jul 26 07:05:56 PM PDT 24 3032565769 ps
T532 /workspace/coverage/default/36.sram_ctrl_executable.2003208452 Jul 26 07:05:30 PM PDT 24 Jul 26 07:19:00 PM PDT 24 11832811003 ps
T533 /workspace/coverage/default/6.sram_ctrl_max_throughput.369792274 Jul 26 07:02:47 PM PDT 24 Jul 26 07:02:57 PM PDT 24 696775738 ps
T534 /workspace/coverage/default/23.sram_ctrl_alert_test.3400659398 Jul 26 07:03:45 PM PDT 24 Jul 26 07:03:45 PM PDT 24 14727661 ps
T535 /workspace/coverage/default/22.sram_ctrl_multiple_keys.312454623 Jul 26 07:03:33 PM PDT 24 Jul 26 07:13:25 PM PDT 24 27306481329 ps
T536 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.3705852632 Jul 26 07:08:07 PM PDT 24 Jul 26 07:28:10 PM PDT 24 32935105026 ps
T537 /workspace/coverage/default/3.sram_ctrl_mem_walk.629021572 Jul 26 07:02:31 PM PDT 24 Jul 26 07:05:02 PM PDT 24 2741801747 ps
T538 /workspace/coverage/default/39.sram_ctrl_smoke.1324237278 Jul 26 07:05:53 PM PDT 24 Jul 26 07:08:08 PM PDT 24 868281510 ps
T539 /workspace/coverage/default/41.sram_ctrl_partial_access.4157085403 Jul 26 07:06:25 PM PDT 24 Jul 26 07:06:39 PM PDT 24 2247355625 ps
T540 /workspace/coverage/default/39.sram_ctrl_ram_cfg.875809391 Jul 26 07:06:04 PM PDT 24 Jul 26 07:06:08 PM PDT 24 1397775709 ps
T541 /workspace/coverage/default/10.sram_ctrl_ram_cfg.1931223303 Jul 26 07:02:50 PM PDT 24 Jul 26 07:02:54 PM PDT 24 1674510409 ps
T542 /workspace/coverage/default/7.sram_ctrl_max_throughput.4116074456 Jul 26 07:02:50 PM PDT 24 Jul 26 07:03:09 PM PDT 24 2609482615 ps
T543 /workspace/coverage/default/37.sram_ctrl_regwen.672008129 Jul 26 07:05:43 PM PDT 24 Jul 26 07:24:43 PM PDT 24 20959385539 ps
T544 /workspace/coverage/default/0.sram_ctrl_stress_all.1542926814 Jul 26 07:02:25 PM PDT 24 Jul 26 08:09:00 PM PDT 24 69738099291 ps
T545 /workspace/coverage/default/6.sram_ctrl_stress_all.4154201653 Jul 26 07:02:43 PM PDT 24 Jul 26 08:41:42 PM PDT 24 120667385585 ps
T546 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3007430991 Jul 26 07:07:14 PM PDT 24 Jul 26 07:07:32 PM PDT 24 1744138927 ps
T547 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.77432883 Jul 26 07:08:08 PM PDT 24 Jul 26 07:12:28 PM PDT 24 9361077191 ps
T548 /workspace/coverage/default/10.sram_ctrl_bijection.2575291775 Jul 26 07:02:59 PM PDT 24 Jul 26 07:12:40 PM PDT 24 35578801668 ps
T549 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1267853073 Jul 26 07:02:21 PM PDT 24 Jul 26 07:06:36 PM PDT 24 16952813895 ps
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