Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3809811022 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3388925479 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.138283851 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1070507932 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2007337701 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1226186582 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3520371162 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2744936876 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.336148472 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.866133443 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.61037220 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2320684253 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1314845713 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2494151984 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2127264038 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2895993670 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1337139335 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1350208867 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3733212664 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1071819775 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2875115373 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3108338823 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2154027295 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2807024183 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2472514184 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3627678502 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2659732171 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3801335814 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2333742578 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1771671192 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1660446526 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3775388556 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.538772192 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3730358159 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.436273855 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3483663498 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1285134296 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3505064443 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1928166032 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1439887388 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1252558112 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2015437165 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2835197296 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2278000276 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.335945580 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3582582139 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1065635525 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3863183701 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.61415219 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.4001141310 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2766042450 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.669893686 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.931152450 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1828679930 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2558105721 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2011166201 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3669445143 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2754690229 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1002653745 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2949031982 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.544465218 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3947554702 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2378705119 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1414231202 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2022583389 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3785441861 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1255538912 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.4044189488 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.408824716 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.69130151 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.657382367 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.569647892 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3248235498 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3935634507 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.831915751 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1545630022 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1676583842 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2533451545 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2458195278 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2579685869 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2913452027 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2290190324 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.693294236 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2909650231 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4024927215 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2463509728 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2841771563 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.402748283 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3909628918 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2340223758 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1341617739 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.739299715 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1208581106 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3943788613 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.705049773 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3705162572 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1579649185 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1118148871 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.11353681 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.639905758 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3273783841 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.524452906 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.848013436 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.636870702 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2379758793 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.912227748 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1843119552 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1202801192 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.84256230 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1086234185 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.470132469 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.853311048 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2671791430 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.67938987 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2750534326 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.4054732363 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2961805991 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2763430973 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1589942265 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.4196206774 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2098569090 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4253201026 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1422502640 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1005303305 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2444018940 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2323294813 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2091252430 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1729412836 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1910885597 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1949731927 |
/workspace/coverage/default/0.sram_ctrl_bijection.1502903557 |
/workspace/coverage/default/0.sram_ctrl_executable.869090993 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3475681602 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2099326218 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3180573839 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1461710776 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2320866390 |
/workspace/coverage/default/0.sram_ctrl_partial_access.37082938 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1455540455 |
/workspace/coverage/default/0.sram_ctrl_regwen.800005690 |
/workspace/coverage/default/0.sram_ctrl_smoke.2284301190 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1542926814 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3212630345 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3191330627 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2668225781 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2398287173 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3797733423 |
/workspace/coverage/default/1.sram_ctrl_bijection.196816575 |
/workspace/coverage/default/1.sram_ctrl_executable.1785387152 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3208601543 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3486996814 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2282583893 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.4244049702 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4106323874 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3299264583 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.658476361 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2755342489 |
/workspace/coverage/default/1.sram_ctrl_regwen.852260785 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.1169656909 |
/workspace/coverage/default/1.sram_ctrl_smoke.3351466501 |
/workspace/coverage/default/1.sram_ctrl_stress_all.194574938 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.346036428 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.4183774295 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3418751547 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3207050992 |
/workspace/coverage/default/10.sram_ctrl_alert_test.2984520177 |
/workspace/coverage/default/10.sram_ctrl_bijection.2575291775 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2273336278 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2558086415 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3603837327 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2136332929 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.703474034 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2000701186 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3114013022 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1931223303 |
/workspace/coverage/default/10.sram_ctrl_regwen.2049758232 |
/workspace/coverage/default/10.sram_ctrl_smoke.3210466385 |
/workspace/coverage/default/10.sram_ctrl_stress_all.40303697 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.427417506 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.35725932 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3069607508 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2101841349 |
/workspace/coverage/default/11.sram_ctrl_alert_test.653825502 |
/workspace/coverage/default/11.sram_ctrl_bijection.434782238 |
/workspace/coverage/default/11.sram_ctrl_executable.2071395146 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.249995684 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.3530450960 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.319844499 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.944457073 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2152460666 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2631381782 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1815640355 |
/workspace/coverage/default/11.sram_ctrl_regwen.246568156 |
/workspace/coverage/default/11.sram_ctrl_smoke.2688907864 |
/workspace/coverage/default/11.sram_ctrl_stress_all.4238838158 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2996108172 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3098572406 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1326461917 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.372922162 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2940176480 |
/workspace/coverage/default/12.sram_ctrl_bijection.385422305 |
/workspace/coverage/default/12.sram_ctrl_executable.2351615990 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1394222394 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1684481584 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.949762526 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2342299744 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3869096638 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2857156600 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.75654029 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.683254817 |
/workspace/coverage/default/12.sram_ctrl_regwen.1575588281 |
/workspace/coverage/default/12.sram_ctrl_smoke.1617101124 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1106633800 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1173203219 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.4009570655 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.420749910 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3900780433 |
/workspace/coverage/default/13.sram_ctrl_alert_test.2290572810 |
/workspace/coverage/default/13.sram_ctrl_bijection.4177240523 |
/workspace/coverage/default/13.sram_ctrl_executable.3158558775 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3150979369 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.2173015227 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.837603495 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.1937548212 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1752865180 |
/workspace/coverage/default/13.sram_ctrl_partial_access.3114852984 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3951331573 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2981525033 |
/workspace/coverage/default/13.sram_ctrl_regwen.2191250296 |
/workspace/coverage/default/13.sram_ctrl_smoke.1094127377 |
/workspace/coverage/default/13.sram_ctrl_stress_all.142194428 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3987502331 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.582944719 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1295566174 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2751132409 |
/workspace/coverage/default/14.sram_ctrl_alert_test.4197461054 |
/workspace/coverage/default/14.sram_ctrl_bijection.1878764588 |
/workspace/coverage/default/14.sram_ctrl_executable.2117395037 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3602739900 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.3779108139 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1373632128 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1811785294 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2556359978 |
/workspace/coverage/default/14.sram_ctrl_partial_access.3268505511 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1021920209 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.3170955847 |
/workspace/coverage/default/14.sram_ctrl_regwen.2063153330 |
/workspace/coverage/default/14.sram_ctrl_smoke.1019107367 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2509337101 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.611704540 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1956408863 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3014459197 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.559057083 |
/workspace/coverage/default/15.sram_ctrl_alert_test.231855467 |
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/workspace/coverage/default/44.sram_ctrl_partial_access.933739300 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.392807281 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2601577480 |
/workspace/coverage/default/44.sram_ctrl_regwen.646557232 |
/workspace/coverage/default/44.sram_ctrl_smoke.1025743744 |
/workspace/coverage/default/44.sram_ctrl_stress_all.494658845 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.647388930 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.530572089 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1696885274 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3540453912 |
/workspace/coverage/default/45.sram_ctrl_alert_test.3469539895 |
/workspace/coverage/default/45.sram_ctrl_bijection.3399233774 |
/workspace/coverage/default/45.sram_ctrl_executable.3995270808 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1270775977 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2803234197 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3450902952 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.2160275806 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3074922884 |
/workspace/coverage/default/45.sram_ctrl_partial_access.382260301 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1729360316 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1571911128 |
/workspace/coverage/default/45.sram_ctrl_regwen.2634041199 |
/workspace/coverage/default/45.sram_ctrl_smoke.3272412681 |
/workspace/coverage/default/45.sram_ctrl_stress_all.1451308936 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3007430991 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2965315162 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3120573362 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.882345085 |
/workspace/coverage/default/46.sram_ctrl_alert_test.433299296 |
/workspace/coverage/default/46.sram_ctrl_bijection.2286026683 |
/workspace/coverage/default/46.sram_ctrl_executable.1015887256 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.513209967 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.991399933 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3660520278 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.582580743 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2912306448 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1893907856 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1452825041 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2721299049 |
/workspace/coverage/default/46.sram_ctrl_regwen.3703298319 |
/workspace/coverage/default/46.sram_ctrl_smoke.3605213500 |
/workspace/coverage/default/46.sram_ctrl_stress_all.1514758845 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1424294595 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1480500405 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.765662177 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.591729710 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3684021987 |
/workspace/coverage/default/47.sram_ctrl_bijection.848807018 |
/workspace/coverage/default/47.sram_ctrl_executable.3206131535 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1487575476 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1172359430 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3984075829 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2351590782 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3972543217 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2882186199 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3841726931 |
/workspace/coverage/default/47.sram_ctrl_regwen.2324781134 |
/workspace/coverage/default/47.sram_ctrl_smoke.3063469388 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2138322323 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.55153270 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2850379015 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4030533589 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.877361553 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3336383967 |
/workspace/coverage/default/48.sram_ctrl_bijection.3989826867 |
/workspace/coverage/default/48.sram_ctrl_executable.1788918506 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.4021156804 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1713047916 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1820079330 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.774280326 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3296257643 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1096007774 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3758115311 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3420065968 |
/workspace/coverage/default/48.sram_ctrl_regwen.1455871439 |
/workspace/coverage/default/48.sram_ctrl_smoke.2734393970 |
/workspace/coverage/default/48.sram_ctrl_stress_all.3637344176 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4076815360 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1890294781 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.454356805 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3705852632 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1540370008 |
/workspace/coverage/default/49.sram_ctrl_bijection.1739792124 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2876392398 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.725240181 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3922078747 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1098253671 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2917047950 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2370228806 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3281307705 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1403595044 |
/workspace/coverage/default/49.sram_ctrl_regwen.1642848563 |
/workspace/coverage/default/49.sram_ctrl_smoke.3539721901 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2238144083 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2182367171 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.77432883 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3486881625 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.359553619 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1258017991 |
/workspace/coverage/default/5.sram_ctrl_bijection.996199401 |
/workspace/coverage/default/5.sram_ctrl_executable.1146402494 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.370205145 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2042872900 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3123435579 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1533970490 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.424833987 |
/workspace/coverage/default/5.sram_ctrl_partial_access.555329542 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2689398019 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4089756633 |
/workspace/coverage/default/5.sram_ctrl_regwen.1604135414 |
/workspace/coverage/default/5.sram_ctrl_smoke.977072140 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.812736995 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.513402845 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1323754775 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.269517014 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3780154210 |
/workspace/coverage/default/6.sram_ctrl_bijection.552157374 |
/workspace/coverage/default/6.sram_ctrl_executable.3882536152 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2920061342 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.369792274 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1801825741 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2836428024 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3608852565 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1062508130 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2255970263 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.99046649 |
/workspace/coverage/default/6.sram_ctrl_regwen.4046906727 |
/workspace/coverage/default/6.sram_ctrl_smoke.1040961650 |
/workspace/coverage/default/6.sram_ctrl_stress_all.4154201653 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3135218011 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.649682715 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1277193663 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.857671679 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3004584028 |
/workspace/coverage/default/7.sram_ctrl_bijection.164501005 |
/workspace/coverage/default/7.sram_ctrl_executable.3022809222 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1793591034 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.4116074456 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.983336559 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1003514040 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2270036932 |
/workspace/coverage/default/7.sram_ctrl_partial_access.210677124 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1217625455 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2044087356 |
/workspace/coverage/default/7.sram_ctrl_regwen.2940146825 |
/workspace/coverage/default/7.sram_ctrl_smoke.1930454877 |
/workspace/coverage/default/7.sram_ctrl_stress_all.2758398648 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2948078925 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1527695140 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.715350135 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3777581196 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3936637138 |
/workspace/coverage/default/8.sram_ctrl_bijection.430932064 |
/workspace/coverage/default/8.sram_ctrl_executable.2442082354 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2172668735 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.404472934 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.378006535 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.330704695 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.889020972 |
/workspace/coverage/default/8.sram_ctrl_partial_access.354552595 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2186092241 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1125190442 |
/workspace/coverage/default/8.sram_ctrl_regwen.2494653433 |
/workspace/coverage/default/8.sram_ctrl_smoke.2514115120 |
/workspace/coverage/default/8.sram_ctrl_stress_all.248896027 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2516786294 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3613362628 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.107878023 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.737887766 |
/workspace/coverage/default/9.sram_ctrl_alert_test.3192302369 |
/workspace/coverage/default/9.sram_ctrl_bijection.277533821 |
/workspace/coverage/default/9.sram_ctrl_executable.380516259 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1240746235 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3244142558 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.555734203 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.3387792046 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2713038167 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1943387625 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2172989788 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.372000076 |
/workspace/coverage/default/9.sram_ctrl_regwen.2233040488 |
/workspace/coverage/default/9.sram_ctrl_smoke.1127737589 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.650100490 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1784921633 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1200558196 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/34.sram_ctrl_alert_test.3003552644 |
|
|
Jul 26 07:05:11 PM PDT 24 |
Jul 26 07:05:12 PM PDT 24 |
13985107 ps |
T2 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1815640355 |
|
|
Jul 26 07:02:58 PM PDT 24 |
Jul 26 07:03:02 PM PDT 24 |
4198705783 ps |
T3 |
/workspace/coverage/default/3.sram_ctrl_stress_all.1048057104 |
|
|
Jul 26 07:02:37 PM PDT 24 |
Jul 26 07:39:59 PM PDT 24 |
129515549343 ps |
T4 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1448878853 |
|
|
Jul 26 07:05:54 PM PDT 24 |
Jul 26 07:13:31 PM PDT 24 |
5759308018 ps |
T5 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.3487787744 |
|
|
Jul 26 07:03:21 PM PDT 24 |
Jul 26 07:12:04 PM PDT 24 |
20342583162 ps |
T6 |
/workspace/coverage/default/25.sram_ctrl_regwen.379560119 |
|
|
Jul 26 07:04:02 PM PDT 24 |
Jul 26 07:09:04 PM PDT 24 |
10767450521 ps |
T9 |
/workspace/coverage/default/36.sram_ctrl_partial_access.3030871128 |
|
|
Jul 26 07:05:19 PM PDT 24 |
Jul 26 07:06:15 PM PDT 24 |
1886704397 ps |
T10 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.944457073 |
|
|
Jul 26 07:02:56 PM PDT 24 |
Jul 26 07:05:01 PM PDT 24 |
8228365955 ps |
T11 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2270036932 |
|
|
Jul 26 07:02:48 PM PDT 24 |
Jul 26 07:24:33 PM PDT 24 |
7891719896 ps |
T12 |
/workspace/coverage/default/41.sram_ctrl_bijection.2103576473 |
|
|
Jul 26 07:06:26 PM PDT 24 |
Jul 26 07:44:27 PM PDT 24 |
267641471299 ps |
T23 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2516786294 |
|
|
Jul 26 07:02:51 PM PDT 24 |
Jul 26 07:03:40 PM PDT 24 |
1943570989 ps |
T40 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.527161447 |
|
|
Jul 26 07:06:05 PM PDT 24 |
Jul 26 07:32:03 PM PDT 24 |
16201313051 ps |
T24 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.4188606690 |
|
|
Jul 26 07:05:30 PM PDT 24 |
Jul 26 07:05:51 PM PDT 24 |
808768843 ps |
T42 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.888941989 |
|
|
Jul 26 07:03:17 PM PDT 24 |
Jul 26 07:03:45 PM PDT 24 |
1467948778 ps |
T49 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.703474034 |
|
|
Jul 26 07:03:11 PM PDT 24 |
Jul 26 07:17:37 PM PDT 24 |
22622900317 ps |
T25 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3987502331 |
|
|
Jul 26 07:03:12 PM PDT 24 |
Jul 26 07:03:57 PM PDT 24 |
4726613465 ps |
T27 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.386430805 |
|
|
Jul 26 07:03:06 PM PDT 24 |
Jul 26 07:03:09 PM PDT 24 |
1342139129 ps |
T54 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.4178860181 |
|
|
Jul 26 07:02:29 PM PDT 24 |
Jul 26 07:02:43 PM PDT 24 |
3017541862 ps |
T55 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1277193663 |
|
|
Jul 26 07:02:52 PM PDT 24 |
Jul 26 07:03:12 PM PDT 24 |
1030649148 ps |
T45 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.1996714501 |
|
|
Jul 26 07:04:57 PM PDT 24 |
Jul 26 07:09:50 PM PDT 24 |
18757160198 ps |
T56 |
/workspace/coverage/default/48.sram_ctrl_bijection.3989826867 |
|
|
Jul 26 07:07:46 PM PDT 24 |
Jul 26 07:40:27 PM PDT 24 |
234595494508 ps |
T41 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.406648089 |
|
|
Jul 26 07:07:48 PM PDT 24 |
Jul 26 07:10:44 PM PDT 24 |
24084076958 ps |
T26 |
/workspace/coverage/default/43.sram_ctrl_executable.1211429328 |
|
|
Jul 26 07:07:03 PM PDT 24 |
Jul 26 07:16:17 PM PDT 24 |
40056007676 ps |
T63 |
/workspace/coverage/default/41.sram_ctrl_executable.3579933588 |
|
|
Jul 26 07:06:23 PM PDT 24 |
Jul 26 07:07:28 PM PDT 24 |
8331613443 ps |
T64 |
/workspace/coverage/default/42.sram_ctrl_bijection.167302468 |
|
|
Jul 26 07:06:35 PM PDT 24 |
Jul 26 07:42:19 PM PDT 24 |
121554464540 ps |
T19 |
/workspace/coverage/default/49.sram_ctrl_regwen.1642848563 |
|
|
Jul 26 07:08:10 PM PDT 24 |
Jul 26 07:16:32 PM PDT 24 |
19047157469 ps |
T148 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4030533589 |
|
|
Jul 26 07:07:50 PM PDT 24 |
Jul 26 07:07:57 PM PDT 24 |
1360744797 ps |
T7 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.2772036605 |
|
|
Jul 26 07:04:29 PM PDT 24 |
Jul 26 07:04:34 PM PDT 24 |
809199814 ps |
T145 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3710720091 |
|
|
Jul 26 07:03:27 PM PDT 24 |
Jul 26 07:04:01 PM PDT 24 |
723213102 ps |
T13 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1470186848 |
|
|
Jul 26 07:03:22 PM PDT 24 |
Jul 26 07:03:23 PM PDT 24 |
26332807 ps |
T8 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1635359548 |
|
|
Jul 26 07:04:04 PM PDT 24 |
Jul 26 07:05:06 PM PDT 24 |
164131899575 ps |
T18 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3475681602 |
|
|
Jul 26 07:02:33 PM PDT 24 |
Jul 26 07:03:18 PM PDT 24 |
28629185897 ps |
T146 |
/workspace/coverage/default/28.sram_ctrl_bijection.4180585632 |
|
|
Jul 26 07:04:11 PM PDT 24 |
Jul 26 07:38:57 PM PDT 24 |
95923835651 ps |
T20 |
/workspace/coverage/default/4.sram_ctrl_regwen.3980765135 |
|
|
Jul 26 07:02:36 PM PDT 24 |
Jul 26 07:26:39 PM PDT 24 |
64696705417 ps |
T147 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1121794984 |
|
|
Jul 26 07:02:58 PM PDT 24 |
Jul 26 07:16:40 PM PDT 24 |
15566509779 ps |
T48 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1240072635 |
|
|
Jul 26 07:03:05 PM PDT 24 |
Jul 26 07:04:40 PM PDT 24 |
25393219424 ps |
T43 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.3808210540 |
|
|
Jul 26 07:03:31 PM PDT 24 |
Jul 26 07:21:43 PM PDT 24 |
52122847419 ps |
T149 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.4226610606 |
|
|
Jul 26 07:06:04 PM PDT 24 |
Jul 26 07:07:46 PM PDT 24 |
776843121 ps |
T70 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.4015580542 |
|
|
Jul 26 07:03:43 PM PDT 24 |
Jul 26 07:03:48 PM PDT 24 |
149956010 ps |
T76 |
/workspace/coverage/default/38.sram_ctrl_stress_all.1393297447 |
|
|
Jul 26 07:05:56 PM PDT 24 |
Jul 26 09:20:22 PM PDT 24 |
657569424803 ps |
T122 |
/workspace/coverage/default/22.sram_ctrl_executable.3684621703 |
|
|
Jul 26 07:03:35 PM PDT 24 |
Jul 26 07:09:26 PM PDT 24 |
8544316303 ps |
T28 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.2409818529 |
|
|
Jul 26 07:02:32 PM PDT 24 |
Jul 26 07:02:36 PM PDT 24 |
357230235 ps |
T50 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.2397731554 |
|
|
Jul 26 07:06:14 PM PDT 24 |
Jul 26 07:11:17 PM PDT 24 |
5253604579 ps |
T123 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1326461917 |
|
|
Jul 26 07:02:59 PM PDT 24 |
Jul 26 07:03:23 PM PDT 24 |
2969278038 ps |
T51 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.1689611403 |
|
|
Jul 26 07:05:53 PM PDT 24 |
Jul 26 07:08:35 PM PDT 24 |
29186262008 ps |
T124 |
/workspace/coverage/default/8.sram_ctrl_smoke.2514115120 |
|
|
Jul 26 07:02:50 PM PDT 24 |
Jul 26 07:03:09 PM PDT 24 |
3375487148 ps |
T44 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1685683572 |
|
|
Jul 26 07:03:16 PM PDT 24 |
Jul 26 07:15:51 PM PDT 24 |
88832390060 ps |
T125 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3219546611 |
|
|
Jul 26 07:02:31 PM PDT 24 |
Jul 26 07:02:48 PM PDT 24 |
2945587495 ps |
T107 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1769754636 |
|
|
Jul 26 07:03:14 PM PDT 24 |
Jul 26 07:10:34 PM PDT 24 |
80675230760 ps |
T77 |
/workspace/coverage/default/33.sram_ctrl_regwen.2968770672 |
|
|
Jul 26 07:04:54 PM PDT 24 |
Jul 26 07:17:45 PM PDT 24 |
23385286022 ps |
T21 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.734297960 |
|
|
Jul 26 07:02:35 PM PDT 24 |
Jul 26 07:03:44 PM PDT 24 |
24424585361 ps |
T46 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2039252448 |
|
|
Jul 26 07:03:10 PM PDT 24 |
Jul 26 07:03:50 PM PDT 24 |
1367905981 ps |
T14 |
/workspace/coverage/default/43.sram_ctrl_alert_test.641044634 |
|
|
Jul 26 07:06:56 PM PDT 24 |
Jul 26 07:06:57 PM PDT 24 |
16651592 ps |
T141 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.389620904 |
|
|
Jul 26 07:05:02 PM PDT 24 |
Jul 26 07:19:19 PM PDT 24 |
17550773239 ps |
T150 |
/workspace/coverage/default/20.sram_ctrl_partial_access.193694994 |
|
|
Jul 26 07:03:19 PM PDT 24 |
Jul 26 07:03:44 PM PDT 24 |
7353712995 ps |
T151 |
/workspace/coverage/default/24.sram_ctrl_regwen.450354305 |
|
|
Jul 26 07:04:02 PM PDT 24 |
Jul 26 07:06:45 PM PDT 24 |
1959665937 ps |
T152 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3780154210 |
|
|
Jul 26 07:02:48 PM PDT 24 |
Jul 26 07:02:49 PM PDT 24 |
24758210 ps |
T153 |
/workspace/coverage/default/26.sram_ctrl_bijection.3193177588 |
|
|
Jul 26 07:03:56 PM PDT 24 |
Jul 26 07:30:59 PM PDT 24 |
75394184446 ps |
T154 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2662227174 |
|
|
Jul 26 07:04:03 PM PDT 24 |
Jul 26 07:05:24 PM PDT 24 |
2844992487 ps |
T155 |
/workspace/coverage/default/43.sram_ctrl_smoke.3838815208 |
|
|
Jul 26 07:06:57 PM PDT 24 |
Jul 26 07:07:21 PM PDT 24 |
5373556276 ps |
T156 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2755342489 |
|
|
Jul 26 07:02:39 PM PDT 24 |
Jul 26 07:02:43 PM PDT 24 |
678791844 ps |
T157 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.3034170424 |
|
|
Jul 26 07:03:36 PM PDT 24 |
Jul 26 07:03:40 PM PDT 24 |
1347409262 ps |
T158 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2228029113 |
|
|
Jul 26 07:03:36 PM PDT 24 |
Jul 26 07:04:16 PM PDT 24 |
1472505200 ps |
T159 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2351590782 |
|
|
Jul 26 07:07:34 PM PDT 24 |
Jul 26 07:19:52 PM PDT 24 |
7411683098 ps |
T160 |
/workspace/coverage/default/41.sram_ctrl_smoke.4010622012 |
|
|
Jul 26 07:06:14 PM PDT 24 |
Jul 26 07:06:51 PM PDT 24 |
2992719577 ps |
T140 |
/workspace/coverage/default/36.sram_ctrl_regwen.1561366001 |
|
|
Jul 26 07:05:30 PM PDT 24 |
Jul 26 07:23:23 PM PDT 24 |
62689065802 ps |
T91 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1820079330 |
|
|
Jul 26 07:07:56 PM PDT 24 |
Jul 26 07:09:15 PM PDT 24 |
5560664741 ps |
T52 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2136332929 |
|
|
Jul 26 07:02:53 PM PDT 24 |
Jul 26 07:05:24 PM PDT 24 |
2745234943 ps |
T139 |
/workspace/coverage/default/45.sram_ctrl_regwen.2634041199 |
|
|
Jul 26 07:07:15 PM PDT 24 |
Jul 26 07:27:57 PM PDT 24 |
37784190363 ps |
T71 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3832026443 |
|
|
Jul 26 07:06:17 PM PDT 24 |
Jul 26 07:06:24 PM PDT 24 |
146787884 ps |
T108 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.626831202 |
|
|
Jul 26 07:04:56 PM PDT 24 |
Jul 26 07:10:34 PM PDT 24 |
17875983893 ps |
T161 |
/workspace/coverage/default/12.sram_ctrl_bijection.385422305 |
|
|
Jul 26 07:03:16 PM PDT 24 |
Jul 26 07:30:20 PM PDT 24 |
144048745903 ps |
T162 |
/workspace/coverage/default/20.sram_ctrl_smoke.4192271314 |
|
|
Jul 26 07:03:27 PM PDT 24 |
Jul 26 07:05:39 PM PDT 24 |
1312476465 ps |
T53 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1003514040 |
|
|
Jul 26 07:02:46 PM PDT 24 |
Jul 26 07:05:16 PM PDT 24 |
5056739210 ps |
T163 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3869096638 |
|
|
Jul 26 07:02:48 PM PDT 24 |
Jul 26 07:06:41 PM PDT 24 |
2961938701 ps |
T164 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.2642321878 |
|
|
Jul 26 07:06:05 PM PDT 24 |
Jul 26 07:10:48 PM PDT 24 |
2635206508 ps |
T144 |
/workspace/coverage/default/21.sram_ctrl_executable.2735020925 |
|
|
Jul 26 07:03:22 PM PDT 24 |
Jul 26 07:26:01 PM PDT 24 |
22634143465 ps |
T165 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2713038167 |
|
|
Jul 26 07:02:47 PM PDT 24 |
Jul 26 07:36:33 PM PDT 24 |
28389436957 ps |
T22 |
/workspace/coverage/default/44.sram_ctrl_stress_all.494658845 |
|
|
Jul 26 07:07:05 PM PDT 24 |
Jul 26 07:59:39 PM PDT 24 |
282033912611 ps |
T166 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2511243959 |
|
|
Jul 26 07:04:02 PM PDT 24 |
Jul 26 07:05:49 PM PDT 24 |
764359778 ps |
T57 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3660520278 |
|
|
Jul 26 07:07:35 PM PDT 24 |
Jul 26 07:10:31 PM PDT 24 |
22785776955 ps |
T167 |
/workspace/coverage/default/11.sram_ctrl_smoke.2688907864 |
|
|
Jul 26 07:02:53 PM PDT 24 |
Jul 26 07:04:37 PM PDT 24 |
7372541944 ps |
T168 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2042872900 |
|
|
Jul 26 07:02:53 PM PDT 24 |
Jul 26 07:03:30 PM PDT 24 |
1469900440 ps |
T92 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.472882281 |
|
|
Jul 26 07:05:02 PM PDT 24 |
Jul 26 07:31:43 PM PDT 24 |
31153996058 ps |
T109 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.951007465 |
|
|
Jul 26 07:03:21 PM PDT 24 |
Jul 26 07:08:17 PM PDT 24 |
15399800058 ps |
T93 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.1387053078 |
|
|
Jul 26 07:02:41 PM PDT 24 |
Jul 26 07:04:01 PM PDT 24 |
10988727520 ps |
T169 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.624440013 |
|
|
Jul 26 07:04:28 PM PDT 24 |
Jul 26 07:08:43 PM PDT 24 |
17909480898 ps |
T170 |
/workspace/coverage/default/33.sram_ctrl_partial_access.730138192 |
|
|
Jul 26 07:04:53 PM PDT 24 |
Jul 26 07:05:06 PM PDT 24 |
823969731 ps |
T110 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.2589206473 |
|
|
Jul 26 07:03:54 PM PDT 24 |
Jul 26 07:07:37 PM PDT 24 |
3206323548 ps |
T171 |
/workspace/coverage/default/16.sram_ctrl_executable.4271430950 |
|
|
Jul 26 07:03:07 PM PDT 24 |
Jul 26 07:07:42 PM PDT 24 |
54201342855 ps |
T111 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3656833716 |
|
|
Jul 26 07:06:25 PM PDT 24 |
Jul 26 07:13:29 PM PDT 24 |
57674235387 ps |
T143 |
/workspace/coverage/default/10.sram_ctrl_executable.1009011743 |
|
|
Jul 26 07:02:59 PM PDT 24 |
Jul 26 07:09:45 PM PDT 24 |
21359517319 ps |
T172 |
/workspace/coverage/default/47.sram_ctrl_regwen.2324781134 |
|
|
Jul 26 07:07:46 PM PDT 24 |
Jul 26 07:27:31 PM PDT 24 |
9679870995 ps |
T112 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.3681098517 |
|
|
Jul 26 07:03:18 PM PDT 24 |
Jul 26 07:08:13 PM PDT 24 |
4554539428 ps |
T173 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.3803326932 |
|
|
Jul 26 07:04:04 PM PDT 24 |
Jul 26 07:05:39 PM PDT 24 |
3124780255 ps |
T174 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.174345243 |
|
|
Jul 26 07:04:37 PM PDT 24 |
Jul 26 07:06:27 PM PDT 24 |
22679266469 ps |
T138 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3437903363 |
|
|
Jul 26 07:05:26 PM PDT 24 |
Jul 26 09:33:27 PM PDT 24 |
459793385755 ps |
T175 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.1952091516 |
|
|
Jul 26 07:03:12 PM PDT 24 |
Jul 26 07:07:31 PM PDT 24 |
4696581923 ps |
T176 |
/workspace/coverage/default/20.sram_ctrl_regwen.408781424 |
|
|
Jul 26 07:03:24 PM PDT 24 |
Jul 26 07:22:49 PM PDT 24 |
4397381204 ps |
T113 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3898329704 |
|
|
Jul 26 07:03:45 PM PDT 24 |
Jul 26 07:11:06 PM PDT 24 |
76230121725 ps |
T177 |
/workspace/coverage/default/41.sram_ctrl_regwen.943121423 |
|
|
Jul 26 07:06:24 PM PDT 24 |
Jul 26 07:25:53 PM PDT 24 |
34255336780 ps |
T178 |
/workspace/coverage/default/3.sram_ctrl_alert_test.2915893141 |
|
|
Jul 26 07:02:36 PM PDT 24 |
Jul 26 07:02:37 PM PDT 24 |
37821679 ps |
T58 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3450902952 |
|
|
Jul 26 07:07:13 PM PDT 24 |
Jul 26 07:09:54 PM PDT 24 |
11356724404 ps |
T59 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3373654342 |
|
|
Jul 26 07:03:17 PM PDT 24 |
Jul 26 07:05:40 PM PDT 24 |
12282096976 ps |
T179 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.334903090 |
|
|
Jul 26 07:06:59 PM PDT 24 |
Jul 26 07:07:02 PM PDT 24 |
350311794 ps |
T180 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1098253671 |
|
|
Jul 26 07:08:09 PM PDT 24 |
Jul 26 07:12:33 PM PDT 24 |
16412948891 ps |
T72 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1721137354 |
|
|
Jul 26 07:03:03 PM PDT 24 |
Jul 26 07:03:05 PM PDT 24 |
112829978 ps |
T181 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.2186406401 |
|
|
Jul 26 07:04:04 PM PDT 24 |
Jul 26 07:30:44 PM PDT 24 |
14480148264 ps |
T182 |
/workspace/coverage/default/33.sram_ctrl_stress_all.829757300 |
|
|
Jul 26 07:05:02 PM PDT 24 |
Jul 26 08:26:45 PM PDT 24 |
200907208256 ps |
T183 |
/workspace/coverage/default/49.sram_ctrl_bijection.1739792124 |
|
|
Jul 26 07:08:09 PM PDT 24 |
Jul 26 07:21:17 PM PDT 24 |
154687769335 ps |
T114 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.390310247 |
|
|
Jul 26 07:06:05 PM PDT 24 |
Jul 26 07:11:43 PM PDT 24 |
11850957418 ps |
T184 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.36388540 |
|
|
Jul 26 07:02:28 PM PDT 24 |
Jul 26 07:02:48 PM PDT 24 |
752835275 ps |
T185 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.2204973602 |
|
|
Jul 26 07:03:23 PM PDT 24 |
Jul 26 07:07:04 PM PDT 24 |
14809646461 ps |
T186 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3132306045 |
|
|
Jul 26 07:03:26 PM PDT 24 |
Jul 26 07:04:27 PM PDT 24 |
34526080554 ps |
T187 |
/workspace/coverage/default/45.sram_ctrl_smoke.3272412681 |
|
|
Jul 26 07:07:06 PM PDT 24 |
Jul 26 07:08:29 PM PDT 24 |
4374749974 ps |
T188 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1628240738 |
|
|
Jul 26 07:06:58 PM PDT 24 |
Jul 26 07:27:52 PM PDT 24 |
62456304602 ps |
T189 |
/workspace/coverage/default/0.sram_ctrl_smoke.2284301190 |
|
|
Jul 26 07:02:16 PM PDT 24 |
Jul 26 07:04:33 PM PDT 24 |
1775595693 ps |
T190 |
/workspace/coverage/default/27.sram_ctrl_partial_access.1716757354 |
|
|
Jul 26 07:04:12 PM PDT 24 |
Jul 26 07:04:16 PM PDT 24 |
366165895 ps |
T191 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3336383967 |
|
|
Jul 26 07:07:55 PM PDT 24 |
Jul 26 07:07:56 PM PDT 24 |
16413516 ps |
T192 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1574061353 |
|
|
Jul 26 07:04:13 PM PDT 24 |
Jul 26 07:11:47 PM PDT 24 |
18390336580 ps |
T193 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1684481584 |
|
|
Jul 26 07:02:59 PM PDT 24 |
Jul 26 07:04:48 PM PDT 24 |
15101338216 ps |
T194 |
/workspace/coverage/default/16.sram_ctrl_smoke.1185876598 |
|
|
Jul 26 07:03:02 PM PDT 24 |
Jul 26 07:03:10 PM PDT 24 |
5986344928 ps |
T195 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.1893690675 |
|
|
Jul 26 07:03:16 PM PDT 24 |
Jul 26 07:03:19 PM PDT 24 |
398957911 ps |
T196 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1172359430 |
|
|
Jul 26 07:07:36 PM PDT 24 |
Jul 26 07:09:12 PM PDT 24 |
1573484422 ps |
T197 |
/workspace/coverage/default/7.sram_ctrl_partial_access.210677124 |
|
|
Jul 26 07:02:53 PM PDT 24 |
Jul 26 07:03:12 PM PDT 24 |
2338208205 ps |
T198 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1394222394 |
|
|
Jul 26 07:03:00 PM PDT 24 |
Jul 26 07:03:58 PM PDT 24 |
29507236251 ps |
T199 |
/workspace/coverage/default/14.sram_ctrl_alert_test.4197461054 |
|
|
Jul 26 07:02:59 PM PDT 24 |
Jul 26 07:03:00 PM PDT 24 |
14514342 ps |
T200 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.4224948450 |
|
|
Jul 26 07:05:44 PM PDT 24 |
Jul 26 07:08:02 PM PDT 24 |
796320454 ps |
T201 |
/workspace/coverage/default/44.sram_ctrl_partial_access.933739300 |
|
|
Jul 26 07:06:56 PM PDT 24 |
Jul 26 07:07:43 PM PDT 24 |
1141412478 ps |
T202 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1106633800 |
|
|
Jul 26 07:03:10 PM PDT 24 |
Jul 26 08:39:26 PM PDT 24 |
83322629950 ps |
T203 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.1008344723 |
|
|
Jul 26 07:04:11 PM PDT 24 |
Jul 26 07:04:31 PM PDT 24 |
3502815892 ps |
T204 |
/workspace/coverage/default/21.sram_ctrl_partial_access.1060888393 |
|
|
Jul 26 07:03:18 PM PDT 24 |
Jul 26 07:03:31 PM PDT 24 |
3253045300 ps |
T60 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.3232138253 |
|
|
Jul 26 07:06:06 PM PDT 24 |
Jul 26 07:08:46 PM PDT 24 |
10468623080 ps |
T205 |
/workspace/coverage/default/13.sram_ctrl_executable.3158558775 |
|
|
Jul 26 07:03:13 PM PDT 24 |
Jul 26 07:05:57 PM PDT 24 |
2864535012 ps |
T206 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.536195678 |
|
|
Jul 26 07:03:32 PM PDT 24 |
Jul 26 07:05:38 PM PDT 24 |
1596200885 ps |
T207 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3643115134 |
|
|
Jul 26 07:02:30 PM PDT 24 |
Jul 26 07:02:33 PM PDT 24 |
344642375 ps |
T208 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.439587828 |
|
|
Jul 26 07:03:56 PM PDT 24 |
Jul 26 07:30:01 PM PDT 24 |
39455540628 ps |
T209 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.4102618040 |
|
|
Jul 26 07:03:20 PM PDT 24 |
Jul 26 07:04:42 PM PDT 24 |
3103079779 ps |
T210 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.862068004 |
|
|
Jul 26 07:04:37 PM PDT 24 |
Jul 26 07:08:42 PM PDT 24 |
6857167758 ps |
T211 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.3894410620 |
|
|
Jul 26 07:05:17 PM PDT 24 |
Jul 26 07:32:47 PM PDT 24 |
10067370763 ps |
T212 |
/workspace/coverage/default/17.sram_ctrl_alert_test.731305616 |
|
|
Jul 26 07:03:07 PM PDT 24 |
Jul 26 07:03:08 PM PDT 24 |
109829319 ps |
T213 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.576235967 |
|
|
Jul 26 07:06:57 PM PDT 24 |
Jul 26 07:08:10 PM PDT 24 |
1577621504 ps |
T214 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1077919460 |
|
|
Jul 26 07:02:32 PM PDT 24 |
Jul 26 07:03:35 PM PDT 24 |
2358341457 ps |
T215 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.877361553 |
|
|
Jul 26 07:07:56 PM PDT 24 |
Jul 26 07:11:29 PM PDT 24 |
9644126666 ps |
T142 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1383525807 |
|
|
Jul 26 07:04:53 PM PDT 24 |
Jul 26 07:12:22 PM PDT 24 |
109502953671 ps |
T216 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.4093062514 |
|
|
Jul 26 07:03:57 PM PDT 24 |
Jul 26 07:04:35 PM PDT 24 |
58121366850 ps |
T217 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.861443701 |
|
|
Jul 26 07:06:26 PM PDT 24 |
Jul 26 07:06:29 PM PDT 24 |
5598597248 ps |
T218 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.1444549018 |
|
|
Jul 26 07:03:38 PM PDT 24 |
Jul 26 07:09:02 PM PDT 24 |
21408364299 ps |
T219 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.572655091 |
|
|
Jul 26 07:05:19 PM PDT 24 |
Jul 26 07:13:52 PM PDT 24 |
21339167508 ps |
T220 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1403595044 |
|
|
Jul 26 07:08:07 PM PDT 24 |
Jul 26 07:08:11 PM PDT 24 |
708654371 ps |
T221 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3699646374 |
|
|
Jul 26 07:05:54 PM PDT 24 |
Jul 26 07:06:39 PM PDT 24 |
742931020 ps |
T222 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.1937548212 |
|
|
Jul 26 07:03:03 PM PDT 24 |
Jul 26 07:08:51 PM PDT 24 |
94120128481 ps |
T223 |
/workspace/coverage/default/38.sram_ctrl_regwen.1049238437 |
|
|
Jul 26 07:05:54 PM PDT 24 |
Jul 26 07:31:50 PM PDT 24 |
13893021787 ps |
T224 |
/workspace/coverage/default/46.sram_ctrl_smoke.3605213500 |
|
|
Jul 26 07:07:26 PM PDT 24 |
Jul 26 07:07:47 PM PDT 24 |
1202512205 ps |
T225 |
/workspace/coverage/default/8.sram_ctrl_executable.2442082354 |
|
|
Jul 26 07:02:48 PM PDT 24 |
Jul 26 07:25:22 PM PDT 24 |
78297544631 ps |
T226 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2898624051 |
|
|
Jul 26 07:03:56 PM PDT 24 |
Jul 26 07:26:44 PM PDT 24 |
28416825353 ps |
T227 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3455067676 |
|
|
Jul 26 07:04:46 PM PDT 24 |
Jul 26 07:04:49 PM PDT 24 |
1409895943 ps |
T228 |
/workspace/coverage/default/3.sram_ctrl_executable.444370552 |
|
|
Jul 26 07:02:46 PM PDT 24 |
Jul 26 07:20:41 PM PDT 24 |
57940958624 ps |
T229 |
/workspace/coverage/default/0.sram_ctrl_bijection.1502903557 |
|
|
Jul 26 07:02:23 PM PDT 24 |
Jul 26 07:43:50 PM PDT 24 |
126760315424 ps |
T230 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3150979369 |
|
|
Jul 26 07:03:03 PM PDT 24 |
Jul 26 07:04:18 PM PDT 24 |
14797170592 ps |
T231 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.372922162 |
|
|
Jul 26 07:03:02 PM PDT 24 |
Jul 26 07:05:01 PM PDT 24 |
12740942012 ps |
T232 |
/workspace/coverage/default/6.sram_ctrl_regwen.4046906727 |
|
|
Jul 26 07:02:45 PM PDT 24 |
Jul 26 07:07:23 PM PDT 24 |
906719225 ps |
T233 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1563749211 |
|
|
Jul 26 07:07:05 PM PDT 24 |
Jul 26 07:07:29 PM PDT 24 |
19141783704 ps |
T234 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.3406845429 |
|
|
Jul 26 07:06:16 PM PDT 24 |
Jul 26 07:23:09 PM PDT 24 |
22290738423 ps |
T235 |
/workspace/coverage/default/35.sram_ctrl_alert_test.3050037491 |
|
|
Jul 26 07:05:18 PM PDT 24 |
Jul 26 07:05:18 PM PDT 24 |
95953320 ps |
T236 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3774660945 |
|
|
Jul 26 07:04:12 PM PDT 24 |
Jul 26 07:07:11 PM PDT 24 |
2325607481 ps |
T237 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2000701186 |
|
|
Jul 26 07:03:04 PM PDT 24 |
Jul 26 07:04:35 PM PDT 24 |
2436388412 ps |
T238 |
/workspace/coverage/default/0.sram_ctrl_alert_test.4077020058 |
|
|
Jul 26 07:02:30 PM PDT 24 |
Jul 26 07:02:31 PM PDT 24 |
21440796 ps |
T239 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.404472934 |
|
|
Jul 26 07:02:44 PM PDT 24 |
Jul 26 07:03:16 PM PDT 24 |
2839308020 ps |
T240 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.725240181 |
|
|
Jul 26 07:08:08 PM PDT 24 |
Jul 26 07:10:46 PM PDT 24 |
1343423634 ps |
T241 |
/workspace/coverage/default/20.sram_ctrl_stress_all.682165287 |
|
|
Jul 26 07:03:21 PM PDT 24 |
Jul 26 08:58:16 PM PDT 24 |
217208820793 ps |
T242 |
/workspace/coverage/default/3.sram_ctrl_smoke.2454238850 |
|
|
Jul 26 07:02:28 PM PDT 24 |
Jul 26 07:02:49 PM PDT 24 |
6654554338 ps |
T243 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.591729710 |
|
|
Jul 26 07:07:45 PM PDT 24 |
Jul 26 07:13:21 PM PDT 24 |
15873999031 ps |
T244 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1416814651 |
|
|
Jul 26 07:04:37 PM PDT 24 |
Jul 26 07:12:30 PM PDT 24 |
40095756199 ps |
T245 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1328550667 |
|
|
Jul 26 07:04:12 PM PDT 24 |
Jul 26 07:06:06 PM PDT 24 |
786847639 ps |
T246 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3777581196 |
|
|
Jul 26 07:02:50 PM PDT 24 |
Jul 26 07:21:01 PM PDT 24 |
131462530214 ps |
T247 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2172668735 |
|
|
Jul 26 07:03:07 PM PDT 24 |
Jul 26 07:04:19 PM PDT 24 |
51383021741 ps |
T248 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.513209967 |
|
|
Jul 26 07:07:25 PM PDT 24 |
Jul 26 07:08:28 PM PDT 24 |
20727108294 ps |
T249 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1696885274 |
|
|
Jul 26 07:07:05 PM PDT 24 |
Jul 26 07:07:10 PM PDT 24 |
678216777 ps |
T250 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2601577480 |
|
|
Jul 26 07:07:09 PM PDT 24 |
Jul 26 07:07:13 PM PDT 24 |
4215592016 ps |
T251 |
/workspace/coverage/default/17.sram_ctrl_smoke.1165957415 |
|
|
Jul 26 07:03:02 PM PDT 24 |
Jul 26 07:03:58 PM PDT 24 |
746656471 ps |
T252 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.1840106582 |
|
|
Jul 26 07:05:26 PM PDT 24 |
Jul 26 07:05:35 PM PDT 24 |
685437351 ps |
T73 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.4238835950 |
|
|
Jul 26 07:05:11 PM PDT 24 |
Jul 26 07:05:24 PM PDT 24 |
1420630252 ps |
T253 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.4281447171 |
|
|
Jul 26 07:02:26 PM PDT 24 |
Jul 26 07:05:19 PM PDT 24 |
37426480229 ps |
T254 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.372000076 |
|
|
Jul 26 07:02:52 PM PDT 24 |
Jul 26 07:02:56 PM PDT 24 |
355919045 ps |
T255 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3758115311 |
|
|
Jul 26 07:07:46 PM PDT 24 |
Jul 26 07:12:23 PM PDT 24 |
77108487829 ps |
T256 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.3389338874 |
|
|
Jul 26 07:03:45 PM PDT 24 |
Jul 26 07:04:51 PM PDT 24 |
4002506441 ps |
T257 |
/workspace/coverage/default/25.sram_ctrl_smoke.859499189 |
|
|
Jul 26 07:03:53 PM PDT 24 |
Jul 26 07:04:10 PM PDT 24 |
1178003177 ps |
T258 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.95238221 |
|
|
Jul 26 07:06:24 PM PDT 24 |
Jul 26 07:36:29 PM PDT 24 |
71417258211 ps |
T259 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.2725744938 |
|
|
Jul 26 07:04:28 PM PDT 24 |
Jul 26 07:13:23 PM PDT 24 |
12263966159 ps |
T260 |
/workspace/coverage/default/15.sram_ctrl_bijection.849104443 |
|
|
Jul 26 07:03:00 PM PDT 24 |
Jul 26 07:43:58 PM PDT 24 |
206620789072 ps |
T261 |
/workspace/coverage/default/0.sram_ctrl_partial_access.37082938 |
|
|
Jul 26 07:02:19 PM PDT 24 |
Jul 26 07:02:28 PM PDT 24 |
736282814 ps |
T262 |
/workspace/coverage/default/15.sram_ctrl_partial_access.2280547724 |
|
|
Jul 26 07:03:02 PM PDT 24 |
Jul 26 07:03:07 PM PDT 24 |
381273114 ps |
T263 |
/workspace/coverage/default/1.sram_ctrl_stress_all.194574938 |
|
|
Jul 26 07:02:35 PM PDT 24 |
Jul 26 08:13:11 PM PDT 24 |
1373029135899 ps |
T74 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3155262280 |
|
|
Jul 26 07:03:46 PM PDT 24 |
Jul 26 07:04:00 PM PDT 24 |
469837206 ps |
T264 |
/workspace/coverage/default/20.sram_ctrl_bijection.2354585527 |
|
|
Jul 26 07:03:17 PM PDT 24 |
Jul 26 07:37:21 PM PDT 24 |
90194962814 ps |
T265 |
/workspace/coverage/default/34.sram_ctrl_regwen.712339471 |
|
|
Jul 26 07:05:11 PM PDT 24 |
Jul 26 07:17:31 PM PDT 24 |
5001059716 ps |
T266 |
/workspace/coverage/default/16.sram_ctrl_stress_all.398844893 |
|
|
Jul 26 07:03:06 PM PDT 24 |
Jul 26 08:10:28 PM PDT 24 |
286871182016 ps |
T267 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2920061342 |
|
|
Jul 26 07:02:50 PM PDT 24 |
Jul 26 07:03:58 PM PDT 24 |
23472945453 ps |
T268 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2191274084 |
|
|
Jul 26 07:04:21 PM PDT 24 |
Jul 26 07:10:07 PM PDT 24 |
27572104572 ps |
T269 |
/workspace/coverage/default/30.sram_ctrl_regwen.2419648608 |
|
|
Jul 26 07:04:38 PM PDT 24 |
Jul 26 07:19:58 PM PDT 24 |
11849266984 ps |
T270 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.312667385 |
|
|
Jul 26 07:03:10 PM PDT 24 |
Jul 26 07:06:33 PM PDT 24 |
5222933860 ps |
T271 |
/workspace/coverage/default/25.sram_ctrl_alert_test.3300967530 |
|
|
Jul 26 07:03:54 PM PDT 24 |
Jul 26 07:03:55 PM PDT 24 |
32522706 ps |
T272 |
/workspace/coverage/default/36.sram_ctrl_smoke.3885172369 |
|
|
Jul 26 07:05:19 PM PDT 24 |
Jul 26 07:06:24 PM PDT 24 |
886174268 ps |
T273 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.168630192 |
|
|
Jul 26 07:04:20 PM PDT 24 |
Jul 26 07:05:19 PM PDT 24 |
18038925011 ps |
T274 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.3689768754 |
|
|
Jul 26 07:02:26 PM PDT 24 |
Jul 26 07:05:05 PM PDT 24 |
8918148013 ps |
T275 |
/workspace/coverage/default/25.sram_ctrl_executable.2869542818 |
|
|
Jul 26 07:04:03 PM PDT 24 |
Jul 26 07:21:21 PM PDT 24 |
26274067627 ps |
T276 |
/workspace/coverage/default/38.sram_ctrl_executable.620854194 |
|
|
Jul 26 07:05:53 PM PDT 24 |
Jul 26 07:08:43 PM PDT 24 |
1716364606 ps |
T277 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3299264583 |
|
|
Jul 26 07:02:24 PM PDT 24 |
Jul 26 07:04:51 PM PDT 24 |
1839037867 ps |
T278 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3004584028 |
|
|
Jul 26 07:02:48 PM PDT 24 |
Jul 26 07:02:49 PM PDT 24 |
73618059 ps |
T279 |
/workspace/coverage/default/30.sram_ctrl_stress_all.2047916392 |
|
|
Jul 26 07:04:38 PM PDT 24 |
Jul 26 08:38:15 PM PDT 24 |
88274252765 ps |
T280 |
/workspace/coverage/default/45.sram_ctrl_partial_access.382260301 |
|
|
Jul 26 07:07:15 PM PDT 24 |
Jul 26 07:07:23 PM PDT 24 |
2882784137 ps |
T281 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.359553619 |
|
|
Jul 26 07:02:47 PM PDT 24 |
Jul 26 07:10:02 PM PDT 24 |
30647792350 ps |
T282 |
/workspace/coverage/default/34.sram_ctrl_bijection.1347877867 |
|
|
Jul 26 07:05:02 PM PDT 24 |
Jul 26 07:51:24 PM PDT 24 |
479192492490 ps |
T283 |
/workspace/coverage/default/18.sram_ctrl_alert_test.624077927 |
|
|
Jul 26 07:03:15 PM PDT 24 |
Jul 26 07:03:16 PM PDT 24 |
104417590 ps |
T284 |
/workspace/coverage/default/6.sram_ctrl_smoke.1040961650 |
|
|
Jul 26 07:02:52 PM PDT 24 |
Jul 26 07:03:36 PM PDT 24 |
1070396423 ps |
T285 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.2450249311 |
|
|
Jul 26 07:06:16 PM PDT 24 |
Jul 26 07:06:20 PM PDT 24 |
1677466941 ps |
T286 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3098572406 |
|
|
Jul 26 07:02:56 PM PDT 24 |
Jul 26 07:08:42 PM PDT 24 |
12282095441 ps |
T287 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3243124065 |
|
|
Jul 26 07:04:48 PM PDT 24 |
Jul 26 07:07:47 PM PDT 24 |
20694938088 ps |
T75 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.711740394 |
|
|
Jul 26 07:02:35 PM PDT 24 |
Jul 26 07:02:46 PM PDT 24 |
1517550434 ps |
T288 |
/workspace/coverage/default/42.sram_ctrl_regwen.3138207481 |
|
|
Jul 26 07:06:58 PM PDT 24 |
Jul 26 07:11:09 PM PDT 24 |
9487557818 ps |
T289 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2255970263 |
|
|
Jul 26 07:02:54 PM PDT 24 |
Jul 26 07:09:18 PM PDT 24 |
18579059022 ps |
T290 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1909107969 |
|
|
Jul 26 07:07:09 PM PDT 24 |
Jul 26 07:10:19 PM PDT 24 |
14003215853 ps |
T291 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.247241758 |
|
|
Jul 26 07:04:30 PM PDT 24 |
Jul 26 07:07:56 PM PDT 24 |
9258810763 ps |
T61 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.1860257960 |
|
|
Jul 26 07:06:16 PM PDT 24 |
Jul 26 07:08:55 PM PDT 24 |
5587788805 ps |
T292 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.4287757425 |
|
|
Jul 26 07:04:54 PM PDT 24 |
Jul 26 07:13:37 PM PDT 24 |
8172734054 ps |
T293 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.2224438355 |
|
|
Jul 26 07:03:11 PM PDT 24 |
Jul 26 07:06:05 PM PDT 24 |
3265545888 ps |
T294 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.520228058 |
|
|
Jul 26 07:02:36 PM PDT 24 |
Jul 26 07:24:29 PM PDT 24 |
48633855241 ps |
T295 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1508102899 |
|
|
Jul 26 07:04:31 PM PDT 24 |
Jul 26 07:05:25 PM PDT 24 |
1213298851 ps |
T296 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3306710553 |
|
|
Jul 26 07:03:04 PM PDT 24 |
Jul 26 07:03:17 PM PDT 24 |
298097931 ps |
T297 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.1458754613 |
|
|
Jul 26 07:04:05 PM PDT 24 |
Jul 26 07:04:09 PM PDT 24 |
359784140 ps |
T62 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1862133163 |
|
|
Jul 26 07:04:05 PM PDT 24 |
Jul 26 07:06:31 PM PDT 24 |
10105441558 ps |
T298 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3014459197 |
|
|
Jul 26 07:03:03 PM PDT 24 |
Jul 26 07:03:14 PM PDT 24 |
693822217 ps |
T299 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.1643874951 |
|
|
Jul 26 07:06:04 PM PDT 24 |
Jul 26 07:11:19 PM PDT 24 |
5693757095 ps |
T300 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3296257643 |
|
|
Jul 26 07:07:46 PM PDT 24 |
Jul 26 07:11:24 PM PDT 24 |
5861692369 ps |
T301 |
/workspace/coverage/default/42.sram_ctrl_smoke.177849005 |
|
|
Jul 26 07:06:35 PM PDT 24 |
Jul 26 07:06:45 PM PDT 24 |
7057879660 ps |
T302 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.889020972 |
|
|
Jul 26 07:02:52 PM PDT 24 |
Jul 26 07:11:04 PM PDT 24 |
7243530960 ps |
T303 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1062508130 |
|
|
Jul 26 07:02:43 PM PDT 24 |
Jul 26 07:03:23 PM PDT 24 |
2979154109 ps |
T304 |
/workspace/coverage/default/10.sram_ctrl_smoke.3210466385 |
|
|
Jul 26 07:02:52 PM PDT 24 |
Jul 26 07:03:05 PM PDT 24 |
809311670 ps |
T305 |
/workspace/coverage/default/29.sram_ctrl_executable.2691041973 |
|
|
Jul 26 07:04:20 PM PDT 24 |
Jul 26 07:11:06 PM PDT 24 |
30277182989 ps |
T306 |
/workspace/coverage/default/10.sram_ctrl_regwen.2049758232 |
|
|
Jul 26 07:03:03 PM PDT 24 |
Jul 26 07:27:20 PM PDT 24 |
3287530187 ps |
T307 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3467256640 |
|
|
Jul 26 07:05:42 PM PDT 24 |
Jul 26 07:07:53 PM PDT 24 |
3085241430 ps |
T308 |
/workspace/coverage/default/17.sram_ctrl_executable.3259623083 |
|
|
Jul 26 07:03:06 PM PDT 24 |
Jul 26 07:16:41 PM PDT 24 |
45118696611 ps |
T309 |
/workspace/coverage/default/22.sram_ctrl_alert_test.571405183 |
|
|
Jul 26 07:03:47 PM PDT 24 |
Jul 26 07:03:47 PM PDT 24 |
15893904 ps |
T310 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4106323874 |
|
|
Jul 26 07:02:29 PM PDT 24 |
Jul 26 07:07:03 PM PDT 24 |
9455826475 ps |
T311 |
/workspace/coverage/default/8.sram_ctrl_regwen.2494653433 |
|
|
Jul 26 07:02:51 PM PDT 24 |
Jul 26 07:25:05 PM PDT 24 |
5120777174 ps |
T312 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.658476361 |
|
|
Jul 26 07:02:38 PM PDT 24 |
Jul 26 07:07:18 PM PDT 24 |
13097364378 ps |
T313 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2589054873 |
|
|
Jul 26 07:07:08 PM PDT 24 |
Jul 26 07:09:57 PM PDT 24 |
20943987542 ps |
T314 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1563619837 |
|
|
Jul 26 07:05:54 PM PDT 24 |
Jul 26 07:06:36 PM PDT 24 |
2832756101 ps |
T315 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2613702588 |
|
|
Jul 26 07:03:54 PM PDT 24 |
Jul 26 07:07:54 PM PDT 24 |
4401636450 ps |