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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total test records in report: 1032
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T557 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.3842355302 Jul 29 06:53:31 PM PDT 24 Jul 29 06:56:53 PM PDT 24 5982421372 ps
T558 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.1123543321 Jul 29 06:53:19 PM PDT 24 Jul 29 06:58:11 PM PDT 24 3938854855 ps
T559 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.3177905314 Jul 29 06:59:07 PM PDT 24 Jul 29 07:20:14 PM PDT 24 27141789882 ps
T560 /workspace/coverage/default/43.sram_ctrl_max_throughput.2452993777 Jul 29 06:58:53 PM PDT 24 Jul 29 07:01:17 PM PDT 24 3039748912 ps
T561 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4268665729 Jul 29 06:52:18 PM PDT 24 Jul 29 06:52:41 PM PDT 24 3276885440 ps
T562 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.1541624927 Jul 29 06:53:08 PM PDT 24 Jul 29 07:12:57 PM PDT 24 15240836694 ps
T563 /workspace/coverage/default/48.sram_ctrl_regwen.2310606807 Jul 29 07:00:31 PM PDT 24 Jul 29 07:15:54 PM PDT 24 53381891133 ps
T564 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3327720252 Jul 29 06:52:49 PM PDT 24 Jul 29 06:58:43 PM PDT 24 44712696565 ps
T565 /workspace/coverage/default/2.sram_ctrl_multiple_keys.564606726 Jul 29 06:52:19 PM PDT 24 Jul 29 07:14:38 PM PDT 24 62577971407 ps
T566 /workspace/coverage/default/18.sram_ctrl_multiple_keys.3814922263 Jul 29 06:53:52 PM PDT 24 Jul 29 07:00:02 PM PDT 24 96052378758 ps
T567 /workspace/coverage/default/8.sram_ctrl_executable.1797058791 Jul 29 06:52:47 PM PDT 24 Jul 29 07:03:41 PM PDT 24 17363031160 ps
T568 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2824220843 Jul 29 06:58:38 PM PDT 24 Jul 29 06:59:32 PM PDT 24 8269029938 ps
T569 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.1946940494 Jul 29 06:52:40 PM PDT 24 Jul 29 06:57:37 PM PDT 24 9717252114 ps
T570 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1286789504 Jul 29 06:52:18 PM PDT 24 Jul 29 06:55:53 PM PDT 24 18726511973 ps
T571 /workspace/coverage/default/42.sram_ctrl_multiple_keys.3421244036 Jul 29 06:58:38 PM PDT 24 Jul 29 07:24:43 PM PDT 24 19951267375 ps
T572 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1250458021 Jul 29 07:00:33 PM PDT 24 Jul 29 07:06:25 PM PDT 24 28306316238 ps
T573 /workspace/coverage/default/16.sram_ctrl_multiple_keys.470995001 Jul 29 06:53:30 PM PDT 24 Jul 29 07:07:54 PM PDT 24 67936066191 ps
T111 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3698860117 Jul 29 06:55:35 PM PDT 24 Jul 29 06:56:03 PM PDT 24 2337695254 ps
T574 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2775382920 Jul 29 06:53:25 PM PDT 24 Jul 29 06:53:31 PM PDT 24 3030473303 ps
T575 /workspace/coverage/default/35.sram_ctrl_regwen.1821482360 Jul 29 06:57:28 PM PDT 24 Jul 29 07:18:14 PM PDT 24 71578265439 ps
T576 /workspace/coverage/default/35.sram_ctrl_multiple_keys.1278321095 Jul 29 06:57:23 PM PDT 24 Jul 29 07:03:57 PM PDT 24 33991811344 ps
T577 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.1737213350 Jul 29 06:54:19 PM PDT 24 Jul 29 06:55:45 PM PDT 24 7402270358 ps
T578 /workspace/coverage/default/1.sram_ctrl_regwen.1674206780 Jul 29 06:52:20 PM PDT 24 Jul 29 07:10:07 PM PDT 24 39198248469 ps
T579 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.203290815 Jul 29 06:58:43 PM PDT 24 Jul 29 07:04:48 PM PDT 24 5294809758 ps
T580 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.2057959187 Jul 29 06:55:08 PM PDT 24 Jul 29 06:59:57 PM PDT 24 4107407820 ps
T581 /workspace/coverage/default/19.sram_ctrl_smoke.3342646470 Jul 29 06:54:04 PM PDT 24 Jul 29 06:54:17 PM PDT 24 1117826182 ps
T582 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.966802641 Jul 29 06:54:14 PM PDT 24 Jul 29 06:57:46 PM PDT 24 3168971199 ps
T583 /workspace/coverage/default/1.sram_ctrl_max_throughput.1307889100 Jul 29 06:52:18 PM PDT 24 Jul 29 06:52:31 PM PDT 24 1443542648 ps
T584 /workspace/coverage/default/17.sram_ctrl_multiple_keys.2366970329 Jul 29 06:53:39 PM PDT 24 Jul 29 07:11:16 PM PDT 24 446615994853 ps
T585 /workspace/coverage/default/16.sram_ctrl_partial_access.4030426987 Jul 29 06:53:31 PM PDT 24 Jul 29 06:55:51 PM PDT 24 5237085438 ps
T586 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3533218782 Jul 29 06:57:08 PM PDT 24 Jul 29 06:57:12 PM PDT 24 360467066 ps
T587 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.722968367 Jul 29 06:55:11 PM PDT 24 Jul 29 06:59:53 PM PDT 24 47837558208 ps
T588 /workspace/coverage/default/38.sram_ctrl_max_throughput.3844947971 Jul 29 06:58:00 PM PDT 24 Jul 29 06:58:15 PM PDT 24 2764100340 ps
T589 /workspace/coverage/default/18.sram_ctrl_partial_access.586497876 Jul 29 06:53:49 PM PDT 24 Jul 29 06:54:36 PM PDT 24 910071504 ps
T590 /workspace/coverage/default/18.sram_ctrl_stress_all.683371353 Jul 29 06:54:00 PM PDT 24 Jul 29 06:57:12 PM PDT 24 162282362361 ps
T591 /workspace/coverage/default/23.sram_ctrl_smoke.2249922221 Jul 29 06:54:45 PM PDT 24 Jul 29 06:54:49 PM PDT 24 787708020 ps
T592 /workspace/coverage/default/31.sram_ctrl_bijection.333627322 Jul 29 06:56:36 PM PDT 24 Jul 29 07:13:30 PM PDT 24 29533355325 ps
T45 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2778772254 Jul 29 06:56:21 PM PDT 24 Jul 29 06:57:36 PM PDT 24 9063994866 ps
T593 /workspace/coverage/default/26.sram_ctrl_smoke.4049489409 Jul 29 06:55:34 PM PDT 24 Jul 29 06:55:55 PM PDT 24 1106546000 ps
T594 /workspace/coverage/default/12.sram_ctrl_lc_escalation.3205424624 Jul 29 06:53:06 PM PDT 24 Jul 29 06:53:43 PM PDT 24 76606823223 ps
T595 /workspace/coverage/default/11.sram_ctrl_ram_cfg.2392752023 Jul 29 06:53:04 PM PDT 24 Jul 29 06:53:07 PM PDT 24 351214830 ps
T596 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1458814921 Jul 29 06:52:47 PM PDT 24 Jul 29 06:53:28 PM PDT 24 1792438261 ps
T597 /workspace/coverage/default/39.sram_ctrl_partial_access.1641793396 Jul 29 06:58:04 PM PDT 24 Jul 29 06:58:25 PM PDT 24 1271516776 ps
T598 /workspace/coverage/default/3.sram_ctrl_executable.129996644 Jul 29 06:52:31 PM PDT 24 Jul 29 07:24:18 PM PDT 24 126288110776 ps
T599 /workspace/coverage/default/40.sram_ctrl_stress_all.183067154 Jul 29 06:58:28 PM PDT 24 Jul 29 08:52:46 PM PDT 24 254892273481 ps
T600 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3840501304 Jul 29 06:57:18 PM PDT 24 Jul 29 06:59:36 PM PDT 24 1697031327 ps
T601 /workspace/coverage/default/13.sram_ctrl_lc_escalation.1275676450 Jul 29 06:53:08 PM PDT 24 Jul 29 06:54:01 PM PDT 24 24519203988 ps
T602 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.284596796 Jul 29 06:55:38 PM PDT 24 Jul 29 06:59:25 PM PDT 24 11499139409 ps
T603 /workspace/coverage/default/44.sram_ctrl_mem_walk.1571266775 Jul 29 06:59:12 PM PDT 24 Jul 29 07:05:16 PM PDT 24 172615035298 ps
T604 /workspace/coverage/default/39.sram_ctrl_alert_test.356947480 Jul 29 06:58:12 PM PDT 24 Jul 29 06:58:13 PM PDT 24 17988247 ps
T605 /workspace/coverage/default/43.sram_ctrl_partial_access.1865025788 Jul 29 06:58:54 PM PDT 24 Jul 29 06:59:05 PM PDT 24 996005499 ps
T606 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1085198666 Jul 29 06:53:04 PM PDT 24 Jul 29 06:53:10 PM PDT 24 2805605303 ps
T607 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2991831562 Jul 29 06:58:33 PM PDT 24 Jul 29 07:04:32 PM PDT 24 130733881809 ps
T608 /workspace/coverage/default/4.sram_ctrl_mem_walk.529355692 Jul 29 06:52:39 PM PDT 24 Jul 29 06:55:31 PM PDT 24 9105133669 ps
T609 /workspace/coverage/default/35.sram_ctrl_stress_all.2891809201 Jul 29 06:57:28 PM PDT 24 Jul 29 08:33:18 PM PDT 24 59067891535 ps
T610 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.3994345676 Jul 29 06:57:34 PM PDT 24 Jul 29 07:11:39 PM PDT 24 13574593936 ps
T611 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3330132098 Jul 29 06:57:09 PM PDT 24 Jul 29 06:58:13 PM PDT 24 52397756468 ps
T612 /workspace/coverage/default/29.sram_ctrl_executable.3065813399 Jul 29 06:56:22 PM PDT 24 Jul 29 07:00:25 PM PDT 24 21848731542 ps
T613 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.2395833178 Jul 29 06:54:19 PM PDT 24 Jul 29 07:07:42 PM PDT 24 31265626792 ps
T614 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.2818908444 Jul 29 06:58:50 PM PDT 24 Jul 29 07:00:08 PM PDT 24 2363686370 ps
T615 /workspace/coverage/default/3.sram_ctrl_alert_test.3674187377 Jul 29 06:52:29 PM PDT 24 Jul 29 06:52:30 PM PDT 24 185579929 ps
T616 /workspace/coverage/default/48.sram_ctrl_alert_test.2727422231 Jul 29 07:00:42 PM PDT 24 Jul 29 07:00:43 PM PDT 24 13798691 ps
T617 /workspace/coverage/default/33.sram_ctrl_max_throughput.1277191897 Jul 29 06:57:06 PM PDT 24 Jul 29 06:57:15 PM PDT 24 687265142 ps
T618 /workspace/coverage/default/8.sram_ctrl_mem_walk.3565915494 Jul 29 06:52:45 PM PDT 24 Jul 29 06:55:56 PM PDT 24 43066974738 ps
T619 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2210548163 Jul 29 06:57:14 PM PDT 24 Jul 29 07:00:35 PM PDT 24 5712201403 ps
T620 /workspace/coverage/default/5.sram_ctrl_smoke.4023926772 Jul 29 06:52:42 PM PDT 24 Jul 29 06:52:53 PM PDT 24 5834497214 ps
T621 /workspace/coverage/default/30.sram_ctrl_stress_all.3376801066 Jul 29 06:56:30 PM PDT 24 Jul 29 08:38:28 PM PDT 24 81487760162 ps
T622 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.3020730636 Jul 29 06:56:42 PM PDT 24 Jul 29 07:08:28 PM PDT 24 21156225909 ps
T623 /workspace/coverage/default/47.sram_ctrl_bijection.3255120798 Jul 29 07:00:07 PM PDT 24 Jul 29 07:19:28 PM PDT 24 50764322770 ps
T624 /workspace/coverage/default/27.sram_ctrl_partial_access.1266966376 Jul 29 06:55:54 PM PDT 24 Jul 29 06:56:41 PM PDT 24 1806090640 ps
T625 /workspace/coverage/default/26.sram_ctrl_regwen.3965544385 Jul 29 06:55:48 PM PDT 24 Jul 29 07:04:00 PM PDT 24 2483371944 ps
T626 /workspace/coverage/default/41.sram_ctrl_mem_walk.655560907 Jul 29 06:58:33 PM PDT 24 Jul 29 07:00:46 PM PDT 24 1978458992 ps
T627 /workspace/coverage/default/41.sram_ctrl_ram_cfg.686113492 Jul 29 06:58:33 PM PDT 24 Jul 29 06:58:36 PM PDT 24 369123728 ps
T628 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3008716790 Jul 29 06:57:49 PM PDT 24 Jul 29 07:01:31 PM PDT 24 8025067277 ps
T629 /workspace/coverage/default/3.sram_ctrl_partial_access.1615139300 Jul 29 06:52:30 PM PDT 24 Jul 29 06:52:54 PM PDT 24 3482308370 ps
T630 /workspace/coverage/default/49.sram_ctrl_executable.2467048726 Jul 29 07:00:46 PM PDT 24 Jul 29 07:24:40 PM PDT 24 29850565980 ps
T631 /workspace/coverage/default/6.sram_ctrl_ram_cfg.2616239464 Jul 29 06:52:42 PM PDT 24 Jul 29 06:52:46 PM PDT 24 1341481119 ps
T632 /workspace/coverage/default/15.sram_ctrl_stress_all.3262104664 Jul 29 06:53:30 PM PDT 24 Jul 29 07:38:51 PM PDT 24 50600132706 ps
T633 /workspace/coverage/default/13.sram_ctrl_partial_access.2342742607 Jul 29 06:53:08 PM PDT 24 Jul 29 06:53:19 PM PDT 24 797265034 ps
T634 /workspace/coverage/default/22.sram_ctrl_alert_test.2950463884 Jul 29 06:54:45 PM PDT 24 Jul 29 06:54:46 PM PDT 24 38748595 ps
T635 /workspace/coverage/default/37.sram_ctrl_partial_access.4105994874 Jul 29 06:57:44 PM PDT 24 Jul 29 06:57:54 PM PDT 24 3121550156 ps
T636 /workspace/coverage/default/7.sram_ctrl_multiple_keys.954459892 Jul 29 06:52:41 PM PDT 24 Jul 29 06:58:14 PM PDT 24 34673569489 ps
T637 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1640891578 Jul 29 06:57:54 PM PDT 24 Jul 29 07:02:03 PM PDT 24 10792397214 ps
T638 /workspace/coverage/default/44.sram_ctrl_lc_escalation.1623226736 Jul 29 06:59:13 PM PDT 24 Jul 29 07:00:10 PM PDT 24 8582859455 ps
T639 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.668447605 Jul 29 06:53:13 PM PDT 24 Jul 29 06:59:34 PM PDT 24 57608574618 ps
T640 /workspace/coverage/default/37.sram_ctrl_max_throughput.1398752205 Jul 29 06:57:44 PM PDT 24 Jul 29 06:58:30 PM PDT 24 2907203761 ps
T641 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2407947142 Jul 29 06:59:36 PM PDT 24 Jul 29 07:01:40 PM PDT 24 828903938 ps
T642 /workspace/coverage/default/9.sram_ctrl_multiple_keys.1267025870 Jul 29 06:52:49 PM PDT 24 Jul 29 06:55:30 PM PDT 24 4971997074 ps
T643 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.281877165 Jul 29 06:57:30 PM PDT 24 Jul 29 06:57:40 PM PDT 24 1408957344 ps
T644 /workspace/coverage/default/13.sram_ctrl_stress_all.2228663426 Jul 29 06:53:14 PM PDT 24 Jul 29 07:26:48 PM PDT 24 299463732586 ps
T645 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.545682218 Jul 29 06:56:42 PM PDT 24 Jul 29 06:56:49 PM PDT 24 683380159 ps
T646 /workspace/coverage/default/31.sram_ctrl_lc_escalation.766903120 Jul 29 06:56:42 PM PDT 24 Jul 29 06:58:32 PM PDT 24 231941708661 ps
T647 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.682046567 Jul 29 06:52:10 PM PDT 24 Jul 29 06:58:57 PM PDT 24 5396049476 ps
T648 /workspace/coverage/default/6.sram_ctrl_partial_access.770052704 Jul 29 06:52:47 PM PDT 24 Jul 29 06:52:58 PM PDT 24 6288891142 ps
T649 /workspace/coverage/default/41.sram_ctrl_max_throughput.1010334908 Jul 29 06:58:34 PM PDT 24 Jul 29 06:59:51 PM PDT 24 780690473 ps
T650 /workspace/coverage/default/36.sram_ctrl_lc_escalation.3018341189 Jul 29 06:57:35 PM PDT 24 Jul 29 06:57:59 PM PDT 24 15294363976 ps
T651 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.1691640939 Jul 29 07:00:47 PM PDT 24 Jul 29 07:14:34 PM PDT 24 78533351589 ps
T652 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.272143947 Jul 29 06:57:51 PM PDT 24 Jul 29 06:59:18 PM PDT 24 10723211020 ps
T653 /workspace/coverage/default/6.sram_ctrl_alert_test.2384482376 Jul 29 06:52:43 PM PDT 24 Jul 29 06:52:44 PM PDT 24 96593556 ps
T654 /workspace/coverage/default/14.sram_ctrl_executable.4246834792 Jul 29 06:53:20 PM PDT 24 Jul 29 07:17:24 PM PDT 24 30094776327 ps
T655 /workspace/coverage/default/27.sram_ctrl_regwen.363554907 Jul 29 06:56:03 PM PDT 24 Jul 29 07:13:33 PM PDT 24 51814334883 ps
T656 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4097561409 Jul 29 06:52:43 PM PDT 24 Jul 29 06:52:56 PM PDT 24 1391676286 ps
T17 /workspace/coverage/default/4.sram_ctrl_sec_cm.3950102923 Jul 29 06:52:41 PM PDT 24 Jul 29 06:52:43 PM PDT 24 435501279 ps
T657 /workspace/coverage/default/31.sram_ctrl_partial_access.2321237316 Jul 29 06:56:39 PM PDT 24 Jul 29 06:57:32 PM PDT 24 8293670449 ps
T658 /workspace/coverage/default/27.sram_ctrl_alert_test.342857129 Jul 29 06:56:05 PM PDT 24 Jul 29 06:56:06 PM PDT 24 13316636 ps
T659 /workspace/coverage/default/34.sram_ctrl_max_throughput.2921366133 Jul 29 06:57:18 PM PDT 24 Jul 29 06:57:45 PM PDT 24 1491587597 ps
T660 /workspace/coverage/default/21.sram_ctrl_multiple_keys.230950663 Jul 29 06:54:25 PM PDT 24 Jul 29 06:59:10 PM PDT 24 2237135249 ps
T661 /workspace/coverage/default/46.sram_ctrl_stress_all.337911758 Jul 29 07:00:07 PM PDT 24 Jul 29 08:54:45 PM PDT 24 77343604180 ps
T662 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3488805344 Jul 29 06:52:38 PM PDT 24 Jul 29 06:53:31 PM PDT 24 4500828776 ps
T663 /workspace/coverage/default/24.sram_ctrl_ram_cfg.2869294720 Jul 29 06:55:16 PM PDT 24 Jul 29 06:55:20 PM PDT 24 3370046198 ps
T664 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.552651535 Jul 29 06:52:19 PM PDT 24 Jul 29 06:56:36 PM PDT 24 4978403604 ps
T665 /workspace/coverage/default/14.sram_ctrl_lc_escalation.381759236 Jul 29 06:53:19 PM PDT 24 Jul 29 06:54:01 PM PDT 24 26229312268 ps
T666 /workspace/coverage/default/47.sram_ctrl_partial_access.71051352 Jul 29 07:00:07 PM PDT 24 Jul 29 07:00:25 PM PDT 24 3581825796 ps
T667 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.3061452885 Jul 29 06:52:24 PM PDT 24 Jul 29 06:53:48 PM PDT 24 2940581590 ps
T668 /workspace/coverage/default/14.sram_ctrl_regwen.1558328058 Jul 29 06:53:20 PM PDT 24 Jul 29 06:55:47 PM PDT 24 2019413284 ps
T669 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2021738313 Jul 29 06:59:03 PM PDT 24 Jul 29 07:06:03 PM PDT 24 6984634606 ps
T670 /workspace/coverage/default/32.sram_ctrl_executable.3237082126 Jul 29 06:56:58 PM PDT 24 Jul 29 06:59:15 PM PDT 24 6677510585 ps
T671 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2705092660 Jul 29 06:53:30 PM PDT 24 Jul 29 07:00:51 PM PDT 24 18945369077 ps
T672 /workspace/coverage/default/17.sram_ctrl_executable.1020705456 Jul 29 06:53:46 PM PDT 24 Jul 29 07:15:11 PM PDT 24 89207621345 ps
T673 /workspace/coverage/default/31.sram_ctrl_executable.2286525790 Jul 29 06:56:43 PM PDT 24 Jul 29 07:11:17 PM PDT 24 20880547627 ps
T674 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3375308358 Jul 29 06:52:52 PM PDT 24 Jul 29 06:58:19 PM PDT 24 12803338434 ps
T675 /workspace/coverage/default/2.sram_ctrl_smoke.2965988563 Jul 29 06:52:18 PM PDT 24 Jul 29 06:52:37 PM PDT 24 8548983360 ps
T676 /workspace/coverage/default/23.sram_ctrl_executable.1505265847 Jul 29 06:54:56 PM PDT 24 Jul 29 07:00:10 PM PDT 24 9765879171 ps
T677 /workspace/coverage/default/22.sram_ctrl_regwen.737645949 Jul 29 06:54:43 PM PDT 24 Jul 29 07:06:39 PM PDT 24 5741675991 ps
T678 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.2863010510 Jul 29 06:56:33 PM PDT 24 Jul 29 07:00:54 PM PDT 24 6781310841 ps
T679 /workspace/coverage/default/15.sram_ctrl_partial_access.1355222687 Jul 29 06:53:19 PM PDT 24 Jul 29 06:53:46 PM PDT 24 8786469746 ps
T680 /workspace/coverage/default/28.sram_ctrl_lc_escalation.4289124860 Jul 29 06:56:09 PM PDT 24 Jul 29 06:57:13 PM PDT 24 22468029553 ps
T681 /workspace/coverage/default/11.sram_ctrl_stress_all.2383796459 Jul 29 06:53:02 PM PDT 24 Jul 29 08:10:00 PM PDT 24 60499097766 ps
T682 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.986828377 Jul 29 06:56:33 PM PDT 24 Jul 29 06:58:08 PM PDT 24 39262753274 ps
T683 /workspace/coverage/default/42.sram_ctrl_max_throughput.3517423704 Jul 29 06:58:43 PM PDT 24 Jul 29 07:00:27 PM PDT 24 3132667216 ps
T684 /workspace/coverage/default/25.sram_ctrl_alert_test.3433467578 Jul 29 06:55:35 PM PDT 24 Jul 29 06:55:35 PM PDT 24 76437757 ps
T685 /workspace/coverage/default/39.sram_ctrl_executable.142516907 Jul 29 06:58:10 PM PDT 24 Jul 29 07:07:21 PM PDT 24 35750487410 ps
T686 /workspace/coverage/default/19.sram_ctrl_executable.3731489281 Jul 29 06:54:09 PM PDT 24 Jul 29 07:06:09 PM PDT 24 7772005121 ps
T687 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2838520486 Jul 29 06:53:10 PM PDT 24 Jul 29 06:54:55 PM PDT 24 1548104885 ps
T688 /workspace/coverage/default/44.sram_ctrl_bijection.2439671030 Jul 29 06:58:59 PM PDT 24 Jul 29 07:12:58 PM PDT 24 175444578981 ps
T689 /workspace/coverage/default/4.sram_ctrl_stress_all.267423393 Jul 29 06:52:36 PM PDT 24 Jul 29 09:09:42 PM PDT 24 188472052178 ps
T690 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.2785870078 Jul 29 06:52:17 PM PDT 24 Jul 29 07:00:43 PM PDT 24 7834412805 ps
T691 /workspace/coverage/default/47.sram_ctrl_smoke.310574907 Jul 29 07:00:09 PM PDT 24 Jul 29 07:00:28 PM PDT 24 1293998131 ps
T692 /workspace/coverage/default/28.sram_ctrl_multiple_keys.279963481 Jul 29 06:56:09 PM PDT 24 Jul 29 07:02:44 PM PDT 24 6763478426 ps
T693 /workspace/coverage/default/7.sram_ctrl_stress_all.485336365 Jul 29 06:52:46 PM PDT 24 Jul 29 07:51:35 PM PDT 24 169133993714 ps
T694 /workspace/coverage/default/8.sram_ctrl_regwen.4217064329 Jul 29 06:52:45 PM PDT 24 Jul 29 07:12:07 PM PDT 24 77656792452 ps
T695 /workspace/coverage/default/24.sram_ctrl_max_throughput.1928675629 Jul 29 06:55:11 PM PDT 24 Jul 29 06:56:20 PM PDT 24 3193788968 ps
T696 /workspace/coverage/default/35.sram_ctrl_bijection.3249738050 Jul 29 06:57:24 PM PDT 24 Jul 29 07:13:08 PM PDT 24 14019333585 ps
T697 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2437662139 Jul 29 07:00:43 PM PDT 24 Jul 29 07:02:51 PM PDT 24 896080366 ps
T698 /workspace/coverage/default/35.sram_ctrl_lc_escalation.1549209799 Jul 29 06:57:28 PM PDT 24 Jul 29 06:58:12 PM PDT 24 25121846290 ps
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T704 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.409112981 Jul 29 06:53:20 PM PDT 24 Jul 29 06:53:28 PM PDT 24 207766630 ps
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T706 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1820409596 Jul 29 06:56:32 PM PDT 24 Jul 29 06:57:08 PM PDT 24 894835386 ps
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T712 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.635054453 Jul 29 06:52:16 PM PDT 24 Jul 29 06:52:47 PM PDT 24 1106299956 ps
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T714 /workspace/coverage/default/39.sram_ctrl_lc_escalation.1806668653 Jul 29 06:58:08 PM PDT 24 Jul 29 06:59:37 PM PDT 24 53149931958 ps
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T716 /workspace/coverage/default/9.sram_ctrl_alert_test.63546806 Jul 29 06:52:51 PM PDT 24 Jul 29 06:52:52 PM PDT 24 25964333 ps
T717 /workspace/coverage/default/42.sram_ctrl_stress_all.4250202666 Jul 29 06:58:48 PM PDT 24 Jul 29 07:07:56 PM PDT 24 20837432109 ps
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T719 /workspace/coverage/default/5.sram_ctrl_regwen.2932154173 Jul 29 06:52:38 PM PDT 24 Jul 29 06:59:10 PM PDT 24 2658447645 ps
T720 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.873084618 Jul 29 06:53:05 PM PDT 24 Jul 29 06:53:30 PM PDT 24 549522039 ps
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T722 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.3754059904 Jul 29 06:52:25 PM PDT 24 Jul 29 07:20:09 PM PDT 24 57653559214 ps
T723 /workspace/coverage/default/16.sram_ctrl_regwen.986256670 Jul 29 06:53:35 PM PDT 24 Jul 29 07:18:15 PM PDT 24 19475952225 ps
T724 /workspace/coverage/default/1.sram_ctrl_lc_escalation.1419659091 Jul 29 06:52:19 PM PDT 24 Jul 29 06:52:36 PM PDT 24 2064058415 ps
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T731 /workspace/coverage/default/4.sram_ctrl_partial_access.787136399 Jul 29 06:52:38 PM PDT 24 Jul 29 06:53:24 PM PDT 24 1546181325 ps
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T733 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3566968365 Jul 29 06:52:41 PM PDT 24 Jul 29 06:53:34 PM PDT 24 2293648758 ps
T734 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2634932890 Jul 29 06:57:28 PM PDT 24 Jul 29 07:19:04 PM PDT 24 29120294750 ps
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T736 /workspace/coverage/default/15.sram_ctrl_ram_cfg.2332152488 Jul 29 06:53:25 PM PDT 24 Jul 29 06:53:28 PM PDT 24 344983469 ps
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T738 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4293184305 Jul 29 06:53:07 PM PDT 24 Jul 29 06:56:56 PM PDT 24 17951735296 ps
T739 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.1230588641 Jul 29 06:52:57 PM PDT 24 Jul 29 06:55:38 PM PDT 24 28861599660 ps
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T742 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3563724870 Jul 29 07:00:46 PM PDT 24 Jul 29 07:00:57 PM PDT 24 555794772 ps
T743 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.2617013107 Jul 29 06:59:29 PM PDT 24 Jul 29 07:00:45 PM PDT 24 1451594695 ps
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T112 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.172143679 Jul 29 06:56:53 PM PDT 24 Jul 29 06:57:20 PM PDT 24 1536573319 ps
T746 /workspace/coverage/default/17.sram_ctrl_ram_cfg.1346406222 Jul 29 06:53:47 PM PDT 24 Jul 29 06:53:51 PM PDT 24 1164289423 ps
T747 /workspace/coverage/default/19.sram_ctrl_multiple_keys.1176226875 Jul 29 06:54:05 PM PDT 24 Jul 29 07:12:29 PM PDT 24 48317486957 ps
T748 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.3126545419 Jul 29 06:53:44 PM PDT 24 Jul 29 07:04:14 PM PDT 24 20079271909 ps
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T749 /workspace/coverage/default/0.sram_ctrl_partial_access.2969234648 Jul 29 06:52:12 PM PDT 24 Jul 29 06:52:17 PM PDT 24 1385061415 ps
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T760 /workspace/coverage/default/34.sram_ctrl_ram_cfg.672690050 Jul 29 06:57:19 PM PDT 24 Jul 29 06:57:22 PM PDT 24 344684887 ps
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T764 /workspace/coverage/default/0.sram_ctrl_lc_escalation.421486308 Jul 29 06:52:17 PM PDT 24 Jul 29 06:53:17 PM PDT 24 37243186171 ps
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T766 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3569558952 Jul 29 06:53:34 PM PDT 24 Jul 29 06:53:37 PM PDT 24 1132560326 ps
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T769 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.264424483 Jul 29 06:53:35 PM PDT 24 Jul 29 06:58:41 PM PDT 24 19917292809 ps
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T773 /workspace/coverage/default/47.sram_ctrl_max_throughput.2601442386 Jul 29 07:00:13 PM PDT 24 Jul 29 07:01:32 PM PDT 24 1536658887 ps
T774 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2933770068 Jul 29 06:58:45 PM PDT 24 Jul 29 06:59:11 PM PDT 24 721637235 ps
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T778 /workspace/coverage/default/8.sram_ctrl_max_throughput.1924185639 Jul 29 06:52:49 PM PDT 24 Jul 29 06:53:29 PM PDT 24 749073711 ps
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T784 /workspace/coverage/default/5.sram_ctrl_ram_cfg.3640659201 Jul 29 06:52:37 PM PDT 24 Jul 29 06:52:41 PM PDT 24 1357670476 ps
T785 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.3899016091 Jul 29 06:52:33 PM PDT 24 Jul 29 06:55:16 PM PDT 24 17567024547 ps
T786 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.4290433386 Jul 29 06:56:27 PM PDT 24 Jul 29 07:00:28 PM PDT 24 4211404078 ps
T787 /workspace/coverage/default/7.sram_ctrl_ram_cfg.2695796198 Jul 29 06:52:43 PM PDT 24 Jul 29 06:52:46 PM PDT 24 346853743 ps
T788 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1584597708 Jul 29 06:54:35 PM PDT 24 Jul 29 06:54:56 PM PDT 24 7255853113 ps
T789 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.2588951055 Jul 29 06:52:52 PM PDT 24 Jul 29 06:54:22 PM PDT 24 5035156304 ps
T790 /workspace/coverage/default/23.sram_ctrl_mem_walk.3524670191 Jul 29 06:54:57 PM PDT 24 Jul 29 06:57:28 PM PDT 24 2638036378 ps
T791 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.109792536 Jul 29 07:00:34 PM PDT 24 Jul 29 07:02:07 PM PDT 24 5810159304 ps
T792 /workspace/coverage/default/44.sram_ctrl_max_throughput.1756841 Jul 29 06:59:03 PM PDT 24 Jul 29 07:00:46 PM PDT 24 3023047345 ps
T793 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.456793403 Jul 29 06:58:59 PM PDT 24 Jul 29 07:01:42 PM PDT 24 2851582136 ps
T794 /workspace/coverage/default/22.sram_ctrl_partial_access.2147567657 Jul 29 06:54:34 PM PDT 24 Jul 29 06:55:11 PM PDT 24 1031749809 ps
T795 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.1484893958 Jul 29 06:52:21 PM PDT 24 Jul 29 06:57:58 PM PDT 24 12160654009 ps
T796 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.157587184 Jul 29 06:57:38 PM PDT 24 Jul 29 07:00:08 PM PDT 24 8110127209 ps
T797 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.829210857 Jul 29 06:55:49 PM PDT 24 Jul 29 06:56:51 PM PDT 24 1917056379 ps
T798 /workspace/coverage/default/11.sram_ctrl_executable.3122415180 Jul 29 06:53:02 PM PDT 24 Jul 29 07:00:15 PM PDT 24 38072089626 ps
T114 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3582358628 Jul 29 06:52:42 PM PDT 24 Jul 29 06:52:50 PM PDT 24 255570517 ps
T799 /workspace/coverage/default/13.sram_ctrl_mem_walk.3158685993 Jul 29 06:53:13 PM PDT 24 Jul 29 06:57:28 PM PDT 24 16413243616 ps
T800 /workspace/coverage/default/38.sram_ctrl_multiple_keys.4005684827 Jul 29 06:57:49 PM PDT 24 Jul 29 07:14:53 PM PDT 24 62889256765 ps
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