Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1032
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
74.85 74.85 93.30 93.30 72.99 72.99 86.71 86.71 33.33 33.33 83.89 83.89 93.57 93.57 60.15 60.15 /workspace/coverage/default/38.sram_ctrl_stress_all.1983979313
89.49 14.65 97.79 4.50 84.24 11.26 93.94 7.23 80.95 47.62 91.23 7.35 95.47 1.90 82.82 22.67 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2247483651
93.01 3.52 98.77 0.98 86.49 2.25 93.94 0.00 100.00 19.05 93.60 2.37 95.47 0.00 82.82 0.00 /workspace/coverage/default/9.sram_ctrl_mem_walk.1653793932
94.13 1.12 98.77 0.00 87.91 1.42 95.80 1.86 100.00 0.00 94.31 0.71 95.47 0.00 86.65 3.84 /workspace/coverage/default/0.sram_ctrl_stress_all.3479193466
95.14 1.00 98.94 0.16 88.74 0.83 96.01 0.21 100.00 0.00 95.02 0.71 95.47 0.00 91.77 5.12 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2633226749
95.71 0.57 99.10 0.16 90.52 1.78 96.42 0.41 100.00 0.00 95.73 0.71 96.05 0.58 92.14 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3886111485
96.10 0.39 99.10 0.00 90.52 0.00 96.42 0.00 100.00 0.00 95.73 0.00 96.05 0.00 94.88 2.74 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1211185402
96.48 0.38 99.10 0.00 90.52 0.00 98.07 1.65 100.00 0.00 95.73 0.00 97.08 1.02 94.88 0.00 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2691489176
96.70 0.21 99.10 0.00 90.88 0.36 98.48 0.41 100.00 0.00 95.73 0.00 97.08 0.00 95.61 0.73 /workspace/coverage/default/42.sram_ctrl_alert_test.2135650109
96.90 0.20 99.10 0.00 90.88 0.00 98.55 0.07 100.00 0.00 95.73 0.00 98.39 1.32 95.61 0.00 /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1715627304
97.08 0.19 99.10 0.00 91.00 0.12 98.55 0.00 100.00 0.00 96.21 0.47 99.12 0.73 95.61 0.00 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2778772254
97.21 0.13 99.18 0.08 91.00 0.00 99.38 0.83 100.00 0.00 96.21 0.00 99.12 0.00 95.61 0.00 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3137966128
97.34 0.13 99.18 0.00 91.00 0.00 99.72 0.34 100.00 0.00 96.21 0.00 99.12 0.00 96.16 0.55 /workspace/coverage/default/9.sram_ctrl_stress_all.1152518613
97.42 0.08 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.71 0.55 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.392169
97.50 0.08 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.55 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3594156303
97.52 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1641366879

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1449240319
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.582389807
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4198798820
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3197006009
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.730575668
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1547345851
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.333513330
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3626987574
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1855540653
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.642091621
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2688199806
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.548710841
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.914173374
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1759093130
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3653358469
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2013914473
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2192567195
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3198267533
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3319071415
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.4264873960
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3100405335
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2677260214
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.4219632499
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.660506170
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2784598879
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3301755511
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1428933450
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3471586985
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3025865857
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1567480214
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2085403235
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.490250610
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3312782717
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.789320139
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.611099744
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1741045649
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1763961982
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.846885313
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3191627020
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3990301305
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3234739966
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3957139014
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.242617403
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.244218952
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3222426405
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.332920572
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2487175022
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3852204775
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2471507056
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4210360817
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.21053407
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1637236465
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3137718168
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2420615067
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2734235089
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3483829887
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3026710153
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2071721675
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1836569726
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1350624142
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1023312745
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3358983599
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4103053386
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3930357885
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1414056077
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1405556856
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1771260478
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2720281580
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1264075936
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.654649421
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1994164817
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2479585226
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1969479424
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.700501542
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3213808878
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3306879172
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.752276575
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3403858265
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3155726081
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.613262928
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3603068384
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3916386532
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.384703980
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3939000175
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1933689032
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3432313866
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3332028563
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.398657468
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2755969700
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1634899535
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2624627037
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.921301771
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3389871103
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1418036544
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1787270619
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1783503070
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2333106023
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1393914742
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3742826391
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1598779821
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1526602806
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2911179664
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3910165360
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1483606451
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3694781492
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3641106258
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3450520801
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1094720924
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1860034895
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2811912014
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.218559019
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3436034256
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.585272665
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2321959641
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.225568406
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1510686202
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2357573113
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3191875426
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2313372949
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3530420640
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3865358505
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1282635761
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3070132003
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2299739137
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1660081298
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3839671378
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2940019436
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2196689647
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1742942283
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2148147072
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2785870078
/workspace/coverage/default/0.sram_ctrl_alert_test.4121855079
/workspace/coverage/default/0.sram_ctrl_bijection.2040609705
/workspace/coverage/default/0.sram_ctrl_executable.3169049480
/workspace/coverage/default/0.sram_ctrl_lc_escalation.421486308
/workspace/coverage/default/0.sram_ctrl_max_throughput.3875824239
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3061452885
/workspace/coverage/default/0.sram_ctrl_mem_walk.1901477324
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2010712152
/workspace/coverage/default/0.sram_ctrl_partial_access.2969234648
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2218726131
/workspace/coverage/default/0.sram_ctrl_ram_cfg.348296201
/workspace/coverage/default/0.sram_ctrl_regwen.2828974311
/workspace/coverage/default/0.sram_ctrl_smoke.3466940058
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.635054453
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.682046567
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1729660330
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3754059904
/workspace/coverage/default/1.sram_ctrl_alert_test.32468127
/workspace/coverage/default/1.sram_ctrl_bijection.2743996618
/workspace/coverage/default/1.sram_ctrl_executable.3430247965
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1419659091
/workspace/coverage/default/1.sram_ctrl_max_throughput.1307889100
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.371952864
/workspace/coverage/default/1.sram_ctrl_mem_walk.2141913140
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1764932423
/workspace/coverage/default/1.sram_ctrl_partial_access.2347866780
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.552651535
/workspace/coverage/default/1.sram_ctrl_ram_cfg.67431831
/workspace/coverage/default/1.sram_ctrl_regwen.1674206780
/workspace/coverage/default/1.sram_ctrl_sec_cm.1105652678
/workspace/coverage/default/1.sram_ctrl_smoke.717427979
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4268665729
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3824780696
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.573608792
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3938892940
/workspace/coverage/default/10.sram_ctrl_alert_test.1845638405
/workspace/coverage/default/10.sram_ctrl_bijection.2614235769
/workspace/coverage/default/10.sram_ctrl_executable.191638170
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1533215026
/workspace/coverage/default/10.sram_ctrl_max_throughput.2156063845
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1230588641
/workspace/coverage/default/10.sram_ctrl_mem_walk.858605103
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1183713077
/workspace/coverage/default/10.sram_ctrl_partial_access.2292026343
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1220784018
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2666700944
/workspace/coverage/default/10.sram_ctrl_regwen.165559377
/workspace/coverage/default/10.sram_ctrl_smoke.1838826240
/workspace/coverage/default/10.sram_ctrl_stress_all.2159754606
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.873084618
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1378946886
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3025219975
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3740515368
/workspace/coverage/default/11.sram_ctrl_alert_test.3719064381
/workspace/coverage/default/11.sram_ctrl_bijection.3487319883
/workspace/coverage/default/11.sram_ctrl_executable.3122415180
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2119452674
/workspace/coverage/default/11.sram_ctrl_max_throughput.3472913150
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3659715387
/workspace/coverage/default/11.sram_ctrl_mem_walk.406980860
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4205736485
/workspace/coverage/default/11.sram_ctrl_partial_access.3286305138
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3486241525
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2392752023
/workspace/coverage/default/11.sram_ctrl_regwen.1872137226
/workspace/coverage/default/11.sram_ctrl_smoke.1056014634
/workspace/coverage/default/11.sram_ctrl_stress_all.2383796459
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3418866976
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1718651544
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1085198666
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.18353300
/workspace/coverage/default/12.sram_ctrl_alert_test.2196603524
/workspace/coverage/default/12.sram_ctrl_bijection.4184772556
/workspace/coverage/default/12.sram_ctrl_executable.3627180751
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3205424624
/workspace/coverage/default/12.sram_ctrl_max_throughput.1030432686
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3813140953
/workspace/coverage/default/12.sram_ctrl_mem_walk.3721403699
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1396244401
/workspace/coverage/default/12.sram_ctrl_partial_access.1435477558
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2133575240
/workspace/coverage/default/12.sram_ctrl_regwen.1248477757
/workspace/coverage/default/12.sram_ctrl_smoke.1255041323
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/workspace/coverage/default/43.sram_ctrl_multiple_keys.3070483316
/workspace/coverage/default/43.sram_ctrl_partial_access.1865025788
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3819251276
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4142191646
/workspace/coverage/default/43.sram_ctrl_regwen.1004329893
/workspace/coverage/default/43.sram_ctrl_smoke.2796040401
/workspace/coverage/default/43.sram_ctrl_stress_all.3437641597
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.532138253
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.438269261
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1803400321
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3177905314
/workspace/coverage/default/44.sram_ctrl_alert_test.3390385843
/workspace/coverage/default/44.sram_ctrl_bijection.2439671030
/workspace/coverage/default/44.sram_ctrl_executable.2061515346
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1623226736
/workspace/coverage/default/44.sram_ctrl_max_throughput.1756841
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.214610396
/workspace/coverage/default/44.sram_ctrl_mem_walk.1571266775
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3941823482
/workspace/coverage/default/44.sram_ctrl_partial_access.1534217914
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2021738313
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1259084417
/workspace/coverage/default/44.sram_ctrl_regwen.2729056973
/workspace/coverage/default/44.sram_ctrl_smoke.1197039689
/workspace/coverage/default/44.sram_ctrl_stress_all.3545796875
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2432430422
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.456793403
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.620375055
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3315116647
/workspace/coverage/default/45.sram_ctrl_alert_test.4287657769
/workspace/coverage/default/45.sram_ctrl_bijection.488105035
/workspace/coverage/default/45.sram_ctrl_executable.2571952405
/workspace/coverage/default/45.sram_ctrl_lc_escalation.4187650239
/workspace/coverage/default/45.sram_ctrl_max_throughput.2641044268
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2617013107
/workspace/coverage/default/45.sram_ctrl_mem_walk.2546300054
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2744010690
/workspace/coverage/default/45.sram_ctrl_partial_access.2742812615
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4252600374
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3665923959
/workspace/coverage/default/45.sram_ctrl_regwen.1317056733
/workspace/coverage/default/45.sram_ctrl_smoke.982188736
/workspace/coverage/default/45.sram_ctrl_stress_all.3466337522
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1328087943
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3202692768
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.276321928
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3020800834
/workspace/coverage/default/46.sram_ctrl_alert_test.17669508
/workspace/coverage/default/46.sram_ctrl_bijection.1838172986
/workspace/coverage/default/46.sram_ctrl_executable.245215551
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1968191627
/workspace/coverage/default/46.sram_ctrl_max_throughput.637387415
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4056893149
/workspace/coverage/default/46.sram_ctrl_mem_walk.841101769
/workspace/coverage/default/46.sram_ctrl_multiple_keys.830365563
/workspace/coverage/default/46.sram_ctrl_partial_access.2157835070
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2556146746
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1895801966
/workspace/coverage/default/46.sram_ctrl_regwen.3781912095
/workspace/coverage/default/46.sram_ctrl_smoke.976865947
/workspace/coverage/default/46.sram_ctrl_stress_all.337911758
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.244025992
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1302586301
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2407947142
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1470139931
/workspace/coverage/default/47.sram_ctrl_alert_test.3536316544
/workspace/coverage/default/47.sram_ctrl_bijection.3255120798
/workspace/coverage/default/47.sram_ctrl_executable.3604066363
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2227760538
/workspace/coverage/default/47.sram_ctrl_max_throughput.2601442386
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1843002455
/workspace/coverage/default/47.sram_ctrl_mem_walk.254338569
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3643476030
/workspace/coverage/default/47.sram_ctrl_partial_access.71051352
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3866806140
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3771763324
/workspace/coverage/default/47.sram_ctrl_regwen.814196819
/workspace/coverage/default/47.sram_ctrl_smoke.310574907
/workspace/coverage/default/47.sram_ctrl_stress_all.2200621339
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3592045278
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3242603380
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2991384344
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3668545240
/workspace/coverage/default/48.sram_ctrl_alert_test.2727422231
/workspace/coverage/default/48.sram_ctrl_bijection.659590153
/workspace/coverage/default/48.sram_ctrl_executable.3544253163
/workspace/coverage/default/48.sram_ctrl_lc_escalation.75894248
/workspace/coverage/default/48.sram_ctrl_max_throughput.3685909001
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.197072254
/workspace/coverage/default/48.sram_ctrl_mem_walk.2934439347
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3317772497
/workspace/coverage/default/48.sram_ctrl_partial_access.3421899353
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1250458021
/workspace/coverage/default/48.sram_ctrl_ram_cfg.209339169
/workspace/coverage/default/48.sram_ctrl_regwen.2310606807
/workspace/coverage/default/48.sram_ctrl_smoke.970255457
/workspace/coverage/default/48.sram_ctrl_stress_all.3849187287
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.622466177
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.486513548
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.109792536
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1691640939
/workspace/coverage/default/49.sram_ctrl_alert_test.517446481
/workspace/coverage/default/49.sram_ctrl_bijection.2446751360
/workspace/coverage/default/49.sram_ctrl_executable.2467048726
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3712876072
/workspace/coverage/default/49.sram_ctrl_max_throughput.1169525661
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2018855686
/workspace/coverage/default/49.sram_ctrl_mem_walk.3783137160
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1199127324
/workspace/coverage/default/49.sram_ctrl_partial_access.2394101644
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3574920612
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4064150949
/workspace/coverage/default/49.sram_ctrl_regwen.1346257817
/workspace/coverage/default/49.sram_ctrl_smoke.704371548
/workspace/coverage/default/49.sram_ctrl_stress_all.4196282152
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3563724870
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2892278053
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2437662139
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.907255521
/workspace/coverage/default/5.sram_ctrl_alert_test.4202124261
/workspace/coverage/default/5.sram_ctrl_bijection.2716485422
/workspace/coverage/default/5.sram_ctrl_executable.3804395155
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1934664699
/workspace/coverage/default/5.sram_ctrl_max_throughput.544158703
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2492644466
/workspace/coverage/default/5.sram_ctrl_mem_walk.713544212
/workspace/coverage/default/5.sram_ctrl_multiple_keys.656130753
/workspace/coverage/default/5.sram_ctrl_partial_access.2117835746
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3183091792
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3640659201
/workspace/coverage/default/5.sram_ctrl_regwen.2932154173
/workspace/coverage/default/5.sram_ctrl_smoke.4023926772
/workspace/coverage/default/5.sram_ctrl_stress_all.939734918
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3582358628
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.647138546
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3881294459
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.703161452
/workspace/coverage/default/6.sram_ctrl_alert_test.2384482376
/workspace/coverage/default/6.sram_ctrl_bijection.2598190887
/workspace/coverage/default/6.sram_ctrl_executable.4033434003
/workspace/coverage/default/6.sram_ctrl_lc_escalation.4288659314
/workspace/coverage/default/6.sram_ctrl_max_throughput.3652350586
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3807197328
/workspace/coverage/default/6.sram_ctrl_mem_walk.3094331242
/workspace/coverage/default/6.sram_ctrl_multiple_keys.171598095
/workspace/coverage/default/6.sram_ctrl_partial_access.770052704
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2926490533
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2616239464
/workspace/coverage/default/6.sram_ctrl_regwen.624353160
/workspace/coverage/default/6.sram_ctrl_smoke.2721020449
/workspace/coverage/default/6.sram_ctrl_stress_all.3826598553
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1460691056
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1946940494
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3313021977
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.556625717
/workspace/coverage/default/7.sram_ctrl_alert_test.1016025285
/workspace/coverage/default/7.sram_ctrl_bijection.2902400254
/workspace/coverage/default/7.sram_ctrl_executable.2609888860
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1717988281
/workspace/coverage/default/7.sram_ctrl_max_throughput.1040217431
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1067986152
/workspace/coverage/default/7.sram_ctrl_mem_walk.1025503787
/workspace/coverage/default/7.sram_ctrl_multiple_keys.954459892
/workspace/coverage/default/7.sram_ctrl_partial_access.1107955550
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2013415595
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2695796198
/workspace/coverage/default/7.sram_ctrl_regwen.3272503449
/workspace/coverage/default/7.sram_ctrl_smoke.3364214529
/workspace/coverage/default/7.sram_ctrl_stress_all.485336365
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3566968365
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3154746527
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4097561409
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.141871140
/workspace/coverage/default/8.sram_ctrl_alert_test.477468028
/workspace/coverage/default/8.sram_ctrl_bijection.2201910194
/workspace/coverage/default/8.sram_ctrl_executable.1797058791
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3865346234
/workspace/coverage/default/8.sram_ctrl_max_throughput.1924185639
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3189154331
/workspace/coverage/default/8.sram_ctrl_mem_walk.3565915494
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4131784024
/workspace/coverage/default/8.sram_ctrl_partial_access.1151072483
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2801269552
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3302705314
/workspace/coverage/default/8.sram_ctrl_regwen.4217064329
/workspace/coverage/default/8.sram_ctrl_smoke.1265604490
/workspace/coverage/default/8.sram_ctrl_stress_all.2734617914
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1458814921
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3375308358
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3448672839
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1972379231
/workspace/coverage/default/9.sram_ctrl_alert_test.63546806
/workspace/coverage/default/9.sram_ctrl_bijection.840015016
/workspace/coverage/default/9.sram_ctrl_executable.3402648672
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1257812319
/workspace/coverage/default/9.sram_ctrl_max_throughput.2057909563
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2588951055
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1267025870
/workspace/coverage/default/9.sram_ctrl_partial_access.1168290995
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3327720252
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1531643500
/workspace/coverage/default/9.sram_ctrl_regwen.1993292094
/workspace/coverage/default/9.sram_ctrl_smoke.3581266966
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1848476807
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2938683129
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3946389188



Total test records in report: 1032
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/38.sram_ctrl_stress_all.1983979313 Jul 29 06:58:00 PM PDT 24 Jul 29 08:35:23 PM PDT 24 123786626470 ps
T2 /workspace/coverage/default/24.sram_ctrl_mem_walk.1034918811 Jul 29 06:55:18 PM PDT 24 Jul 29 06:57:35 PM PDT 24 4031556853 ps
T3 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.907255521 Jul 29 06:52:36 PM PDT 24 Jul 29 07:10:08 PM PDT 24 19559280281 ps
T4 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3325717920 Jul 29 06:54:10 PM PDT 24 Jul 29 06:54:22 PM PDT 24 2897146149 ps
T9 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3137966128 Jul 29 06:53:13 PM PDT 24 Jul 29 06:53:17 PM PDT 24 1534583976 ps
T10 /workspace/coverage/default/47.sram_ctrl_alert_test.3536316544 Jul 29 07:00:32 PM PDT 24 Jul 29 07:00:33 PM PDT 24 16945608 ps
T5 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2691489176 Jul 29 06:58:59 PM PDT 24 Jul 29 07:00:05 PM PDT 24 960598803 ps
T6 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.4212680479 Jul 29 06:57:33 PM PDT 24 Jul 29 07:02:04 PM PDT 24 4120337052 ps
T11 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2346488181 Jul 29 06:57:40 PM PDT 24 Jul 29 07:00:15 PM PDT 24 30555684254 ps
T12 /workspace/coverage/default/19.sram_ctrl_bijection.1187834760 Jul 29 06:54:04 PM PDT 24 Jul 29 07:27:24 PM PDT 24 28451292114 ps
T18 /workspace/coverage/default/12.sram_ctrl_bijection.4184772556 Jul 29 06:53:07 PM PDT 24 Jul 29 07:34:37 PM PDT 24 460123729424 ps
T22 /workspace/coverage/default/19.sram_ctrl_mem_walk.3239460307 Jul 29 06:54:08 PM PDT 24 Jul 29 06:58:25 PM PDT 24 6462752094 ps
T19 /workspace/coverage/default/41.sram_ctrl_stress_all.8405197 Jul 29 06:58:39 PM PDT 24 Jul 29 07:59:34 PM PDT 24 159561637088 ps
T26 /workspace/coverage/default/23.sram_ctrl_ram_cfg.526918628 Jul 29 06:54:56 PM PDT 24 Jul 29 06:54:59 PM PDT 24 351226702 ps
T20 /workspace/coverage/default/10.sram_ctrl_regwen.165559377 Jul 29 06:52:58 PM PDT 24 Jul 29 07:10:59 PM PDT 24 28673696288 ps
T27 /workspace/coverage/default/21.sram_ctrl_ram_cfg.3166213447 Jul 29 06:54:30 PM PDT 24 Jul 29 06:54:33 PM PDT 24 371199552 ps
T41 /workspace/coverage/default/42.sram_ctrl_mem_walk.3686606935 Jul 29 06:58:48 PM PDT 24 Jul 29 07:01:28 PM PDT 24 7072805505 ps
T7 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1469345373 Jul 29 06:56:29 PM PDT 24 Jul 29 06:57:21 PM PDT 24 10886372986 ps
T39 /workspace/coverage/default/9.sram_ctrl_mem_walk.1653793932 Jul 29 06:52:52 PM PDT 24 Jul 29 06:55:54 PM PDT 24 21574191438 ps
T8 /workspace/coverage/default/16.sram_ctrl_stress_all.1981409048 Jul 29 06:53:41 PM PDT 24 Jul 29 07:24:41 PM PDT 24 30685270950 ps
T21 /workspace/coverage/default/45.sram_ctrl_regwen.1317056733 Jul 29 06:59:27 PM PDT 24 Jul 29 07:15:14 PM PDT 24 35259496872 ps
T40 /workspace/coverage/default/41.sram_ctrl_multiple_keys.4088487099 Jul 29 06:58:29 PM PDT 24 Jul 29 07:03:42 PM PDT 24 22324866103 ps
T83 /workspace/coverage/default/45.sram_ctrl_smoke.982188736 Jul 29 06:59:15 PM PDT 24 Jul 29 07:00:55 PM PDT 24 19174013205 ps
T23 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2247483651 Jul 29 06:57:23 PM PDT 24 Jul 29 06:58:03 PM PDT 24 1666444852 ps
T69 /workspace/coverage/default/30.sram_ctrl_max_throughput.1262033608 Jul 29 06:56:27 PM PDT 24 Jul 29 06:58:24 PM PDT 24 762089023 ps
T44 /workspace/coverage/default/0.sram_ctrl_stress_all.3479193466 Jul 29 06:52:16 PM PDT 24 Jul 29 07:13:31 PM PDT 24 113220985223 ps
T61 /workspace/coverage/default/9.sram_ctrl_stress_all.1152518613 Jul 29 06:52:52 PM PDT 24 Jul 29 08:06:00 PM PDT 24 55164744444 ps
T70 /workspace/coverage/default/48.sram_ctrl_max_throughput.3685909001 Jul 29 07:00:32 PM PDT 24 Jul 29 07:01:36 PM PDT 24 4549375917 ps
T71 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.803564703 Jul 29 06:53:15 PM PDT 24 Jul 29 06:55:32 PM PDT 24 15606288348 ps
T72 /workspace/coverage/default/38.sram_ctrl_executable.3384515348 Jul 29 06:57:59 PM PDT 24 Jul 29 07:27:09 PM PDT 24 125615775508 ps
T62 /workspace/coverage/default/21.sram_ctrl_lc_escalation.3333430609 Jul 29 06:54:23 PM PDT 24 Jul 29 06:55:11 PM PDT 24 23798991194 ps
T13 /workspace/coverage/default/7.sram_ctrl_alert_test.1016025285 Jul 29 06:52:53 PM PDT 24 Jul 29 06:52:54 PM PDT 24 13566500 ps
T42 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.4080525621 Jul 29 06:56:07 PM PDT 24 Jul 29 07:03:27 PM PDT 24 13529018610 ps
T156 /workspace/coverage/default/22.sram_ctrl_ram_cfg.662354417 Jul 29 06:54:45 PM PDT 24 Jul 29 06:54:49 PM PDT 24 669616816 ps
T157 /workspace/coverage/default/22.sram_ctrl_max_throughput.4171421797 Jul 29 06:54:39 PM PDT 24 Jul 29 06:56:19 PM PDT 24 1520454768 ps
T158 /workspace/coverage/default/28.sram_ctrl_bijection.3122694921 Jul 29 06:56:09 PM PDT 24 Jul 29 07:35:07 PM PDT 24 386637006873 ps
T47 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2960697138 Jul 29 06:53:23 PM PDT 24 Jul 29 06:54:50 PM PDT 24 5382322483 ps
T159 /workspace/coverage/default/4.sram_ctrl_bijection.847721734 Jul 29 06:52:35 PM PDT 24 Jul 29 07:32:27 PM PDT 24 125622483396 ps
T160 /workspace/coverage/default/25.sram_ctrl_bijection.2003415699 Jul 29 06:55:23 PM PDT 24 Jul 29 07:32:17 PM PDT 24 147661640231 ps
T161 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.573608792 Jul 29 06:52:17 PM PDT 24 Jul 29 06:52:24 PM PDT 24 1989065353 ps
T155 /workspace/coverage/default/15.sram_ctrl_max_throughput.2266386214 Jul 29 06:53:23 PM PDT 24 Jul 29 06:53:30 PM PDT 24 674448424 ps
T162 /workspace/coverage/default/13.sram_ctrl_max_throughput.1461326416 Jul 29 06:53:08 PM PDT 24 Jul 29 06:53:38 PM PDT 24 766125559 ps
T163 /workspace/coverage/default/36.sram_ctrl_ram_cfg.4001036769 Jul 29 06:57:38 PM PDT 24 Jul 29 06:57:42 PM PDT 24 710409711 ps
T49 /workspace/coverage/default/18.sram_ctrl_mem_walk.2710177910 Jul 29 06:53:56 PM PDT 24 Jul 29 06:56:51 PM PDT 24 21564904726 ps
T103 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4252600374 Jul 29 06:59:17 PM PDT 24 Jul 29 07:07:28 PM PDT 24 28223414952 ps
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T164 /workspace/coverage/default/1.sram_ctrl_partial_access.2347866780 Jul 29 06:52:17 PM PDT 24 Jul 29 06:52:39 PM PDT 24 5738835723 ps
T14 /workspace/coverage/default/42.sram_ctrl_alert_test.2135650109 Jul 29 06:58:48 PM PDT 24 Jul 29 06:58:49 PM PDT 24 22552079 ps
T142 /workspace/coverage/default/41.sram_ctrl_executable.522774443 Jul 29 06:58:34 PM PDT 24 Jul 29 07:16:06 PM PDT 24 28472144394 ps
T104 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2659879335 Jul 29 06:53:10 PM PDT 24 Jul 29 06:58:19 PM PDT 24 19149701019 ps
T165 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3743019195 Jul 29 06:56:21 PM PDT 24 Jul 29 06:59:02 PM PDT 24 821871136 ps
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T167 /workspace/coverage/default/29.sram_ctrl_multiple_keys.3732724088 Jul 29 06:56:16 PM PDT 24 Jul 29 07:11:27 PM PDT 24 13600150936 ps
T168 /workspace/coverage/default/43.sram_ctrl_alert_test.3753070739 Jul 29 06:59:02 PM PDT 24 Jul 29 06:59:03 PM PDT 24 14154164 ps
T105 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1718651544 Jul 29 06:53:04 PM PDT 24 Jul 29 06:57:25 PM PDT 24 7352706746 ps
T48 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.2492644466 Jul 29 06:52:40 PM PDT 24 Jul 29 06:54:11 PM PDT 24 3046455023 ps
T143 /workspace/coverage/default/12.sram_ctrl_stress_all.4052607838 Jul 29 06:53:07 PM PDT 24 Jul 29 08:11:02 PM PDT 24 662477899491 ps
T43 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.703161452 Jul 29 06:52:40 PM PDT 24 Jul 29 07:08:51 PM PDT 24 23174806732 ps
T154 /workspace/coverage/default/46.sram_ctrl_lc_escalation.1968191627 Jul 29 07:00:03 PM PDT 24 Jul 29 07:00:50 PM PDT 24 10812315634 ps
T169 /workspace/coverage/default/35.sram_ctrl_ram_cfg.406577764 Jul 29 06:57:29 PM PDT 24 Jul 29 06:57:33 PM PDT 24 1403952664 ps
T91 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.4087451759 Jul 29 06:56:04 PM PDT 24 Jul 29 06:57:11 PM PDT 24 1013920792 ps
T92 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.197072254 Jul 29 07:00:38 PM PDT 24 Jul 29 07:03:01 PM PDT 24 4437424673 ps
T50 /workspace/coverage/default/31.sram_ctrl_mem_walk.69784999 Jul 29 06:56:46 PM PDT 24 Jul 29 06:59:26 PM PDT 24 2746493836 ps
T144 /workspace/coverage/default/36.sram_ctrl_regwen.4057243954 Jul 29 06:57:33 PM PDT 24 Jul 29 07:18:52 PM PDT 24 14729255370 ps
T153 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.974717671 Jul 29 06:52:41 PM PDT 24 Jul 29 07:01:16 PM PDT 24 47105680036 ps
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T170 /workspace/coverage/default/15.sram_ctrl_lc_escalation.7367873 Jul 29 06:53:25 PM PDT 24 Jul 29 06:54:10 PM PDT 24 24437489709 ps
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T172 /workspace/coverage/default/4.sram_ctrl_max_throughput.1374432039 Jul 29 06:52:37 PM PDT 24 Jul 29 06:53:33 PM PDT 24 1316739030 ps
T173 /workspace/coverage/default/27.sram_ctrl_smoke.2791252420 Jul 29 06:55:53 PM PDT 24 Jul 29 06:56:02 PM PDT 24 720938515 ps
T51 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.4041264521 Jul 29 06:53:45 PM PDT 24 Jul 29 06:55:04 PM PDT 24 6351850526 ps
T174 /workspace/coverage/default/4.sram_ctrl_executable.2406535791 Jul 29 06:52:35 PM PDT 24 Jul 29 07:00:13 PM PDT 24 5407285918 ps
T175 /workspace/coverage/default/35.sram_ctrl_smoke.3218646585 Jul 29 06:57:24 PM PDT 24 Jul 29 06:58:14 PM PDT 24 2163239002 ps
T176 /workspace/coverage/default/42.sram_ctrl_smoke.2572013051 Jul 29 06:58:39 PM PDT 24 Jul 29 06:59:17 PM PDT 24 3572687539 ps
T177 /workspace/coverage/default/30.sram_ctrl_alert_test.2572212633 Jul 29 06:56:32 PM PDT 24 Jul 29 06:56:33 PM PDT 24 13485788 ps
T178 /workspace/coverage/default/32.sram_ctrl_max_throughput.2681796889 Jul 29 06:56:59 PM PDT 24 Jul 29 06:57:05 PM PDT 24 1358290056 ps
T52 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3559600264 Jul 29 06:58:13 PM PDT 24 Jul 29 06:59:28 PM PDT 24 1402471102 ps
T179 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.2584228709 Jul 29 06:54:56 PM PDT 24 Jul 29 07:09:43 PM PDT 24 12486465412 ps
T180 /workspace/coverage/default/46.sram_ctrl_max_throughput.637387415 Jul 29 06:59:37 PM PDT 24 Jul 29 06:59:47 PM PDT 24 724669170 ps
T181 /workspace/coverage/default/2.sram_ctrl_max_throughput.1303833768 Jul 29 06:52:18 PM PDT 24 Jul 29 06:52:28 PM PDT 24 2822217222 ps
T140 /workspace/coverage/default/27.sram_ctrl_stress_all.70205159 Jul 29 06:56:04 PM PDT 24 Jul 29 07:52:46 PM PDT 24 264163377465 ps
T182 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.4056893149 Jul 29 07:00:09 PM PDT 24 Jul 29 07:01:41 PM PDT 24 52668637672 ps
T183 /workspace/coverage/default/49.sram_ctrl_mem_walk.3783137160 Jul 29 07:00:48 PM PDT 24 Jul 29 07:03:27 PM PDT 24 10952608273 ps
T184 /workspace/coverage/default/37.sram_ctrl_smoke.2797341287 Jul 29 06:57:41 PM PDT 24 Jul 29 06:58:02 PM PDT 24 4225630435 ps
T185 /workspace/coverage/default/49.sram_ctrl_max_throughput.1169525661 Jul 29 07:00:43 PM PDT 24 Jul 29 07:03:07 PM PDT 24 813125027 ps
T106 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1378946886 Jul 29 06:52:52 PM PDT 24 Jul 29 06:55:36 PM PDT 24 18973446230 ps
T186 /workspace/coverage/default/43.sram_ctrl_ram_cfg.4142191646 Jul 29 06:59:03 PM PDT 24 Jul 29 06:59:06 PM PDT 24 1780911941 ps
T187 /workspace/coverage/default/35.sram_ctrl_executable.2171328719 Jul 29 06:57:28 PM PDT 24 Jul 29 07:21:21 PM PDT 24 6385057353 ps
T188 /workspace/coverage/default/45.sram_ctrl_partial_access.2742812615 Jul 29 06:59:18 PM PDT 24 Jul 29 06:59:34 PM PDT 24 4488260369 ps
T189 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3824780696 Jul 29 06:52:19 PM PDT 24 Jul 29 06:55:36 PM PDT 24 12990299694 ps
T190 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.1474521950 Jul 29 06:56:53 PM PDT 24 Jul 29 07:00:58 PM PDT 24 4066767892 ps
T145 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1211185402 Jul 29 06:53:07 PM PDT 24 Jul 29 07:00:07 PM PDT 24 125095843643 ps
T191 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.556625717 Jul 29 06:52:45 PM PDT 24 Jul 29 07:12:41 PM PDT 24 13712402510 ps
T192 /workspace/coverage/default/30.sram_ctrl_smoke.79094152 Jul 29 06:56:27 PM PDT 24 Jul 29 06:57:01 PM PDT 24 7385367792 ps
T193 /workspace/coverage/default/3.sram_ctrl_max_throughput.1988901391 Jul 29 06:52:37 PM PDT 24 Jul 29 06:52:47 PM PDT 24 2629794823 ps
T194 /workspace/coverage/default/45.sram_ctrl_multiple_keys.2744010690 Jul 29 06:59:18 PM PDT 24 Jul 29 07:02:53 PM PDT 24 23140928738 ps
T195 /workspace/coverage/default/2.sram_ctrl_regwen.3589977052 Jul 29 06:52:23 PM PDT 24 Jul 29 06:55:43 PM PDT 24 4560022333 ps
T196 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.3498444302 Jul 29 06:55:28 PM PDT 24 Jul 29 07:10:27 PM PDT 24 10494330886 ps
T197 /workspace/coverage/default/44.sram_ctrl_executable.2061515346 Jul 29 06:59:09 PM PDT 24 Jul 29 07:06:35 PM PDT 24 16987782198 ps
T198 /workspace/coverage/default/35.sram_ctrl_max_throughput.1190368770 Jul 29 06:57:27 PM PDT 24 Jul 29 06:59:56 PM PDT 24 1597529882 ps
T199 /workspace/coverage/default/36.sram_ctrl_multiple_keys.2176137365 Jul 29 06:57:32 PM PDT 24 Jul 29 07:02:41 PM PDT 24 37748679508 ps
T200 /workspace/coverage/default/37.sram_ctrl_ram_cfg.1041675711 Jul 29 06:57:49 PM PDT 24 Jul 29 06:57:53 PM PDT 24 694796431 ps
T146 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3183091792 Jul 29 06:52:36 PM PDT 24 Jul 29 07:03:15 PM PDT 24 100403260635 ps
T201 /workspace/coverage/default/5.sram_ctrl_stress_all.939734918 Jul 29 06:52:40 PM PDT 24 Jul 29 08:53:13 PM PDT 24 1879758975122 ps
T152 /workspace/coverage/default/17.sram_ctrl_mem_walk.1451470508 Jul 29 06:53:46 PM PDT 24 Jul 29 06:59:57 PM PDT 24 39725357179 ps
T53 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1050131229 Jul 29 06:56:55 PM PDT 24 Jul 29 06:58:25 PM PDT 24 26857079357 ps
T24 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.852876475 Jul 29 06:58:23 PM PDT 24 Jul 29 06:58:35 PM PDT 24 1192027675 ps
T202 /workspace/coverage/default/28.sram_ctrl_regwen.2648823693 Jul 29 06:56:15 PM PDT 24 Jul 29 06:58:08 PM PDT 24 1345614977 ps
T148 /workspace/coverage/default/10.sram_ctrl_multiple_keys.1183713077 Jul 29 06:52:52 PM PDT 24 Jul 29 07:23:45 PM PDT 24 33119521046 ps
T203 /workspace/coverage/default/22.sram_ctrl_smoke.783663620 Jul 29 06:54:35 PM PDT 24 Jul 29 06:54:43 PM PDT 24 4846404628 ps
T204 /workspace/coverage/default/4.sram_ctrl_ram_cfg.3710625393 Jul 29 06:52:41 PM PDT 24 Jul 29 06:52:45 PM PDT 24 344661702 ps
T147 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2923875623 Jul 29 06:52:38 PM PDT 24 Jul 29 06:57:13 PM PDT 24 44092371872 ps
T205 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3771763324 Jul 29 07:00:11 PM PDT 24 Jul 29 07:00:15 PM PDT 24 1342536809 ps
T206 /workspace/coverage/default/9.sram_ctrl_max_throughput.2057909563 Jul 29 06:52:47 PM PDT 24 Jul 29 06:53:47 PM PDT 24 2913933157 ps
T207 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3025427942 Jul 29 06:52:25 PM PDT 24 Jul 29 06:53:38 PM PDT 24 3174495621 ps
T208 /workspace/coverage/default/48.sram_ctrl_executable.3544253163 Jul 29 07:00:33 PM PDT 24 Jul 29 07:21:36 PM PDT 24 44094853448 ps
T209 /workspace/coverage/default/7.sram_ctrl_mem_walk.1025503787 Jul 29 06:52:48 PM PDT 24 Jul 29 06:55:37 PM PDT 24 41380207848 ps
T210 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1831713471 Jul 29 06:56:02 PM PDT 24 Jul 29 06:56:06 PM PDT 24 363691123 ps
T211 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2398930065 Jul 29 06:58:27 PM PDT 24 Jul 29 07:01:15 PM PDT 24 2972656876 ps
T25 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3441562499 Jul 29 06:58:12 PM PDT 24 Jul 29 06:58:33 PM PDT 24 2394349510 ps
T212 /workspace/coverage/default/35.sram_ctrl_mem_walk.501148970 Jul 29 06:57:30 PM PDT 24 Jul 29 07:00:18 PM PDT 24 7219386966 ps
T213 /workspace/coverage/default/21.sram_ctrl_stress_all.2275193291 Jul 29 06:54:35 PM PDT 24 Jul 29 07:13:56 PM PDT 24 23217188464 ps
T214 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.672521579 Jul 29 06:53:07 PM PDT 24 Jul 29 06:53:13 PM PDT 24 1341156839 ps
T215 /workspace/coverage/default/0.sram_ctrl_max_throughput.3875824239 Jul 29 06:52:12 PM PDT 24 Jul 29 06:52:21 PM PDT 24 687104366 ps
T216 /workspace/coverage/default/5.sram_ctrl_max_throughput.544158703 Jul 29 06:52:36 PM PDT 24 Jul 29 06:55:25 PM PDT 24 9511632305 ps
T217 /workspace/coverage/default/10.sram_ctrl_mem_walk.858605103 Jul 29 06:52:57 PM PDT 24 Jul 29 06:55:36 PM PDT 24 27583205077 ps
T218 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3154746527 Jul 29 06:52:41 PM PDT 24 Jul 29 06:59:20 PM PDT 24 86178004027 ps
T219 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2801269552 Jul 29 06:52:45 PM PDT 24 Jul 29 06:57:54 PM PDT 24 33899168145 ps
T220 /workspace/coverage/default/12.sram_ctrl_max_throughput.1030432686 Jul 29 06:53:07 PM PDT 24 Jul 29 06:54:28 PM PDT 24 774934343 ps
T63 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.622466177 Jul 29 07:00:35 PM PDT 24 Jul 29 07:02:24 PM PDT 24 4528929187 ps
T221 /workspace/coverage/default/20.sram_ctrl_mem_walk.4174489426 Jul 29 06:54:19 PM PDT 24 Jul 29 06:57:22 PM PDT 24 28854894194 ps
T64 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1328087943 Jul 29 06:59:26 PM PDT 24 Jul 29 06:59:34 PM PDT 24 971620222 ps
T116 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3688974959 Jul 29 06:56:27 PM PDT 24 Jul 29 06:56:45 PM PDT 24 741140565 ps
T117 /workspace/coverage/default/41.sram_ctrl_lc_escalation.1381183870 Jul 29 06:58:33 PM PDT 24 Jul 29 07:00:12 PM PDT 24 61248025999 ps
T118 /workspace/coverage/default/33.sram_ctrl_bijection.2520466597 Jul 29 06:57:05 PM PDT 24 Jul 29 07:13:10 PM PDT 24 41648004197 ps
T119 /workspace/coverage/default/49.sram_ctrl_partial_access.2394101644 Jul 29 07:00:43 PM PDT 24 Jul 29 07:01:03 PM PDT 24 655269176 ps
T120 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.2938683129 Jul 29 06:52:50 PM PDT 24 Jul 29 06:56:47 PM PDT 24 3931793213 ps
T121 /workspace/coverage/default/28.sram_ctrl_executable.3818037444 Jul 29 06:56:08 PM PDT 24 Jul 29 07:17:50 PM PDT 24 77842729243 ps
T122 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.2018855686 Jul 29 07:00:46 PM PDT 24 Jul 29 07:02:07 PM PDT 24 3398534320 ps
T123 /workspace/coverage/default/18.sram_ctrl_regwen.3520197048 Jul 29 06:53:56 PM PDT 24 Jul 29 07:09:25 PM PDT 24 9709076497 ps
T124 /workspace/coverage/default/19.sram_ctrl_lc_escalation.3205332067 Jul 29 06:54:09 PM PDT 24 Jul 29 06:55:11 PM PDT 24 34657580493 ps
T65 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1319206330 Jul 29 06:57:27 PM PDT 24 Jul 29 06:57:36 PM PDT 24 432739773 ps
T222 /workspace/coverage/default/22.sram_ctrl_mem_walk.2204055377 Jul 29 06:54:43 PM PDT 24 Jul 29 06:59:37 PM PDT 24 5481807788 ps
T223 /workspace/coverage/default/3.sram_ctrl_bijection.4179945183 Jul 29 06:52:30 PM PDT 24 Jul 29 07:22:16 PM PDT 24 114773817541 ps
T66 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1728783272 Jul 29 06:53:16 PM PDT 24 Jul 29 06:53:43 PM PDT 24 710118922 ps
T224 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2070846852 Jul 29 06:55:11 PM PDT 24 Jul 29 06:56:19 PM PDT 24 2989179399 ps
T225 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1843002455 Jul 29 07:00:17 PM PDT 24 Jul 29 07:02:29 PM PDT 24 1646385526 ps
T226 /workspace/coverage/default/33.sram_ctrl_multiple_keys.381136484 Jul 29 06:57:04 PM PDT 24 Jul 29 07:08:05 PM PDT 24 8421231124 ps
T227 /workspace/coverage/default/44.sram_ctrl_regwen.2729056973 Jul 29 06:59:07 PM PDT 24 Jul 29 07:10:51 PM PDT 24 11301354387 ps
T228 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1220784018 Jul 29 06:52:57 PM PDT 24 Jul 29 07:00:17 PM PDT 24 247758351774 ps
T229 /workspace/coverage/default/3.sram_ctrl_lc_escalation.3110752551 Jul 29 06:52:30 PM PDT 24 Jul 29 06:53:07 PM PDT 24 25279346625 ps
T125 /workspace/coverage/default/37.sram_ctrl_lc_escalation.2808833615 Jul 29 06:57:43 PM PDT 24 Jul 29 06:58:53 PM PDT 24 41281116215 ps
T230 /workspace/coverage/default/48.sram_ctrl_partial_access.3421899353 Jul 29 07:00:31 PM PDT 24 Jul 29 07:00:42 PM PDT 24 2885053459 ps
T231 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3659715387 Jul 29 06:53:09 PM PDT 24 Jul 29 06:54:39 PM PDT 24 2477793781 ps
T232 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.214610396 Jul 29 06:59:12 PM PDT 24 Jul 29 07:01:47 PM PDT 24 4393032803 ps
T233 /workspace/coverage/default/18.sram_ctrl_max_throughput.1797545935 Jul 29 06:53:51 PM PDT 24 Jul 29 06:54:36 PM PDT 24 757737315 ps
T234 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2950134711 Jul 29 06:58:09 PM PDT 24 Jul 29 07:03:18 PM PDT 24 5251958588 ps
T67 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2384679246 Jul 29 06:55:18 PM PDT 24 Jul 29 06:55:26 PM PDT 24 1551817120 ps
T235 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1972379231 Jul 29 06:52:45 PM PDT 24 Jul 29 07:14:54 PM PDT 24 21267807094 ps
T236 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.3813140953 Jul 29 06:53:07 PM PDT 24 Jul 29 06:55:48 PM PDT 24 9407254246 ps
T237 /workspace/coverage/default/16.sram_ctrl_lc_escalation.50110523 Jul 29 06:53:35 PM PDT 24 Jul 29 06:54:11 PM PDT 24 7759167416 ps
T149 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3928093532 Jul 29 06:57:43 PM PDT 24 Jul 29 07:04:47 PM PDT 24 85433826078 ps
T238 /workspace/coverage/default/38.sram_ctrl_smoke.4273527181 Jul 29 06:57:49 PM PDT 24 Jul 29 06:58:11 PM PDT 24 1359515243 ps
T239 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2260915076 Jul 29 06:56:57 PM PDT 24 Jul 29 07:04:05 PM PDT 24 36330400821 ps
T240 /workspace/coverage/default/20.sram_ctrl_max_throughput.4019192465 Jul 29 06:54:13 PM PDT 24 Jul 29 06:55:26 PM PDT 24 788203287 ps
T241 /workspace/coverage/default/49.sram_ctrl_alert_test.517446481 Jul 29 07:00:53 PM PDT 24 Jul 29 07:00:54 PM PDT 24 21044356 ps
T242 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3167025576 Jul 29 06:52:38 PM PDT 24 Jul 29 06:58:52 PM PDT 24 10912982228 ps
T243 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.2401911818 Jul 29 06:57:08 PM PDT 24 Jul 29 06:57:56 PM PDT 24 2957174012 ps
T244 /workspace/coverage/default/2.sram_ctrl_bijection.1209828637 Jul 29 06:52:17 PM PDT 24 Jul 29 07:14:19 PM PDT 24 71958798073 ps
T245 /workspace/coverage/default/38.sram_ctrl_bijection.1104564578 Jul 29 06:57:49 PM PDT 24 Jul 29 07:18:37 PM PDT 24 17545686867 ps
T246 /workspace/coverage/default/40.sram_ctrl_regwen.3600552350 Jul 29 06:58:26 PM PDT 24 Jul 29 07:19:10 PM PDT 24 61912255365 ps
T247 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1455068096 Jul 29 06:58:04 PM PDT 24 Jul 29 07:16:15 PM PDT 24 7942639411 ps
T248 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.29954137 Jul 29 06:54:14 PM PDT 24 Jul 29 06:58:16 PM PDT 24 45914288424 ps
T249 /workspace/coverage/default/37.sram_ctrl_mem_walk.1869863758 Jul 29 06:57:49 PM PDT 24 Jul 29 07:03:59 PM PDT 24 54446169791 ps
T250 /workspace/coverage/default/44.sram_ctrl_ram_cfg.1259084417 Jul 29 06:59:09 PM PDT 24 Jul 29 06:59:12 PM PDT 24 1467700464 ps
T251 /workspace/coverage/default/27.sram_ctrl_executable.859976595 Jul 29 06:55:59 PM PDT 24 Jul 29 07:06:25 PM PDT 24 15089903014 ps
T252 /workspace/coverage/default/30.sram_ctrl_ram_cfg.1644908323 Jul 29 06:56:33 PM PDT 24 Jul 29 06:56:37 PM PDT 24 1062076944 ps
T253 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.213916445 Jul 29 06:57:07 PM PDT 24 Jul 29 06:58:08 PM PDT 24 1918236547 ps
T254 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.2900187620 Jul 29 06:57:43 PM PDT 24 Jul 29 07:08:36 PM PDT 24 6774386226 ps
T255 /workspace/coverage/default/5.sram_ctrl_multiple_keys.656130753 Jul 29 06:52:39 PM PDT 24 Jul 29 07:10:43 PM PDT 24 25439703828 ps
T256 /workspace/coverage/default/0.sram_ctrl_mem_walk.1901477324 Jul 29 06:52:16 PM PDT 24 Jul 29 06:58:08 PM PDT 24 20659187769 ps
T257 /workspace/coverage/default/14.sram_ctrl_partial_access.2478022008 Jul 29 06:53:14 PM PDT 24 Jul 29 06:53:28 PM PDT 24 3197791627 ps
T258 /workspace/coverage/default/6.sram_ctrl_lc_escalation.4288659314 Jul 29 06:52:44 PM PDT 24 Jul 29 06:53:49 PM PDT 24 12714263669 ps
T259 /workspace/coverage/default/12.sram_ctrl_multiple_keys.1396244401 Jul 29 06:53:04 PM PDT 24 Jul 29 07:06:03 PM PDT 24 11682576800 ps
T260 /workspace/coverage/default/10.sram_ctrl_partial_access.2292026343 Jul 29 06:52:52 PM PDT 24 Jul 29 06:53:41 PM PDT 24 468688155 ps
T261 /workspace/coverage/default/42.sram_ctrl_executable.1172315531 Jul 29 06:58:44 PM PDT 24 Jul 29 07:16:12 PM PDT 24 15819310118 ps
T68 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1273787246 Jul 29 06:55:49 PM PDT 24 Jul 29 06:56:17 PM PDT 24 1025340820 ps
T262 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1302586301 Jul 29 06:59:32 PM PDT 24 Jul 29 07:05:46 PM PDT 24 21819585366 ps
T263 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.2694609491 Jul 29 06:54:09 PM PDT 24 Jul 29 06:55:31 PM PDT 24 2718127319 ps
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T266 /workspace/coverage/default/46.sram_ctrl_bijection.1838172986 Jul 29 06:59:33 PM PDT 24 Jul 29 07:25:29 PM PDT 24 85238528745 ps
T267 /workspace/coverage/default/11.sram_ctrl_multiple_keys.4205736485 Jul 29 06:53:05 PM PDT 24 Jul 29 07:21:55 PM PDT 24 36704309530 ps
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T274 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.2403856656 Jul 29 06:54:08 PM PDT 24 Jul 29 07:03:50 PM PDT 24 6110091847 ps
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T314 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1067986152 Jul 29 06:52:39 PM PDT 24 Jul 29 06:53:48 PM PDT 24 1392828020 ps
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T316 /workspace/coverage/default/1.sram_ctrl_ram_cfg.67431831 Jul 29 06:52:25 PM PDT 24 Jul 29 06:52:28 PM PDT 24 360640415 ps
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T318 /workspace/coverage/default/43.sram_ctrl_regwen.1004329893 Jul 29 06:59:02 PM PDT 24 Jul 29 07:11:14 PM PDT 24 51195512007 ps
T319 /workspace/coverage/default/26.sram_ctrl_stress_all.4172091812 Jul 29 06:55:48 PM PDT 24 Jul 29 08:01:47 PM PDT 24 128629465174 ps
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