Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 15340375 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 163209988 1 T2 9113 T3 1003 T4 5424



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 88019452 1 T2 4975 T3 550 T4 3297
values[0x0] 43740188 1 T2 2450 T3 275 T4 1512
values[0x1] 46790723 1 T2 2614 T3 286 T4 1780



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 7802052 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 170748311 1 T2 9585 T3 1055 T4 5983



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 563641 1 T2 24 T3 9 T4 26
valid_sources[0x01] 563928 1 T2 60 T3 12 T4 19
valid_sources[0x02] 582099 1 T2 72 T3 4 T4 7
valid_sources[0x03] 567405 1 T2 64 T3 3 T4 11
valid_sources[0x04] 585573 1 T2 2 T3 8 T4 24
valid_sources[0x05] 773079 1 T2 52 T3 8 T4 28
valid_sources[0x06] 571064 1 T2 22 T3 3 T4 15
valid_sources[0x07] 568610 1 T2 76 T3 4 T4 57
valid_sources[0x08] 624212 1 T2 79 T3 9 T4 25
valid_sources[0x09] 571491 1 T2 29 T3 3 T4 33
valid_sources[0x0a] 597251 1 T2 24 T3 4 T4 5
valid_sources[0x0b] 600425 1 T2 72 T3 9 T4 23
valid_sources[0x0c] 575509 1 T3 4 T4 31 T5 1155
valid_sources[0x0d] 580481 1 T2 13 T3 7 T4 52
valid_sources[0x0e] 573136 1 T2 6 T3 6 T4 19
valid_sources[0x0f] 607544 1 T3 1 T4 17 T5 1137
valid_sources[0x10] 599774 1 T2 55 T4 58 T5 1020
valid_sources[0x11] 638961 1 T2 56 T3 1 T4 31
valid_sources[0x12] 577795 1 T2 25 T4 36 T5 1145
valid_sources[0x13] 577786 1 T2 144 T3 5 T4 14
valid_sources[0x14] 570663 1 T2 87 T3 3 T4 24
valid_sources[0x15] 568265 1 T2 8 T3 5 T4 17
valid_sources[0x16] 667101 1 T2 41 T3 3 T4 23
valid_sources[0x17] 621713 1 T2 36 T3 3 T4 16
valid_sources[0x18] 580131 1 T2 96 T3 1 T4 21
valid_sources[0x19] 613926 1 T2 12 T3 4 T4 20
valid_sources[0x1a] 636622 1 T2 68 T3 5 T4 28
valid_sources[0x1b] 603595 1 T2 24 T3 3 T4 16
valid_sources[0x1c] 599573 1 T2 6 T3 3 T4 25
valid_sources[0x1d] 1770758 1 T2 37 T3 5 T4 18
valid_sources[0x1e] 603109 1 T2 19 T3 3 T4 21
valid_sources[0x1f] 604535 1 T2 7 T3 3 T4 13
valid_sources[0x20] 594892 1 T2 40 T3 6 T4 19
valid_sources[0x21] 615062 1 T2 47 T3 5 T4 24
valid_sources[0x22] 627283 1 T2 1 T3 7 T4 23
valid_sources[0x23] 587870 1 T3 3 T4 32 T5 1133
valid_sources[0x24] 609487 1 T2 103 T3 3 T4 36
valid_sources[0x25] 611383 1 T2 56 T3 1 T4 22
valid_sources[0x26] 603533 1 T2 3 T3 7 T4 49
valid_sources[0x27] 595190 1 T2 11 T3 8 T4 36
valid_sources[0x28] 574267 1 T2 77 T3 2 T4 45
valid_sources[0x29] 641914 1 T3 4 T4 7 T5 1012
valid_sources[0x2a] 585339 1 T2 20 T3 6 T4 21
valid_sources[0x2b] 1294344 1 T2 61 T3 7 T4 42
valid_sources[0x2c] 773735 1 T2 23 T3 1 T4 17
valid_sources[0x2d] 608911 1 T3 2 T4 16 T5 1029
valid_sources[0x2e] 594691 1 T2 53 T3 6 T4 11
valid_sources[0x2f] 570138 1 T2 114 T3 8 T4 42
valid_sources[0x30] 602221 1 T2 67 T3 9 T4 18
valid_sources[0x31] 589735 1 T2 57 T3 3 T4 18
valid_sources[0x32] 1915800 1 T2 40 T3 3 T4 17
valid_sources[0x33] 616672 1 T2 81 T3 3 T4 24
valid_sources[0x34] 570611 1 T2 45 T3 5 T4 23
valid_sources[0x35] 636839 1 T2 39 T3 5 T4 43
valid_sources[0x36] 634075 1 T2 10 T3 1 T4 54
valid_sources[0x37] 571850 1 T2 33 T3 2 T4 12
valid_sources[0x38] 603310 1 T2 82 T3 2 T4 13
valid_sources[0x39] 575280 1 T2 43 T3 3 T4 8
valid_sources[0x3a] 595922 1 T2 5 T3 2 T4 37
valid_sources[0x3b] 2116488 1 T2 13 T3 3 T4 12
valid_sources[0x3c] 1433915 1 T2 10 T3 8 T4 9
valid_sources[0x3d] 602867 1 T2 17 T3 5 T4 21
valid_sources[0x3e] 599550 1 T2 16 T3 3 T4 40
valid_sources[0x3f] 567242 1 T2 18 T3 6 T4 34
valid_sources[0x40] 578203 1 T2 42 T3 3 T4 36
valid_sources[0x41] 567727 1 T2 41 T4 18 T5 1082
valid_sources[0x42] 617655 1 T2 22 T3 2 T4 20
valid_sources[0x43] 1424368 1 T2 138 T3 7 T4 38
valid_sources[0x44] 571444 1 T2 51 T3 6 T4 32
valid_sources[0x45] 593916 1 T2 68 T3 2 T4 17
valid_sources[0x46] 630067 1 T2 74 T3 3 T4 34
valid_sources[0x47] 1230771 1 T2 15 T3 3 T4 59
valid_sources[0x48] 2109750 1 T2 81 T3 3 T4 20
valid_sources[0x49] 863871 1 T2 107 T3 4 T4 27
valid_sources[0x4a] 569648 1 T2 7 T3 6 T4 33
valid_sources[0x4b] 570419 1 T2 30 T3 6 T4 13
valid_sources[0x4c] 613672 1 T2 15 T3 3 T4 18
valid_sources[0x4d] 577105 1 T2 3 T3 4 T4 6
valid_sources[0x4e] 623066 1 T2 8 T3 8 T4 30
valid_sources[0x4f] 576627 1 T2 69 T3 6 T4 16
valid_sources[0x50] 596809 1 T2 72 T3 6 T4 13
valid_sources[0x51] 565072 1 T2 9 T3 6 T4 14
valid_sources[0x52] 579566 1 T2 40 T3 1 T4 28
valid_sources[0x53] 566814 1 T2 8 T3 4 T4 8
valid_sources[0x54] 582517 1 T2 55 T3 3 T4 23
valid_sources[0x55] 568328 1 T2 24 T4 55 T5 996
valid_sources[0x56] 677250 1 T3 5 T4 49 T5 1044
valid_sources[0x57] 574917 1 T2 100 T3 4 T4 58
valid_sources[0x58] 1557777 1 T2 53 T3 11 T4 18
valid_sources[0x59] 715537 1 T2 39 T3 7 T4 11
valid_sources[0x5a] 707308 1 T2 43 T3 2 T4 44
valid_sources[0x5b] 791723 1 T2 26 T3 9 T4 56
valid_sources[0x5c] 586771 1 T2 42 T3 3 T4 41
valid_sources[0x5d] 602422 1 T2 30 T3 2 T4 12
valid_sources[0x5e] 595267 1 T3 4 T4 3 T5 1052
valid_sources[0x5f] 622364 1 T2 48 T3 3 T4 53
valid_sources[0x60] 1990736 1 T2 58 T3 5 T4 38
valid_sources[0x61] 1407970 1 T2 52 T3 13 T4 27
valid_sources[0x62] 570976 1 T2 111 T3 8 T4 34
valid_sources[0x63] 578254 1 T2 60 T3 2 T4 28
valid_sources[0x64] 580247 1 T3 8 T4 25 T5 1071
valid_sources[0x65] 593185 1 T2 108 T3 5 T4 34
valid_sources[0x66] 602108 1 T2 6 T3 3 T4 49
valid_sources[0x67] 633837 1 T2 29 T3 5 T4 39
valid_sources[0x68] 607098 1 T2 1 T3 4 T4 25
valid_sources[0x69] 601717 1 T2 20 T3 3 T4 23
valid_sources[0x6a] 569696 1 T2 45 T3 1 T4 9
valid_sources[0x6b] 777631 1 T2 68 T3 10 T4 38
valid_sources[0x6c] 630253 1 T2 6 T3 2 T4 45
valid_sources[0x6d] 653858 1 T2 19 T3 8 T4 21
valid_sources[0x6e] 582651 1 T2 56 T3 2 T4 22
valid_sources[0x6f] 614487 1 T2 23 T3 9 T4 29
valid_sources[0x70] 584813 1 T2 68 T3 5 T4 25
valid_sources[0x71] 2045969 1 T2 3 T3 5 T4 18
valid_sources[0x72] 616197 1 T2 47 T3 5 T4 34
valid_sources[0x73] 2134112 1 T2 61 T3 6 T4 42
valid_sources[0x74] 589011 1 T2 94 T3 7 T4 48
valid_sources[0x75] 664167 1 T2 17 T3 14 T4 36
valid_sources[0x76] 623168 1 T2 13 T3 1 T4 14
valid_sources[0x77] 576774 1 T2 4 T3 2 T4 33
valid_sources[0x78] 564525 1 T2 68 T3 5 T4 24
valid_sources[0x79] 583481 1 T2 38 T3 2 T4 8
valid_sources[0x7a] 568698 1 T2 32 T3 4 T4 45
valid_sources[0x7b] 569953 1 T2 34 T3 2 T4 17
valid_sources[0x7c] 568511 1 T3 1 T4 10 T5 1140
valid_sources[0x7d] 591075 1 T2 13 T3 9 T4 39
valid_sources[0x7e] 1324033 1 T3 4 T4 4 T5 1038
valid_sources[0x7f] 596868 1 T2 56 T3 3 T4 1
valid_sources[0x80] 600825 1 T2 35 T3 3 T4 32



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 80309348 1 T2 4525 T3 505 T4 2686
values[0x0] all_enables biggest_size 41450075 1 T2 2299 T3 252 T4 1326
values[0x1] all_enables biggest_size 41450565 1 T2 2289 T3 246 T4 1412


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 45754 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 166634 1 T1 1 T2 1 T3 2



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 57666 1 T7 33 T8 74 T11 10
values[0x0] 74514 1 T1 2 T2 1 T3 1
values[0x1] 80208 1 T1 3 T2 1 T3 1



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34953 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 177435 1 T1 1 T2 1 T3 2



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 799 1 T19 1 T22 8 T23 9
valid_sources[0x01] 769 1 T8 2 T11 1 T41 1
valid_sources[0x02] 1233 1 T13 5 T22 12 T23 27
valid_sources[0x03] 760 1 T9 1 T19 2 T43 1
valid_sources[0x04] 807 1 T9 1 T22 11 T23 12
valid_sources[0x05] 602 1 T19 10 T22 9 T23 3
valid_sources[0x06] 756 1 T8 2 T22 10 T23 1
valid_sources[0x07] 717 1 T22 9 T23 17 T24 3
valid_sources[0x08] 701 1 T8 3 T19 1 T22 17
valid_sources[0x09] 598 1 T5 1 T43 1 T22 8
valid_sources[0x0a] 911 1 T19 2 T22 5 T45 4
valid_sources[0x0b] 836 1 T43 1 T22 14 T23 19
valid_sources[0x0c] 939 1 T7 1 T41 3 T9 1
valid_sources[0x0d] 588 1 T19 1 T22 7 T23 6
valid_sources[0x0e] 640 1 T8 1 T22 9 T48 1
valid_sources[0x0f] 969 1 T9 1 T22 7 T23 14
valid_sources[0x10] 789 1 T43 3 T22 8 T23 21
valid_sources[0x11] 652 1 T8 2 T43 4 T14 1
valid_sources[0x12] 802 1 T43 2 T22 14 T23 32
valid_sources[0x13] 812 1 T22 6 T23 20 T24 4
valid_sources[0x14] 1281 1 T71 2 T9 1 T22 6
valid_sources[0x15] 685 1 T5 1 T8 1 T22 6
valid_sources[0x16] 792 1 T43 1 T22 8 T23 37
valid_sources[0x17] 714 1 T22 7 T64 3 T23 8
valid_sources[0x18] 1346 1 T19 6 T43 5 T22 6
valid_sources[0x19] 957 1 T8 1 T43 1 T22 6
valid_sources[0x1a] 1297 1 T19 30 T43 1 T22 11
valid_sources[0x1b] 753 1 T8 2 T22 13 T48 1
valid_sources[0x1c] 663 1 T9 1 T19 3 T22 9
valid_sources[0x1d] 850 1 T8 1 T9 1 T43 1
valid_sources[0x1e] 1001 1 T43 2 T22 12 T24 2
valid_sources[0x1f] 549 1 T18 10 T22 4 T23 18
valid_sources[0x20] 1164 1 T22 8 T66 2 T23 7
valid_sources[0x21] 1114 1 T22 9 T23 12 T24 2
valid_sources[0x22] 934 1 T22 10 T64 13 T23 19
valid_sources[0x23] 633 1 T22 15 T145 5 T23 13
valid_sources[0x24] 875 1 T11 9 T22 13 T62 2
valid_sources[0x25] 952 1 T8 2 T41 4 T22 12
valid_sources[0x26] 1131 1 T8 1 T11 2 T41 1
valid_sources[0x27] 732 1 T8 2 T19 2 T22 10
valid_sources[0x28] 760 1 T43 3 T22 6 T23 31
valid_sources[0x29] 1052 1 T7 3 T8 2 T22 8
valid_sources[0x2a] 788 1 T22 6 T23 21 T24 2
valid_sources[0x2b] 742 1 T22 14 T23 7 T24 1
valid_sources[0x2c] 823 1 T22 9 T23 45 T24 12
valid_sources[0x2d] 1205 1 T8 3 T22 8 T23 19
valid_sources[0x2e] 897 1 T19 5 T43 2 T22 6
valid_sources[0x2f] 774 1 T18 3 T9 1 T90 1
valid_sources[0x30] 962 1 T22 7 T23 9 T24 1
valid_sources[0x31] 801 1 T22 11 T23 9 T24 3
valid_sources[0x32] 1032 1 T19 1 T22 10 T23 7
valid_sources[0x33] 1104 1 T22 14 T23 34 T24 6
valid_sources[0x34] 870 1 T22 10 T23 10 T24 3
valid_sources[0x35] 1157 1 T8 1 T18 2 T43 1
valid_sources[0x36] 880 1 T8 4 T22 6 T74 5
valid_sources[0x37] 923 1 T8 2 T19 2 T43 3
valid_sources[0x38] 543 1 T7 2 T8 1 T9 1
valid_sources[0x39] 925 1 T43 2 T22 4 T23 86
valid_sources[0x3a] 632 1 T7 3 T8 1 T9 1
valid_sources[0x3b] 643 1 T8 1 T43 2 T22 10
valid_sources[0x3c] 1138 1 T8 3 T11 8 T18 2
valid_sources[0x3d] 702 1 T5 1 T22 7 T23 10
valid_sources[0x3e] 773 1 T19 8 T22 14 T74 27
valid_sources[0x3f] 1058 1 T8 3 T22 8 T23 34
valid_sources[0x40] 1103 1 T22 6 T23 54 T24 3
valid_sources[0x41] 655 1 T8 1 T9 1 T43 3
valid_sources[0x42] 625 1 T22 10 T23 23 T24 1
valid_sources[0x43] 1158 1 T8 1 T43 1 T55 2
valid_sources[0x44] 781 1 T4 1 T43 2 T22 5
valid_sources[0x45] 675 1 T8 4 T11 7 T18 1
valid_sources[0x46] 952 1 T18 6 T22 14 T74 1
valid_sources[0x47] 628 1 T41 1 T22 13 T23 35
valid_sources[0x48] 1077 1 T20 29 T22 14 T23 19
valid_sources[0x49] 1332 1 T9 1 T22 9 T23 47
valid_sources[0x4a] 894 1 T22 8 T23 15 T24 1
valid_sources[0x4b] 638 1 T22 4 T23 26 T24 2
valid_sources[0x4c] 875 1 T8 1 T43 1 T22 5
valid_sources[0x4d] 714 1 T19 1 T22 7 T24 5
valid_sources[0x4e] 657 1 T8 4 T19 2 T22 6
valid_sources[0x4f] 884 1 T8 1 T22 5 T23 46
valid_sources[0x50] 987 1 T8 1 T22 9 T23 18
valid_sources[0x51] 597 1 T22 12 T23 39 T24 2
valid_sources[0x52] 674 1 T22 10 T23 27 T24 4
valid_sources[0x53] 744 1 T19 1 T43 1 T22 14
valid_sources[0x54] 772 1 T22 9 T23 13 T24 6
valid_sources[0x55] 894 1 T7 2 T8 2 T9 1
valid_sources[0x56] 738 1 T22 11 T23 36 T24 2
valid_sources[0x57] 896 1 T8 2 T22 9 T23 12
valid_sources[0x58] 1081 1 T8 1 T42 19 T53 1
valid_sources[0x59] 682 1 T8 1 T22 4 T23 5
valid_sources[0x5a] 768 1 T9 1 T22 11 T23 20
valid_sources[0x5b] 636 1 T19 3 T43 1 T22 9
valid_sources[0x5c] 582 1 T7 4 T8 1 T43 3
valid_sources[0x5d] 880 1 T41 4 T43 1 T22 13
valid_sources[0x5e] 983 1 T1 5 T8 3 T11 7
valid_sources[0x5f] 690 1 T22 9 T23 45 T24 3
valid_sources[0x60] 716 1 T8 1 T41 1 T9 1
valid_sources[0x61] 682 1 T8 4 T22 11 T23 27
valid_sources[0x62] 717 1 T22 13 T23 25 T24 4
valid_sources[0x63] 728 1 T22 9 T23 37 T52 2
valid_sources[0x64] 1021 1 T8 1 T22 9 T44 3
valid_sources[0x65] 970 1 T22 6 T145 2 T23 29
valid_sources[0x66] 875 1 T22 16 T23 4 T24 3
valid_sources[0x67] 1018 1 T8 2 T22 21 T23 41
valid_sources[0x68] 688 1 T7 1 T22 8 T26 1
valid_sources[0x69] 582 1 T7 4 T43 3 T22 8
valid_sources[0x6a] 992 1 T41 1 T22 7 T23 1
valid_sources[0x6b] 782 1 T19 9 T22 12 T23 19
valid_sources[0x6c] 751 1 T18 2 T43 4 T22 12
valid_sources[0x6d] 693 1 T7 1 T9 1 T19 4
valid_sources[0x6e] 1065 1 T8 2 T22 7 T23 31
valid_sources[0x6f] 717 1 T8 1 T43 3 T22 11
valid_sources[0x70] 949 1 T43 1 T22 10 T23 22
valid_sources[0x71] 751 1 T8 3 T22 9 T23 28
valid_sources[0x72] 1043 1 T5 1 T43 2 T22 8
valid_sources[0x73] 682 1 T18 4 T22 17 T63 1
valid_sources[0x74] 1021 1 T11 3 T43 3 T22 9
valid_sources[0x75] 839 1 T8 1 T14 2 T22 15
valid_sources[0x76] 983 1 T8 1 T39 1 T43 1
valid_sources[0x77] 993 1 T22 10 T64 7 T23 13
valid_sources[0x78] 633 1 T43 2 T22 4 T62 9
valid_sources[0x79] 709 1 T8 3 T43 1 T22 23
valid_sources[0x7a] 952 1 T8 4 T43 1 T22 12
valid_sources[0x7b] 938 1 T7 1 T22 4 T23 67
valid_sources[0x7c] 592 1 T22 12 T23 57 T24 3
valid_sources[0x7d] 1049 1 T11 3 T22 10 T64 2
valid_sources[0x7e] 754 1 T5 1 T8 1 T22 7
valid_sources[0x7f] 587 1 T7 3 T22 14 T110 4
valid_sources[0x80] 1036 1 T43 2 T22 7 T51 222



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 44226 1 T7 16 T8 45 T11 7
values[0x0] all_enables biggest_size 62538 1 T2 1 T3 1 T4 1
values[0x1] all_enables biggest_size 59870 1 T1 1 T3 1 T6 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%