Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2963853687 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.4089997846 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3854636614 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2503286894 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2303910240 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.203365566 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4260091586 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.132779559 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1890092129 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.293632981 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2729991634 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1697610959 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3221955417 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3025361918 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.171974617 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2605095564 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1902052844 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3372744714 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1201754934 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1643959666 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.342082114 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1005533120 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1530281479 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1239114702 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1903718561 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3181919539 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2319095127 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3696203789 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.370766950 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3083569087 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3329099762 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2220470279 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.56725431 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2679201384 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2004007869 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3993319785 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3794279014 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3821028306 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2898663854 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3533078888 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4246280892 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3678909050 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1743581195 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2123933548 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1886114344 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3003947229 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1296100337 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.4149482985 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1154856745 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1145679280 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.4179274235 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2770078634 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1047863186 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3405687065 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1621323429 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4225649062 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4254100259 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1938224501 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1038002206 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1022256114 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1073621011 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.674954925 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2009295363 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3847352314 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1843706598 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4097415277 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.545308552 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3781601741 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4147041614 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3812348511 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.804498710 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.4183957768 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3447358942 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1708199967 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.605464447 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3810038993 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2622568071 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2292190517 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2679873715 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.4260095709 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2242224729 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2764831475 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2020248345 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1449488224 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2612278158 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1195701931 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.801346492 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.483129854 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.93004190 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.993666559 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2939221187 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3561850681 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.366906190 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2610848269 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1325774490 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.306418958 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1268744918 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.113353610 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2210584259 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2546649231 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4052774603 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3514994756 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2379878784 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.4009305554 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.4237120296 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.4016351417 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2119522249 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.608418354 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2545230167 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2801519870 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.10064279 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1740897624 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1705976371 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.16818102 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2164498810 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1941682338 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1693922813 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2203205668 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.919979624 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2060311574 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1349389210 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2538686500 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3893220817 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2733400834 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.539152923 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2585907512 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.843976113 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1749777791 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2958066567 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1251056230 |
/workspace/coverage/default/0.sram_ctrl_bijection.2561023722 |
/workspace/coverage/default/0.sram_ctrl_executable.1531189283 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1702607119 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2587574292 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2021623320 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2117166169 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.4179243417 |
/workspace/coverage/default/0.sram_ctrl_partial_access.4142650848 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3587195813 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1396662788 |
/workspace/coverage/default/0.sram_ctrl_regwen.1504294866 |
/workspace/coverage/default/0.sram_ctrl_smoke.2177263877 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2314047918 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1034043501 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1424457461 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.281985158 |
/workspace/coverage/default/1.sram_ctrl_alert_test.4234886644 |
/workspace/coverage/default/1.sram_ctrl_bijection.2855929373 |
/workspace/coverage/default/1.sram_ctrl_executable.2194589440 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3610983615 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.382311623 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1907617701 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.362049492 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3073789041 |
/workspace/coverage/default/1.sram_ctrl_partial_access.15120080 |
/workspace/coverage/default/1.sram_ctrl_regwen.2697399075 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.1277053371 |
/workspace/coverage/default/1.sram_ctrl_smoke.3206909530 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2014161788 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1551224312 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2957466562 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2703565599 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1982703364 |
/workspace/coverage/default/10.sram_ctrl_bijection.283015568 |
/workspace/coverage/default/10.sram_ctrl_executable.280969194 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.386442838 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2873275009 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.771071998 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2685778270 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2379387759 |
/workspace/coverage/default/10.sram_ctrl_partial_access.48144910 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3585889167 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3215236065 |
/workspace/coverage/default/10.sram_ctrl_regwen.3885262489 |
/workspace/coverage/default/10.sram_ctrl_smoke.3950242488 |
/workspace/coverage/default/10.sram_ctrl_stress_all.2341274884 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1840098382 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2319995040 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3476819132 |
/workspace/coverage/default/11.sram_ctrl_alert_test.1114715047 |
/workspace/coverage/default/11.sram_ctrl_bijection.3436719347 |
/workspace/coverage/default/11.sram_ctrl_executable.3556471093 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.218179072 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.3173407051 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.950556004 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.403333271 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2588086516 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2393924423 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3316488697 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3684188900 |
/workspace/coverage/default/11.sram_ctrl_regwen.2927572141 |
/workspace/coverage/default/11.sram_ctrl_smoke.3909024276 |
/workspace/coverage/default/11.sram_ctrl_stress_all.267993706 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.4115432784 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1118177177 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.325445772 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1841462450 |
/workspace/coverage/default/12.sram_ctrl_alert_test.455260796 |
/workspace/coverage/default/12.sram_ctrl_bijection.2842237839 |
/workspace/coverage/default/12.sram_ctrl_executable.3715480893 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1266461694 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.311043901 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.100520612 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.399354937 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2003801988 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2230100225 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1965687916 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.994882909 |
/workspace/coverage/default/12.sram_ctrl_regwen.2657678632 |
/workspace/coverage/default/12.sram_ctrl_smoke.2376036804 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1242495241 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2960966313 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1672554968 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.651342436 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1128129598 |
/workspace/coverage/default/13.sram_ctrl_bijection.3313846473 |
/workspace/coverage/default/13.sram_ctrl_executable.3767537930 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.4125607468 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.3545344002 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.615258195 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.4050528223 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.2289101006 |
/workspace/coverage/default/13.sram_ctrl_partial_access.1675406832 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.716591196 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2632761719 |
/workspace/coverage/default/13.sram_ctrl_regwen.2927983668 |
/workspace/coverage/default/13.sram_ctrl_smoke.964084616 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3393163339 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1965556067 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.882271810 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1207234195 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.306933841 |
/workspace/coverage/default/14.sram_ctrl_alert_test.2473337463 |
/workspace/coverage/default/14.sram_ctrl_bijection.1256123956 |
/workspace/coverage/default/14.sram_ctrl_executable.2483675732 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.4083024506 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.3089368065 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.849322584 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3158396366 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2109133251 |
/workspace/coverage/default/14.sram_ctrl_partial_access.678195747 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1630682495 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.645836173 |
/workspace/coverage/default/14.sram_ctrl_regwen.4006342385 |
/workspace/coverage/default/14.sram_ctrl_smoke.3786377128 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.765361262 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3372163454 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2639335757 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.882367422 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1501151824 |
/workspace/coverage/default/15.sram_ctrl_executable.1762813798 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.2083448790 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.2910305648 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.2988661399 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.767058535 |
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/workspace/coverage/default/44.sram_ctrl_stress_all.3128776772 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3363108832 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1920080322 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.875264318 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2038769570 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1552153929 |
/workspace/coverage/default/45.sram_ctrl_bijection.539759007 |
/workspace/coverage/default/45.sram_ctrl_executable.1775436643 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3992895851 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.4147685335 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3155728822 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3666229749 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4209154562 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2334186917 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2332366707 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3221598348 |
/workspace/coverage/default/45.sram_ctrl_regwen.2603055423 |
/workspace/coverage/default/45.sram_ctrl_smoke.96761240 |
/workspace/coverage/default/45.sram_ctrl_stress_all.3329182067 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3561991692 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1554814275 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1991897711 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1835323658 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1025898708 |
/workspace/coverage/default/46.sram_ctrl_bijection.1097557741 |
/workspace/coverage/default/46.sram_ctrl_executable.3888762352 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1738857803 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.1611053519 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2815671248 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.233836898 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.802961496 |
/workspace/coverage/default/46.sram_ctrl_partial_access.3391861260 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2700904549 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.4084788283 |
/workspace/coverage/default/46.sram_ctrl_regwen.1481851446 |
/workspace/coverage/default/46.sram_ctrl_smoke.1126684668 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3435611036 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3261082428 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2599428393 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1437322442 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3441714620 |
/workspace/coverage/default/47.sram_ctrl_bijection.2176902942 |
/workspace/coverage/default/47.sram_ctrl_executable.1811365126 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2310830123 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.3768482304 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1170541446 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.489892930 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3910863044 |
/workspace/coverage/default/47.sram_ctrl_partial_access.1357542043 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3563599984 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1267039370 |
/workspace/coverage/default/47.sram_ctrl_regwen.1480096488 |
/workspace/coverage/default/47.sram_ctrl_smoke.1416044464 |
/workspace/coverage/default/47.sram_ctrl_stress_all.3839634793 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2094521334 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2354076678 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.723821628 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3817670842 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3624453369 |
/workspace/coverage/default/48.sram_ctrl_executable.1032805395 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.408092348 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2120550726 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3358498036 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3803952539 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2469217828 |
/workspace/coverage/default/48.sram_ctrl_partial_access.3398898788 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1785998381 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2289060489 |
/workspace/coverage/default/48.sram_ctrl_regwen.1795952606 |
/workspace/coverage/default/48.sram_ctrl_smoke.1944490138 |
/workspace/coverage/default/48.sram_ctrl_stress_all.1270445659 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.306556025 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3333935035 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3972127605 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3551894313 |
/workspace/coverage/default/49.sram_ctrl_alert_test.2105149756 |
/workspace/coverage/default/49.sram_ctrl_bijection.1694693774 |
/workspace/coverage/default/49.sram_ctrl_executable.2985487067 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2723172952 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1499321001 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1395372635 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.3772086152 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3672740934 |
/workspace/coverage/default/49.sram_ctrl_partial_access.1086789604 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1235889011 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4202696729 |
/workspace/coverage/default/49.sram_ctrl_regwen.2727626042 |
/workspace/coverage/default/49.sram_ctrl_smoke.661824873 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2793185005 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3343722818 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2668129553 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.995775221 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2674773937 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1152508914 |
/workspace/coverage/default/5.sram_ctrl_bijection.587263654 |
/workspace/coverage/default/5.sram_ctrl_executable.323445591 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.4157645041 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2589771198 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1106272459 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.2620601687 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1402839212 |
/workspace/coverage/default/5.sram_ctrl_partial_access.3286403422 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.324166027 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4131287452 |
/workspace/coverage/default/5.sram_ctrl_regwen.4178943398 |
/workspace/coverage/default/5.sram_ctrl_smoke.97464329 |
/workspace/coverage/default/5.sram_ctrl_stress_all.888169656 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.550489493 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.494114220 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.839098923 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2154743661 |
/workspace/coverage/default/6.sram_ctrl_alert_test.640531764 |
/workspace/coverage/default/6.sram_ctrl_bijection.1975813041 |
/workspace/coverage/default/6.sram_ctrl_executable.324309378 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3472170245 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.3630604069 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2499439294 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.144604680 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3427577974 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3333307118 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2605876233 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.512337422 |
/workspace/coverage/default/6.sram_ctrl_regwen.800938102 |
/workspace/coverage/default/6.sram_ctrl_smoke.579784547 |
/workspace/coverage/default/6.sram_ctrl_stress_all.3564633573 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3159087110 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1490398988 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.135717668 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.953033616 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3394233676 |
/workspace/coverage/default/7.sram_ctrl_executable.1966012064 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3303138193 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.1333374533 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2630174885 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2026070603 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.106705283 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2726942374 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3906399350 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1218169343 |
/workspace/coverage/default/7.sram_ctrl_regwen.1219535572 |
/workspace/coverage/default/7.sram_ctrl_smoke.1956400797 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1889397470 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.285567487 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2053338792 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4288740733 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.195243606 |
/workspace/coverage/default/8.sram_ctrl_alert_test.83715782 |
/workspace/coverage/default/8.sram_ctrl_bijection.3071050091 |
/workspace/coverage/default/8.sram_ctrl_executable.2194520603 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3893863274 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.2855868013 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1141029534 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.3101680301 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1475713867 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3965089517 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3666437376 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2949469709 |
/workspace/coverage/default/8.sram_ctrl_regwen.699489402 |
/workspace/coverage/default/8.sram_ctrl_smoke.4092277962 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2603333483 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3714886703 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1589966504 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3949016432 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3816154081 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2204708162 |
/workspace/coverage/default/9.sram_ctrl_bijection.3377785314 |
/workspace/coverage/default/9.sram_ctrl_executable.4202329777 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1859865288 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1808999104 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3416681380 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.222040156 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1728655323 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3380948350 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3387428340 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1594360874 |
/workspace/coverage/default/9.sram_ctrl_regwen.3375676103 |
/workspace/coverage/default/9.sram_ctrl_smoke.1802470878 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3003963383 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2352765972 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3860028857 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2292208175 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.3330179273 |
|
|
Aug 02 07:28:56 PM PDT 24 |
Aug 02 07:39:19 PM PDT 24 |
21056495560 ps |
T2 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.2851611195 |
|
|
Aug 02 07:29:37 PM PDT 24 |
Aug 02 07:32:07 PM PDT 24 |
3181662960 ps |
T3 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2330991400 |
|
|
Aug 02 07:33:26 PM PDT 24 |
Aug 02 07:33:52 PM PDT 24 |
5451862210 ps |
T11 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.4147685335 |
|
|
Aug 02 07:36:16 PM PDT 24 |
Aug 02 07:36:23 PM PDT 24 |
1398016875 ps |
T4 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3897177026 |
|
|
Aug 02 07:34:16 PM PDT 24 |
Aug 02 07:34:30 PM PDT 24 |
624597028 ps |
T12 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3261082428 |
|
|
Aug 02 07:36:33 PM PDT 24 |
Aug 02 07:40:40 PM PDT 24 |
7101786642 ps |
T5 |
/workspace/coverage/default/36.sram_ctrl_smoke.1944123427 |
|
|
Aug 02 07:33:25 PM PDT 24 |
Aug 02 07:33:32 PM PDT 24 |
743381732 ps |
T6 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.1335450894 |
|
|
Aug 02 07:26:01 PM PDT 24 |
Aug 02 07:29:03 PM PDT 24 |
41514467426 ps |
T13 |
/workspace/coverage/default/49.sram_ctrl_bijection.1694693774 |
|
|
Aug 02 07:37:40 PM PDT 24 |
Aug 02 07:48:21 PM PDT 24 |
12900563341 ps |
T7 |
/workspace/coverage/default/37.sram_ctrl_stress_all.654437154 |
|
|
Aug 02 07:34:08 PM PDT 24 |
Aug 02 09:18:29 PM PDT 24 |
109552800414 ps |
T41 |
/workspace/coverage/default/38.sram_ctrl_partial_access.4224810820 |
|
|
Aug 02 07:34:05 PM PDT 24 |
Aug 02 07:34:21 PM PDT 24 |
1431538957 ps |
T42 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.2289101006 |
|
|
Aug 02 07:26:46 PM PDT 24 |
Aug 02 07:38:47 PM PDT 24 |
40634551199 ps |
T23 |
/workspace/coverage/default/18.sram_ctrl_partial_access.3752990530 |
|
|
Aug 02 07:27:52 PM PDT 24 |
Aug 02 07:28:17 PM PDT 24 |
1925702619 ps |
T43 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2416480818 |
|
|
Aug 02 07:29:38 PM PDT 24 |
Aug 02 07:49:14 PM PDT 24 |
56049168005 ps |
T59 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.106705283 |
|
|
Aug 02 07:26:01 PM PDT 24 |
Aug 02 07:30:37 PM PDT 24 |
19037721444 ps |
T63 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.3432060740 |
|
|
Aug 02 07:33:13 PM PDT 24 |
Aug 02 07:37:26 PM PDT 24 |
14559718428 ps |
T64 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.2967644003 |
|
|
Aug 02 07:31:31 PM PDT 24 |
Aug 02 07:33:54 PM PDT 24 |
12690043745 ps |
T46 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.1538449172 |
|
|
Aug 02 07:33:38 PM PDT 24 |
Aug 02 07:36:23 PM PDT 24 |
15311873778 ps |
T14 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3441714620 |
|
|
Aug 02 07:37:03 PM PDT 24 |
Aug 02 07:37:04 PM PDT 24 |
37430485 ps |
T8 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.3599290824 |
|
|
Aug 02 07:34:26 PM PDT 24 |
Aug 02 07:35:11 PM PDT 24 |
8717650573 ps |
T69 |
/workspace/coverage/default/30.sram_ctrl_bijection.1250266275 |
|
|
Aug 02 07:31:17 PM PDT 24 |
Aug 02 07:59:49 PM PDT 24 |
287999252085 ps |
T70 |
/workspace/coverage/default/28.sram_ctrl_bijection.3334440996 |
|
|
Aug 02 07:30:50 PM PDT 24 |
Aug 02 07:46:16 PM PDT 24 |
462946456497 ps |
T71 |
/workspace/coverage/default/37.sram_ctrl_bijection.3765760587 |
|
|
Aug 02 07:33:38 PM PDT 24 |
Aug 02 08:00:25 PM PDT 24 |
90482885875 ps |
T72 |
/workspace/coverage/default/17.sram_ctrl_partial_access.361938536 |
|
|
Aug 02 07:27:43 PM PDT 24 |
Aug 02 07:27:50 PM PDT 24 |
714785736 ps |
T73 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.305365402 |
|
|
Aug 02 07:28:45 PM PDT 24 |
Aug 02 07:33:36 PM PDT 24 |
4427922824 ps |
T47 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.144604680 |
|
|
Aug 02 07:26:02 PM PDT 24 |
Aug 02 07:30:55 PM PDT 24 |
21883042546 ps |
T20 |
/workspace/coverage/default/1.sram_ctrl_regwen.2697399075 |
|
|
Aug 02 07:25:38 PM PDT 24 |
Aug 02 07:41:24 PM PDT 24 |
19724331589 ps |
T85 |
/workspace/coverage/default/47.sram_ctrl_bijection.2176902942 |
|
|
Aug 02 07:36:48 PM PDT 24 |
Aug 02 08:11:22 PM PDT 24 |
121758109282 ps |
T26 |
/workspace/coverage/default/27.sram_ctrl_executable.885913729 |
|
|
Aug 02 07:30:33 PM PDT 24 |
Aug 02 07:38:33 PM PDT 24 |
5017757008 ps |
T153 |
/workspace/coverage/default/1.sram_ctrl_executable.2194589440 |
|
|
Aug 02 07:25:35 PM PDT 24 |
Aug 02 07:46:11 PM PDT 24 |
45652581798 ps |
T27 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1267039370 |
|
|
Aug 02 07:37:04 PM PDT 24 |
Aug 02 07:37:07 PM PDT 24 |
351667907 ps |
T44 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.2477749002 |
|
|
Aug 02 07:28:15 PM PDT 24 |
Aug 02 07:38:00 PM PDT 24 |
30603029071 ps |
T28 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.994882909 |
|
|
Aug 02 07:26:46 PM PDT 24 |
Aug 02 07:26:50 PM PDT 24 |
3052659567 ps |
T9 |
/workspace/coverage/default/20.sram_ctrl_stress_all.1847191143 |
|
|
Aug 02 07:28:44 PM PDT 24 |
Aug 02 08:17:53 PM PDT 24 |
158512090237 ps |
T29 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1667793776 |
|
|
Aug 02 07:25:49 PM PDT 24 |
Aug 02 07:25:53 PM PDT 24 |
4775110861 ps |
T45 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2314047918 |
|
|
Aug 02 07:25:34 PM PDT 24 |
Aug 02 08:09:39 PM PDT 24 |
155456899959 ps |
T121 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3042652703 |
|
|
Aug 02 07:25:36 PM PDT 24 |
Aug 02 07:30:31 PM PDT 24 |
14044519942 ps |
T162 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3672740934 |
|
|
Aug 02 07:37:42 PM PDT 24 |
Aug 02 08:02:02 PM PDT 24 |
22413355426 ps |
T165 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.4126723847 |
|
|
Aug 02 07:28:56 PM PDT 24 |
Aug 02 07:29:00 PM PDT 24 |
2244092135 ps |
T166 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3179693046 |
|
|
Aug 02 07:32:39 PM PDT 24 |
Aug 02 07:33:29 PM PDT 24 |
1502729958 ps |
T163 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3949016432 |
|
|
Aug 02 07:26:09 PM PDT 24 |
Aug 02 07:27:48 PM PDT 24 |
782335312 ps |
T102 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3817670842 |
|
|
Aug 02 07:37:26 PM PDT 24 |
Aug 02 08:02:24 PM PDT 24 |
73745812307 ps |
T54 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.2892210503 |
|
|
Aug 02 07:29:58 PM PDT 24 |
Aug 02 07:36:07 PM PDT 24 |
43064249176 ps |
T164 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.2825502418 |
|
|
Aug 02 07:33:28 PM PDT 24 |
Aug 02 07:33:36 PM PDT 24 |
1207204758 ps |
T15 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3394233676 |
|
|
Aug 02 07:26:12 PM PDT 24 |
Aug 02 07:26:13 PM PDT 24 |
81630359 ps |
T24 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3159087110 |
|
|
Aug 02 07:26:04 PM PDT 24 |
Aug 02 07:26:13 PM PDT 24 |
998843316 ps |
T122 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.324166027 |
|
|
Aug 02 07:26:04 PM PDT 24 |
Aug 02 07:35:55 PM PDT 24 |
23256582478 ps |
T16 |
/workspace/coverage/default/16.sram_ctrl_alert_test.1313427665 |
|
|
Aug 02 07:27:29 PM PDT 24 |
Aug 02 07:27:29 PM PDT 24 |
38906376 ps |
T161 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.3160602639 |
|
|
Aug 02 07:30:52 PM PDT 24 |
Aug 02 08:01:06 PM PDT 24 |
23631697518 ps |
T60 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2685778270 |
|
|
Aug 02 07:26:22 PM PDT 24 |
Aug 02 07:29:00 PM PDT 24 |
7067551309 ps |
T167 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.1788840513 |
|
|
Aug 02 07:28:33 PM PDT 24 |
Aug 02 07:28:36 PM PDT 24 |
676504930 ps |
T80 |
/workspace/coverage/default/7.sram_ctrl_regwen.1219535572 |
|
|
Aug 02 07:26:11 PM PDT 24 |
Aug 02 07:44:21 PM PDT 24 |
41769848128 ps |
T81 |
/workspace/coverage/default/34.sram_ctrl_regwen.2488807891 |
|
|
Aug 02 07:33:02 PM PDT 24 |
Aug 02 07:36:09 PM PDT 24 |
2755824189 ps |
T103 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2044414687 |
|
|
Aug 02 07:29:07 PM PDT 24 |
Aug 02 07:30:12 PM PDT 24 |
975545493 ps |
T10 |
/workspace/coverage/default/1.sram_ctrl_stress_all.3050544568 |
|
|
Aug 02 07:25:48 PM PDT 24 |
Aug 02 07:48:13 PM PDT 24 |
135428256232 ps |
T25 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.765361262 |
|
|
Aug 02 07:27:21 PM PDT 24 |
Aug 02 07:27:29 PM PDT 24 |
279597393 ps |
T131 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2273960277 |
|
|
Aug 02 07:31:51 PM PDT 24 |
Aug 02 07:31:55 PM PDT 24 |
1354032021 ps |
T132 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.2278839658 |
|
|
Aug 02 07:25:51 PM PDT 24 |
Aug 02 07:25:55 PM PDT 24 |
1540056169 ps |
T123 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1153626231 |
|
|
Aug 02 07:34:41 PM PDT 24 |
Aug 02 07:41:02 PM PDT 24 |
148230951940 ps |
T133 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.145165847 |
|
|
Aug 02 07:32:19 PM PDT 24 |
Aug 02 07:35:00 PM PDT 24 |
3124314809 ps |
T104 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1129506027 |
|
|
Aug 02 07:25:45 PM PDT 24 |
Aug 02 07:27:07 PM PDT 24 |
4938894459 ps |
T134 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.3545344002 |
|
|
Aug 02 07:27:03 PM PDT 24 |
Aug 02 07:28:34 PM PDT 24 |
772079538 ps |
T135 |
/workspace/coverage/default/7.sram_ctrl_smoke.1956400797 |
|
|
Aug 02 07:26:01 PM PDT 24 |
Aug 02 07:26:13 PM PDT 24 |
754701265 ps |
T136 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.2594041070 |
|
|
Aug 02 07:33:14 PM PDT 24 |
Aug 02 07:33:22 PM PDT 24 |
2487264593 ps |
T137 |
/workspace/coverage/default/38.sram_ctrl_executable.3080095333 |
|
|
Aug 02 07:34:14 PM PDT 24 |
Aug 02 07:44:38 PM PDT 24 |
12835884734 ps |
T168 |
/workspace/coverage/default/13.sram_ctrl_alert_test.2125614498 |
|
|
Aug 02 07:27:04 PM PDT 24 |
Aug 02 07:27:05 PM PDT 24 |
11858144 ps |
T61 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.2274109101 |
|
|
Aug 02 07:28:14 PM PDT 24 |
Aug 02 07:30:47 PM PDT 24 |
5373717789 ps |
T169 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3417549603 |
|
|
Aug 02 07:25:46 PM PDT 24 |
Aug 02 07:38:58 PM PDT 24 |
67635582525 ps |
T124 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3972962529 |
|
|
Aug 02 07:32:39 PM PDT 24 |
Aug 02 07:35:38 PM PDT 24 |
2805824457 ps |
T170 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1402839212 |
|
|
Aug 02 07:26:04 PM PDT 24 |
Aug 02 07:33:36 PM PDT 24 |
10459627111 ps |
T171 |
/workspace/coverage/default/3.sram_ctrl_bijection.863331603 |
|
|
Aug 02 07:25:46 PM PDT 24 |
Aug 02 07:47:06 PM PDT 24 |
37450217063 ps |
T84 |
/workspace/coverage/default/2.sram_ctrl_regwen.2179470939 |
|
|
Aug 02 07:25:52 PM PDT 24 |
Aug 02 07:34:55 PM PDT 24 |
7342820662 ps |
T172 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3624176568 |
|
|
Aug 02 07:35:31 PM PDT 24 |
Aug 02 07:36:23 PM PDT 24 |
3555905728 ps |
T158 |
/workspace/coverage/default/13.sram_ctrl_executable.3767537930 |
|
|
Aug 02 07:27:03 PM PDT 24 |
Aug 02 07:44:34 PM PDT 24 |
22374772050 ps |
T173 |
/workspace/coverage/default/46.sram_ctrl_bijection.1097557741 |
|
|
Aug 02 07:36:34 PM PDT 24 |
Aug 02 08:08:49 PM PDT 24 |
27954505965 ps |
T174 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.297600446 |
|
|
Aug 02 07:25:50 PM PDT 24 |
Aug 02 07:30:21 PM PDT 24 |
8723941156 ps |
T62 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.3690459300 |
|
|
Aug 02 07:30:25 PM PDT 24 |
Aug 02 07:35:11 PM PDT 24 |
21878555644 ps |
T21 |
/workspace/coverage/default/41.sram_ctrl_regwen.1385307955 |
|
|
Aug 02 07:35:03 PM PDT 24 |
Aug 02 07:49:39 PM PDT 24 |
90273974479 ps |
T175 |
/workspace/coverage/default/33.sram_ctrl_smoke.366036883 |
|
|
Aug 02 07:32:28 PM PDT 24 |
Aug 02 07:32:42 PM PDT 24 |
3059376306 ps |
T176 |
/workspace/coverage/default/42.sram_ctrl_bijection.453835652 |
|
|
Aug 02 07:35:18 PM PDT 24 |
Aug 02 07:46:52 PM PDT 24 |
180664155112 ps |
T105 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.2304969691 |
|
|
Aug 02 07:28:33 PM PDT 24 |
Aug 02 07:44:13 PM PDT 24 |
12929892583 ps |
T177 |
/workspace/coverage/default/10.sram_ctrl_executable.280969194 |
|
|
Aug 02 07:26:24 PM PDT 24 |
Aug 02 07:42:10 PM PDT 24 |
17423961545 ps |
T178 |
/workspace/coverage/default/15.sram_ctrl_smoke.3045777089 |
|
|
Aug 02 07:27:17 PM PDT 24 |
Aug 02 07:29:18 PM PDT 24 |
1785109588 ps |
T125 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1785998381 |
|
|
Aug 02 07:37:26 PM PDT 24 |
Aug 02 07:44:01 PM PDT 24 |
26814008267 ps |
T179 |
/workspace/coverage/default/31.sram_ctrl_executable.977597517 |
|
|
Aug 02 07:32:16 PM PDT 24 |
Aug 02 07:33:32 PM PDT 24 |
3496415800 ps |
T180 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1188060469 |
|
|
Aug 02 07:33:01 PM PDT 24 |
Aug 02 07:34:33 PM PDT 24 |
1554624817 ps |
T51 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.602000598 |
|
|
Aug 02 07:29:27 PM PDT 24 |
Aug 02 07:32:34 PM PDT 24 |
3395773753 ps |
T52 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2409802305 |
|
|
Aug 02 07:32:29 PM PDT 24 |
Aug 02 07:33:52 PM PDT 24 |
3086246575 ps |
T181 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1630682495 |
|
|
Aug 02 07:27:05 PM PDT 24 |
Aug 02 07:35:00 PM PDT 24 |
8907722498 ps |
T55 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1650965584 |
|
|
Aug 02 07:26:22 PM PDT 24 |
Aug 02 07:29:25 PM PDT 24 |
6677330275 ps |
T160 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3387428340 |
|
|
Aug 02 07:26:20 PM PDT 24 |
Aug 02 07:31:15 PM PDT 24 |
25625344836 ps |
T182 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1976399574 |
|
|
Aug 02 07:35:46 PM PDT 24 |
Aug 02 07:35:49 PM PDT 24 |
347173397 ps |
T22 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.786572764 |
|
|
Aug 02 07:33:25 PM PDT 24 |
Aug 02 07:34:09 PM PDT 24 |
7958917926 ps |
T138 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3992895851 |
|
|
Aug 02 07:36:15 PM PDT 24 |
Aug 02 07:37:47 PM PDT 24 |
30252759569 ps |
T183 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2839156903 |
|
|
Aug 02 07:25:47 PM PDT 24 |
Aug 02 07:29:48 PM PDT 24 |
23485835751 ps |
T184 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3860028857 |
|
|
Aug 02 07:26:09 PM PDT 24 |
Aug 02 07:31:41 PM PDT 24 |
10228680351 ps |
T185 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3960255098 |
|
|
Aug 02 07:32:32 PM PDT 24 |
Aug 02 07:32:35 PM PDT 24 |
679869336 ps |
T186 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3579308215 |
|
|
Aug 02 07:29:10 PM PDT 24 |
Aug 02 07:29:34 PM PDT 24 |
1587617567 ps |
T139 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3003963383 |
|
|
Aug 02 07:26:21 PM PDT 24 |
Aug 02 10:18:25 PM PDT 24 |
533255655206 ps |
T187 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1738857803 |
|
|
Aug 02 07:36:36 PM PDT 24 |
Aug 02 07:37:42 PM PDT 24 |
37968893878 ps |
T188 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2053338792 |
|
|
Aug 02 07:26:01 PM PDT 24 |
Aug 02 07:30:29 PM PDT 24 |
6998505849 ps |
T106 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.1755236283 |
|
|
Aug 02 07:30:11 PM PDT 24 |
Aug 02 07:47:16 PM PDT 24 |
83570623472 ps |
T189 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.3468635592 |
|
|
Aug 02 07:31:20 PM PDT 24 |
Aug 02 07:35:41 PM PDT 24 |
4108823479 ps |
T190 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.2652591084 |
|
|
Aug 02 07:33:48 PM PDT 24 |
Aug 02 07:33:51 PM PDT 24 |
351165811 ps |
T191 |
/workspace/coverage/default/43.sram_ctrl_smoke.792927516 |
|
|
Aug 02 07:35:29 PM PDT 24 |
Aug 02 07:36:20 PM PDT 24 |
808316077 ps |
T192 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.3116256288 |
|
|
Aug 02 07:32:30 PM PDT 24 |
Aug 02 07:33:48 PM PDT 24 |
1479360364 ps |
T193 |
/workspace/coverage/default/43.sram_ctrl_regwen.4278237925 |
|
|
Aug 02 07:35:45 PM PDT 24 |
Aug 02 07:37:20 PM PDT 24 |
5226658730 ps |
T194 |
/workspace/coverage/default/25.sram_ctrl_bijection.4255415887 |
|
|
Aug 02 07:29:51 PM PDT 24 |
Aug 02 07:42:38 PM PDT 24 |
45093988330 ps |
T195 |
/workspace/coverage/default/32.sram_ctrl_bijection.3935202658 |
|
|
Aug 02 07:32:31 PM PDT 24 |
Aug 02 07:48:35 PM PDT 24 |
53791992322 ps |
T196 |
/workspace/coverage/default/34.sram_ctrl_executable.3592142315 |
|
|
Aug 02 07:33:01 PM PDT 24 |
Aug 02 07:44:05 PM PDT 24 |
93489487713 ps |
T197 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.494114220 |
|
|
Aug 02 07:25:59 PM PDT 24 |
Aug 02 07:31:43 PM PDT 24 |
8555036027 ps |
T82 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4286090708 |
|
|
Aug 02 07:34:06 PM PDT 24 |
Aug 02 07:34:24 PM PDT 24 |
2137312775 ps |
T198 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.1230053014 |
|
|
Aug 02 07:34:06 PM PDT 24 |
Aug 02 07:34:19 PM PDT 24 |
694196017 ps |
T199 |
/workspace/coverage/default/41.sram_ctrl_executable.1646769451 |
|
|
Aug 02 07:35:02 PM PDT 24 |
Aug 02 07:50:09 PM PDT 24 |
29210235235 ps |
T200 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.2109133251 |
|
|
Aug 02 07:27:06 PM PDT 24 |
Aug 02 08:02:10 PM PDT 24 |
24539691057 ps |
T201 |
/workspace/coverage/default/47.sram_ctrl_partial_access.1357542043 |
|
|
Aug 02 07:36:47 PM PDT 24 |
Aug 02 07:39:40 PM PDT 24 |
7262582093 ps |
T202 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.499993972 |
|
|
Aug 02 07:28:45 PM PDT 24 |
Aug 02 07:37:32 PM PDT 24 |
331421298023 ps |
T203 |
/workspace/coverage/default/40.sram_ctrl_partial_access.1571968723 |
|
|
Aug 02 07:34:44 PM PDT 24 |
Aug 02 07:37:15 PM PDT 24 |
1753417169 ps |
T204 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.572118489 |
|
|
Aug 02 07:32:17 PM PDT 24 |
Aug 02 07:39:30 PM PDT 24 |
19527734402 ps |
T154 |
/workspace/coverage/default/22.sram_ctrl_regwen.1081396101 |
|
|
Aug 02 07:29:10 PM PDT 24 |
Aug 02 07:38:10 PM PDT 24 |
10163362601 ps |
T107 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3149627201 |
|
|
Aug 02 07:30:54 PM PDT 24 |
Aug 02 07:45:54 PM PDT 24 |
14171076671 ps |
T119 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.3497975699 |
|
|
Aug 02 07:27:39 PM PDT 24 |
Aug 02 07:42:30 PM PDT 24 |
86032620063 ps |
T58 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.367602520 |
|
|
Aug 02 07:33:23 PM PDT 24 |
Aug 02 07:35:39 PM PDT 24 |
40451462429 ps |
T205 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2752423328 |
|
|
Aug 02 07:26:04 PM PDT 24 |
Aug 02 07:26:47 PM PDT 24 |
1501995009 ps |
T206 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2038769570 |
|
|
Aug 02 07:36:16 PM PDT 24 |
Aug 02 08:02:24 PM PDT 24 |
36175636750 ps |
T207 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1589966504 |
|
|
Aug 02 07:26:08 PM PDT 24 |
Aug 02 07:32:33 PM PDT 24 |
5757052178 ps |
T208 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1437322442 |
|
|
Aug 02 07:37:03 PM PDT 24 |
Aug 02 07:50:40 PM PDT 24 |
90326763944 ps |
T209 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3510620131 |
|
|
Aug 02 07:25:52 PM PDT 24 |
Aug 02 07:29:56 PM PDT 24 |
22575456913 ps |
T210 |
/workspace/coverage/default/26.sram_ctrl_bijection.435153642 |
|
|
Aug 02 07:30:12 PM PDT 24 |
Aug 02 07:50:37 PM PDT 24 |
36202031087 ps |
T211 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.877334265 |
|
|
Aug 02 07:34:15 PM PDT 24 |
Aug 02 07:39:21 PM PDT 24 |
38961461563 ps |
T212 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.1933402024 |
|
|
Aug 02 07:32:42 PM PDT 24 |
Aug 02 07:34:03 PM PDT 24 |
2464958440 ps |
T213 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.1513277814 |
|
|
Aug 02 07:28:11 PM PDT 24 |
Aug 02 07:28:14 PM PDT 24 |
387256131 ps |
T214 |
/workspace/coverage/default/12.sram_ctrl_smoke.2376036804 |
|
|
Aug 02 07:26:31 PM PDT 24 |
Aug 02 07:26:48 PM PDT 24 |
570419611 ps |
T215 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.644222228 |
|
|
Aug 02 07:33:37 PM PDT 24 |
Aug 02 07:39:55 PM PDT 24 |
16041127463 ps |
T216 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3215236065 |
|
|
Aug 02 07:26:24 PM PDT 24 |
Aug 02 07:26:28 PM PDT 24 |
1536092054 ps |
T217 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.195243606 |
|
|
Aug 02 07:26:09 PM PDT 24 |
Aug 02 07:50:28 PM PDT 24 |
15040171291 ps |
T159 |
/workspace/coverage/default/11.sram_ctrl_executable.3556471093 |
|
|
Aug 02 07:26:34 PM PDT 24 |
Aug 02 07:41:42 PM PDT 24 |
53325769570 ps |
T218 |
/workspace/coverage/default/49.sram_ctrl_alert_test.2105149756 |
|
|
Aug 02 07:37:50 PM PDT 24 |
Aug 02 07:37:51 PM PDT 24 |
19380677 ps |
T219 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.29644354 |
|
|
Aug 02 07:35:03 PM PDT 24 |
Aug 02 07:36:56 PM PDT 24 |
3286949127 ps |
T220 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3352858796 |
|
|
Aug 02 07:34:24 PM PDT 24 |
Aug 02 07:34:52 PM PDT 24 |
2964828744 ps |
T221 |
/workspace/coverage/default/35.sram_ctrl_smoke.4193145765 |
|
|
Aug 02 07:33:13 PM PDT 24 |
Aug 02 07:33:29 PM PDT 24 |
1116418080 ps |
T222 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.4083024506 |
|
|
Aug 02 07:27:05 PM PDT 24 |
Aug 02 07:28:49 PM PDT 24 |
56648506964 ps |
T223 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1841462450 |
|
|
Aug 02 07:26:45 PM PDT 24 |
Aug 02 07:27:04 PM PDT 24 |
1870376542 ps |
T65 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2986561426 |
|
|
Aug 02 07:27:17 PM PDT 24 |
Aug 02 07:29:23 PM PDT 24 |
4436682069 ps |
T224 |
/workspace/coverage/default/11.sram_ctrl_smoke.3909024276 |
|
|
Aug 02 07:26:29 PM PDT 24 |
Aug 02 07:26:39 PM PDT 24 |
2734382153 ps |
T225 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.403333271 |
|
|
Aug 02 07:26:33 PM PDT 24 |
Aug 02 07:30:44 PM PDT 24 |
4110194452 ps |
T226 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1106377186 |
|
|
Aug 02 07:34:29 PM PDT 24 |
Aug 02 07:34:32 PM PDT 24 |
344669604 ps |
T227 |
/workspace/coverage/default/35.sram_ctrl_partial_access.582726337 |
|
|
Aug 02 07:33:12 PM PDT 24 |
Aug 02 07:33:19 PM PDT 24 |
671530286 ps |
T228 |
/workspace/coverage/default/15.sram_ctrl_partial_access.3230243375 |
|
|
Aug 02 07:27:17 PM PDT 24 |
Aug 02 07:27:24 PM PDT 24 |
749860215 ps |
T57 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.368391092 |
|
|
Aug 02 07:25:51 PM PDT 24 |
Aug 02 07:31:54 PM PDT 24 |
55874434147 ps |
T229 |
/workspace/coverage/default/17.sram_ctrl_smoke.2556487905 |
|
|
Aug 02 07:27:28 PM PDT 24 |
Aug 02 07:27:48 PM PDT 24 |
1941514591 ps |
T230 |
/workspace/coverage/default/15.sram_ctrl_stress_all.1126802980 |
|
|
Aug 02 07:27:15 PM PDT 24 |
Aug 02 08:15:17 PM PDT 24 |
51913436924 ps |
T231 |
/workspace/coverage/default/20.sram_ctrl_smoke.2963327799 |
|
|
Aug 02 07:28:25 PM PDT 24 |
Aug 02 07:30:10 PM PDT 24 |
4944825429 ps |
T232 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.4289523609 |
|
|
Aug 02 07:29:27 PM PDT 24 |
Aug 02 07:39:50 PM PDT 24 |
7236752894 ps |
T155 |
/workspace/coverage/default/24.sram_ctrl_stress_all.2036611689 |
|
|
Aug 02 07:29:50 PM PDT 24 |
Aug 02 09:42:29 PM PDT 24 |
274828652090 ps |
T233 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2793185005 |
|
|
Aug 02 07:37:52 PM PDT 24 |
Aug 02 08:17:24 PM PDT 24 |
653309426770 ps |
T234 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.3685252785 |
|
|
Aug 02 07:30:00 PM PDT 24 |
Aug 02 07:30:58 PM PDT 24 |
8987190913 ps |
T235 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.3806305073 |
|
|
Aug 02 07:32:41 PM PDT 24 |
Aug 02 07:36:58 PM PDT 24 |
4107541067 ps |
T236 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.1352268071 |
|
|
Aug 02 07:32:17 PM PDT 24 |
Aug 02 07:35:29 PM PDT 24 |
3714799742 ps |
T237 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3632894549 |
|
|
Aug 02 07:27:28 PM PDT 24 |
Aug 02 07:30:09 PM PDT 24 |
57699263491 ps |
T238 |
/workspace/coverage/default/17.sram_ctrl_stress_all.1143086958 |
|
|
Aug 02 07:27:52 PM PDT 24 |
Aug 02 07:50:19 PM PDT 24 |
281011384339 ps |
T239 |
/workspace/coverage/default/3.sram_ctrl_regwen.1371161382 |
|
|
Aug 02 07:25:49 PM PDT 24 |
Aug 02 07:36:22 PM PDT 24 |
39402650947 ps |
T240 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1349380275 |
|
|
Aug 02 07:35:59 PM PDT 24 |
Aug 02 07:44:22 PM PDT 24 |
6916933572 ps |
T56 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2074081710 |
|
|
Aug 02 07:27:29 PM PDT 24 |
Aug 02 07:28:17 PM PDT 24 |
1999184348 ps |
T241 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.3292439335 |
|
|
Aug 02 07:29:08 PM PDT 24 |
Aug 02 07:34:38 PM PDT 24 |
5028741428 ps |
T242 |
/workspace/coverage/default/31.sram_ctrl_stress_all.2993636329 |
|
|
Aug 02 07:32:29 PM PDT 24 |
Aug 02 09:22:48 PM PDT 24 |
210894503678 ps |
T243 |
/workspace/coverage/default/6.sram_ctrl_smoke.579784547 |
|
|
Aug 02 07:26:02 PM PDT 24 |
Aug 02 07:26:20 PM PDT 24 |
1784236770 ps |
T244 |
/workspace/coverage/default/24.sram_ctrl_smoke.73429847 |
|
|
Aug 02 07:29:25 PM PDT 24 |
Aug 02 07:29:36 PM PDT 24 |
3532356870 ps |
T245 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2419900202 |
|
|
Aug 02 07:27:39 PM PDT 24 |
Aug 02 07:30:48 PM PDT 24 |
10815747182 ps |
T246 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2354076678 |
|
|
Aug 02 07:36:48 PM PDT 24 |
Aug 02 07:41:03 PM PDT 24 |
6550053467 ps |
T247 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.1827963798 |
|
|
Aug 02 07:29:07 PM PDT 24 |
Aug 02 07:50:34 PM PDT 24 |
54112165178 ps |
T248 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.4288592157 |
|
|
Aug 02 07:33:38 PM PDT 24 |
Aug 02 07:33:41 PM PDT 24 |
354671845 ps |
T249 |
/workspace/coverage/default/19.sram_ctrl_executable.3817282012 |
|
|
Aug 02 07:28:14 PM PDT 24 |
Aug 02 07:44:23 PM PDT 24 |
20917518585 ps |
T250 |
/workspace/coverage/default/44.sram_ctrl_executable.3722176749 |
|
|
Aug 02 07:35:57 PM PDT 24 |
Aug 02 07:42:03 PM PDT 24 |
86118885648 ps |
T83 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.185226499 |
|
|
Aug 02 07:28:43 PM PDT 24 |
Aug 02 07:29:08 PM PDT 24 |
13530452916 ps |
T251 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.789310393 |
|
|
Aug 02 07:34:26 PM PDT 24 |
Aug 02 07:34:41 PM PDT 24 |
729623238 ps |
T252 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1207949142 |
|
|
Aug 02 07:30:33 PM PDT 24 |
Aug 02 07:47:43 PM PDT 24 |
72704701530 ps |
T253 |
/workspace/coverage/default/27.sram_ctrl_regwen.686240195 |
|
|
Aug 02 07:30:31 PM PDT 24 |
Aug 02 07:47:26 PM PDT 24 |
14757222828 ps |
T254 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1235889011 |
|
|
Aug 02 07:37:41 PM PDT 24 |
Aug 02 07:41:52 PM PDT 24 |
9430227789 ps |
T255 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.2503285580 |
|
|
Aug 02 07:33:11 PM PDT 24 |
Aug 02 07:34:10 PM PDT 24 |
18599332312 ps |
T256 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.4068254603 |
|
|
Aug 02 07:32:50 PM PDT 24 |
Aug 02 07:46:13 PM PDT 24 |
15176113635 ps |
T257 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.9418028 |
|
|
Aug 02 07:32:41 PM PDT 24 |
Aug 02 07:37:48 PM PDT 24 |
48683397694 ps |
T258 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2605876233 |
|
|
Aug 02 07:26:01 PM PDT 24 |
Aug 02 07:29:56 PM PDT 24 |
7933792838 ps |
T259 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2703565599 |
|
|
Aug 02 07:26:21 PM PDT 24 |
Aug 02 07:49:10 PM PDT 24 |
57352310188 ps |
T260 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.690772525 |
|
|
Aug 02 07:28:57 PM PDT 24 |
Aug 02 07:30:03 PM PDT 24 |
794325262 ps |
T66 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2798110255 |
|
|
Aug 02 07:33:12 PM PDT 24 |
Aug 02 07:34:23 PM PDT 24 |
5769575891 ps |
T261 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3979738581 |
|
|
Aug 02 07:32:32 PM PDT 24 |
Aug 02 07:51:47 PM PDT 24 |
32959454212 ps |
T262 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2589771198 |
|
|
Aug 02 07:25:58 PM PDT 24 |
Aug 02 07:27:16 PM PDT 24 |
778312559 ps |
T263 |
/workspace/coverage/default/35.sram_ctrl_executable.4284380997 |
|
|
Aug 02 07:33:26 PM PDT 24 |
Aug 02 08:00:11 PM PDT 24 |
23228457366 ps |
T264 |
/workspace/coverage/default/18.sram_ctrl_bijection.1368876719 |
|
|
Aug 02 07:27:51 PM PDT 24 |
Aug 02 07:37:41 PM PDT 24 |
21665552253 ps |
T265 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.4221587602 |
|
|
Aug 02 07:31:19 PM PDT 24 |
Aug 02 07:48:37 PM PDT 24 |
38443770067 ps |
T266 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4209154562 |
|
|
Aug 02 07:36:10 PM PDT 24 |
Aug 02 07:39:08 PM PDT 24 |
17655938183 ps |
T267 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.3217410746 |
|
|
Aug 02 07:30:02 PM PDT 24 |
Aug 02 07:30:06 PM PDT 24 |
344870742 ps |
T268 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3816154081 |
|
|
Aug 02 07:26:20 PM PDT 24 |
Aug 02 07:35:38 PM PDT 24 |
9001065759 ps |
T269 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.3602914859 |
|
|
Aug 02 07:27:40 PM PDT 24 |
Aug 02 07:28:24 PM PDT 24 |
24442902883 ps |
T270 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.651342436 |
|
|
Aug 02 07:26:44 PM PDT 24 |
Aug 02 07:26:51 PM PDT 24 |
705785646 ps |
T271 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.4268118719 |
|
|
Aug 02 07:30:47 PM PDT 24 |
Aug 02 07:35:40 PM PDT 24 |
4827409970 ps |
T272 |
/workspace/coverage/default/12.sram_ctrl_partial_access.2230100225 |
|
|
Aug 02 07:26:32 PM PDT 24 |
Aug 02 07:27:49 PM PDT 24 |
1573131242 ps |
T67 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3843688110 |
|
|
Aug 02 07:32:30 PM PDT 24 |
Aug 02 07:33:42 PM PDT 24 |
2434499903 ps |
T273 |
/workspace/coverage/default/16.sram_ctrl_executable.4175734457 |
|
|
Aug 02 07:27:28 PM PDT 24 |
Aug 02 07:29:47 PM PDT 24 |
4612641918 ps |
T274 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3073789041 |
|
|
Aug 02 07:25:34 PM PDT 24 |
Aug 02 07:49:41 PM PDT 24 |
24040347017 ps |
T156 |
/workspace/coverage/default/47.sram_ctrl_regwen.1480096488 |
|
|
Aug 02 07:37:01 PM PDT 24 |
Aug 02 07:52:50 PM PDT 24 |
112904702745 ps |
T275 |
/workspace/coverage/default/2.sram_ctrl_smoke.3594187867 |
|
|
Aug 02 07:25:50 PM PDT 24 |
Aug 02 07:26:08 PM PDT 24 |
861166163 ps |
T276 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3696801795 |
|
|
Aug 02 07:35:29 PM PDT 24 |
Aug 02 07:38:07 PM PDT 24 |
24602886710 ps |
T277 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1109295567 |
|
|
Aug 02 07:30:57 PM PDT 24 |
Aug 02 07:31:37 PM PDT 24 |
1541231685 ps |
T68 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1170541446 |
|
|
Aug 02 07:37:01 PM PDT 24 |
Aug 02 07:39:28 PM PDT 24 |
4941273396 ps |
T278 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.2620601687 |
|
|
Aug 02 07:25:59 PM PDT 24 |
Aug 02 07:28:31 PM PDT 24 |
18792017578 ps |
T279 |
/workspace/coverage/default/17.sram_ctrl_executable.1630828706 |
|
|
Aug 02 07:27:43 PM PDT 24 |
Aug 02 07:40:15 PM PDT 24 |
15075028450 ps |
T280 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.187978418 |
|
|
Aug 02 07:27:38 PM PDT 24 |
Aug 02 07:57:40 PM PDT 24 |
26091402804 ps |
T281 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2003801988 |
|
|
Aug 02 07:26:33 PM PDT 24 |
Aug 02 07:45:36 PM PDT 24 |
34922402887 ps |
T282 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1672554968 |
|
|
Aug 02 07:26:31 PM PDT 24 |
Aug 02 07:29:15 PM PDT 24 |
2887107229 ps |
T283 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.120176289 |
|
|
Aug 02 07:34:42 PM PDT 24 |
Aug 02 07:40:41 PM PDT 24 |
5483763371 ps |
T284 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2841548946 |
|
|
Aug 02 07:28:15 PM PDT 24 |
Aug 02 07:35:34 PM PDT 24 |
7670509534 ps |
T285 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2998728442 |
|
|
Aug 02 07:34:40 PM PDT 24 |
Aug 02 07:35:15 PM PDT 24 |
27164606494 ps |
T286 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.34337471 |
|
|
Aug 02 07:31:18 PM PDT 24 |
Aug 02 07:51:18 PM PDT 24 |
50407818120 ps |
T287 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3537617730 |
|
|
Aug 02 07:35:51 PM PDT 24 |
Aug 02 07:55:13 PM PDT 24 |
51618632030 ps |
T288 |
/workspace/coverage/default/0.sram_ctrl_partial_access.4142650848 |
|
|
Aug 02 07:25:34 PM PDT 24 |
Aug 02 07:25:47 PM PDT 24 |
942341626 ps |
T289 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.362049492 |
|
|
Aug 02 07:25:50 PM PDT 24 |
Aug 02 07:31:53 PM PDT 24 |
42201391492 ps |
T290 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.4024832223 |
|
|
Aug 02 07:33:34 PM PDT 24 |
Aug 02 07:36:33 PM PDT 24 |
30482345177 ps |
T291 |
/workspace/coverage/default/0.sram_ctrl_smoke.2177263877 |
|
|
Aug 02 07:25:34 PM PDT 24 |
Aug 02 07:26:53 PM PDT 24 |
3102963186 ps |
T292 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.2343789331 |
|
|
Aug 02 07:33:37 PM PDT 24 |
Aug 02 08:01:17 PM PDT 24 |
32853985788 ps |
T293 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2122398651 |
|
|
Aug 02 07:35:15 PM PDT 24 |
Aug 02 07:56:32 PM PDT 24 |
16676979076 ps |
T294 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.1976206643 |
|
|
Aug 02 07:25:48 PM PDT 24 |
Aug 02 07:32:06 PM PDT 24 |
23244843371 ps |
T295 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3363108832 |
|
|
Aug 02 07:35:59 PM PDT 24 |
Aug 02 07:36:11 PM PDT 24 |
3285558050 ps |
T296 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.408092348 |
|
|
Aug 02 07:37:15 PM PDT 24 |
Aug 02 07:37:56 PM PDT 24 |
12806222173 ps |
T297 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2154743661 |
|
|
Aug 02 07:25:57 PM PDT 24 |
Aug 02 07:54:40 PM PDT 24 |
101745103840 ps |
T298 |
/workspace/coverage/default/40.sram_ctrl_smoke.3705740543 |
|
|
Aug 02 07:34:41 PM PDT 24 |
Aug 02 07:34:49 PM PDT 24 |
1353213862 ps |
T299 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.44964624 |
|
|
Aug 02 07:29:27 PM PDT 24 |
Aug 02 07:34:15 PM PDT 24 |
19446904871 ps |
T300 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.115623834 |
|
|
Aug 02 07:33:33 PM PDT 24 |
Aug 02 07:33:48 PM PDT 24 |
3376752201 ps |
T301 |
/workspace/coverage/default/1.sram_ctrl_partial_access.15120080 |
|
|
Aug 02 07:25:33 PM PDT 24 |
Aug 02 07:25:44 PM PDT 24 |
735143102 ps |
T302 |
/workspace/coverage/default/3.sram_ctrl_smoke.2145239574 |
|
|
Aug 02 07:25:49 PM PDT 24 |
Aug 02 07:27:06 PM PDT 24 |
4643710249 ps |
T303 |
/workspace/coverage/default/18.sram_ctrl_regwen.3479655864 |
|
|
Aug 02 07:28:01 PM PDT 24 |
Aug 02 07:39:43 PM PDT 24 |
38888479834 ps |
T304 |
/workspace/coverage/default/19.sram_ctrl_smoke.2974927829 |
|
|
Aug 02 07:28:02 PM PDT 24 |
Aug 02 07:28:41 PM PDT 24 |
745386954 ps |
T305 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.4163235549 |
|
|
Aug 02 07:30:12 PM PDT 24 |
Aug 02 07:32:03 PM PDT 24 |
3058867880 ps |
T306 |
/workspace/coverage/default/24.sram_ctrl_executable.1830156179 |
|
|
Aug 02 07:29:38 PM PDT 24 |
Aug 02 07:50:06 PM PDT 24 |
16988587708 ps |
T157 |
/workspace/coverage/default/47.sram_ctrl_stress_all.3839634793 |
|
|
Aug 02 07:37:00 PM PDT 24 |
Aug 02 07:55:28 PM PDT 24 |
125930846832 ps |
T307 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.306933841 |
|
|
Aug 02 07:27:05 PM PDT 24 |
Aug 02 07:49:24 PM PDT 24 |
84629471912 ps |
T308 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2482811387 |
|
|
Aug 02 07:31:06 PM PDT 24 |
Aug 02 07:32:06 PM PDT 24 |
1524314901 ps |
T309 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1820153513 |
|
|
Aug 02 07:25:49 PM PDT 24 |
Aug 02 07:31:24 PM PDT 24 |
8054483145 ps |
T310 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3965293106 |
|
|
Aug 02 07:28:14 PM PDT 24 |
Aug 02 07:29:25 PM PDT 24 |
1399119370 ps |
T311 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.2936953 |
|
|
Aug 02 07:34:42 PM PDT 24 |
Aug 02 07:35:10 PM PDT 24 |
1482843864 ps |
T312 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3909953500 |
|
|
Aug 02 07:31:31 PM PDT 24 |
Aug 02 07:31:39 PM PDT 24 |
2718663093 ps |
T313 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1956776628 |
|
|
Aug 02 07:35:05 PM PDT 24 |
Aug 02 07:35:10 PM PDT 24 |
484948313 ps |
T314 |
/workspace/coverage/default/2.sram_ctrl_executable.3393536501 |
|
|
Aug 02 07:25:47 PM PDT 24 |
Aug 02 07:26:48 PM PDT 24 |
1532894630 ps |
T315 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.83144542 |
|
|
Aug 02 07:35:31 PM PDT 24 |
Aug 02 07:35:35 PM PDT 24 |
359699714 ps |
T108 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.2376614677 |
|
|
Aug 02 07:25:50 PM PDT 24 |
Aug 02 07:27:56 PM PDT 24 |
3216329588 ps |
T316 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1766586393 |
|
|
Aug 02 07:30:54 PM PDT 24 |
Aug 02 07:32:58 PM PDT 24 |
1602360293 ps |
T317 |
/workspace/coverage/default/48.sram_ctrl_executable.1032805395 |
|
|
Aug 02 07:37:26 PM PDT 24 |
Aug 02 07:45:58 PM PDT 24 |
20555695222 ps |
T318 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.213834891 |
|
|
Aug 02 07:33:37 PM PDT 24 |
Aug 02 07:37:43 PM PDT 24 |
7048704719 ps |
T319 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.182601641 |
|
|
Aug 02 07:28:04 PM PDT 24 |
Aug 02 07:44:38 PM PDT 24 |
94626860093 ps |