Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.170005783 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1277429972 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2054686128 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2237892874 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2413592435 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.141785953 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3771173564 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2956742469 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.4198901003 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3711399093 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3126823606 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1930144502 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2396762231 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.565375768 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1578423035 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1203953176 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3915375082 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1691534422 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3214799606 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2067184770 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2283770967 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.533257987 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.607808726 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.196496161 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.931447953 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4146121789 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1271261445 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1647933364 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.17274617 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1477985411 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1886893775 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2083662030 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3814824500 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.165389395 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1717282734 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3213041304 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1033733413 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3512004706 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2148041726 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2017513782 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2038463282 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3139717417 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.984475254 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1057986656 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3887391716 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.245791292 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2639417202 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3335515285 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2438437008 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2098425606 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3817150140 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1116070061 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2075170612 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.340964467 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1528177757 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1582700574 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4201800928 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1113797649 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2507733167 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.4237060462 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3322225733 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.495576552 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3789726740 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.876897543 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1330259222 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.851653448 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2358857811 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1432099825 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2945491857 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3676559130 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2526032151 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1937767325 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.613854696 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.284815198 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.570044354 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2311723616 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.956379458 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.600390696 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2570252817 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.178484517 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1940020859 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1223124041 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.297607682 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3855624314 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1667584797 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3731296562 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3091015780 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1767359079 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1627275739 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2921758122 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2779720637 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1394165507 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1169798357 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1973010111 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2399377560 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3715043470 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2290610563 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3572410715 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.213748180 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3771384038 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3007919589 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1870829697 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2517469629 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2644853075 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1281870068 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2187490946 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.95140845 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.894283291 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1278990884 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3765553246 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1378770434 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.771948264 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1430449063 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3690341741 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1028576809 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2086919965 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2337514270 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3842706669 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.925090818 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3551643328 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3416327095 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.259117878 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2833879081 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.526850389 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2097452186 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3896718194 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.708082340 |
/workspace/coverage/default/0.sram_ctrl_alert_test.778114430 |
/workspace/coverage/default/0.sram_ctrl_bijection.2264558289 |
/workspace/coverage/default/0.sram_ctrl_executable.1365056253 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.390858750 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.253926061 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1914854417 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2115752319 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3926006023 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2041279530 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4129988335 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2646665717 |
/workspace/coverage/default/0.sram_ctrl_regwen.3272695662 |
/workspace/coverage/default/0.sram_ctrl_smoke.2461967823 |
/workspace/coverage/default/0.sram_ctrl_stress_all.1100537284 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.711249812 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3974047456 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1343639872 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3875482665 |
/workspace/coverage/default/1.sram_ctrl_alert_test.1097453262 |
/workspace/coverage/default/1.sram_ctrl_bijection.294350235 |
/workspace/coverage/default/1.sram_ctrl_executable.1195719790 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.144442838 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.735179082 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.580858591 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2408027252 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1850111808 |
/workspace/coverage/default/1.sram_ctrl_partial_access.4009923605 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1212110853 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2628247654 |
/workspace/coverage/default/1.sram_ctrl_regwen.2672511519 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.3793699094 |
/workspace/coverage/default/1.sram_ctrl_smoke.2727081908 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2315989598 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.753341063 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1204341182 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1275874928 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1352207363 |
/workspace/coverage/default/10.sram_ctrl_alert_test.4100013888 |
/workspace/coverage/default/10.sram_ctrl_bijection.1996724240 |
/workspace/coverage/default/10.sram_ctrl_executable.1544227851 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1724468122 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2148399810 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2939882186 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1527963910 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1160751274 |
/workspace/coverage/default/10.sram_ctrl_partial_access.3886599736 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1813213267 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1104709100 |
/workspace/coverage/default/10.sram_ctrl_regwen.604221532 |
/workspace/coverage/default/10.sram_ctrl_smoke.3349579912 |
/workspace/coverage/default/10.sram_ctrl_stress_all.2077801595 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.290151990 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1943814445 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2392749009 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1634030154 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3534558102 |
/workspace/coverage/default/11.sram_ctrl_bijection.541579148 |
/workspace/coverage/default/11.sram_ctrl_executable.846843869 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.43169056 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1202751709 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.4023648699 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.3379039383 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1515445602 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2130144848 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1584957007 |
/workspace/coverage/default/11.sram_ctrl_regwen.3077901854 |
/workspace/coverage/default/11.sram_ctrl_smoke.1217504923 |
/workspace/coverage/default/11.sram_ctrl_stress_all.1227057271 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.672042969 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4004939804 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3613944495 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2166796165 |
/workspace/coverage/default/12.sram_ctrl_alert_test.3183105102 |
/workspace/coverage/default/12.sram_ctrl_bijection.619642185 |
/workspace/coverage/default/12.sram_ctrl_executable.3449939569 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2519452608 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1544222131 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1376141128 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2122844620 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1502994945 |
/workspace/coverage/default/12.sram_ctrl_partial_access.1570074903 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.291045137 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.4075367223 |
/workspace/coverage/default/12.sram_ctrl_regwen.872743371 |
/workspace/coverage/default/12.sram_ctrl_smoke.833489821 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1806476925 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2590237794 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2173011656 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2122651543 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3805028601 |
/workspace/coverage/default/13.sram_ctrl_alert_test.3031289167 |
/workspace/coverage/default/13.sram_ctrl_bijection.3131847842 |
/workspace/coverage/default/13.sram_ctrl_executable.1820009908 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3131127518 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.3137659705 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2628420925 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2657684881 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.746725467 |
/workspace/coverage/default/13.sram_ctrl_partial_access.340597699 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.34444952 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1614970740 |
/workspace/coverage/default/13.sram_ctrl_regwen.1437639048 |
/workspace/coverage/default/13.sram_ctrl_smoke.2447359088 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1594577856 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2248464426 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2144440904 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1294190131 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1480979090 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3778873776 |
/workspace/coverage/default/14.sram_ctrl_bijection.2425567696 |
/workspace/coverage/default/14.sram_ctrl_executable.4147724584 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.756027000 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2399447563 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1492799852 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.4049390934 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.4193668732 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2489148132 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2086424868 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.234875570 |
/workspace/coverage/default/14.sram_ctrl_regwen.3755011166 |
/workspace/coverage/default/14.sram_ctrl_smoke.3029149741 |
/workspace/coverage/default/14.sram_ctrl_stress_all.1925548421 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1185478266 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.335669517 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1378686632 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.457529939 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1367407514 |
/workspace/coverage/default/15.sram_ctrl_bijection.1838562419 |
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/workspace/coverage/default/44.sram_ctrl_partial_access.240278288 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3819441497 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3934167816 |
/workspace/coverage/default/44.sram_ctrl_regwen.3365165824 |
/workspace/coverage/default/44.sram_ctrl_smoke.484811359 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2827297627 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2793796234 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1002271760 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3768926729 |
/workspace/coverage/default/45.sram_ctrl_alert_test.869647224 |
/workspace/coverage/default/45.sram_ctrl_bijection.2270310397 |
/workspace/coverage/default/45.sram_ctrl_executable.3965545667 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2810518658 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.139338886 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.4161737258 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.1757332060 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1992552576 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2239547428 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3435977388 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1125781228 |
/workspace/coverage/default/45.sram_ctrl_regwen.3797805858 |
/workspace/coverage/default/45.sram_ctrl_smoke.2778363031 |
/workspace/coverage/default/45.sram_ctrl_stress_all.345684507 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1858090056 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2973521193 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2671831398 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1683016489 |
/workspace/coverage/default/46.sram_ctrl_alert_test.4025290955 |
/workspace/coverage/default/46.sram_ctrl_bijection.2116691003 |
/workspace/coverage/default/46.sram_ctrl_executable.1520161332 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2627017213 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.1158481723 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.469394298 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.2612982203 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1905528295 |
/workspace/coverage/default/46.sram_ctrl_partial_access.316022349 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1068297957 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2583628366 |
/workspace/coverage/default/46.sram_ctrl_regwen.1223869010 |
/workspace/coverage/default/46.sram_ctrl_smoke.816282481 |
/workspace/coverage/default/46.sram_ctrl_stress_all.1154257547 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3940925530 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3867053799 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3816804764 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3259011811 |
/workspace/coverage/default/47.sram_ctrl_alert_test.1324826487 |
/workspace/coverage/default/47.sram_ctrl_bijection.1292466310 |
/workspace/coverage/default/47.sram_ctrl_executable.2762912235 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1372601739 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1116593476 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2670500480 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3207260647 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3001606219 |
/workspace/coverage/default/47.sram_ctrl_partial_access.275854636 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4085650087 |
/workspace/coverage/default/47.sram_ctrl_regwen.2804184519 |
/workspace/coverage/default/47.sram_ctrl_smoke.1119575128 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1438313982 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1128410128 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2884889091 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2946016977 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.526622011 |
/workspace/coverage/default/48.sram_ctrl_alert_test.4028797360 |
/workspace/coverage/default/48.sram_ctrl_bijection.1618578017 |
/workspace/coverage/default/48.sram_ctrl_executable.959751679 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2236589823 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.3221859967 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3524708020 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.415859163 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4259455540 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1242862092 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3606057886 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2300155682 |
/workspace/coverage/default/48.sram_ctrl_regwen.2443363331 |
/workspace/coverage/default/48.sram_ctrl_smoke.3054233347 |
/workspace/coverage/default/48.sram_ctrl_stress_all.4105225283 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1332877849 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2170586693 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3337892549 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1543071651 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1737714235 |
/workspace/coverage/default/49.sram_ctrl_bijection.847865561 |
/workspace/coverage/default/49.sram_ctrl_executable.1970093178 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2692034274 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.4091424792 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.717964037 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2441233902 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1787344055 |
/workspace/coverage/default/49.sram_ctrl_partial_access.4223396493 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3168218201 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1157695267 |
/workspace/coverage/default/49.sram_ctrl_regwen.1595563376 |
/workspace/coverage/default/49.sram_ctrl_smoke.2190238748 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3360289741 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3656670187 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3335414783 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1141809248 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2191191974 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1891005956 |
/workspace/coverage/default/5.sram_ctrl_bijection.2620651432 |
/workspace/coverage/default/5.sram_ctrl_executable.2693779754 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1110585078 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2835112157 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.534956273 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.283743669 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1398184830 |
/workspace/coverage/default/5.sram_ctrl_partial_access.1733005314 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2623170238 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2031629895 |
/workspace/coverage/default/5.sram_ctrl_regwen.1258440299 |
/workspace/coverage/default/5.sram_ctrl_smoke.4206024274 |
/workspace/coverage/default/5.sram_ctrl_stress_all.1652201713 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1064241827 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3988898063 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1038153661 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.990583146 |
/workspace/coverage/default/6.sram_ctrl_alert_test.2368571612 |
/workspace/coverage/default/6.sram_ctrl_bijection.368159025 |
/workspace/coverage/default/6.sram_ctrl_executable.1503094590 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.719101843 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.1610723571 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1636548994 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2336910547 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1838394099 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3972821482 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.578027393 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3753094327 |
/workspace/coverage/default/6.sram_ctrl_regwen.1857730695 |
/workspace/coverage/default/6.sram_ctrl_smoke.3759045170 |
/workspace/coverage/default/6.sram_ctrl_stress_all.2226267715 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3218653896 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3664864919 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.985469464 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2006471157 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3171283659 |
/workspace/coverage/default/7.sram_ctrl_bijection.720124699 |
/workspace/coverage/default/7.sram_ctrl_executable.5891882 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.859677336 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.873509688 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.284501407 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2467820762 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.356059212 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2427202805 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.171602286 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3479413857 |
/workspace/coverage/default/7.sram_ctrl_regwen.1624169215 |
/workspace/coverage/default/7.sram_ctrl_smoke.1770598561 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2399052765 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3995029476 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1657442434 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1416099715 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3348796937 |
/workspace/coverage/default/8.sram_ctrl_bijection.3923723843 |
/workspace/coverage/default/8.sram_ctrl_executable.3627462630 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2163867740 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1071698512 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2787070184 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1127676242 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1279343590 |
/workspace/coverage/default/8.sram_ctrl_partial_access.1958485524 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1028324013 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1173082148 |
/workspace/coverage/default/8.sram_ctrl_regwen.4068769825 |
/workspace/coverage/default/8.sram_ctrl_smoke.1306206266 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3877584818 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2174211666 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.289778718 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1855270776 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1746593965 |
/workspace/coverage/default/9.sram_ctrl_bijection.3059520302 |
/workspace/coverage/default/9.sram_ctrl_executable.499290932 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.97757356 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3040737274 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2353276308 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.318528110 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.970100244 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1022244876 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3666485402 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2587891201 |
/workspace/coverage/default/9.sram_ctrl_regwen.3111970988 |
/workspace/coverage/default/9.sram_ctrl_smoke.3022940790 |
/workspace/coverage/default/9.sram_ctrl_stress_all.727949226 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3364196363 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2977507211 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3242794736 |
|
|
Aug 03 06:08:59 PM PDT 24 |
Aug 03 06:09:28 PM PDT 24 |
1029323903 ps |
T2 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1746593965 |
|
|
Aug 03 06:08:59 PM PDT 24 |
Aug 03 06:09:00 PM PDT 24 |
33142515 ps |
T3 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.283743669 |
|
|
Aug 03 06:07:45 PM PDT 24 |
Aug 03 06:12:44 PM PDT 24 |
5531977300 ps |
T5 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2399447563 |
|
|
Aug 03 06:10:14 PM PDT 24 |
Aug 03 06:10:31 PM PDT 24 |
1420607380 ps |
T4 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2944594778 |
|
|
Aug 03 06:14:20 PM PDT 24 |
Aug 03 06:19:55 PM PDT 24 |
41819862050 ps |
T10 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2335181549 |
|
|
Aug 03 06:16:28 PM PDT 24 |
Aug 03 06:19:11 PM PDT 24 |
18311555630 ps |
T6 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.4240200694 |
|
|
Aug 03 06:13:19 PM PDT 24 |
Aug 03 06:35:34 PM PDT 24 |
13384104484 ps |
T11 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1838286001 |
|
|
Aug 03 06:18:56 PM PDT 24 |
Aug 03 06:43:05 PM PDT 24 |
79996103538 ps |
T12 |
/workspace/coverage/default/8.sram_ctrl_stress_all.4259207668 |
|
|
Aug 03 06:08:47 PM PDT 24 |
Aug 03 06:58:35 PM PDT 24 |
644748442510 ps |
T13 |
/workspace/coverage/default/30.sram_ctrl_smoke.442557930 |
|
|
Aug 03 06:14:50 PM PDT 24 |
Aug 03 06:15:47 PM PDT 24 |
4270058587 ps |
T14 |
/workspace/coverage/default/42.sram_ctrl_alert_test.2262531460 |
|
|
Aug 03 06:18:45 PM PDT 24 |
Aug 03 06:18:45 PM PDT 24 |
43137413 ps |
T44 |
/workspace/coverage/default/2.sram_ctrl_smoke.152477406 |
|
|
Aug 03 06:06:18 PM PDT 24 |
Aug 03 06:06:31 PM PDT 24 |
3809146708 ps |
T45 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4149515439 |
|
|
Aug 03 06:20:14 PM PDT 24 |
Aug 03 06:29:23 PM PDT 24 |
84073161192 ps |
T48 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2884889091 |
|
|
Aug 03 06:20:18 PM PDT 24 |
Aug 03 06:24:55 PM PDT 24 |
20362402028 ps |
T20 |
/workspace/coverage/default/30.sram_ctrl_bijection.1466792750 |
|
|
Aug 03 06:15:00 PM PDT 24 |
Aug 03 06:42:11 PM PDT 24 |
38347530468 ps |
T53 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.3906033718 |
|
|
Aug 03 06:16:50 PM PDT 24 |
Aug 03 06:18:10 PM PDT 24 |
16821484875 ps |
T54 |
/workspace/coverage/default/24.sram_ctrl_smoke.3519524678 |
|
|
Aug 03 06:13:09 PM PDT 24 |
Aug 03 06:13:31 PM PDT 24 |
3020334657 ps |
T15 |
/workspace/coverage/default/38.sram_ctrl_alert_test.1396143061 |
|
|
Aug 03 06:17:34 PM PDT 24 |
Aug 03 06:17:35 PM PDT 24 |
18566267 ps |
T91 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3974047456 |
|
|
Aug 03 06:05:47 PM PDT 24 |
Aug 03 06:11:55 PM PDT 24 |
16619095439 ps |
T21 |
/workspace/coverage/default/49.sram_ctrl_bijection.847865561 |
|
|
Aug 03 06:20:45 PM PDT 24 |
Aug 03 06:38:31 PM PDT 24 |
59032379425 ps |
T109 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1713994138 |
|
|
Aug 03 06:11:58 PM PDT 24 |
Aug 03 06:12:09 PM PDT 24 |
2724634139 ps |
T26 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.138691095 |
|
|
Aug 03 06:11:33 PM PDT 24 |
Aug 03 06:11:50 PM PDT 24 |
2585044905 ps |
T27 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.290151990 |
|
|
Aug 03 06:09:16 PM PDT 24 |
Aug 03 06:09:59 PM PDT 24 |
1618098833 ps |
T51 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.534956273 |
|
|
Aug 03 06:07:48 PM PDT 24 |
Aug 03 06:09:11 PM PDT 24 |
13065234151 ps |
T16 |
/workspace/coverage/default/39.sram_ctrl_alert_test.464179483 |
|
|
Aug 03 06:17:58 PM PDT 24 |
Aug 03 06:17:59 PM PDT 24 |
28814978 ps |
T46 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.990583146 |
|
|
Aug 03 06:07:56 PM PDT 24 |
Aug 03 06:28:12 PM PDT 24 |
65242575137 ps |
T124 |
/workspace/coverage/default/25.sram_ctrl_alert_test.688081045 |
|
|
Aug 03 06:13:54 PM PDT 24 |
Aug 03 06:13:54 PM PDT 24 |
41562691 ps |
T28 |
/workspace/coverage/default/34.sram_ctrl_regwen.275868912 |
|
|
Aug 03 06:16:21 PM PDT 24 |
Aug 03 06:31:28 PM PDT 24 |
11244763425 ps |
T74 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3819441497 |
|
|
Aug 03 06:19:11 PM PDT 24 |
Aug 03 06:25:47 PM PDT 24 |
13245219525 ps |
T29 |
/workspace/coverage/default/39.sram_ctrl_executable.4075152517 |
|
|
Aug 03 06:17:49 PM PDT 24 |
Aug 03 06:32:19 PM PDT 24 |
22696132832 ps |
T75 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.3679068423 |
|
|
Aug 03 06:13:40 PM PDT 24 |
Aug 03 06:29:31 PM PDT 24 |
15696015631 ps |
T76 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2130144848 |
|
|
Aug 03 06:09:23 PM PDT 24 |
Aug 03 06:09:31 PM PDT 24 |
750230307 ps |
T77 |
/workspace/coverage/default/35.sram_ctrl_partial_access.832881805 |
|
|
Aug 03 06:16:21 PM PDT 24 |
Aug 03 06:17:59 PM PDT 24 |
914195579 ps |
T78 |
/workspace/coverage/default/14.sram_ctrl_smoke.3029149741 |
|
|
Aug 03 06:10:11 PM PDT 24 |
Aug 03 06:12:12 PM PDT 24 |
3517013328 ps |
T79 |
/workspace/coverage/default/18.sram_ctrl_bijection.1552769259 |
|
|
Aug 03 06:11:35 PM PDT 24 |
Aug 03 06:35:12 PM PDT 24 |
83358709476 ps |
T80 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1104569868 |
|
|
Aug 03 06:11:48 PM PDT 24 |
Aug 03 06:17:39 PM PDT 24 |
22078729612 ps |
T81 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2464255698 |
|
|
Aug 03 06:15:13 PM PDT 24 |
Aug 03 06:18:10 PM PDT 24 |
13196364682 ps |
T22 |
/workspace/coverage/default/48.sram_ctrl_stress_all.4105225283 |
|
|
Aug 03 06:20:36 PM PDT 24 |
Aug 03 07:00:32 PM PDT 24 |
49612855392 ps |
T92 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.1844079663 |
|
|
Aug 03 06:13:43 PM PDT 24 |
Aug 03 06:16:00 PM PDT 24 |
3288337043 ps |
T98 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.51387263 |
|
|
Aug 03 06:15:13 PM PDT 24 |
Aug 03 06:15:57 PM PDT 24 |
1840676347 ps |
T149 |
/workspace/coverage/default/17.sram_ctrl_partial_access.3891573411 |
|
|
Aug 03 06:11:14 PM PDT 24 |
Aug 03 06:13:54 PM PDT 24 |
5394458527 ps |
T99 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.1491735713 |
|
|
Aug 03 06:15:54 PM PDT 24 |
Aug 03 06:24:34 PM PDT 24 |
38858538906 ps |
T144 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3620548017 |
|
|
Aug 03 06:13:11 PM PDT 24 |
Aug 03 06:37:21 PM PDT 24 |
98494615173 ps |
T148 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3080843418 |
|
|
Aug 03 06:19:07 PM PDT 24 |
Aug 03 06:36:21 PM PDT 24 |
20695634609 ps |
T52 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3218653896 |
|
|
Aug 03 06:08:03 PM PDT 24 |
Aug 03 06:08:29 PM PDT 24 |
1420979471 ps |
T150 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.1158481723 |
|
|
Aug 03 06:19:48 PM PDT 24 |
Aug 03 06:19:56 PM PDT 24 |
8383717574 ps |
T100 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.2709136355 |
|
|
Aug 03 06:18:05 PM PDT 24 |
Aug 03 06:48:49 PM PDT 24 |
20348011793 ps |
T55 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3470042071 |
|
|
Aug 03 06:15:43 PM PDT 24 |
Aug 03 06:21:05 PM PDT 24 |
55368417301 ps |
T108 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.630940548 |
|
|
Aug 03 06:14:44 PM PDT 24 |
Aug 03 06:26:41 PM PDT 24 |
28387284893 ps |
T7 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.3645444559 |
|
|
Aug 03 06:16:44 PM PDT 24 |
Aug 03 06:18:17 PM PDT 24 |
13571694032 ps |
T23 |
/workspace/coverage/default/12.sram_ctrl_regwen.872743371 |
|
|
Aug 03 06:09:44 PM PDT 24 |
Aug 03 06:28:23 PM PDT 24 |
9309042433 ps |
T8 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.1490107946 |
|
|
Aug 03 06:13:00 PM PDT 24 |
Aug 03 06:13:34 PM PDT 24 |
35777150984 ps |
T56 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.277275124 |
|
|
Aug 03 06:13:26 PM PDT 24 |
Aug 03 06:14:55 PM PDT 24 |
2632036534 ps |
T151 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3534558102 |
|
|
Aug 03 06:09:36 PM PDT 24 |
Aug 03 06:09:37 PM PDT 24 |
10345573 ps |
T152 |
/workspace/coverage/default/1.sram_ctrl_partial_access.4009923605 |
|
|
Aug 03 06:06:06 PM PDT 24 |
Aug 03 06:07:50 PM PDT 24 |
818605773 ps |
T9 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.778245385 |
|
|
Aug 03 06:07:21 PM PDT 24 |
Aug 03 06:07:48 PM PDT 24 |
4188074120 ps |
T47 |
/workspace/coverage/default/14.sram_ctrl_executable.4147724584 |
|
|
Aug 03 06:10:13 PM PDT 24 |
Aug 03 06:32:11 PM PDT 24 |
21754888181 ps |
T153 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1527963910 |
|
|
Aug 03 06:09:16 PM PDT 24 |
Aug 03 06:11:36 PM PDT 24 |
7895747278 ps |
T112 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3594982893 |
|
|
Aug 03 06:12:15 PM PDT 24 |
Aug 03 06:18:13 PM PDT 24 |
5721014334 ps |
T113 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.209945074 |
|
|
Aug 03 06:16:10 PM PDT 24 |
Aug 03 06:21:26 PM PDT 24 |
44625046119 ps |
T57 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2657684881 |
|
|
Aug 03 06:10:01 PM PDT 24 |
Aug 03 06:13:16 PM PDT 24 |
41333062526 ps |
T154 |
/workspace/coverage/default/46.sram_ctrl_smoke.816282481 |
|
|
Aug 03 06:19:37 PM PDT 24 |
Aug 03 06:20:00 PM PDT 24 |
1618728715 ps |
T155 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.2581643808 |
|
|
Aug 03 06:12:55 PM PDT 24 |
Aug 03 06:23:09 PM PDT 24 |
11890366991 ps |
T156 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.2226833232 |
|
|
Aug 03 06:14:25 PM PDT 24 |
Aug 03 06:29:26 PM PDT 24 |
15063655484 ps |
T157 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1737714235 |
|
|
Aug 03 06:20:56 PM PDT 24 |
Aug 03 06:20:56 PM PDT 24 |
27693297 ps |
T68 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3064180117 |
|
|
Aug 03 06:07:16 PM PDT 24 |
Aug 03 06:07:35 PM PDT 24 |
1103729430 ps |
T158 |
/workspace/coverage/default/30.sram_ctrl_alert_test.3138486541 |
|
|
Aug 03 06:15:05 PM PDT 24 |
Aug 03 06:15:06 PM PDT 24 |
80570490 ps |
T25 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1724468122 |
|
|
Aug 03 06:09:09 PM PDT 24 |
Aug 03 06:10:17 PM PDT 24 |
12681189825 ps |
T58 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2670500480 |
|
|
Aug 03 06:20:19 PM PDT 24 |
Aug 03 06:21:44 PM PDT 24 |
2801800488 ps |
T159 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.4118555154 |
|
|
Aug 03 06:15:27 PM PDT 24 |
Aug 03 06:28:10 PM PDT 24 |
48358338646 ps |
T30 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.1952421572 |
|
|
Aug 03 06:17:26 PM PDT 24 |
Aug 03 06:17:30 PM PDT 24 |
1408723010 ps |
T160 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1854092069 |
|
|
Aug 03 06:14:14 PM PDT 24 |
Aug 03 06:34:58 PM PDT 24 |
181628532420 ps |
T69 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.4141119083 |
|
|
Aug 03 06:17:31 PM PDT 24 |
Aug 03 06:18:24 PM PDT 24 |
7495120601 ps |
T161 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1324850852 |
|
|
Aug 03 06:13:00 PM PDT 24 |
Aug 03 06:15:13 PM PDT 24 |
833958633 ps |
T114 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.368165700 |
|
|
Aug 03 06:16:05 PM PDT 24 |
Aug 03 06:21:20 PM PDT 24 |
17487519444 ps |
T162 |
/workspace/coverage/default/37.sram_ctrl_alert_test.1355619345 |
|
|
Aug 03 06:17:09 PM PDT 24 |
Aug 03 06:17:10 PM PDT 24 |
14342562 ps |
T163 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.163402182 |
|
|
Aug 03 06:17:16 PM PDT 24 |
Aug 03 06:21:41 PM PDT 24 |
20425159586 ps |
T136 |
/workspace/coverage/default/38.sram_ctrl_executable.1728604035 |
|
|
Aug 03 06:17:25 PM PDT 24 |
Aug 03 06:38:28 PM PDT 24 |
35761144226 ps |
T164 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3171283659 |
|
|
Aug 03 06:08:23 PM PDT 24 |
Aug 03 06:08:24 PM PDT 24 |
17367749 ps |
T165 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1407134409 |
|
|
Aug 03 06:14:28 PM PDT 24 |
Aug 03 06:14:45 PM PDT 24 |
898380187 ps |
T24 |
/workspace/coverage/default/15.sram_ctrl_stress_all.17187931 |
|
|
Aug 03 06:10:41 PM PDT 24 |
Aug 03 06:45:36 PM PDT 24 |
223927729063 ps |
T70 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1522603427 |
|
|
Aug 03 06:14:52 PM PDT 24 |
Aug 03 06:16:36 PM PDT 24 |
1828291428 ps |
T72 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.1457019171 |
|
|
Aug 03 06:14:30 PM PDT 24 |
Aug 03 06:15:40 PM PDT 24 |
44532448082 ps |
T73 |
/workspace/coverage/default/38.sram_ctrl_regwen.3760149973 |
|
|
Aug 03 06:17:25 PM PDT 24 |
Aug 03 06:17:41 PM PDT 24 |
728935052 ps |
T138 |
/workspace/coverage/default/34.sram_ctrl_executable.1366037350 |
|
|
Aug 03 06:16:13 PM PDT 24 |
Aug 03 06:17:33 PM PDT 24 |
39738431963 ps |
T31 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.38143117 |
|
|
Aug 03 06:09:28 PM PDT 24 |
Aug 03 06:09:31 PM PDT 24 |
1405654562 ps |
T142 |
/workspace/coverage/default/9.sram_ctrl_regwen.3111970988 |
|
|
Aug 03 06:08:53 PM PDT 24 |
Aug 03 06:09:44 PM PDT 24 |
2450810423 ps |
T166 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3217047096 |
|
|
Aug 03 06:06:30 PM PDT 24 |
Aug 03 06:09:15 PM PDT 24 |
839168344 ps |
T143 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.291045137 |
|
|
Aug 03 06:09:35 PM PDT 24 |
Aug 03 06:14:22 PM PDT 24 |
12897037972 ps |
T167 |
/workspace/coverage/default/7.sram_ctrl_smoke.1770598561 |
|
|
Aug 03 06:08:08 PM PDT 24 |
Aug 03 06:08:15 PM PDT 24 |
411425235 ps |
T168 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.356059212 |
|
|
Aug 03 06:08:11 PM PDT 24 |
Aug 03 06:13:24 PM PDT 24 |
27368613636 ps |
T169 |
/workspace/coverage/default/12.sram_ctrl_partial_access.1570074903 |
|
|
Aug 03 06:09:39 PM PDT 24 |
Aug 03 06:11:36 PM PDT 24 |
986261494 ps |
T170 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.1330222260 |
|
|
Aug 03 06:16:01 PM PDT 24 |
Aug 03 06:18:19 PM PDT 24 |
6314908183 ps |
T171 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.735179082 |
|
|
Aug 03 06:06:08 PM PDT 24 |
Aug 03 06:06:39 PM PDT 24 |
1496276352 ps |
T137 |
/workspace/coverage/default/18.sram_ctrl_regwen.3854239211 |
|
|
Aug 03 06:11:33 PM PDT 24 |
Aug 03 06:22:12 PM PDT 24 |
12071686663 ps |
T49 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1064241827 |
|
|
Aug 03 06:07:46 PM PDT 24 |
Aug 03 06:08:18 PM PDT 24 |
4910322291 ps |
T172 |
/workspace/coverage/default/42.sram_ctrl_regwen.1015531987 |
|
|
Aug 03 06:18:44 PM PDT 24 |
Aug 03 06:37:30 PM PDT 24 |
21698298715 ps |
T32 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.2426870980 |
|
|
Aug 03 06:11:44 PM PDT 24 |
Aug 03 06:11:48 PM PDT 24 |
1352995565 ps |
T173 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.3076849584 |
|
|
Aug 03 06:18:24 PM PDT 24 |
Aug 03 06:18:28 PM PDT 24 |
851846635 ps |
T174 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.741031549 |
|
|
Aug 03 06:06:47 PM PDT 24 |
Aug 03 06:27:00 PM PDT 24 |
9415141306 ps |
T175 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2176728073 |
|
|
Aug 03 06:15:00 PM PDT 24 |
Aug 03 06:15:03 PM PDT 24 |
3358154109 ps |
T176 |
/workspace/coverage/default/43.sram_ctrl_partial_access.2010842859 |
|
|
Aug 03 06:18:51 PM PDT 24 |
Aug 03 06:18:58 PM PDT 24 |
1419700871 ps |
T177 |
/workspace/coverage/default/14.sram_ctrl_regwen.3755011166 |
|
|
Aug 03 06:10:15 PM PDT 24 |
Aug 03 06:17:25 PM PDT 24 |
2500863630 ps |
T178 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2627017213 |
|
|
Aug 03 06:19:49 PM PDT 24 |
Aug 03 06:20:33 PM PDT 24 |
25192216563 ps |
T179 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.816762688 |
|
|
Aug 03 06:18:13 PM PDT 24 |
Aug 03 06:19:24 PM PDT 24 |
3235985170 ps |
T180 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.3324738055 |
|
|
Aug 03 06:11:12 PM PDT 24 |
Aug 03 06:27:20 PM PDT 24 |
13105078450 ps |
T71 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1647337369 |
|
|
Aug 03 06:13:02 PM PDT 24 |
Aug 03 06:13:23 PM PDT 24 |
492685523 ps |
T181 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3260356906 |
|
|
Aug 03 06:15:55 PM PDT 24 |
Aug 03 06:17:09 PM PDT 24 |
927570279 ps |
T182 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2300155682 |
|
|
Aug 03 06:20:36 PM PDT 24 |
Aug 03 06:20:39 PM PDT 24 |
692745565 ps |
T183 |
/workspace/coverage/default/40.sram_ctrl_bijection.258729201 |
|
|
Aug 03 06:17:58 PM PDT 24 |
Aug 03 06:32:47 PM PDT 24 |
154455608717 ps |
T147 |
/workspace/coverage/default/3.sram_ctrl_stress_all.2051872856 |
|
|
Aug 03 06:07:18 PM PDT 24 |
Aug 03 07:13:51 PM PDT 24 |
126589785006 ps |
T184 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.2046934743 |
|
|
Aug 03 06:11:47 PM PDT 24 |
Aug 03 06:14:31 PM PDT 24 |
15373899660 ps |
T185 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.1093089211 |
|
|
Aug 03 06:14:44 PM PDT 24 |
Aug 03 06:15:44 PM PDT 24 |
1869853211 ps |
T186 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2692034274 |
|
|
Aug 03 06:20:45 PM PDT 24 |
Aug 03 06:22:03 PM PDT 24 |
42948439607 ps |
T187 |
/workspace/coverage/default/31.sram_ctrl_regwen.364923278 |
|
|
Aug 03 06:15:21 PM PDT 24 |
Aug 03 06:29:52 PM PDT 24 |
54824795665 ps |
T59 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.672042969 |
|
|
Aug 03 06:09:29 PM PDT 24 |
Aug 03 06:10:55 PM PDT 24 |
1609802415 ps |
T145 |
/workspace/coverage/default/30.sram_ctrl_stress_all.1703710827 |
|
|
Aug 03 06:15:07 PM PDT 24 |
Aug 03 06:47:48 PM PDT 24 |
238957421075 ps |
T188 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2977203568 |
|
|
Aug 03 06:14:43 PM PDT 24 |
Aug 03 06:14:52 PM PDT 24 |
918624333 ps |
T189 |
/workspace/coverage/default/7.sram_ctrl_bijection.720124699 |
|
|
Aug 03 06:08:11 PM PDT 24 |
Aug 03 06:38:47 PM PDT 24 |
25518156344 ps |
T190 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.3141242875 |
|
|
Aug 03 06:11:36 PM PDT 24 |
Aug 03 06:17:23 PM PDT 24 |
20160522899 ps |
T191 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.60413901 |
|
|
Aug 03 06:16:35 PM PDT 24 |
Aug 03 06:20:16 PM PDT 24 |
3695029951 ps |
T192 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2244163218 |
|
|
Aug 03 06:18:51 PM PDT 24 |
Aug 03 06:19:47 PM PDT 24 |
34907754655 ps |
T193 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1398184830 |
|
|
Aug 03 06:07:34 PM PDT 24 |
Aug 03 06:08:24 PM PDT 24 |
5961173792 ps |
T194 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2173011656 |
|
|
Aug 03 06:09:34 PM PDT 24 |
Aug 03 06:12:50 PM PDT 24 |
3521437982 ps |
T195 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1614970740 |
|
|
Aug 03 06:10:01 PM PDT 24 |
Aug 03 06:10:04 PM PDT 24 |
363436683 ps |
T196 |
/workspace/coverage/default/29.sram_ctrl_regwen.657877415 |
|
|
Aug 03 06:14:43 PM PDT 24 |
Aug 03 06:18:34 PM PDT 24 |
1732610607 ps |
T197 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3052505392 |
|
|
Aug 03 06:11:50 PM PDT 24 |
Aug 03 06:14:01 PM PDT 24 |
3326119996 ps |
T198 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.2189843879 |
|
|
Aug 03 06:13:52 PM PDT 24 |
Aug 03 06:20:08 PM PDT 24 |
114890438214 ps |
T199 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3124044262 |
|
|
Aug 03 06:17:57 PM PDT 24 |
Aug 03 06:29:08 PM PDT 24 |
8913683728 ps |
T200 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1687914115 |
|
|
Aug 03 06:10:48 PM PDT 24 |
Aug 03 06:11:06 PM PDT 24 |
2933628254 ps |
T201 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.4001370073 |
|
|
Aug 03 06:14:19 PM PDT 24 |
Aug 03 06:14:23 PM PDT 24 |
891846612 ps |
T202 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3934167816 |
|
|
Aug 03 06:19:12 PM PDT 24 |
Aug 03 06:19:15 PM PDT 24 |
344991122 ps |
T203 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1834049994 |
|
|
Aug 03 06:18:18 PM PDT 24 |
Aug 03 06:33:08 PM PDT 24 |
11357575256 ps |
T204 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.1293861359 |
|
|
Aug 03 06:18:40 PM PDT 24 |
Aug 03 06:21:20 PM PDT 24 |
17376033901 ps |
T205 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3199109430 |
|
|
Aug 03 06:17:06 PM PDT 24 |
Aug 03 06:17:15 PM PDT 24 |
757801012 ps |
T146 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3435977388 |
|
|
Aug 03 06:19:21 PM PDT 24 |
Aug 03 06:27:37 PM PDT 24 |
22880347440 ps |
T206 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2460664838 |
|
|
Aug 03 06:12:47 PM PDT 24 |
Aug 03 06:12:50 PM PDT 24 |
1458759585 ps |
T207 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3613944495 |
|
|
Aug 03 06:09:23 PM PDT 24 |
Aug 03 06:10:30 PM PDT 24 |
2984322315 ps |
T208 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1480979090 |
|
|
Aug 03 06:10:14 PM PDT 24 |
Aug 03 06:10:41 PM PDT 24 |
1295112033 ps |
T209 |
/workspace/coverage/default/31.sram_ctrl_alert_test.3951751671 |
|
|
Aug 03 06:15:28 PM PDT 24 |
Aug 03 06:15:30 PM PDT 24 |
132130792 ps |
T139 |
/workspace/coverage/default/40.sram_ctrl_regwen.1015313302 |
|
|
Aug 03 06:18:08 PM PDT 24 |
Aug 03 06:36:42 PM PDT 24 |
15502267125 ps |
T210 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.597312944 |
|
|
Aug 03 06:13:15 PM PDT 24 |
Aug 03 06:15:22 PM PDT 24 |
12642164482 ps |
T211 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3393442862 |
|
|
Aug 03 06:07:16 PM PDT 24 |
Aug 03 06:25:03 PM PDT 24 |
88140183598 ps |
T60 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2335993835 |
|
|
Aug 03 06:16:15 PM PDT 24 |
Aug 03 06:17:45 PM PDT 24 |
13044604564 ps |
T212 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3328419419 |
|
|
Aug 03 06:06:52 PM PDT 24 |
Aug 03 06:07:48 PM PDT 24 |
3072783937 ps |
T140 |
/workspace/coverage/default/44.sram_ctrl_stress_all.704176564 |
|
|
Aug 03 06:19:17 PM PDT 24 |
Aug 03 07:23:32 PM PDT 24 |
194620444278 ps |
T213 |
/workspace/coverage/default/1.sram_ctrl_regwen.2672511519 |
|
|
Aug 03 06:06:11 PM PDT 24 |
Aug 03 06:25:13 PM PDT 24 |
70966235719 ps |
T214 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2598009581 |
|
|
Aug 03 06:11:45 PM PDT 24 |
Aug 03 06:25:43 PM PDT 24 |
63171167798 ps |
T215 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2177051353 |
|
|
Aug 03 06:18:30 PM PDT 24 |
Aug 03 06:32:09 PM PDT 24 |
4769571190 ps |
T216 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.2737537143 |
|
|
Aug 03 06:15:10 PM PDT 24 |
Aug 03 06:15:38 PM PDT 24 |
4163952550 ps |
T217 |
/workspace/coverage/default/43.sram_ctrl_executable.953801858 |
|
|
Aug 03 06:18:55 PM PDT 24 |
Aug 03 06:36:56 PM PDT 24 |
14533619868 ps |
T61 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.717964037 |
|
|
Aug 03 06:20:50 PM PDT 24 |
Aug 03 06:23:34 PM PDT 24 |
9811313875 ps |
T218 |
/workspace/coverage/default/21.sram_ctrl_executable.3826587429 |
|
|
Aug 03 06:12:22 PM PDT 24 |
Aug 03 06:24:31 PM PDT 24 |
30596389466 ps |
T219 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.3301404803 |
|
|
Aug 03 06:17:20 PM PDT 24 |
Aug 03 06:17:59 PM PDT 24 |
17141993866 ps |
T220 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1498014994 |
|
|
Aug 03 06:16:18 PM PDT 24 |
Aug 03 06:19:20 PM PDT 24 |
2627676143 ps |
T221 |
/workspace/coverage/default/37.sram_ctrl_bijection.834278029 |
|
|
Aug 03 06:16:55 PM PDT 24 |
Aug 03 06:49:47 PM PDT 24 |
165810229426 ps |
T222 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.1565007373 |
|
|
Aug 03 06:15:46 PM PDT 24 |
Aug 03 06:26:18 PM PDT 24 |
44260088043 ps |
T223 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.1832490191 |
|
|
Aug 03 06:06:31 PM PDT 24 |
Aug 03 06:07:49 PM PDT 24 |
18136069518 ps |
T224 |
/workspace/coverage/default/17.sram_ctrl_alert_test.3836998403 |
|
|
Aug 03 06:11:33 PM PDT 24 |
Aug 03 06:11:34 PM PDT 24 |
28262540 ps |
T225 |
/workspace/coverage/default/37.sram_ctrl_stress_all.861849779 |
|
|
Aug 03 06:17:09 PM PDT 24 |
Aug 03 07:15:50 PM PDT 24 |
41529549210 ps |
T226 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1275874928 |
|
|
Aug 03 06:06:06 PM PDT 24 |
Aug 03 06:06:42 PM PDT 24 |
10324848160 ps |
T227 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.3122029472 |
|
|
Aug 03 06:12:49 PM PDT 24 |
Aug 03 06:15:02 PM PDT 24 |
1996922294 ps |
T228 |
/workspace/coverage/default/16.sram_ctrl_smoke.1330783177 |
|
|
Aug 03 06:10:43 PM PDT 24 |
Aug 03 06:11:03 PM PDT 24 |
4611111151 ps |
T229 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.2165031882 |
|
|
Aug 03 06:18:23 PM PDT 24 |
Aug 03 06:21:08 PM PDT 24 |
6038969753 ps |
T230 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1279343590 |
|
|
Aug 03 06:08:25 PM PDT 24 |
Aug 03 06:30:53 PM PDT 24 |
21016369873 ps |
T231 |
/workspace/coverage/default/38.sram_ctrl_stress_all.1734594832 |
|
|
Aug 03 06:17:37 PM PDT 24 |
Aug 03 06:53:35 PM PDT 24 |
314601718778 ps |
T118 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.997396226 |
|
|
Aug 03 06:11:47 PM PDT 24 |
Aug 03 06:12:18 PM PDT 24 |
4856293920 ps |
T232 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.1715767079 |
|
|
Aug 03 06:15:37 PM PDT 24 |
Aug 03 06:20:06 PM PDT 24 |
11971339103 ps |
T233 |
/workspace/coverage/default/34.sram_ctrl_stress_all.2100440938 |
|
|
Aug 03 06:16:21 PM PDT 24 |
Aug 03 06:53:18 PM PDT 24 |
31918976764 ps |
T234 |
/workspace/coverage/default/44.sram_ctrl_smoke.484811359 |
|
|
Aug 03 06:19:07 PM PDT 24 |
Aug 03 06:19:22 PM PDT 24 |
1197478143 ps |
T235 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3216057210 |
|
|
Aug 03 06:18:36 PM PDT 24 |
Aug 03 06:19:04 PM PDT 24 |
2521041680 ps |
T236 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3995029476 |
|
|
Aug 03 06:08:06 PM PDT 24 |
Aug 03 06:10:53 PM PDT 24 |
7471007689 ps |
T237 |
/workspace/coverage/default/43.sram_ctrl_bijection.3845976888 |
|
|
Aug 03 06:18:54 PM PDT 24 |
Aug 03 06:55:17 PM PDT 24 |
32100074115 ps |
T238 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.3628126982 |
|
|
Aug 03 06:18:47 PM PDT 24 |
Aug 03 06:24:17 PM PDT 24 |
14405603646 ps |
T239 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2336910547 |
|
|
Aug 03 06:08:02 PM PDT 24 |
Aug 03 06:14:09 PM PDT 24 |
42242484004 ps |
T240 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1167461301 |
|
|
Aug 03 06:07:15 PM PDT 24 |
Aug 03 06:10:05 PM PDT 24 |
2790427455 ps |
T241 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2031629895 |
|
|
Aug 03 06:07:40 PM PDT 24 |
Aug 03 06:07:44 PM PDT 24 |
1350844859 ps |
T141 |
/workspace/coverage/default/20.sram_ctrl_executable.4190387485 |
|
|
Aug 03 06:12:02 PM PDT 24 |
Aug 03 06:26:45 PM PDT 24 |
45580993996 ps |
T242 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.1065440719 |
|
|
Aug 03 06:15:55 PM PDT 24 |
Aug 03 06:16:31 PM PDT 24 |
1484967588 ps |
T243 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.2483483423 |
|
|
Aug 03 06:06:22 PM PDT 24 |
Aug 03 06:22:30 PM PDT 24 |
28947600900 ps |
T244 |
/workspace/coverage/default/8.sram_ctrl_bijection.3923723843 |
|
|
Aug 03 06:08:27 PM PDT 24 |
Aug 03 06:38:14 PM PDT 24 |
73767856617 ps |
T245 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1002271760 |
|
|
Aug 03 06:19:12 PM PDT 24 |
Aug 03 06:21:38 PM PDT 24 |
3126387505 ps |
T246 |
/workspace/coverage/default/17.sram_ctrl_bijection.1586575588 |
|
|
Aug 03 06:11:15 PM PDT 24 |
Aug 03 06:39:39 PM PDT 24 |
88652401261 ps |
T247 |
/workspace/coverage/default/49.sram_ctrl_regwen.1595563376 |
|
|
Aug 03 06:20:52 PM PDT 24 |
Aug 03 06:30:57 PM PDT 24 |
13150211992 ps |
T248 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.580858591 |
|
|
Aug 03 06:06:17 PM PDT 24 |
Aug 03 06:08:33 PM PDT 24 |
6636343691 ps |
T249 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.3283698655 |
|
|
Aug 03 06:07:16 PM PDT 24 |
Aug 03 06:10:01 PM PDT 24 |
12750148264 ps |
T250 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2060961150 |
|
|
Aug 03 06:17:54 PM PDT 24 |
Aug 03 06:23:38 PM PDT 24 |
50478853129 ps |
T251 |
/workspace/coverage/default/28.sram_ctrl_alert_test.840825800 |
|
|
Aug 03 06:14:36 PM PDT 24 |
Aug 03 06:14:37 PM PDT 24 |
23614936 ps |
T252 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2939882186 |
|
|
Aug 03 06:09:19 PM PDT 24 |
Aug 03 06:10:39 PM PDT 24 |
15762729394 ps |
T253 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1367407514 |
|
|
Aug 03 06:10:41 PM PDT 24 |
Aug 03 06:10:42 PM PDT 24 |
43258022 ps |
T254 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2427202805 |
|
|
Aug 03 06:08:13 PM PDT 24 |
Aug 03 06:08:41 PM PDT 24 |
618883336 ps |
T255 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.172211683 |
|
|
Aug 03 06:13:05 PM PDT 24 |
Aug 03 06:17:22 PM PDT 24 |
34674081899 ps |
T256 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3998161844 |
|
|
Aug 03 06:16:09 PM PDT 24 |
Aug 03 06:16:15 PM PDT 24 |
4231399724 ps |
T257 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2787070184 |
|
|
Aug 03 06:08:47 PM PDT 24 |
Aug 03 06:11:32 PM PDT 24 |
17563320991 ps |
T258 |
/workspace/coverage/default/22.sram_ctrl_regwen.2148874109 |
|
|
Aug 03 06:12:51 PM PDT 24 |
Aug 03 06:20:25 PM PDT 24 |
3549773684 ps |
T259 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.253926061 |
|
|
Aug 03 06:05:53 PM PDT 24 |
Aug 03 06:06:12 PM PDT 24 |
3463610249 ps |
T260 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2236589823 |
|
|
Aug 03 06:20:29 PM PDT 24 |
Aug 03 06:22:19 PM PDT 24 |
93187157010 ps |
T261 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.719101843 |
|
|
Aug 03 06:07:55 PM PDT 24 |
Aug 03 06:09:05 PM PDT 24 |
20421714490 ps |
T262 |
/workspace/coverage/default/2.sram_ctrl_bijection.24822146 |
|
|
Aug 03 06:06:23 PM PDT 24 |
Aug 03 06:50:06 PM PDT 24 |
115126215198 ps |
T263 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.1218170700 |
|
|
Aug 03 06:11:22 PM PDT 24 |
Aug 03 06:12:26 PM PDT 24 |
21517960947 ps |
T50 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3877584818 |
|
|
Aug 03 06:08:48 PM PDT 24 |
Aug 03 06:09:34 PM PDT 24 |
1508428241 ps |
T264 |
/workspace/coverage/default/1.sram_ctrl_bijection.294350235 |
|
|
Aug 03 06:06:06 PM PDT 24 |
Aug 03 06:26:08 PM PDT 24 |
17557270856 ps |
T265 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.3199027905 |
|
|
Aug 03 06:10:58 PM PDT 24 |
Aug 03 06:11:01 PM PDT 24 |
1371557914 ps |
T266 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.2044763481 |
|
|
Aug 03 06:19:15 PM PDT 24 |
Aug 03 06:25:02 PM PDT 24 |
92229874710 ps |
T267 |
/workspace/coverage/default/6.sram_ctrl_alert_test.2368571612 |
|
|
Aug 03 06:08:11 PM PDT 24 |
Aug 03 06:08:12 PM PDT 24 |
14255367 ps |
T268 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1071698512 |
|
|
Aug 03 06:08:38 PM PDT 24 |
Aug 03 06:09:15 PM PDT 24 |
2979088187 ps |
T269 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.1348192578 |
|
|
Aug 03 06:14:07 PM PDT 24 |
Aug 03 06:18:16 PM PDT 24 |
15092684266 ps |
T17 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1551213943 |
|
|
Aug 03 06:07:30 PM PDT 24 |
Aug 03 06:07:33 PM PDT 24 |
432964923 ps |
T35 |
/workspace/coverage/default/1.sram_ctrl_smoke.2727081908 |
|
|
Aug 03 06:06:02 PM PDT 24 |
Aug 03 06:06:09 PM PDT 24 |
2538178306 ps |
T36 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1390643352 |
|
|
Aug 03 06:07:00 PM PDT 24 |
Aug 03 06:07:04 PM PDT 24 |
1357842301 ps |
T37 |
/workspace/coverage/default/34.sram_ctrl_bijection.3377474156 |
|
|
Aug 03 06:16:06 PM PDT 24 |
Aug 03 06:54:18 PM PDT 24 |
99707075791 ps |
T38 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3926006023 |
|
|
Aug 03 06:05:49 PM PDT 24 |
Aug 03 06:20:50 PM PDT 24 |
15418963709 ps |
T39 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1439044241 |
|
|
Aug 03 06:10:55 PM PDT 24 |
Aug 03 06:12:19 PM PDT 24 |
10729162381 ps |
T40 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.4226111757 |
|
|
Aug 03 06:06:27 PM PDT 24 |
Aug 03 06:07:39 PM PDT 24 |
3038131352 ps |
T41 |
/workspace/coverage/default/47.sram_ctrl_regwen.2804184519 |
|
|
Aug 03 06:20:13 PM PDT 24 |
Aug 03 06:36:03 PM PDT 24 |
6698011512 ps |
T42 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3754635863 |
|
|
Aug 03 06:14:55 PM PDT 24 |
Aug 03 06:15:09 PM PDT 24 |
2749398341 ps |
T43 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.2484741337 |
|
|
Aug 03 06:18:54 PM PDT 24 |
Aug 03 06:21:36 PM PDT 24 |
7199185159 ps |
T270 |
/workspace/coverage/default/31.sram_ctrl_bijection.78498485 |
|
|
Aug 03 06:15:06 PM PDT 24 |
Aug 03 06:51:17 PM PDT 24 |
553140033647 ps |
T271 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.1059738847 |
|
|
Aug 03 06:14:41 PM PDT 24 |
Aug 03 06:17:17 PM PDT 24 |
3424029442 ps |
T272 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1691110198 |
|
|
Aug 03 06:15:23 PM PDT 24 |
Aug 03 06:15:30 PM PDT 24 |
642281507 ps |
T273 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.145402431 |
|
|
Aug 03 06:16:15 PM PDT 24 |
Aug 03 06:16:18 PM PDT 24 |
366928561 ps |
T274 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3143051474 |
|
|
Aug 03 06:11:46 PM PDT 24 |
Aug 03 06:24:19 PM PDT 24 |
15973846306 ps |
T275 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.570576710 |
|
|
Aug 03 06:13:29 PM PDT 24 |
Aug 03 06:16:00 PM PDT 24 |
5479075681 ps |
T276 |
/workspace/coverage/default/19.sram_ctrl_executable.870802908 |
|
|
Aug 03 06:11:50 PM PDT 24 |
Aug 03 06:31:47 PM PDT 24 |
9203995892 ps |
T277 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.233010210 |
|
|
Aug 03 06:18:09 PM PDT 24 |
Aug 03 06:19:25 PM PDT 24 |
5783099664 ps |
T278 |
/workspace/coverage/default/43.sram_ctrl_alert_test.2408875669 |
|
|
Aug 03 06:19:07 PM PDT 24 |
Aug 03 06:19:08 PM PDT 24 |
30318019 ps |
T279 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.1334001014 |
|
|
Aug 03 06:06:43 PM PDT 24 |
Aug 03 06:11:18 PM PDT 24 |
4066057335 ps |
T280 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.2961605330 |
|
|
Aug 03 06:06:52 PM PDT 24 |
Aug 03 06:07:09 PM PDT 24 |
2537116471 ps |
T281 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2904570424 |
|
|
Aug 03 06:10:43 PM PDT 24 |
Aug 03 06:13:13 PM PDT 24 |
1567097674 ps |
T282 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.87735039 |
|
|
Aug 03 06:16:28 PM PDT 24 |
Aug 03 06:16:31 PM PDT 24 |
365419514 ps |
T283 |
/workspace/coverage/default/3.sram_ctrl_alert_test.3481673509 |
|
|
Aug 03 06:07:17 PM PDT 24 |
Aug 03 06:07:18 PM PDT 24 |
28513516 ps |
T284 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2950097525 |
|
|
Aug 03 06:18:48 PM PDT 24 |
Aug 03 06:19:36 PM PDT 24 |
3402734605 ps |
T285 |
/workspace/coverage/default/29.sram_ctrl_executable.28602865 |
|
|
Aug 03 06:14:43 PM PDT 24 |
Aug 03 06:15:22 PM PDT 24 |
2453457111 ps |
T286 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3040737274 |
|
|
Aug 03 06:08:55 PM PDT 24 |
Aug 03 06:09:22 PM PDT 24 |
1211373872 ps |
T287 |
/workspace/coverage/default/28.sram_ctrl_regwen.3867136862 |
|
|
Aug 03 06:14:30 PM PDT 24 |
Aug 03 06:38:33 PM PDT 24 |
4664605477 ps |
T119 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.4152389514 |
|
|
Aug 03 06:10:39 PM PDT 24 |
Aug 03 06:10:49 PM PDT 24 |
721199232 ps |
T288 |
/workspace/coverage/default/41.sram_ctrl_partial_access.53754689 |
|
|
Aug 03 06:18:15 PM PDT 24 |
Aug 03 06:18:34 PM PDT 24 |
4188128106 ps |
T289 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.1757332060 |
|
|
Aug 03 06:19:33 PM PDT 24 |
Aug 03 06:23:53 PM PDT 24 |
78826637816 ps |
T290 |
/workspace/coverage/default/27.sram_ctrl_alert_test.2133771514 |
|
|
Aug 03 06:14:21 PM PDT 24 |
Aug 03 06:14:22 PM PDT 24 |
15217914 ps |
T291 |
/workspace/coverage/default/33.sram_ctrl_bijection.2113683259 |
|
|
Aug 03 06:15:47 PM PDT 24 |
Aug 03 06:39:03 PM PDT 24 |
30453566864 ps |
T292 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.753341063 |
|
|
Aug 03 06:06:19 PM PDT 24 |
Aug 03 06:06:32 PM PDT 24 |
1493731078 ps |
T293 |
/workspace/coverage/default/19.sram_ctrl_regwen.319913420 |
|
|
Aug 03 06:11:53 PM PDT 24 |
Aug 03 06:24:08 PM PDT 24 |
13143129172 ps |
T294 |
/workspace/coverage/default/40.sram_ctrl_partial_access.1729871157 |
|
|
Aug 03 06:18:05 PM PDT 24 |
Aug 03 06:18:31 PM PDT 24 |
2012001580 ps |
T295 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.212601921 |
|
|
Aug 03 06:13:23 PM PDT 24 |
Aug 03 06:14:20 PM PDT 24 |
36251987487 ps |
T296 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1594577856 |
|
|
Aug 03 06:10:07 PM PDT 24 |
Aug 03 06:46:58 PM PDT 24 |
421975398272 ps |
T297 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1276022105 |
|
|
Aug 03 06:10:41 PM PDT 24 |
Aug 03 06:11:45 PM PDT 24 |
10637096568 ps |
T298 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1636548994 |
|
|
Aug 03 06:07:59 PM PDT 24 |
Aug 03 06:09:25 PM PDT 24 |
12099712955 ps |
T299 |
/workspace/coverage/default/48.sram_ctrl_regwen.2443363331 |
|
|
Aug 03 06:20:31 PM PDT 24 |
Aug 03 06:31:27 PM PDT 24 |
20354017709 ps |
T300 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3309708348 |
|
|
Aug 03 06:14:28 PM PDT 24 |
Aug 03 06:14:36 PM PDT 24 |
2795575718 ps |
T301 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3875482665 |
|
|
Aug 03 06:06:11 PM PDT 24 |
Aug 03 06:16:01 PM PDT 24 |
46498879691 ps |