Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.94 99.19 94.27 99.72 100.00 96.03 99.12 97.26


Total tests in report: 1038
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
66.04 66.04 91.25 91.25 68.01 68.01 89.84 89.84 23.81 23.81 77.96 77.96 94.01 94.01 17.37 17.37 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1419048158
84.16 18.13 96.97 5.72 77.61 9.60 91.87 2.03 85.71 61.90 87.68 9.72 95.91 1.90 53.38 36.01 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2889620441
89.94 5.78 97.38 0.41 82.46 4.86 96.07 4.20 85.71 0.00 90.52 2.84 95.91 0.00 81.54 28.15 /workspace/coverage/default/23.sram_ctrl_executable.2613024091
92.91 2.97 98.53 1.14 85.78 3.32 97.66 1.58 95.24 9.52 93.60 3.08 96.20 0.29 83.36 1.83 /workspace/coverage/default/41.sram_ctrl_lc_escalation.2952107617
93.94 1.03 98.69 0.16 86.61 0.83 97.87 0.21 95.24 0.00 94.31 0.71 96.20 0.00 88.67 5.30 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.796303086
94.71 0.77 98.86 0.16 88.39 1.78 98.00 0.14 95.24 0.00 95.26 0.95 96.20 0.00 91.04 2.38 /workspace/coverage/default/21.sram_ctrl_stress_all.4044552191
95.46 0.75 98.94 0.08 88.39 0.00 98.00 0.00 100.00 4.76 95.50 0.24 96.20 0.00 91.22 0.18 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3812965857
96.17 0.70 99.10 0.16 90.17 1.78 98.76 0.76 100.00 0.00 96.21 0.71 96.78 0.58 92.14 0.91 /workspace/coverage/default/0.sram_ctrl_sec_cm.992366020
96.65 0.48 99.10 0.00 90.28 0.12 98.76 0.00 100.00 0.00 96.21 0.00 96.93 0.15 95.25 3.11 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3401264669
96.80 0.16 99.10 0.00 90.28 0.00 98.83 0.07 100.00 0.00 96.21 0.00 97.95 1.02 95.25 0.00 /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3130604913
96.93 0.13 99.18 0.08 90.28 0.00 99.66 0.83 100.00 0.00 96.21 0.00 97.95 0.00 95.25 0.00 /workspace/coverage/default/17.sram_ctrl_ram_cfg.2244114697
97.05 0.12 99.18 0.00 90.40 0.12 99.66 0.00 100.00 0.00 96.21 0.00 98.68 0.73 95.25 0.00 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2964079713
97.16 0.10 99.18 0.00 90.40 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.68 0.00 95.98 0.73 /workspace/coverage/default/43.sram_ctrl_stress_all.803419098
97.24 0.08 99.18 0.00 90.88 0.47 99.72 0.07 100.00 0.00 96.21 0.00 98.68 0.00 95.98 0.00 /workspace/coverage/default/13.sram_ctrl_alert_test.3258982974
97.29 0.05 99.18 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.68 0.00 96.34 0.37 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1113227034
97.34 0.05 99.18 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.68 0.00 96.71 0.37 /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3828323501
97.39 0.05 99.18 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.68 0.00 97.07 0.37 /workspace/coverage/default/27.sram_ctrl_lc_escalation.225343405
97.43 0.04 99.18 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.29 97.07 0.00 /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2181402816
97.46 0.03 99.18 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3642965758
97.48 0.02 99.18 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.15 97.26 0.00 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.603679831
97.50 0.02 99.18 0.00 91.00 0.12 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.00 /workspace/coverage/default/12.sram_ctrl_lc_escalation.3934711684

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3915179630
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3663067525
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3004492460
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3565278150
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1264468524
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.4040088724
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1111231160
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1049662915
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2006331341
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1398054778
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2586677834
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.143364902
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1963053430
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.902653728
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2814864039
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1014132412
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3693021811
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1923951062
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2626259791
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3979531168
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.335066249
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1966297777
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2999910489
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.953574999
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1762632117
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2963053273
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3834492014
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1818627880
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.929917709
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2119889077
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3761587045
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2325886704
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.597734793
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2090957031
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1051070457
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2642218435
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2719433277
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.609230563
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3435975109
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3606996139
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2118439336
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1992298738
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.408071020
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3755381889
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3161534778
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2857929462
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1455541749
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2244594219
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3733966422
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.587623088
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.168560391
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2059001893
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.272817537
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.638946245
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.4245488320
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.264879515
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3957751150
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3661114847
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.958289336
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3888299374
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1699110791
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3957318680
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1011588112
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.560601361
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2090232550
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3370394160
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.541653625
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1908163784
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.120056462
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.985558558
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2047625244
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3872642904
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.801730076
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3702972865
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.708167144
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.807109648
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3468269322
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2206771556
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3441300610
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3219899981
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3341225747
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2265855224
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4211215813
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.768005721
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.469515581
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1760328074
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1020813894
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1498534669
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1709087194
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.781231986
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1333867437
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1787621637
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2435868847
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4206523363
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3476072579
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3040735772
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3049551442
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4293754035
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3067668714
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2707170826
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.171399737
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3263356414
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2156402643
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.4102414313
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2158365012
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2232450260
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.337144699
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.455363359
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3995257637
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3008989737
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1148591571
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.912507254
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1739942023
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3718541001
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3500222813
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1925160670
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1878177282
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3805391527
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1190653059
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2563064822
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4549898
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1901764329
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4103592728
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.671518770
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2489131264
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3466707076
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.772532594
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.506807716
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2596188400
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2652495307
/workspace/coverage/default/0.sram_ctrl_alert_test.3396796547
/workspace/coverage/default/0.sram_ctrl_bijection.2949225429
/workspace/coverage/default/0.sram_ctrl_executable.1685408066
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2632685199
/workspace/coverage/default/0.sram_ctrl_max_throughput.1601571239
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1125987515
/workspace/coverage/default/0.sram_ctrl_mem_walk.251992493
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2455447064
/workspace/coverage/default/0.sram_ctrl_partial_access.906359073
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3074948684
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1330769498
/workspace/coverage/default/0.sram_ctrl_regwen.2303212393
/workspace/coverage/default/0.sram_ctrl_smoke.912564256
/workspace/coverage/default/0.sram_ctrl_stress_all.3273930821
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2768221628
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2530774681
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1428754871
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4108562308
/workspace/coverage/default/1.sram_ctrl_alert_test.630485380
/workspace/coverage/default/1.sram_ctrl_bijection.689367765
/workspace/coverage/default/1.sram_ctrl_executable.3127404997
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3902101153
/workspace/coverage/default/1.sram_ctrl_max_throughput.2037963083
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.688394157
/workspace/coverage/default/1.sram_ctrl_mem_walk.2609838566
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1376411768
/workspace/coverage/default/1.sram_ctrl_partial_access.1715329797
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3319129236
/workspace/coverage/default/1.sram_ctrl_ram_cfg.54223032
/workspace/coverage/default/1.sram_ctrl_regwen.2385506881
/workspace/coverage/default/1.sram_ctrl_sec_cm.748456549
/workspace/coverage/default/1.sram_ctrl_smoke.943882227
/workspace/coverage/default/1.sram_ctrl_stress_all.1877180200
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4269508836
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3068607271
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3354104934
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1156563960
/workspace/coverage/default/10.sram_ctrl_alert_test.699160417
/workspace/coverage/default/10.sram_ctrl_bijection.1135287951
/workspace/coverage/default/10.sram_ctrl_executable.1933955062
/workspace/coverage/default/10.sram_ctrl_lc_escalation.281242113
/workspace/coverage/default/10.sram_ctrl_max_throughput.4044500643
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2484351307
/workspace/coverage/default/10.sram_ctrl_mem_walk.2304209466
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2010012611
/workspace/coverage/default/10.sram_ctrl_partial_access.3797405200
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.574055105
/workspace/coverage/default/10.sram_ctrl_ram_cfg.4290845541
/workspace/coverage/default/10.sram_ctrl_regwen.2594534511
/workspace/coverage/default/10.sram_ctrl_smoke.171409362
/workspace/coverage/default/10.sram_ctrl_stress_all.1701231864
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2185519242
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2863509246
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1064204361
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2510333630
/workspace/coverage/default/11.sram_ctrl_alert_test.3948643982
/workspace/coverage/default/11.sram_ctrl_bijection.3034521233
/workspace/coverage/default/11.sram_ctrl_executable.3143144768
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3163069245
/workspace/coverage/default/11.sram_ctrl_max_throughput.1628902277
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1836121193
/workspace/coverage/default/11.sram_ctrl_mem_walk.1673095412
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1588660441
/workspace/coverage/default/11.sram_ctrl_partial_access.2837160367
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1606265092
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1864446688
/workspace/coverage/default/11.sram_ctrl_regwen.3170504839
/workspace/coverage/default/11.sram_ctrl_smoke.2358965793
/workspace/coverage/default/11.sram_ctrl_stress_all.1278541280
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3967654916
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/workspace/coverage/default/42.sram_ctrl_partial_access.2642548336
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2766527015
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2554098975
/workspace/coverage/default/42.sram_ctrl_regwen.1254866689
/workspace/coverage/default/42.sram_ctrl_smoke.3043031166
/workspace/coverage/default/42.sram_ctrl_stress_all.2548769611
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1235345932
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2550934796
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3724953815
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.4020422605
/workspace/coverage/default/43.sram_ctrl_alert_test.2724125317
/workspace/coverage/default/43.sram_ctrl_bijection.3947636819
/workspace/coverage/default/43.sram_ctrl_executable.2874786325
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3512525058
/workspace/coverage/default/43.sram_ctrl_max_throughput.2098605679
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.426527261
/workspace/coverage/default/43.sram_ctrl_mem_walk.107303851
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1321009698
/workspace/coverage/default/43.sram_ctrl_partial_access.1694379266
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3187926683
/workspace/coverage/default/43.sram_ctrl_ram_cfg.260866952
/workspace/coverage/default/43.sram_ctrl_regwen.2102664722
/workspace/coverage/default/43.sram_ctrl_smoke.2318551222
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.4106095694
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2797794917
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4286850167
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.493375454
/workspace/coverage/default/44.sram_ctrl_alert_test.538013197
/workspace/coverage/default/44.sram_ctrl_bijection.375682477
/workspace/coverage/default/44.sram_ctrl_executable.3447137394
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3412337778
/workspace/coverage/default/44.sram_ctrl_max_throughput.373844578
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1671793757
/workspace/coverage/default/44.sram_ctrl_mem_walk.4058397931
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1845866454
/workspace/coverage/default/44.sram_ctrl_partial_access.1282045513
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2153703020
/workspace/coverage/default/44.sram_ctrl_ram_cfg.833639895
/workspace/coverage/default/44.sram_ctrl_regwen.470381004
/workspace/coverage/default/44.sram_ctrl_smoke.3052372134
/workspace/coverage/default/44.sram_ctrl_stress_all.2994300462
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2581660417
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1622797909
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2211331435
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1880452926
/workspace/coverage/default/45.sram_ctrl_alert_test.199926500
/workspace/coverage/default/45.sram_ctrl_bijection.2966549362
/workspace/coverage/default/45.sram_ctrl_executable.313450262
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2883674451
/workspace/coverage/default/45.sram_ctrl_max_throughput.557420405
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2632991644
/workspace/coverage/default/45.sram_ctrl_mem_walk.104153186
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1908599602
/workspace/coverage/default/45.sram_ctrl_partial_access.2022124783
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2480536317
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2718771526
/workspace/coverage/default/45.sram_ctrl_regwen.4023686874
/workspace/coverage/default/45.sram_ctrl_smoke.2195794045
/workspace/coverage/default/45.sram_ctrl_stress_all.3656244623
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1813937494
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3782044234
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3354534317
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3491509094
/workspace/coverage/default/46.sram_ctrl_alert_test.1914250362
/workspace/coverage/default/46.sram_ctrl_bijection.722231632
/workspace/coverage/default/46.sram_ctrl_executable.1247900694
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2142382399
/workspace/coverage/default/46.sram_ctrl_max_throughput.890068051
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.981481241
/workspace/coverage/default/46.sram_ctrl_mem_walk.4009085601
/workspace/coverage/default/46.sram_ctrl_multiple_keys.149805726
/workspace/coverage/default/46.sram_ctrl_partial_access.4190643047
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1478251645
/workspace/coverage/default/46.sram_ctrl_ram_cfg.4082551676
/workspace/coverage/default/46.sram_ctrl_regwen.2618445850
/workspace/coverage/default/46.sram_ctrl_smoke.2032046942
/workspace/coverage/default/46.sram_ctrl_stress_all.2554796514
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3566800436
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.731195751
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1197169630
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1447501091
/workspace/coverage/default/47.sram_ctrl_alert_test.950093647
/workspace/coverage/default/47.sram_ctrl_bijection.2030786186
/workspace/coverage/default/47.sram_ctrl_executable.3977015742
/workspace/coverage/default/47.sram_ctrl_lc_escalation.523231390
/workspace/coverage/default/47.sram_ctrl_max_throughput.3663385087
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2669776636
/workspace/coverage/default/47.sram_ctrl_mem_walk.2762013807
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1309167225
/workspace/coverage/default/47.sram_ctrl_partial_access.4116648595
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4235421277
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1174999652
/workspace/coverage/default/47.sram_ctrl_regwen.3577538232
/workspace/coverage/default/47.sram_ctrl_smoke.2755481692
/workspace/coverage/default/47.sram_ctrl_stress_all.2871455897
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2597019997
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2751829845
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1057654016
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3941313847
/workspace/coverage/default/48.sram_ctrl_alert_test.2558717783
/workspace/coverage/default/48.sram_ctrl_bijection.1673670764
/workspace/coverage/default/48.sram_ctrl_executable.337537799
/workspace/coverage/default/48.sram_ctrl_lc_escalation.4083326948
/workspace/coverage/default/48.sram_ctrl_max_throughput.1794956179
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2369663450
/workspace/coverage/default/48.sram_ctrl_mem_walk.2813703992
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1208130877
/workspace/coverage/default/48.sram_ctrl_partial_access.3369075539
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1815738208
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2337063392
/workspace/coverage/default/48.sram_ctrl_regwen.1102128780
/workspace/coverage/default/48.sram_ctrl_smoke.2507590044
/workspace/coverage/default/48.sram_ctrl_stress_all.1923256550
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2056649398
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3908347994
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2782354493
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2805923734
/workspace/coverage/default/49.sram_ctrl_alert_test.3483776842
/workspace/coverage/default/49.sram_ctrl_bijection.3534793457
/workspace/coverage/default/49.sram_ctrl_executable.3949796367
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3727774147
/workspace/coverage/default/49.sram_ctrl_max_throughput.4274334427
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1386766181
/workspace/coverage/default/49.sram_ctrl_mem_walk.1637942632
/workspace/coverage/default/49.sram_ctrl_multiple_keys.459758261
/workspace/coverage/default/49.sram_ctrl_partial_access.639921219
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.775480227
/workspace/coverage/default/49.sram_ctrl_ram_cfg.285465755
/workspace/coverage/default/49.sram_ctrl_regwen.3662954827
/workspace/coverage/default/49.sram_ctrl_smoke.4235763188
/workspace/coverage/default/49.sram_ctrl_stress_all.2027504256
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.526894045
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4083388989
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1434611873
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3376346131
/workspace/coverage/default/5.sram_ctrl_alert_test.985784770
/workspace/coverage/default/5.sram_ctrl_bijection.3036727170
/workspace/coverage/default/5.sram_ctrl_executable.257716928
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3066442598
/workspace/coverage/default/5.sram_ctrl_max_throughput.1676601127
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1863582501
/workspace/coverage/default/5.sram_ctrl_mem_walk.166505002
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4266132468
/workspace/coverage/default/5.sram_ctrl_partial_access.1964924595
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2476024934
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4211858693
/workspace/coverage/default/5.sram_ctrl_regwen.1952899654
/workspace/coverage/default/5.sram_ctrl_smoke.177146697
/workspace/coverage/default/5.sram_ctrl_stress_all.1345436705
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4025397214
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3121905850
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4263496039
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2167688335
/workspace/coverage/default/6.sram_ctrl_alert_test.2077927138
/workspace/coverage/default/6.sram_ctrl_executable.2841311461
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2895313166
/workspace/coverage/default/6.sram_ctrl_max_throughput.904162270
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1573068188
/workspace/coverage/default/6.sram_ctrl_mem_walk.1094804507
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3522026506
/workspace/coverage/default/6.sram_ctrl_partial_access.2125929811
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2689244836
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4230659330
/workspace/coverage/default/6.sram_ctrl_regwen.3735904766
/workspace/coverage/default/6.sram_ctrl_smoke.516700822
/workspace/coverage/default/6.sram_ctrl_stress_all.553573627
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2020526118
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1488843745
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2285611678
/workspace/coverage/default/7.sram_ctrl_alert_test.1041540434
/workspace/coverage/default/7.sram_ctrl_bijection.4202714381
/workspace/coverage/default/7.sram_ctrl_executable.3951285691
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1816058200
/workspace/coverage/default/7.sram_ctrl_max_throughput.3883162363
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3841398024
/workspace/coverage/default/7.sram_ctrl_mem_walk.423732246
/workspace/coverage/default/7.sram_ctrl_multiple_keys.490770494
/workspace/coverage/default/7.sram_ctrl_partial_access.467764457
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3240504508
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1562756959
/workspace/coverage/default/7.sram_ctrl_regwen.4192407
/workspace/coverage/default/7.sram_ctrl_smoke.1366773371
/workspace/coverage/default/7.sram_ctrl_stress_all.1785149445
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.779372021
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2355281332
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3495219605
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.4222671961
/workspace/coverage/default/8.sram_ctrl_alert_test.578237246
/workspace/coverage/default/8.sram_ctrl_bijection.2840642451
/workspace/coverage/default/8.sram_ctrl_executable.2166938859
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3249237124
/workspace/coverage/default/8.sram_ctrl_max_throughput.353019605
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1570598323
/workspace/coverage/default/8.sram_ctrl_mem_walk.1475862849
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2183319524
/workspace/coverage/default/8.sram_ctrl_partial_access.1340496672
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3914726925
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1320429484
/workspace/coverage/default/8.sram_ctrl_regwen.1438985603
/workspace/coverage/default/8.sram_ctrl_smoke.2944832669
/workspace/coverage/default/8.sram_ctrl_stress_all.1766938472
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3897797260
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2143427257
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1404253117
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2802974386
/workspace/coverage/default/9.sram_ctrl_alert_test.3549162282
/workspace/coverage/default/9.sram_ctrl_bijection.2345414145
/workspace/coverage/default/9.sram_ctrl_executable.182813962
/workspace/coverage/default/9.sram_ctrl_lc_escalation.612646216
/workspace/coverage/default/9.sram_ctrl_max_throughput.281150448
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3332920909
/workspace/coverage/default/9.sram_ctrl_mem_walk.3656074990
/workspace/coverage/default/9.sram_ctrl_multiple_keys.340463377
/workspace/coverage/default/9.sram_ctrl_partial_access.2690150926
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1473295219
/workspace/coverage/default/9.sram_ctrl_ram_cfg.182528315
/workspace/coverage/default/9.sram_ctrl_regwen.1473102109
/workspace/coverage/default/9.sram_ctrl_smoke.2289699452
/workspace/coverage/default/9.sram_ctrl_stress_all.2370044610
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4119598506
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.338935472
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4190934999



Total test records in report: 1038
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.2903706089 Aug 04 05:54:01 PM PDT 24 Aug 04 06:19:40 PM PDT 24 160765710553 ps
T2 /workspace/coverage/default/13.sram_ctrl_alert_test.3258982974 Aug 04 05:48:30 PM PDT 24 Aug 04 05:48:31 PM PDT 24 14165716 ps
T3 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.3616730784 Aug 04 05:49:42 PM PDT 24 Aug 04 05:53:57 PM PDT 24 8641496102 ps
T4 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1428754871 Aug 04 05:46:15 PM PDT 24 Aug 04 05:46:39 PM PDT 24 1475572177 ps
T5 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1461058788 Aug 04 05:52:05 PM PDT 24 Aug 04 05:54:49 PM PDT 24 3403850194 ps
T11 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1419048158 Aug 04 05:51:32 PM PDT 24 Aug 04 06:05:36 PM PDT 24 36315750833 ps
T12 /workspace/coverage/default/19.sram_ctrl_alert_test.3108931580 Aug 04 05:49:41 PM PDT 24 Aug 04 05:49:42 PM PDT 24 86823604 ps
T6 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3240504508 Aug 04 05:47:16 PM PDT 24 Aug 04 05:54:45 PM PDT 24 70602818921 ps
T7 /workspace/coverage/default/31.sram_ctrl_mem_walk.682141066 Aug 04 05:52:10 PM PDT 24 Aug 04 05:57:30 PM PDT 24 55252866820 ps
T13 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4286850167 Aug 04 05:54:51 PM PDT 24 Aug 04 05:57:08 PM PDT 24 2657644871 ps
T25 /workspace/coverage/default/23.sram_ctrl_executable.2613024091 Aug 04 05:50:26 PM PDT 24 Aug 04 06:14:59 PM PDT 24 21495186056 ps
T26 /workspace/coverage/default/41.sram_ctrl_partial_access.4001036354 Aug 04 05:54:23 PM PDT 24 Aug 04 05:54:45 PM PDT 24 4318479661 ps
T27 /workspace/coverage/default/14.sram_ctrl_executable.259313600 Aug 04 05:48:39 PM PDT 24 Aug 04 06:01:19 PM PDT 24 24419431711 ps
T24 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1813937494 Aug 04 05:55:34 PM PDT 24 Aug 04 05:55:51 PM PDT 24 497641766 ps
T60 /workspace/coverage/default/15.sram_ctrl_smoke.3801815929 Aug 04 05:48:46 PM PDT 24 Aug 04 05:48:58 PM PDT 24 801411796 ps
T30 /workspace/coverage/default/41.sram_ctrl_regwen.4129359725 Aug 04 05:54:25 PM PDT 24 Aug 04 06:27:51 PM PDT 24 15862874862 ps
T61 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.1593126322 Aug 04 05:51:14 PM PDT 24 Aug 04 05:56:23 PM PDT 24 77127357357 ps
T62 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.3602712689 Aug 04 05:52:56 PM PDT 24 Aug 04 05:55:48 PM PDT 24 5443411450 ps
T45 /workspace/coverage/default/2.sram_ctrl_smoke.2793276498 Aug 04 05:46:30 PM PDT 24 Aug 04 05:46:46 PM PDT 24 1185600072 ps
T81 /workspace/coverage/default/29.sram_ctrl_max_throughput.4212043516 Aug 04 05:51:41 PM PDT 24 Aug 04 05:54:24 PM PDT 24 1197040171 ps
T8 /workspace/coverage/default/48.sram_ctrl_lc_escalation.4083326948 Aug 04 05:56:08 PM PDT 24 Aug 04 05:56:46 PM PDT 24 6702281957 ps
T76 /workspace/coverage/default/29.sram_ctrl_partial_access.212608850 Aug 04 05:51:43 PM PDT 24 Aug 04 05:52:02 PM PDT 24 4819823355 ps
T44 /workspace/coverage/default/6.sram_ctrl_smoke.516700822 Aug 04 05:47:05 PM PDT 24 Aug 04 05:47:20 PM PDT 24 839661512 ps
T85 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.297439024 Aug 04 05:49:19 PM PDT 24 Aug 04 05:49:34 PM PDT 24 700663549 ps
T75 /workspace/coverage/default/40.sram_ctrl_smoke.3561242200 Aug 04 05:54:07 PM PDT 24 Aug 04 05:54:23 PM PDT 24 3381338257 ps
T155 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2782354493 Aug 04 05:56:03 PM PDT 24 Aug 04 05:56:52 PM PDT 24 3369335964 ps
T77 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.2268553393 Aug 04 05:51:54 PM PDT 24 Aug 04 05:56:30 PM PDT 24 3794323312 ps
T9 /workspace/coverage/default/41.sram_ctrl_lc_escalation.2952107617 Aug 04 05:54:22 PM PDT 24 Aug 04 05:54:42 PM PDT 24 12956664211 ps
T18 /workspace/coverage/default/18.sram_ctrl_stress_all.1899834846 Aug 04 05:49:25 PM PDT 24 Aug 04 07:04:31 PM PDT 24 500944374642 ps
T46 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.603679831 Aug 04 05:49:50 PM PDT 24 Aug 04 06:11:31 PM PDT 24 76700067177 ps
T47 /workspace/coverage/default/29.sram_ctrl_executable.3561614489 Aug 04 05:51:41 PM PDT 24 Aug 04 06:02:59 PM PDT 24 109988874395 ps
T14 /workspace/coverage/default/43.sram_ctrl_alert_test.2724125317 Aug 04 05:54:59 PM PDT 24 Aug 04 05:55:00 PM PDT 24 20396974 ps
T10 /workspace/coverage/default/32.sram_ctrl_lc_escalation.123504847 Aug 04 05:52:25 PM PDT 24 Aug 04 05:52:45 PM PDT 24 3820253798 ps
T31 /workspace/coverage/default/8.sram_ctrl_ram_cfg.1320429484 Aug 04 05:47:26 PM PDT 24 Aug 04 05:47:30 PM PDT 24 2105993769 ps
T114 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2537629021 Aug 04 05:48:55 PM PDT 24 Aug 04 05:51:31 PM PDT 24 8111830088 ps
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T28 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4269508836 Aug 04 05:46:29 PM PDT 24 Aug 04 05:46:41 PM PDT 24 1735937480 ps
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T157 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1644849277 Aug 04 05:53:39 PM PDT 24 Aug 04 05:53:45 PM PDT 24 1383417785 ps
T125 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3401264669 Aug 04 05:54:24 PM PDT 24 Aug 04 06:05:48 PM PDT 24 111659352784 ps
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T29 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2964079713 Aug 04 05:47:09 PM PDT 24 Aug 04 05:47:15 PM PDT 24 281621002 ps
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T19 /workspace/coverage/default/21.sram_ctrl_stress_all.4044552191 Aug 04 05:50:04 PM PDT 24 Aug 04 07:17:41 PM PDT 24 60586608020 ps
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T32 /workspace/coverage/default/40.sram_ctrl_ram_cfg.2068013827 Aug 04 05:54:19 PM PDT 24 Aug 04 05:54:22 PM PDT 24 1345970675 ps
T22 /workspace/coverage/default/12.sram_ctrl_lc_escalation.3934711684 Aug 04 05:48:22 PM PDT 24 Aug 04 05:49:15 PM PDT 24 32758006448 ps
T70 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.981481241 Aug 04 05:55:40 PM PDT 24 Aug 04 05:56:59 PM PDT 24 9351187451 ps
T15 /workspace/coverage/default/0.sram_ctrl_sec_cm.992366020 Aug 04 05:46:22 PM PDT 24 Aug 04 05:46:27 PM PDT 24 1319827637 ps
T36 /workspace/coverage/default/19.sram_ctrl_executable.3240463942 Aug 04 05:49:35 PM PDT 24 Aug 04 05:59:13 PM PDT 24 17151855762 ps
T37 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3121905850 Aug 04 05:46:58 PM PDT 24 Aug 04 05:49:22 PM PDT 24 4399167318 ps
T38 /workspace/coverage/default/17.sram_ctrl_bijection.3984703827 Aug 04 05:49:07 PM PDT 24 Aug 04 06:28:49 PM PDT 24 34507729112 ps
T39 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1057403130 Aug 04 05:46:41 PM PDT 24 Aug 04 05:47:31 PM PDT 24 5646902768 ps
T40 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.2105900484 Aug 04 05:51:58 PM PDT 24 Aug 04 06:14:50 PM PDT 24 35660254597 ps
T41 /workspace/coverage/default/26.sram_ctrl_mem_walk.1978024004 Aug 04 05:51:03 PM PDT 24 Aug 04 05:56:42 PM PDT 24 17919847725 ps
T33 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2554098975 Aug 04 05:54:42 PM PDT 24 Aug 04 05:54:45 PM PDT 24 683397785 ps
T42 /workspace/coverage/default/12.sram_ctrl_alert_test.2518295936 Aug 04 05:48:18 PM PDT 24 Aug 04 05:48:19 PM PDT 24 40990725 ps
T43 /workspace/coverage/default/23.sram_ctrl_smoke.2650913274 Aug 04 05:50:17 PM PDT 24 Aug 04 05:51:47 PM PDT 24 1190460829 ps
T158 /workspace/coverage/default/10.sram_ctrl_partial_access.3797405200 Aug 04 05:47:47 PM PDT 24 Aug 04 05:48:51 PM PDT 24 797964070 ps
T159 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2209128721 Aug 04 05:52:28 PM PDT 24 Aug 04 05:57:12 PM PDT 24 4436789402 ps
T160 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.2937267432 Aug 04 05:48:54 PM PDT 24 Aug 04 05:55:05 PM PDT 24 11142742319 ps
T161 /workspace/coverage/default/10.sram_ctrl_max_throughput.4044500643 Aug 04 05:47:52 PM PDT 24 Aug 04 05:48:01 PM PDT 24 1934859378 ps
T162 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2550934796 Aug 04 05:54:36 PM PDT 24 Aug 04 05:58:27 PM PDT 24 18180530544 ps
T20 /workspace/coverage/default/5.sram_ctrl_stress_all.1345436705 Aug 04 05:47:02 PM PDT 24 Aug 04 07:03:16 PM PDT 24 164020586660 ps
T21 /workspace/coverage/default/7.sram_ctrl_regwen.4192407 Aug 04 05:47:18 PM PDT 24 Aug 04 05:56:51 PM PDT 24 18781464780 ps
T163 /workspace/coverage/default/34.sram_ctrl_ram_cfg.1001225610 Aug 04 05:52:54 PM PDT 24 Aug 04 05:52:58 PM PDT 24 1402503358 ps
T164 /workspace/coverage/default/40.sram_ctrl_bijection.433441301 Aug 04 05:54:09 PM PDT 24 Aug 04 06:16:48 PM PDT 24 244174937008 ps
T165 /workspace/coverage/default/34.sram_ctrl_smoke.818963554 Aug 04 05:52:41 PM PDT 24 Aug 04 05:54:39 PM PDT 24 3353706959 ps
T166 /workspace/coverage/default/13.sram_ctrl_smoke.2394660199 Aug 04 05:48:23 PM PDT 24 Aug 04 05:49:22 PM PDT 24 4446041312 ps
T82 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.261160343 Aug 04 05:51:46 PM PDT 24 Aug 04 05:52:01 PM PDT 24 4875240643 ps
T102 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.493375454 Aug 04 05:55:04 PM PDT 24 Aug 04 05:56:16 PM PDT 24 3373030293 ps
T23 /workspace/coverage/default/37.sram_ctrl_lc_escalation.1958823635 Aug 04 05:53:27 PM PDT 24 Aug 04 05:54:44 PM PDT 24 10774900334 ps
T167 /workspace/coverage/default/25.sram_ctrl_multiple_keys.1443800769 Aug 04 05:50:42 PM PDT 24 Aug 04 06:17:39 PM PDT 24 95618930887 ps
T148 /workspace/coverage/default/22.sram_ctrl_stress_all.754217928 Aug 04 05:50:18 PM PDT 24 Aug 04 06:44:28 PM PDT 24 20679027692 ps
T168 /workspace/coverage/default/47.sram_ctrl_regwen.3577538232 Aug 04 05:55:51 PM PDT 24 Aug 04 06:19:56 PM PDT 24 78172944442 ps
T169 /workspace/coverage/default/27.sram_ctrl_multiple_keys.4195442308 Aug 04 05:51:05 PM PDT 24 Aug 04 06:06:16 PM PDT 24 8080173579 ps
T170 /workspace/coverage/default/29.sram_ctrl_mem_walk.2155127955 Aug 04 05:51:45 PM PDT 24 Aug 04 05:53:53 PM PDT 24 2083810746 ps
T58 /workspace/coverage/default/14.sram_ctrl_mem_walk.1205202098 Aug 04 05:48:42 PM PDT 24 Aug 04 05:54:26 PM PDT 24 20675682533 ps
T171 /workspace/coverage/default/23.sram_ctrl_regwen.2769121629 Aug 04 05:50:28 PM PDT 24 Aug 04 05:50:56 PM PDT 24 3529059791 ps
T103 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.3192382080 Aug 04 05:54:39 PM PDT 24 Aug 04 06:06:09 PM PDT 24 9959726050 ps
T172 /workspace/coverage/default/39.sram_ctrl_smoke.1862068549 Aug 04 05:53:54 PM PDT 24 Aug 04 05:56:27 PM PDT 24 2752494533 ps
T173 /workspace/coverage/default/38.sram_ctrl_bijection.3187876084 Aug 04 05:53:39 PM PDT 24 Aug 04 06:04:57 PM PDT 24 12689151335 ps
T174 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.204168659 Aug 04 05:53:57 PM PDT 24 Aug 04 05:59:24 PM PDT 24 32261143353 ps
T175 /workspace/coverage/default/10.sram_ctrl_smoke.171409362 Aug 04 05:47:49 PM PDT 24 Aug 04 05:48:08 PM PDT 24 1047805907 ps
T176 /workspace/coverage/default/14.sram_ctrl_partial_access.1060591924 Aug 04 05:48:34 PM PDT 24 Aug 04 05:51:02 PM PDT 24 4661291592 ps
T177 /workspace/coverage/default/31.sram_ctrl_smoke.1100754968 Aug 04 05:52:06 PM PDT 24 Aug 04 05:52:48 PM PDT 24 1515579282 ps
T178 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2476024934 Aug 04 05:47:01 PM PDT 24 Aug 04 05:51:59 PM PDT 24 10951260904 ps
T59 /workspace/coverage/default/0.sram_ctrl_mem_walk.251992493 Aug 04 05:46:19 PM PDT 24 Aug 04 05:51:33 PM PDT 24 10946575960 ps
T179 /workspace/coverage/default/5.sram_ctrl_multiple_keys.4266132468 Aug 04 05:46:56 PM PDT 24 Aug 04 06:27:41 PM PDT 24 33340134831 ps
T53 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3566800436 Aug 04 05:55:37 PM PDT 24 Aug 04 05:56:03 PM PDT 24 1119294130 ps
T180 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2245812162 Aug 04 05:50:45 PM PDT 24 Aug 04 05:57:09 PM PDT 24 15739511383 ps
T181 /workspace/coverage/default/11.sram_ctrl_bijection.3034521233 Aug 04 05:47:59 PM PDT 24 Aug 04 06:13:54 PM PDT 24 80288347905 ps
T83 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3967654916 Aug 04 05:48:12 PM PDT 24 Aug 04 05:48:22 PM PDT 24 255148928 ps
T182 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2459372192 Aug 04 05:51:40 PM PDT 24 Aug 04 05:55:12 PM PDT 24 17696078031 ps
T183 /workspace/coverage/default/15.sram_ctrl_max_throughput.576428504 Aug 04 05:48:48 PM PDT 24 Aug 04 05:49:24 PM PDT 24 3006242185 ps
T184 /workspace/coverage/default/46.sram_ctrl_multiple_keys.149805726 Aug 04 05:55:35 PM PDT 24 Aug 04 06:04:33 PM PDT 24 5615530661 ps
T185 /workspace/coverage/default/6.sram_ctrl_regwen.3735904766 Aug 04 05:47:09 PM PDT 24 Aug 04 06:03:40 PM PDT 24 6543143245 ps
T104 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.3151979633 Aug 04 05:54:10 PM PDT 24 Aug 04 06:18:32 PM PDT 24 42122485152 ps
T186 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2718771526 Aug 04 05:55:27 PM PDT 24 Aug 04 05:55:30 PM PDT 24 383305862 ps
T187 /workspace/coverage/default/41.sram_ctrl_smoke.1684524474 Aug 04 05:54:21 PM PDT 24 Aug 04 05:54:42 PM PDT 24 1283521197 ps
T105 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.1468234980 Aug 04 05:50:48 PM PDT 24 Aug 04 05:54:15 PM PDT 24 3420797213 ps
T188 /workspace/coverage/default/38.sram_ctrl_lc_escalation.1540254129 Aug 04 05:53:44 PM PDT 24 Aug 04 05:53:56 PM PDT 24 6917146861 ps
T189 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.632384762 Aug 04 05:46:40 PM PDT 24 Aug 04 05:48:58 PM PDT 24 8570879891 ps
T190 /workspace/coverage/default/44.sram_ctrl_max_throughput.373844578 Aug 04 05:55:01 PM PDT 24 Aug 04 05:55:07 PM PDT 24 786910697 ps
T191 /workspace/coverage/default/30.sram_ctrl_smoke.4289028497 Aug 04 05:51:48 PM PDT 24 Aug 04 05:51:57 PM PDT 24 545567933 ps
T54 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3812965857 Aug 04 05:54:18 PM PDT 24 Aug 04 05:55:01 PM PDT 24 2426981350 ps
T192 /workspace/coverage/default/20.sram_ctrl_ram_cfg.3520064407 Aug 04 05:49:50 PM PDT 24 Aug 04 05:49:53 PM PDT 24 1356466565 ps
T193 /workspace/coverage/default/17.sram_ctrl_multiple_keys.1519755509 Aug 04 05:49:06 PM PDT 24 Aug 04 05:53:11 PM PDT 24 5532915612 ps
T120 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.2403442584 Aug 04 05:50:11 PM PDT 24 Aug 04 06:03:35 PM PDT 24 12693058521 ps
T57 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2419428142 Aug 04 05:51:21 PM PDT 24 Aug 04 05:52:40 PM PDT 24 1433244279 ps
T194 /workspace/coverage/default/19.sram_ctrl_partial_access.109039426 Aug 04 05:49:33 PM PDT 24 Aug 04 05:49:50 PM PDT 24 4370053118 ps
T195 /workspace/coverage/default/41.sram_ctrl_stress_all.1726221613 Aug 04 05:54:30 PM PDT 24 Aug 04 07:00:39 PM PDT 24 188415474626 ps
T151 /workspace/coverage/default/8.sram_ctrl_lc_escalation.3249237124 Aug 04 05:47:29 PM PDT 24 Aug 04 05:47:50 PM PDT 24 14105374057 ps
T196 /workspace/coverage/default/38.sram_ctrl_smoke.1649768069 Aug 04 05:53:37 PM PDT 24 Aug 04 05:55:40 PM PDT 24 3361951705 ps
T197 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1718089288 Aug 04 05:54:03 PM PDT 24 Aug 04 05:55:08 PM PDT 24 5635557583 ps
T198 /workspace/coverage/default/20.sram_ctrl_stress_all.2403177363 Aug 04 05:49:54 PM PDT 24 Aug 04 07:04:01 PM PDT 24 49822505345 ps
T55 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1386766181 Aug 04 05:56:19 PM PDT 24 Aug 04 05:59:12 PM PDT 24 5272209831 ps
T199 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3437403545 Aug 04 05:51:59 PM PDT 24 Aug 04 05:52:03 PM PDT 24 692747054 ps
T63 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2015389388 Aug 04 05:52:56 PM PDT 24 Aug 04 05:54:11 PM PDT 24 2805074452 ps
T200 /workspace/coverage/default/13.sram_ctrl_mem_walk.2328423451 Aug 04 05:48:28 PM PDT 24 Aug 04 05:53:49 PM PDT 24 10938503694 ps
T201 /workspace/coverage/default/1.sram_ctrl_bijection.689367765 Aug 04 05:46:21 PM PDT 24 Aug 04 06:10:42 PM PDT 24 64656008194 ps
T202 /workspace/coverage/default/1.sram_ctrl_mem_walk.2609838566 Aug 04 05:46:27 PM PDT 24 Aug 04 05:50:46 PM PDT 24 4151511420 ps
T16 /workspace/coverage/default/1.sram_ctrl_sec_cm.748456549 Aug 04 05:46:28 PM PDT 24 Aug 04 05:46:31 PM PDT 24 173673106 ps
T203 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.2652495307 Aug 04 05:46:20 PM PDT 24 Aug 04 05:54:56 PM PDT 24 10211754892 ps
T204 /workspace/coverage/default/17.sram_ctrl_smoke.2848864673 Aug 04 05:49:07 PM PDT 24 Aug 04 05:51:10 PM PDT 24 437813642 ps
T205 /workspace/coverage/default/13.sram_ctrl_regwen.3093252655 Aug 04 05:48:24 PM PDT 24 Aug 04 05:48:51 PM PDT 24 2443394093 ps
T206 /workspace/coverage/default/5.sram_ctrl_bijection.3036727170 Aug 04 05:47:00 PM PDT 24 Aug 04 06:09:06 PM PDT 24 18698842707 ps
T134 /workspace/coverage/default/45.sram_ctrl_stress_all.3656244623 Aug 04 05:55:36 PM PDT 24 Aug 04 06:52:09 PM PDT 24 115969685131 ps
T207 /workspace/coverage/default/13.sram_ctrl_partial_access.27176860 Aug 04 05:48:22 PM PDT 24 Aug 04 05:48:41 PM PDT 24 1462289790 ps
T208 /workspace/coverage/default/8.sram_ctrl_max_throughput.353019605 Aug 04 05:47:23 PM PDT 24 Aug 04 05:48:08 PM PDT 24 759085842 ps
T209 /workspace/coverage/default/14.sram_ctrl_smoke.2310983352 Aug 04 05:48:30 PM PDT 24 Aug 04 05:50:48 PM PDT 24 4111688629 ps
T210 /workspace/coverage/default/33.sram_ctrl_ram_cfg.1889381009 Aug 04 05:52:34 PM PDT 24 Aug 04 05:52:38 PM PDT 24 1351268917 ps
T211 /workspace/coverage/default/5.sram_ctrl_regwen.1952899654 Aug 04 05:47:01 PM PDT 24 Aug 04 05:58:25 PM PDT 24 10808773078 ps
T84 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1231975045 Aug 04 05:48:56 PM PDT 24 Aug 04 05:49:06 PM PDT 24 1422000863 ps
T152 /workspace/coverage/default/27.sram_ctrl_lc_escalation.225343405 Aug 04 05:51:15 PM PDT 24 Aug 04 05:51:53 PM PDT 24 10683613871 ps
T212 /workspace/coverage/default/2.sram_ctrl_multiple_keys.4091891123 Aug 04 05:46:33 PM PDT 24 Aug 04 06:00:16 PM PDT 24 37930244584 ps
T149 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2638870251 Aug 04 05:52:59 PM PDT 24 Aug 04 05:59:00 PM PDT 24 64960582464 ps
T213 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4235421277 Aug 04 05:55:46 PM PDT 24 Aug 04 06:00:45 PM PDT 24 22853148573 ps
T64 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1923600829 Aug 04 05:53:08 PM PDT 24 Aug 04 05:57:34 PM PDT 24 10805785014 ps
T214 /workspace/coverage/default/20.sram_ctrl_alert_test.593425062 Aug 04 05:49:55 PM PDT 24 Aug 04 05:49:55 PM PDT 24 37704142 ps
T56 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.2485519595 Aug 04 05:54:42 PM PDT 24 Aug 04 05:56:06 PM PDT 24 10961389255 ps
T215 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.3604155257 Aug 04 05:48:46 PM PDT 24 Aug 04 05:53:28 PM PDT 24 16854454666 ps
T216 /workspace/coverage/default/32.sram_ctrl_smoke.1236033823 Aug 04 05:52:14 PM PDT 24 Aug 04 05:53:21 PM PDT 24 1208420936 ps
T217 /workspace/coverage/default/26.sram_ctrl_max_throughput.564743441 Aug 04 05:50:55 PM PDT 24 Aug 04 05:51:36 PM PDT 24 3136027261 ps
T218 /workspace/coverage/default/3.sram_ctrl_bijection.1460253593 Aug 04 05:46:41 PM PDT 24 Aug 04 06:26:04 PM PDT 24 63706666105 ps
T219 /workspace/coverage/default/19.sram_ctrl_mem_walk.3817909027 Aug 04 05:49:37 PM PDT 24 Aug 04 05:52:17 PM PDT 24 7207315815 ps
T220 /workspace/coverage/default/17.sram_ctrl_ram_cfg.2244114697 Aug 04 05:49:11 PM PDT 24 Aug 04 05:49:15 PM PDT 24 462731162 ps
T221 /workspace/coverage/default/31.sram_ctrl_alert_test.3235815182 Aug 04 05:52:08 PM PDT 24 Aug 04 05:52:09 PM PDT 24 53260028 ps
T222 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3522026506 Aug 04 05:47:07 PM PDT 24 Aug 04 06:13:43 PM PDT 24 215588906861 ps
T223 /workspace/coverage/default/29.sram_ctrl_ram_cfg.2404046815 Aug 04 05:51:44 PM PDT 24 Aug 04 05:51:48 PM PDT 24 1406052698 ps
T145 /workspace/coverage/default/32.sram_ctrl_stress_all.1885704383 Aug 04 05:52:25 PM PDT 24 Aug 04 07:48:35 PM PDT 24 923400092713 ps
T224 /workspace/coverage/default/6.sram_ctrl_max_throughput.904162270 Aug 04 05:47:06 PM PDT 24 Aug 04 05:47:56 PM PDT 24 3037704646 ps
T225 /workspace/coverage/default/7.sram_ctrl_ram_cfg.1562756959 Aug 04 05:47:18 PM PDT 24 Aug 04 05:47:22 PM PDT 24 1410338479 ps
T226 /workspace/coverage/default/15.sram_ctrl_executable.2970658684 Aug 04 05:48:53 PM PDT 24 Aug 04 06:16:36 PM PDT 24 12711146209 ps
T227 /workspace/coverage/default/23.sram_ctrl_stress_all.3444941004 Aug 04 05:50:27 PM PDT 24 Aug 04 06:25:14 PM PDT 24 35210135637 ps
T228 /workspace/coverage/default/47.sram_ctrl_ram_cfg.1174999652 Aug 04 05:55:51 PM PDT 24 Aug 04 05:55:55 PM PDT 24 2242412657 ps
T229 /workspace/coverage/default/13.sram_ctrl_executable.4178892864 Aug 04 05:48:26 PM PDT 24 Aug 04 05:56:33 PM PDT 24 24972891090 ps
T230 /workspace/coverage/default/9.sram_ctrl_executable.182813962 Aug 04 05:47:37 PM PDT 24 Aug 04 05:58:11 PM PDT 24 5850116085 ps
T231 /workspace/coverage/default/44.sram_ctrl_partial_access.1282045513 Aug 04 05:55:02 PM PDT 24 Aug 04 05:55:07 PM PDT 24 1726774285 ps
T232 /workspace/coverage/default/19.sram_ctrl_ram_cfg.2714186775 Aug 04 05:49:37 PM PDT 24 Aug 04 05:49:40 PM PDT 24 689180286 ps
T233 /workspace/coverage/default/22.sram_ctrl_bijection.2868137236 Aug 04 05:50:08 PM PDT 24 Aug 04 06:14:20 PM PDT 24 352792404310 ps
T234 /workspace/coverage/default/16.sram_ctrl_alert_test.2499433807 Aug 04 05:49:06 PM PDT 24 Aug 04 05:49:06 PM PDT 24 42060789 ps
T235 /workspace/coverage/default/20.sram_ctrl_mem_walk.303799276 Aug 04 05:49:50 PM PDT 24 Aug 04 05:52:49 PM PDT 24 18375299723 ps
T236 /workspace/coverage/default/46.sram_ctrl_regwen.2618445850 Aug 04 05:55:36 PM PDT 24 Aug 04 06:02:00 PM PDT 24 19036962694 ps
T237 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2664632667 Aug 04 05:51:20 PM PDT 24 Aug 04 05:51:38 PM PDT 24 1688912536 ps
T238 /workspace/coverage/default/44.sram_ctrl_ram_cfg.833639895 Aug 04 05:55:12 PM PDT 24 Aug 04 05:55:15 PM PDT 24 364835736 ps
T239 /workspace/coverage/default/18.sram_ctrl_regwen.2778744827 Aug 04 05:49:21 PM PDT 24 Aug 04 05:59:31 PM PDT 24 7013876588 ps
T240 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2581660417 Aug 04 05:55:12 PM PDT 24 Aug 04 05:55:33 PM PDT 24 1144458414 ps
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T242 /workspace/coverage/default/49.sram_ctrl_lc_escalation.3727774147 Aug 04 05:56:10 PM PDT 24 Aug 04 05:57:00 PM PDT 24 8216988037 ps
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T306 /workspace/coverage/default/48.sram_ctrl_ram_cfg.2337063392 Aug 04 05:56:03 PM PDT 24 Aug 04 05:56:07 PM PDT 24 1403105559 ps
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