Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total test records in report: 1033
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T303 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.372949906 Aug 09 06:49:47 PM PDT 24 Aug 09 06:51:53 PM PDT 24 3140627568 ps
T304 /workspace/coverage/default/37.sram_ctrl_multiple_keys.1180861880 Aug 09 06:47:17 PM PDT 24 Aug 09 07:05:42 PM PDT 24 14938542872 ps
T305 /workspace/coverage/default/1.sram_ctrl_multiple_keys.943891405 Aug 09 06:41:04 PM PDT 24 Aug 09 06:57:56 PM PDT 24 22861912073 ps
T306 /workspace/coverage/default/17.sram_ctrl_stress_all.1135402012 Aug 09 06:42:34 PM PDT 24 Aug 09 06:55:17 PM PDT 24 33677043025 ps
T307 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2257771873 Aug 09 06:41:50 PM PDT 24 Aug 09 06:52:12 PM PDT 24 6948643335 ps
T111 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1869703883 Aug 09 06:43:53 PM PDT 24 Aug 09 06:46:17 PM PDT 24 8936020150 ps
T308 /workspace/coverage/default/48.sram_ctrl_alert_test.1444954593 Aug 09 06:51:09 PM PDT 24 Aug 09 06:51:10 PM PDT 24 41674607 ps
T309 /workspace/coverage/default/39.sram_ctrl_executable.2156947938 Aug 09 06:48:12 PM PDT 24 Aug 09 07:02:26 PM PDT 24 33143424019 ps
T310 /workspace/coverage/default/38.sram_ctrl_bijection.2020004133 Aug 09 06:47:39 PM PDT 24 Aug 09 07:28:19 PM PDT 24 524282687444 ps
T311 /workspace/coverage/default/27.sram_ctrl_smoke.1889120071 Aug 09 06:44:38 PM PDT 24 Aug 09 06:44:52 PM PDT 24 3014465685 ps
T312 /workspace/coverage/default/25.sram_ctrl_stress_all.693462135 Aug 09 06:44:14 PM PDT 24 Aug 09 07:38:07 PM PDT 24 165698122362 ps
T313 /workspace/coverage/default/5.sram_ctrl_ram_cfg.427465007 Aug 09 06:41:26 PM PDT 24 Aug 09 06:41:29 PM PDT 24 1254815031 ps
T314 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2233663214 Aug 09 06:44:53 PM PDT 24 Aug 09 06:46:25 PM PDT 24 1616566211 ps
T315 /workspace/coverage/default/12.sram_ctrl_executable.4249365363 Aug 09 06:41:49 PM PDT 24 Aug 09 06:48:03 PM PDT 24 27733216042 ps
T316 /workspace/coverage/default/28.sram_ctrl_ram_cfg.1121322635 Aug 09 06:44:53 PM PDT 24 Aug 09 06:44:56 PM PDT 24 1347220459 ps
T317 /workspace/coverage/default/47.sram_ctrl_multiple_keys.206491744 Aug 09 06:50:37 PM PDT 24 Aug 09 07:10:01 PM PDT 24 8140212240 ps
T318 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3489387659 Aug 09 06:41:36 PM PDT 24 Aug 09 06:42:51 PM PDT 24 12746570631 ps
T319 /workspace/coverage/default/49.sram_ctrl_lc_escalation.1448599016 Aug 09 06:51:17 PM PDT 24 Aug 09 06:51:34 PM PDT 24 4725549841 ps
T320 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2448418900 Aug 09 06:41:58 PM PDT 24 Aug 09 06:42:05 PM PDT 24 2804957105 ps
T321 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.1956893561 Aug 09 06:46:35 PM PDT 24 Aug 09 06:54:59 PM PDT 24 32562182482 ps
T92 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.4205207203 Aug 09 06:42:55 PM PDT 24 Aug 09 06:45:49 PM PDT 24 18159740342 ps
T322 /workspace/coverage/default/41.sram_ctrl_bijection.729315922 Aug 09 06:48:57 PM PDT 24 Aug 09 07:25:36 PM PDT 24 62377657161 ps
T323 /workspace/coverage/default/5.sram_ctrl_stress_all.1951419308 Aug 09 06:41:26 PM PDT 24 Aug 09 08:18:50 PM PDT 24 139238897505 ps
T324 /workspace/coverage/default/42.sram_ctrl_multiple_keys.4016553301 Aug 09 06:49:07 PM PDT 24 Aug 09 07:01:52 PM PDT 24 192173282495 ps
T325 /workspace/coverage/default/46.sram_ctrl_multiple_keys.303488015 Aug 09 06:50:18 PM PDT 24 Aug 09 06:54:06 PM PDT 24 9509998862 ps
T326 /workspace/coverage/default/11.sram_ctrl_multiple_keys.1297523475 Aug 09 06:41:45 PM PDT 24 Aug 09 07:06:31 PM PDT 24 35293564244 ps
T327 /workspace/coverage/default/13.sram_ctrl_partial_access.1698344701 Aug 09 06:41:50 PM PDT 24 Aug 09 06:41:55 PM PDT 24 1560748457 ps
T328 /workspace/coverage/default/48.sram_ctrl_ram_cfg.3909664955 Aug 09 06:51:10 PM PDT 24 Aug 09 06:51:13 PM PDT 24 791890489 ps
T329 /workspace/coverage/default/31.sram_ctrl_mem_walk.2803621617 Aug 09 06:45:48 PM PDT 24 Aug 09 06:48:24 PM PDT 24 2634791160 ps
T330 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.63313945 Aug 09 06:41:38 PM PDT 24 Aug 09 06:44:04 PM PDT 24 2526166890 ps
T331 /workspace/coverage/default/47.sram_ctrl_lc_escalation.4053187883 Aug 09 06:50:37 PM PDT 24 Aug 09 06:51:38 PM PDT 24 35720461198 ps
T332 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.422820038 Aug 09 06:42:15 PM PDT 24 Aug 09 06:43:41 PM PDT 24 3134818197 ps
T333 /workspace/coverage/default/34.sram_ctrl_ram_cfg.395550454 Aug 09 06:46:35 PM PDT 24 Aug 09 06:46:39 PM PDT 24 1973645142 ps
T334 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.2327047637 Aug 09 06:48:13 PM PDT 24 Aug 09 06:50:40 PM PDT 24 5003897733 ps
T335 /workspace/coverage/default/35.sram_ctrl_multiple_keys.2972264995 Aug 09 06:46:41 PM PDT 24 Aug 09 06:52:05 PM PDT 24 2395176609 ps
T336 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.3091425909 Aug 09 06:44:38 PM PDT 24 Aug 09 06:49:22 PM PDT 24 15815531549 ps
T337 /workspace/coverage/default/4.sram_ctrl_mem_walk.1433834489 Aug 09 06:41:26 PM PDT 24 Aug 09 06:43:41 PM PDT 24 24655702706 ps
T338 /workspace/coverage/default/24.sram_ctrl_multiple_keys.4124770176 Aug 09 06:43:52 PM PDT 24 Aug 09 07:13:03 PM PDT 24 91169695811 ps
T339 /workspace/coverage/default/45.sram_ctrl_max_throughput.2396181641 Aug 09 06:50:07 PM PDT 24 Aug 09 06:51:12 PM PDT 24 2042046490 ps
T340 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3882537619 Aug 09 06:41:19 PM PDT 24 Aug 09 06:57:15 PM PDT 24 71706810955 ps
T341 /workspace/coverage/default/10.sram_ctrl_executable.3989864774 Aug 09 06:41:39 PM PDT 24 Aug 09 06:55:17 PM PDT 24 21181886966 ps
T342 /workspace/coverage/default/36.sram_ctrl_lc_escalation.2573761916 Aug 09 06:47:01 PM PDT 24 Aug 09 06:48:21 PM PDT 24 25640539139 ps
T343 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2862614948 Aug 09 06:41:58 PM PDT 24 Aug 09 06:51:40 PM PDT 24 13326526624 ps
T344 /workspace/coverage/default/41.sram_ctrl_smoke.1774583262 Aug 09 06:48:47 PM PDT 24 Aug 09 06:48:55 PM PDT 24 627661072 ps
T345 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3678801598 Aug 09 06:43:28 PM PDT 24 Aug 09 06:46:32 PM PDT 24 5410518275 ps
T346 /workspace/coverage/default/42.sram_ctrl_smoke.2767547184 Aug 09 06:49:08 PM PDT 24 Aug 09 06:49:21 PM PDT 24 3014976896 ps
T347 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1424597764 Aug 09 06:46:49 PM PDT 24 Aug 09 06:48:38 PM PDT 24 766213608 ps
T348 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.1932466189 Aug 09 06:50:33 PM PDT 24 Aug 09 06:51:49 PM PDT 24 10260328778 ps
T349 /workspace/coverage/default/28.sram_ctrl_lc_escalation.2628038627 Aug 09 06:44:52 PM PDT 24 Aug 09 06:45:55 PM PDT 24 20174058029 ps
T350 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.436117610 Aug 09 06:42:09 PM PDT 24 Aug 09 06:46:40 PM PDT 24 9896231172 ps
T351 /workspace/coverage/default/23.sram_ctrl_partial_access.175219639 Aug 09 06:43:44 PM PDT 24 Aug 09 06:44:05 PM PDT 24 20881248138 ps
T112 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1953127391 Aug 09 06:43:10 PM PDT 24 Aug 09 06:43:23 PM PDT 24 1800467569 ps
T352 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.147087605 Aug 09 06:42:34 PM PDT 24 Aug 09 06:42:43 PM PDT 24 704391039 ps
T353 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.3970637905 Aug 09 06:43:36 PM PDT 24 Aug 09 07:06:23 PM PDT 24 52647722730 ps
T354 /workspace/coverage/default/49.sram_ctrl_mem_walk.2040901490 Aug 09 06:51:37 PM PDT 24 Aug 09 06:57:35 PM PDT 24 50464638715 ps
T355 /workspace/coverage/default/29.sram_ctrl_alert_test.4153594963 Aug 09 06:45:24 PM PDT 24 Aug 09 06:45:24 PM PDT 24 14536910 ps
T356 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2255241715 Aug 09 06:41:19 PM PDT 24 Aug 09 06:46:16 PM PDT 24 25370863240 ps
T357 /workspace/coverage/default/3.sram_ctrl_stress_all.2150005341 Aug 09 06:41:23 PM PDT 24 Aug 09 07:17:41 PM PDT 24 128412012492 ps
T358 /workspace/coverage/default/31.sram_ctrl_bijection.26536123 Aug 09 06:45:34 PM PDT 24 Aug 09 07:19:40 PM PDT 24 111451537433 ps
T359 /workspace/coverage/default/10.sram_ctrl_max_throughput.1364156858 Aug 09 06:41:38 PM PDT 24 Aug 09 06:43:50 PM PDT 24 768015200 ps
T360 /workspace/coverage/default/14.sram_ctrl_bijection.2998791447 Aug 09 06:42:01 PM PDT 24 Aug 09 07:18:28 PM PDT 24 184186783757 ps
T361 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2366111273 Aug 09 06:41:38 PM PDT 24 Aug 09 06:46:13 PM PDT 24 49071596025 ps
T362 /workspace/coverage/default/37.sram_ctrl_smoke.80348800 Aug 09 06:47:15 PM PDT 24 Aug 09 06:48:29 PM PDT 24 1890694852 ps
T363 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3133964062 Aug 09 06:46:29 PM PDT 24 Aug 09 06:47:21 PM PDT 24 8197053510 ps
T364 /workspace/coverage/default/38.sram_ctrl_regwen.1014433951 Aug 09 06:47:59 PM PDT 24 Aug 09 07:08:02 PM PDT 24 13271959094 ps
T365 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.2234941378 Aug 09 06:41:38 PM PDT 24 Aug 09 06:58:19 PM PDT 24 58670451403 ps
T366 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2527652516 Aug 09 06:41:48 PM PDT 24 Aug 09 06:42:01 PM PDT 24 741290639 ps
T367 /workspace/coverage/default/21.sram_ctrl_alert_test.3062543364 Aug 09 06:43:27 PM PDT 24 Aug 09 06:43:28 PM PDT 24 12800036 ps
T368 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.36558701 Aug 09 06:45:07 PM PDT 24 Aug 09 06:50:04 PM PDT 24 17859181349 ps
T113 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2360313727 Aug 09 06:43:29 PM PDT 24 Aug 09 06:43:52 PM PDT 24 6562256421 ps
T369 /workspace/coverage/default/43.sram_ctrl_executable.407052587 Aug 09 06:49:47 PM PDT 24 Aug 09 07:22:33 PM PDT 24 13701181654 ps
T370 /workspace/coverage/default/2.sram_ctrl_multiple_keys.2754777385 Aug 09 06:41:11 PM PDT 24 Aug 09 07:15:41 PM PDT 24 128927684262 ps
T371 /workspace/coverage/default/23.sram_ctrl_executable.2732334213 Aug 09 06:43:43 PM PDT 24 Aug 09 07:01:58 PM PDT 24 79976625479 ps
T372 /workspace/coverage/default/47.sram_ctrl_regwen.2863242545 Aug 09 06:51:07 PM PDT 24 Aug 09 06:52:30 PM PDT 24 7858086704 ps
T373 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3808983918 Aug 09 06:46:55 PM PDT 24 Aug 09 06:48:54 PM PDT 24 2465769478 ps
T374 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2035313201 Aug 09 06:48:03 PM PDT 24 Aug 09 06:52:05 PM PDT 24 8095026346 ps
T375 /workspace/coverage/default/27.sram_ctrl_executable.793600177 Aug 09 06:44:46 PM PDT 24 Aug 09 06:54:22 PM PDT 24 14641700989 ps
T376 /workspace/coverage/default/12.sram_ctrl_max_throughput.4241346856 Aug 09 06:41:51 PM PDT 24 Aug 09 06:42:05 PM PDT 24 1462171185 ps
T377 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.1275382406 Aug 09 06:42:39 PM PDT 24 Aug 09 06:46:29 PM PDT 24 14086633691 ps
T378 /workspace/coverage/default/23.sram_ctrl_max_throughput.4054407679 Aug 09 06:43:44 PM PDT 24 Aug 09 06:43:59 PM PDT 24 694436309 ps
T379 /workspace/coverage/default/49.sram_ctrl_bijection.782796838 Aug 09 06:51:09 PM PDT 24 Aug 09 07:34:14 PM PDT 24 134259456308 ps
T380 /workspace/coverage/default/3.sram_ctrl_ram_cfg.3273696500 Aug 09 06:41:20 PM PDT 24 Aug 09 06:41:23 PM PDT 24 2799210013 ps
T381 /workspace/coverage/default/48.sram_ctrl_smoke.192530039 Aug 09 06:51:06 PM PDT 24 Aug 09 06:51:27 PM PDT 24 13709796215 ps
T382 /workspace/coverage/default/44.sram_ctrl_bijection.1422475692 Aug 09 06:49:49 PM PDT 24 Aug 09 07:06:24 PM PDT 24 84932462125 ps
T383 /workspace/coverage/default/9.sram_ctrl_regwen.3851983191 Aug 09 06:41:36 PM PDT 24 Aug 09 06:42:30 PM PDT 24 5001850580 ps
T384 /workspace/coverage/default/23.sram_ctrl_mem_walk.3668265634 Aug 09 06:43:43 PM PDT 24 Aug 09 06:46:15 PM PDT 24 7204993565 ps
T385 /workspace/coverage/default/8.sram_ctrl_bijection.1113119179 Aug 09 06:41:37 PM PDT 24 Aug 09 07:03:33 PM PDT 24 56515330106 ps
T386 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3869348076 Aug 09 06:42:49 PM PDT 24 Aug 09 06:44:27 PM PDT 24 43782772297 ps
T387 /workspace/coverage/default/41.sram_ctrl_lc_escalation.500747596 Aug 09 06:48:56 PM PDT 24 Aug 09 06:49:35 PM PDT 24 5724106316 ps
T388 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.2577669806 Aug 09 06:44:16 PM PDT 24 Aug 09 06:58:31 PM PDT 24 11242482495 ps
T389 /workspace/coverage/default/48.sram_ctrl_bijection.3321607506 Aug 09 06:51:05 PM PDT 24 Aug 09 07:32:17 PM PDT 24 389727630834 ps
T390 /workspace/coverage/default/19.sram_ctrl_executable.1790681699 Aug 09 06:42:55 PM PDT 24 Aug 09 06:53:25 PM PDT 24 22634827987 ps
T391 /workspace/coverage/default/22.sram_ctrl_lc_escalation.3602876939 Aug 09 06:43:35 PM PDT 24 Aug 09 06:44:39 PM PDT 24 57271842671 ps
T392 /workspace/coverage/default/21.sram_ctrl_executable.3833285480 Aug 09 06:43:18 PM PDT 24 Aug 09 06:53:55 PM PDT 24 17405449695 ps
T393 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3186049496 Aug 09 06:47:49 PM PDT 24 Aug 09 06:54:58 PM PDT 24 22396628016 ps
T394 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3310699694 Aug 09 06:45:47 PM PDT 24 Aug 09 06:48:08 PM PDT 24 5494052739 ps
T395 /workspace/coverage/default/13.sram_ctrl_stress_all.1464516777 Aug 09 06:41:58 PM PDT 24 Aug 09 07:00:23 PM PDT 24 104313452482 ps
T396 /workspace/coverage/default/1.sram_ctrl_ram_cfg.3173227260 Aug 09 06:41:12 PM PDT 24 Aug 09 06:41:15 PM PDT 24 358695228 ps
T397 /workspace/coverage/default/28.sram_ctrl_executable.315810865 Aug 09 06:44:53 PM PDT 24 Aug 09 07:00:14 PM PDT 24 5154359087 ps
T398 /workspace/coverage/default/13.sram_ctrl_mem_walk.1632391282 Aug 09 06:41:58 PM PDT 24 Aug 09 06:46:08 PM PDT 24 16415069109 ps
T399 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.530686182 Aug 09 06:42:34 PM PDT 24 Aug 09 06:47:12 PM PDT 24 10170304305 ps
T400 /workspace/coverage/default/11.sram_ctrl_alert_test.1261229171 Aug 09 06:41:48 PM PDT 24 Aug 09 06:41:49 PM PDT 24 13009578 ps
T401 /workspace/coverage/default/42.sram_ctrl_alert_test.2075499750 Aug 09 06:49:28 PM PDT 24 Aug 09 06:49:28 PM PDT 24 22379751 ps
T402 /workspace/coverage/default/46.sram_ctrl_max_throughput.60908968 Aug 09 06:50:17 PM PDT 24 Aug 09 06:51:24 PM PDT 24 8100328810 ps
T403 /workspace/coverage/default/4.sram_ctrl_partial_access.2188956020 Aug 09 06:41:19 PM PDT 24 Aug 09 06:41:42 PM PDT 24 4941326783 ps
T404 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.1599803429 Aug 09 06:44:49 PM PDT 24 Aug 09 07:05:49 PM PDT 24 25021153060 ps
T405 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.363250929 Aug 09 06:41:25 PM PDT 24 Aug 09 06:43:06 PM PDT 24 889492056 ps
T406 /workspace/coverage/default/16.sram_ctrl_smoke.1412996767 Aug 09 06:42:17 PM PDT 24 Aug 09 06:42:59 PM PDT 24 15665926053 ps
T407 /workspace/coverage/default/12.sram_ctrl_multiple_keys.2697569308 Aug 09 06:41:47 PM PDT 24 Aug 09 07:16:59 PM PDT 24 49733651969 ps
T408 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2903343902 Aug 09 06:49:49 PM PDT 24 Aug 09 07:06:16 PM PDT 24 14884860496 ps
T409 /workspace/coverage/default/33.sram_ctrl_ram_cfg.1973553303 Aug 09 06:46:15 PM PDT 24 Aug 09 06:46:19 PM PDT 24 369346808 ps
T410 /workspace/coverage/default/4.sram_ctrl_bijection.135955354 Aug 09 06:41:19 PM PDT 24 Aug 09 07:05:48 PM PDT 24 40005555560 ps
T411 /workspace/coverage/default/11.sram_ctrl_stress_all.532174343 Aug 09 06:41:47 PM PDT 24 Aug 09 07:52:33 PM PDT 24 60364169655 ps
T412 /workspace/coverage/default/28.sram_ctrl_alert_test.1459422886 Aug 09 06:45:02 PM PDT 24 Aug 09 06:45:02 PM PDT 24 34008221 ps
T413 /workspace/coverage/default/16.sram_ctrl_alert_test.1067545571 Aug 09 06:42:23 PM PDT 24 Aug 09 06:42:24 PM PDT 24 20025048 ps
T414 /workspace/coverage/default/20.sram_ctrl_lc_escalation.1713394217 Aug 09 06:43:11 PM PDT 24 Aug 09 06:43:28 PM PDT 24 30439775883 ps
T415 /workspace/coverage/default/11.sram_ctrl_bijection.3152759970 Aug 09 06:41:46 PM PDT 24 Aug 09 06:53:33 PM PDT 24 43283107417 ps
T416 /workspace/coverage/default/25.sram_ctrl_multiple_keys.753644095 Aug 09 06:44:06 PM PDT 24 Aug 09 06:53:28 PM PDT 24 13130144797 ps
T417 /workspace/coverage/default/44.sram_ctrl_multiple_keys.604508109 Aug 09 06:49:48 PM PDT 24 Aug 09 07:04:10 PM PDT 24 15710680019 ps
T418 /workspace/coverage/default/28.sram_ctrl_regwen.623389828 Aug 09 06:44:53 PM PDT 24 Aug 09 06:58:11 PM PDT 24 23090913519 ps
T419 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.616111285 Aug 09 06:42:17 PM PDT 24 Aug 09 06:47:25 PM PDT 24 4537360060 ps
T420 /workspace/coverage/default/3.sram_ctrl_max_throughput.281133975 Aug 09 06:41:26 PM PDT 24 Aug 09 06:42:13 PM PDT 24 3027135016 ps
T421 /workspace/coverage/default/42.sram_ctrl_mem_walk.3266152906 Aug 09 06:49:27 PM PDT 24 Aug 09 06:53:52 PM PDT 24 8047913527 ps
T422 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2399087579 Aug 09 06:42:08 PM PDT 24 Aug 09 06:48:56 PM PDT 24 7181181259 ps
T423 /workspace/coverage/default/17.sram_ctrl_partial_access.3280259890 Aug 09 06:42:32 PM PDT 24 Aug 09 06:42:41 PM PDT 24 953211812 ps
T424 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3537298720 Aug 09 06:46:21 PM PDT 24 Aug 09 06:46:37 PM PDT 24 3569294881 ps
T425 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1600164234 Aug 09 06:45:53 PM PDT 24 Aug 09 06:46:28 PM PDT 24 2889050369 ps
T426 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.119047453 Aug 09 06:41:49 PM PDT 24 Aug 09 06:42:56 PM PDT 24 1903396641 ps
T427 /workspace/coverage/default/43.sram_ctrl_ram_cfg.1546512654 Aug 09 06:49:48 PM PDT 24 Aug 09 06:49:52 PM PDT 24 1400023235 ps
T428 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.3200866955 Aug 09 06:49:27 PM PDT 24 Aug 09 06:50:37 PM PDT 24 963447079 ps
T429 /workspace/coverage/default/38.sram_ctrl_lc_escalation.492752667 Aug 09 06:47:48 PM PDT 24 Aug 09 06:48:31 PM PDT 24 7106544305 ps
T430 /workspace/coverage/default/3.sram_ctrl_bijection.4030606144 Aug 09 06:41:12 PM PDT 24 Aug 09 07:08:47 PM PDT 24 377118338389 ps
T431 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.201472671 Aug 09 06:43:19 PM PDT 24 Aug 09 06:49:56 PM PDT 24 4938818903 ps
T432 /workspace/coverage/default/3.sram_ctrl_mem_walk.1833890271 Aug 09 06:41:19 PM PDT 24 Aug 09 06:46:00 PM PDT 24 5307712653 ps
T433 /workspace/coverage/default/29.sram_ctrl_executable.2467135052 Aug 09 06:45:10 PM PDT 24 Aug 09 06:53:32 PM PDT 24 43048435124 ps
T434 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.4127975150 Aug 09 06:41:11 PM PDT 24 Aug 09 06:44:06 PM PDT 24 22829734495 ps
T435 /workspace/coverage/default/42.sram_ctrl_executable.1006061154 Aug 09 06:49:16 PM PDT 24 Aug 09 07:00:03 PM PDT 24 30251496081 ps
T436 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.726082490 Aug 09 06:49:48 PM PDT 24 Aug 09 06:53:38 PM PDT 24 13817982076 ps
T437 /workspace/coverage/default/21.sram_ctrl_smoke.610893469 Aug 09 06:43:12 PM PDT 24 Aug 09 06:43:29 PM PDT 24 4572942291 ps
T438 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1413526555 Aug 09 06:49:16 PM PDT 24 Aug 09 06:50:43 PM PDT 24 1590284462 ps
T114 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1944213319 Aug 09 06:41:29 PM PDT 24 Aug 09 06:42:13 PM PDT 24 24464944772 ps
T439 /workspace/coverage/default/16.sram_ctrl_ram_cfg.789725330 Aug 09 06:42:23 PM PDT 24 Aug 09 06:42:27 PM PDT 24 1406854760 ps
T440 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1865726793 Aug 09 06:44:23 PM PDT 24 Aug 09 06:48:11 PM PDT 24 22987089738 ps
T441 /workspace/coverage/default/33.sram_ctrl_partial_access.91522616 Aug 09 06:46:15 PM PDT 24 Aug 09 06:46:22 PM PDT 24 888010189 ps
T442 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2506595156 Aug 09 06:47:59 PM PDT 24 Aug 09 06:48:18 PM PDT 24 431681650 ps
T443 /workspace/coverage/default/24.sram_ctrl_lc_escalation.3928796149 Aug 09 06:44:00 PM PDT 24 Aug 09 06:44:12 PM PDT 24 3557472356 ps
T444 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2922941569 Aug 09 06:46:29 PM PDT 24 Aug 09 06:51:36 PM PDT 24 9686401097 ps
T445 /workspace/coverage/default/43.sram_ctrl_partial_access.1728018801 Aug 09 06:49:27 PM PDT 24 Aug 09 06:50:37 PM PDT 24 1333472005 ps
T446 /workspace/coverage/default/33.sram_ctrl_lc_escalation.671948695 Aug 09 06:46:15 PM PDT 24 Aug 09 06:46:59 PM PDT 24 17221124862 ps
T447 /workspace/coverage/default/39.sram_ctrl_regwen.1801854462 Aug 09 06:48:13 PM PDT 24 Aug 09 06:55:58 PM PDT 24 9350364304 ps
T448 /workspace/coverage/default/43.sram_ctrl_multiple_keys.2417802656 Aug 09 06:49:26 PM PDT 24 Aug 09 07:04:00 PM PDT 24 63778243082 ps
T449 /workspace/coverage/default/47.sram_ctrl_max_throughput.3028046168 Aug 09 06:50:37 PM PDT 24 Aug 09 06:52:37 PM PDT 24 1530947739 ps
T450 /workspace/coverage/default/12.sram_ctrl_partial_access.3024002609 Aug 09 06:41:52 PM PDT 24 Aug 09 06:42:01 PM PDT 24 912396865 ps
T451 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.4002196302 Aug 09 06:42:49 PM PDT 24 Aug 09 06:45:32 PM PDT 24 24531017297 ps
T18 /workspace/coverage/default/1.sram_ctrl_sec_cm.172549662 Aug 09 06:41:13 PM PDT 24 Aug 09 06:41:16 PM PDT 24 1038887313 ps
T452 /workspace/coverage/default/14.sram_ctrl_regwen.1246399502 Aug 09 06:42:00 PM PDT 24 Aug 09 06:42:44 PM PDT 24 10347638484 ps
T453 /workspace/coverage/default/39.sram_ctrl_max_throughput.935393718 Aug 09 06:48:04 PM PDT 24 Aug 09 06:49:25 PM PDT 24 769310720 ps
T454 /workspace/coverage/default/3.sram_ctrl_executable.3012555113 Aug 09 06:41:18 PM PDT 24 Aug 09 07:15:32 PM PDT 24 20673411637 ps
T455 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.3891832140 Aug 09 06:41:13 PM PDT 24 Aug 09 06:55:07 PM PDT 24 14780470464 ps
T456 /workspace/coverage/default/42.sram_ctrl_lc_escalation.2742734580 Aug 09 06:49:16 PM PDT 24 Aug 09 06:49:23 PM PDT 24 3823114250 ps
T457 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1829798808 Aug 09 06:47:08 PM PDT 24 Aug 09 06:48:18 PM PDT 24 15509952725 ps
T458 /workspace/coverage/default/15.sram_ctrl_partial_access.3377136268 Aug 09 06:42:08 PM PDT 24 Aug 09 06:44:10 PM PDT 24 542560045 ps
T459 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.2556142685 Aug 09 06:44:30 PM PDT 24 Aug 09 06:45:39 PM PDT 24 16045040657 ps
T460 /workspace/coverage/default/5.sram_ctrl_alert_test.617148123 Aug 09 06:41:27 PM PDT 24 Aug 09 06:41:28 PM PDT 24 15246842 ps
T461 /workspace/coverage/default/12.sram_ctrl_lc_escalation.749946797 Aug 09 06:41:47 PM PDT 24 Aug 09 06:42:22 PM PDT 24 6439056093 ps
T462 /workspace/coverage/default/31.sram_ctrl_smoke.62914016 Aug 09 06:45:33 PM PDT 24 Aug 09 06:45:42 PM PDT 24 820941282 ps
T463 /workspace/coverage/default/19.sram_ctrl_partial_access.3429997997 Aug 09 06:42:57 PM PDT 24 Aug 09 06:43:04 PM PDT 24 871048095 ps
T464 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.1778270204 Aug 09 06:45:40 PM PDT 24 Aug 09 06:55:34 PM PDT 24 19592567202 ps
T465 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.831722698 Aug 09 06:41:35 PM PDT 24 Aug 09 06:41:45 PM PDT 24 1601823722 ps
T466 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.296399681 Aug 09 06:41:49 PM PDT 24 Aug 09 07:00:58 PM PDT 24 52882453769 ps
T467 /workspace/coverage/default/7.sram_ctrl_executable.797962834 Aug 09 06:41:26 PM PDT 24 Aug 09 07:03:12 PM PDT 24 76802024552 ps
T468 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.4229376013 Aug 09 06:44:15 PM PDT 24 Aug 09 06:44:41 PM PDT 24 722232685 ps
T469 /workspace/coverage/default/8.sram_ctrl_mem_walk.4230370264 Aug 09 06:41:37 PM PDT 24 Aug 09 06:47:34 PM PDT 24 37399748949 ps
T470 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3260132880 Aug 09 06:43:43 PM PDT 24 Aug 09 06:46:53 PM PDT 24 3053308352 ps
T471 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3478500102 Aug 09 06:50:36 PM PDT 24 Aug 09 06:50:47 PM PDT 24 2856286570 ps
T472 /workspace/coverage/default/9.sram_ctrl_partial_access.2797578447 Aug 09 06:41:38 PM PDT 24 Aug 09 06:41:46 PM PDT 24 1130643296 ps
T473 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3158889621 Aug 09 06:43:19 PM PDT 24 Aug 09 06:45:03 PM PDT 24 786681866 ps
T474 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.805119099 Aug 09 06:45:10 PM PDT 24 Aug 09 06:49:53 PM PDT 24 5223139476 ps
T475 /workspace/coverage/default/10.sram_ctrl_smoke.979305285 Aug 09 06:41:36 PM PDT 24 Aug 09 06:41:53 PM PDT 24 1761805476 ps
T476 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.432601963 Aug 09 06:41:46 PM PDT 24 Aug 09 06:44:36 PM PDT 24 18190974550 ps
T477 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.518647138 Aug 09 06:47:48 PM PDT 24 Aug 09 06:51:15 PM PDT 24 7386154126 ps
T478 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3802510353 Aug 09 06:41:53 PM PDT 24 Aug 09 06:42:09 PM PDT 24 364575946 ps
T479 /workspace/coverage/default/44.sram_ctrl_alert_test.3407662750 Aug 09 06:49:59 PM PDT 24 Aug 09 06:49:59 PM PDT 24 45265185 ps
T480 /workspace/coverage/default/27.sram_ctrl_alert_test.3602884015 Aug 09 06:44:45 PM PDT 24 Aug 09 06:44:46 PM PDT 24 13411227 ps
T481 /workspace/coverage/default/0.sram_ctrl_executable.840865782 Aug 09 06:41:03 PM PDT 24 Aug 09 06:49:01 PM PDT 24 3597541407 ps
T482 /workspace/coverage/default/36.sram_ctrl_regwen.3704463571 Aug 09 06:47:01 PM PDT 24 Aug 09 07:02:17 PM PDT 24 6018319660 ps
T483 /workspace/coverage/default/6.sram_ctrl_alert_test.4194300781 Aug 09 06:41:27 PM PDT 24 Aug 09 06:41:28 PM PDT 24 14406520 ps
T484 /workspace/coverage/default/45.sram_ctrl_mem_walk.3648501589 Aug 09 06:50:09 PM PDT 24 Aug 09 06:53:21 PM PDT 24 57687047768 ps
T485 /workspace/coverage/default/12.sram_ctrl_ram_cfg.143875452 Aug 09 06:41:50 PM PDT 24 Aug 09 06:41:54 PM PDT 24 1350592457 ps
T486 /workspace/coverage/default/32.sram_ctrl_partial_access.234356453 Aug 09 06:45:56 PM PDT 24 Aug 09 06:46:12 PM PDT 24 2276855993 ps
T487 /workspace/coverage/default/14.sram_ctrl_executable.3906725122 Aug 09 06:42:00 PM PDT 24 Aug 09 06:56:15 PM PDT 24 15429648601 ps
T93 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.680203423 Aug 09 06:41:44 PM PDT 24 Aug 09 06:44:35 PM PDT 24 10934835995 ps
T488 /workspace/coverage/default/22.sram_ctrl_regwen.612026533 Aug 09 06:43:35 PM PDT 24 Aug 09 07:02:53 PM PDT 24 12866860904 ps
T489 /workspace/coverage/default/30.sram_ctrl_stress_all.693805480 Aug 09 06:45:33 PM PDT 24 Aug 09 08:24:27 PM PDT 24 73003129094 ps
T490 /workspace/coverage/default/40.sram_ctrl_lc_escalation.2591320884 Aug 09 06:48:35 PM PDT 24 Aug 09 06:48:41 PM PDT 24 733999332 ps
T491 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.335476846 Aug 09 06:43:11 PM PDT 24 Aug 09 06:43:38 PM PDT 24 751221730 ps
T492 /workspace/coverage/default/36.sram_ctrl_partial_access.2435742736 Aug 09 06:46:55 PM PDT 24 Aug 09 06:48:56 PM PDT 24 1266213957 ps
T115 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2727251197 Aug 09 06:50:08 PM PDT 24 Aug 09 06:50:35 PM PDT 24 3175280183 ps
T493 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.56716209 Aug 09 06:41:52 PM PDT 24 Aug 09 06:47:30 PM PDT 24 63243160942 ps
T494 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1279725356 Aug 09 06:51:36 PM PDT 24 Aug 09 06:51:44 PM PDT 24 1466011923 ps
T495 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.55195765 Aug 09 06:51:08 PM PDT 24 Aug 09 06:54:56 PM PDT 24 4177148984 ps
T496 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2080372274 Aug 09 06:41:45 PM PDT 24 Aug 09 07:11:07 PM PDT 24 53979565101 ps
T497 /workspace/coverage/default/39.sram_ctrl_partial_access.72233344 Aug 09 06:48:02 PM PDT 24 Aug 09 06:49:46 PM PDT 24 1837229414 ps
T498 /workspace/coverage/default/14.sram_ctrl_ram_cfg.1198395159 Aug 09 06:42:01 PM PDT 24 Aug 09 06:42:05 PM PDT 24 358571146 ps
T499 /workspace/coverage/default/48.sram_ctrl_max_throughput.2489790703 Aug 09 06:51:09 PM PDT 24 Aug 09 06:53:35 PM PDT 24 820016548 ps
T500 /workspace/coverage/default/38.sram_ctrl_partial_access.3524709516 Aug 09 06:47:49 PM PDT 24 Aug 09 06:49:04 PM PDT 24 1070411833 ps
T501 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.1718593464 Aug 09 06:45:34 PM PDT 24 Aug 09 06:53:05 PM PDT 24 6064106950 ps
T502 /workspace/coverage/default/40.sram_ctrl_alert_test.221023664 Aug 09 06:48:47 PM PDT 24 Aug 09 06:48:48 PM PDT 24 26765365 ps
T503 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.60686313 Aug 09 06:50:37 PM PDT 24 Aug 09 06:55:11 PM PDT 24 6070248455 ps
T504 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3854220192 Aug 09 06:46:16 PM PDT 24 Aug 09 06:46:39 PM PDT 24 3390501380 ps
T505 /workspace/coverage/default/34.sram_ctrl_max_throughput.3408614020 Aug 09 06:46:29 PM PDT 24 Aug 09 06:47:08 PM PDT 24 3337676013 ps
T506 /workspace/coverage/default/41.sram_ctrl_multiple_keys.2378044795 Aug 09 06:48:46 PM PDT 24 Aug 09 06:58:00 PM PDT 24 8324626755 ps
T507 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.2149788298 Aug 09 06:45:52 PM PDT 24 Aug 09 06:47:17 PM PDT 24 10989102626 ps
T508 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.286815655 Aug 09 06:47:26 PM PDT 24 Aug 09 06:53:40 PM PDT 24 23724698001 ps
T509 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1642186320 Aug 09 06:41:48 PM PDT 24 Aug 09 06:45:19 PM PDT 24 3026277392 ps
T510 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.528010147 Aug 09 06:50:08 PM PDT 24 Aug 09 06:57:54 PM PDT 24 15126680873 ps
T511 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.534837078 Aug 09 06:41:19 PM PDT 24 Aug 09 06:43:38 PM PDT 24 1597015013 ps
T512 /workspace/coverage/default/25.sram_ctrl_executable.1749691858 Aug 09 06:44:16 PM PDT 24 Aug 09 06:52:16 PM PDT 24 16657184643 ps
T513 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2012728184 Aug 09 06:41:38 PM PDT 24 Aug 09 06:41:47 PM PDT 24 2822021443 ps
T514 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.197524828 Aug 09 06:50:17 PM PDT 24 Aug 09 06:54:59 PM PDT 24 6114341816 ps
T515 /workspace/coverage/default/2.sram_ctrl_mem_walk.2800457894 Aug 09 06:41:14 PM PDT 24 Aug 09 06:44:05 PM PDT 24 10802697710 ps
T516 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3173485790 Aug 09 06:41:12 PM PDT 24 Aug 09 06:42:31 PM PDT 24 3275272318 ps
T517 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.2070278024 Aug 09 06:42:47 PM PDT 24 Aug 09 07:01:01 PM PDT 24 11775222547 ps
T518 /workspace/coverage/default/25.sram_ctrl_partial_access.3103251868 Aug 09 06:44:07 PM PDT 24 Aug 09 06:44:20 PM PDT 24 3531897569 ps
T519 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1047089346 Aug 09 06:46:09 PM PDT 24 Aug 09 06:46:29 PM PDT 24 1451506681 ps
T520 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3951420981 Aug 09 06:42:24 PM PDT 24 Aug 09 06:43:03 PM PDT 24 3461564957 ps
T521 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1145569584 Aug 09 06:43:42 PM PDT 24 Aug 09 06:43:56 PM PDT 24 810489387 ps
T522 /workspace/coverage/default/24.sram_ctrl_partial_access.413839234 Aug 09 06:43:53 PM PDT 24 Aug 09 06:44:13 PM PDT 24 7252179836 ps
T523 /workspace/coverage/default/2.sram_ctrl_lc_escalation.670066738 Aug 09 06:41:10 PM PDT 24 Aug 09 06:42:28 PM PDT 24 13025850125 ps
T524 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3054471140 Aug 09 06:42:38 PM PDT 24 Aug 09 06:43:53 PM PDT 24 2019844004 ps
T525 /workspace/coverage/default/23.sram_ctrl_bijection.2067036752 Aug 09 06:43:42 PM PDT 24 Aug 09 07:03:42 PM PDT 24 317350165498 ps
T526 /workspace/coverage/default/17.sram_ctrl_mem_walk.4291849318 Aug 09 06:42:32 PM PDT 24 Aug 09 06:44:59 PM PDT 24 2744329430 ps
T527 /workspace/coverage/default/29.sram_ctrl_lc_escalation.1874678727 Aug 09 06:45:06 PM PDT 24 Aug 09 06:45:53 PM PDT 24 7928357813 ps
T528 /workspace/coverage/default/30.sram_ctrl_executable.1498628524 Aug 09 06:45:28 PM PDT 24 Aug 09 07:02:08 PM PDT 24 37874150923 ps
T529 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.1455618957 Aug 09 06:42:55 PM PDT 24 Aug 09 06:47:34 PM PDT 24 11614328680 ps
T530 /workspace/coverage/default/29.sram_ctrl_max_throughput.2030602642 Aug 09 06:45:07 PM PDT 24 Aug 09 06:45:28 PM PDT 24 3689293472 ps
T531 /workspace/coverage/default/24.sram_ctrl_stress_all.1215592258 Aug 09 06:44:08 PM PDT 24 Aug 09 07:04:13 PM PDT 24 288519758419 ps
T532 /workspace/coverage/default/21.sram_ctrl_regwen.2630492508 Aug 09 06:43:27 PM PDT 24 Aug 09 06:44:47 PM PDT 24 2134629488 ps
T533 /workspace/coverage/default/30.sram_ctrl_partial_access.2827999252 Aug 09 06:45:21 PM PDT 24 Aug 09 06:45:32 PM PDT 24 519442261 ps
T534 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.283832660 Aug 09 06:51:07 PM PDT 24 Aug 09 06:57:42 PM PDT 24 6124351228 ps
T535 /workspace/coverage/default/15.sram_ctrl_mem_walk.3112374173 Aug 09 06:42:18 PM PDT 24 Aug 09 06:45:11 PM PDT 24 18709133549 ps
T536 /workspace/coverage/default/0.sram_ctrl_max_throughput.3768400368 Aug 09 06:41:06 PM PDT 24 Aug 09 06:41:25 PM PDT 24 711710081 ps
T537 /workspace/coverage/default/36.sram_ctrl_max_throughput.1638177253 Aug 09 06:47:04 PM PDT 24 Aug 09 06:49:00 PM PDT 24 771210017 ps
T538 /workspace/coverage/default/30.sram_ctrl_ram_cfg.866197585 Aug 09 06:45:28 PM PDT 24 Aug 09 06:45:32 PM PDT 24 596179820 ps
T539 /workspace/coverage/default/39.sram_ctrl_bijection.2115009822 Aug 09 06:47:59 PM PDT 24 Aug 09 07:26:28 PM PDT 24 422366363842 ps
T540 /workspace/coverage/default/9.sram_ctrl_alert_test.2132917326 Aug 09 06:41:37 PM PDT 24 Aug 09 06:41:37 PM PDT 24 49386456 ps
T541 /workspace/coverage/default/45.sram_ctrl_bijection.296866271 Aug 09 06:50:08 PM PDT 24 Aug 09 07:16:30 PM PDT 24 94334489883 ps
T542 /workspace/coverage/default/35.sram_ctrl_bijection.816130116 Aug 09 06:46:42 PM PDT 24 Aug 09 06:56:20 PM PDT 24 8206748792 ps
T543 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.601157190 Aug 09 06:49:28 PM PDT 24 Aug 09 06:52:36 PM PDT 24 14923177597 ps
T544 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.4099271337 Aug 09 06:43:29 PM PDT 24 Aug 09 06:44:17 PM PDT 24 779539250 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%