Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4094023095 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.354555663 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4277219910 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3387992062 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1264719624 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3089707933 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4157871495 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1418442335 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1899805911 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.334261548 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3494252543 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3396570572 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.4057717356 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2245960797 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.760865121 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1197111251 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1218328613 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1940666063 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.799079375 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2341913219 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.304476749 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4109507136 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1489854769 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2933252334 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.939059485 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3057692744 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2963247292 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1761189496 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2919691492 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.417616459 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.510634144 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.581601912 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2673813656 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2553525462 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3458848163 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.4033998410 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3452957619 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.939821851 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1937510424 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3143259366 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.999277097 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3188066724 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2064607589 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1392556028 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1203433655 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3713621519 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.642369583 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4110233797 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.586063359 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.837105907 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2583493094 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.269187839 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2627222253 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.224281294 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3053084050 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2634844384 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4024242228 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3305063544 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.726811418 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.349895936 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2860165020 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1919318932 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.676185242 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2152001086 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.176112771 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1705623115 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4122293104 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2581430655 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.650425090 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1153485948 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1336179334 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3082379935 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.175585966 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3023454177 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2777474388 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2010312003 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.617157870 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2588426450 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.859187400 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3117228741 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3855613357 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1183480620 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.732736563 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2650662941 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3417509095 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2863525594 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1233910706 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2028144780 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.671437095 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3297154463 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1383526098 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4045430507 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1051858087 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1551355606 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2345253668 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.538924000 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1060976774 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1707799327 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3206360775 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.322875355 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2237757556 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.387761201 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.349424147 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3485524750 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3457716545 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.852554582 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1609019811 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1860641023 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3536473045 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3340028781 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2053268382 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2659579506 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1891144340 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.157276641 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1334565656 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.619329608 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2865472900 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1385214480 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1659305604 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4172036713 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3519298003 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1383532259 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3353724993 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3188149790 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2578537170 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1825627939 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.661375812 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2846700428 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1800304223 |
/workspace/coverage/default/0.sram_ctrl_bijection.1275129869 |
/workspace/coverage/default/0.sram_ctrl_executable.840865782 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3485805730 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.3768400368 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.226953520 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1665015918 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.169715654 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2495483443 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1877767557 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2431793758 |
/workspace/coverage/default/0.sram_ctrl_regwen.1809416837 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.3202175391 |
/workspace/coverage/default/0.sram_ctrl_smoke.2768692601 |
/workspace/coverage/default/0.sram_ctrl_stress_all.3734299262 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3310585281 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2842334427 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4113290943 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3891832140 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2191478046 |
/workspace/coverage/default/1.sram_ctrl_bijection.1408069345 |
/workspace/coverage/default/1.sram_ctrl_executable.836705474 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1008811286 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1851303238 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4127975150 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3537050943 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.943891405 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2623892199 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3498035694 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3173227260 |
/workspace/coverage/default/1.sram_ctrl_regwen.2794430961 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.172549662 |
/workspace/coverage/default/1.sram_ctrl_smoke.4066523587 |
/workspace/coverage/default/1.sram_ctrl_stress_all.952121152 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.497485079 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2978328341 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3358845354 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2080372274 |
/workspace/coverage/default/10.sram_ctrl_alert_test.836499783 |
/workspace/coverage/default/10.sram_ctrl_bijection.1852255407 |
/workspace/coverage/default/10.sram_ctrl_executable.3989864774 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3504754202 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1364156858 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.63313945 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3393207308 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2289342835 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2657361029 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2366111273 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.4038099658 |
/workspace/coverage/default/10.sram_ctrl_regwen.2740980169 |
/workspace/coverage/default/10.sram_ctrl_smoke.979305285 |
/workspace/coverage/default/10.sram_ctrl_stress_all.2768545245 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.669732379 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.8901988 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2257771873 |
/workspace/coverage/default/11.sram_ctrl_alert_test.1261229171 |
/workspace/coverage/default/11.sram_ctrl_bijection.3152759970 |
/workspace/coverage/default/11.sram_ctrl_executable.3800553646 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.955390099 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1825067408 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2744804831 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1931167019 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1297523475 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1109294986 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4124225475 |
/workspace/coverage/default/11.sram_ctrl_regwen.1075363465 |
/workspace/coverage/default/11.sram_ctrl_smoke.1763140092 |
/workspace/coverage/default/11.sram_ctrl_stress_all.532174343 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3350876128 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1642186320 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2527652516 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.296399681 |
/workspace/coverage/default/12.sram_ctrl_alert_test.3255158036 |
/workspace/coverage/default/12.sram_ctrl_bijection.2045297171 |
/workspace/coverage/default/12.sram_ctrl_executable.4249365363 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.749946797 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.4241346856 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.432601963 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2760709479 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2697569308 |
/workspace/coverage/default/12.sram_ctrl_partial_access.3024002609 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.56716209 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.143875452 |
/workspace/coverage/default/12.sram_ctrl_regwen.1496739461 |
/workspace/coverage/default/12.sram_ctrl_smoke.4212204590 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1692058759 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.119047453 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3760769938 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3683834444 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.2862614948 |
/workspace/coverage/default/13.sram_ctrl_alert_test.231056901 |
/workspace/coverage/default/13.sram_ctrl_bijection.772401510 |
/workspace/coverage/default/13.sram_ctrl_executable.2957099256 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3901239093 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.1903998892 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.304990053 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.1632391282 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.4004716976 |
/workspace/coverage/default/13.sram_ctrl_partial_access.1698344701 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3900777392 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1090048080 |
/workspace/coverage/default/13.sram_ctrl_regwen.2198505140 |
/workspace/coverage/default/13.sram_ctrl_smoke.3893259773 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1464516777 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3802510353 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3742819128 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2448418900 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1855491036 |
/workspace/coverage/default/14.sram_ctrl_alert_test.1625324875 |
/workspace/coverage/default/14.sram_ctrl_bijection.2998791447 |
/workspace/coverage/default/14.sram_ctrl_executable.3906725122 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.4166079841 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2772872484 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.4088244956 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.783004206 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2680445921 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1901350054 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.1198395159 |
/workspace/coverage/default/14.sram_ctrl_regwen.1246399502 |
/workspace/coverage/default/14.sram_ctrl_smoke.1561447410 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3308222377 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.75322563 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2621814572 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1743111428 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2986457625 |
/workspace/coverage/default/15.sram_ctrl_bijection.3400990785 |
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/workspace/coverage/default/44.sram_ctrl_ram_cfg.3450025608 |
/workspace/coverage/default/44.sram_ctrl_regwen.1453109880 |
/workspace/coverage/default/44.sram_ctrl_smoke.150373327 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1722684748 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2692081725 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.726082490 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3583385277 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.528010147 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1579378544 |
/workspace/coverage/default/45.sram_ctrl_bijection.296866271 |
/workspace/coverage/default/45.sram_ctrl_executable.3708743283 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1954699202 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2396181641 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2309655445 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3648501589 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3815511952 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2636274571 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3649183517 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1360827353 |
/workspace/coverage/default/45.sram_ctrl_regwen.3429850104 |
/workspace/coverage/default/45.sram_ctrl_smoke.1701693769 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2727251197 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.16980345 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3485564433 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1932466189 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1635881111 |
/workspace/coverage/default/46.sram_ctrl_bijection.1016142009 |
/workspace/coverage/default/46.sram_ctrl_executable.1342385932 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1788676584 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.60908968 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1382837503 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3392073674 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.303488015 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1060998304 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2129022553 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2889754184 |
/workspace/coverage/default/46.sram_ctrl_regwen.3133501874 |
/workspace/coverage/default/46.sram_ctrl_smoke.307637463 |
/workspace/coverage/default/46.sram_ctrl_stress_all.1767786199 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.197524828 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4117472088 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.60686313 |
/workspace/coverage/default/47.sram_ctrl_alert_test.1148704070 |
/workspace/coverage/default/47.sram_ctrl_bijection.3941650254 |
/workspace/coverage/default/47.sram_ctrl_executable.2115399394 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.4053187883 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.3028046168 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2417207465 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.4215037773 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.206491744 |
/workspace/coverage/default/47.sram_ctrl_partial_access.3580317516 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2393383676 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.604112698 |
/workspace/coverage/default/47.sram_ctrl_regwen.2863242545 |
/workspace/coverage/default/47.sram_ctrl_smoke.1015846541 |
/workspace/coverage/default/47.sram_ctrl_stress_all.3818868878 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3687848030 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.693938101 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3478500102 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2258955006 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1444954593 |
/workspace/coverage/default/48.sram_ctrl_bijection.3321607506 |
/workspace/coverage/default/48.sram_ctrl_executable.1499931092 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3211504985 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2489790703 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3523869252 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.4256254962 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.368520032 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1289330071 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.899414813 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3909664955 |
/workspace/coverage/default/48.sram_ctrl_regwen.200919055 |
/workspace/coverage/default/48.sram_ctrl_smoke.192530039 |
/workspace/coverage/default/48.sram_ctrl_stress_all.2618883100 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.581785576 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2465997047 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3237497785 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3853537491 |
/workspace/coverage/default/49.sram_ctrl_alert_test.2905778406 |
/workspace/coverage/default/49.sram_ctrl_bijection.782796838 |
/workspace/coverage/default/49.sram_ctrl_executable.3260009965 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1448599016 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1137119156 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3223955076 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2040901490 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3352721359 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2397167396 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.55195765 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3440816957 |
/workspace/coverage/default/49.sram_ctrl_regwen.3633184579 |
/workspace/coverage/default/49.sram_ctrl_smoke.410891854 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1279725356 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.283832660 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.603435992 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3648771329 |
/workspace/coverage/default/5.sram_ctrl_alert_test.617148123 |
/workspace/coverage/default/5.sram_ctrl_bijection.1590274021 |
/workspace/coverage/default/5.sram_ctrl_executable.3860468260 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.857990638 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3275750134 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.4000660946 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.326387449 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2399794429 |
/workspace/coverage/default/5.sram_ctrl_partial_access.4039074927 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2508762053 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.427465007 |
/workspace/coverage/default/5.sram_ctrl_regwen.1324389506 |
/workspace/coverage/default/5.sram_ctrl_smoke.2945371698 |
/workspace/coverage/default/5.sram_ctrl_stress_all.1951419308 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1944213319 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.258552587 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4032042051 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3737822377 |
/workspace/coverage/default/6.sram_ctrl_alert_test.4194300781 |
/workspace/coverage/default/6.sram_ctrl_bijection.3948696801 |
/workspace/coverage/default/6.sram_ctrl_executable.2732509712 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2040289215 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.739455069 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3313475738 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.286932206 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2215400524 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3439522837 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2094912325 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3496114817 |
/workspace/coverage/default/6.sram_ctrl_smoke.2112704542 |
/workspace/coverage/default/6.sram_ctrl_stress_all.272995328 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3488893539 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3728566629 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2874497400 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3770665142 |
/workspace/coverage/default/7.sram_ctrl_alert_test.35415003 |
/workspace/coverage/default/7.sram_ctrl_bijection.854367839 |
/workspace/coverage/default/7.sram_ctrl_executable.797962834 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3164351621 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.1154256047 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2884457355 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1952152995 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3214213063 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2063167392 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.849235919 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1813274440 |
/workspace/coverage/default/7.sram_ctrl_regwen.800058317 |
/workspace/coverage/default/7.sram_ctrl_smoke.3833205895 |
/workspace/coverage/default/7.sram_ctrl_stress_all.350882941 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2687217192 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2955011252 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4119433572 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.130176436 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2450818375 |
/workspace/coverage/default/8.sram_ctrl_bijection.1113119179 |
/workspace/coverage/default/8.sram_ctrl_executable.1411372017 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2207568774 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1440421435 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.680203423 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.4230370264 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.476968426 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3584437546 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3333339735 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3164447742 |
/workspace/coverage/default/8.sram_ctrl_regwen.614938028 |
/workspace/coverage/default/8.sram_ctrl_smoke.3007319071 |
/workspace/coverage/default/8.sram_ctrl_stress_all.995061158 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3046495339 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3207615170 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2234941378 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2132917326 |
/workspace/coverage/default/9.sram_ctrl_bijection.3578463245 |
/workspace/coverage/default/9.sram_ctrl_executable.126209210 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3489387659 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.575601517 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3026505273 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.4135625982 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3665452505 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2797578447 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1388082129 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.4185860229 |
/workspace/coverage/default/9.sram_ctrl_regwen.3851983191 |
/workspace/coverage/default/9.sram_ctrl_smoke.3616528827 |
/workspace/coverage/default/9.sram_ctrl_stress_all.2189298842 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.831722698 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3493882895 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2012728184 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.4185860229 |
|
|
Aug 09 06:41:37 PM PDT 24 |
Aug 09 06:41:41 PM PDT 24 |
1688019565 ps |
T2 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.650646883 |
|
|
Aug 09 06:45:01 PM PDT 24 |
Aug 09 06:45:54 PM PDT 24 |
1158921170 ps |
T3 |
/workspace/coverage/default/1.sram_ctrl_regwen.2794430961 |
|
|
Aug 09 06:41:16 PM PDT 24 |
Aug 09 06:50:07 PM PDT 24 |
24699008247 ps |
T4 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.593838204 |
|
|
Aug 09 06:44:07 PM PDT 24 |
Aug 09 06:47:42 PM PDT 24 |
9352834589 ps |
T5 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3392073674 |
|
|
Aug 09 06:50:34 PM PDT 24 |
Aug 09 06:55:45 PM PDT 24 |
14098405488 ps |
T9 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2281804911 |
|
|
Aug 09 06:41:47 PM PDT 24 |
Aug 09 06:41:50 PM PDT 24 |
343298841 ps |
T10 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2220375594 |
|
|
Aug 09 06:45:28 PM PDT 24 |
Aug 09 06:46:54 PM PDT 24 |
2630038313 ps |
T11 |
/workspace/coverage/default/18.sram_ctrl_alert_test.262581870 |
|
|
Aug 09 06:42:49 PM PDT 24 |
Aug 09 06:42:50 PM PDT 24 |
46975040 ps |
T12 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.3681155499 |
|
|
Aug 09 06:44:00 PM PDT 24 |
Aug 09 06:46:22 PM PDT 24 |
16432400520 ps |
T13 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4119433572 |
|
|
Aug 09 06:41:31 PM PDT 24 |
Aug 09 06:42:02 PM PDT 24 |
757039856 ps |
T28 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2660486483 |
|
|
Aug 09 06:47:08 PM PDT 24 |
Aug 09 06:50:01 PM PDT 24 |
9362249041 ps |
T27 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.104949761 |
|
|
Aug 09 06:42:24 PM PDT 24 |
Aug 09 06:42:32 PM PDT 24 |
1128545827 ps |
T31 |
/workspace/coverage/default/24.sram_ctrl_smoke.1867214628 |
|
|
Aug 09 06:43:51 PM PDT 24 |
Aug 09 06:44:12 PM PDT 24 |
12806890326 ps |
T32 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.2955500461 |
|
|
Aug 09 06:46:27 PM PDT 24 |
Aug 09 06:56:49 PM PDT 24 |
33656886277 ps |
T6 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.955390099 |
|
|
Aug 09 06:41:49 PM PDT 24 |
Aug 09 06:42:52 PM PDT 24 |
9173789367 ps |
T20 |
/workspace/coverage/default/45.sram_ctrl_stress_all.892420631 |
|
|
Aug 09 06:50:17 PM PDT 24 |
Aug 09 09:00:56 PM PDT 24 |
80461857464 ps |
T55 |
/workspace/coverage/default/4.sram_ctrl_smoke.2447549082 |
|
|
Aug 09 06:41:18 PM PDT 24 |
Aug 09 06:41:26 PM PDT 24 |
2734938672 ps |
T21 |
/workspace/coverage/default/10.sram_ctrl_stress_all.2768545245 |
|
|
Aug 09 06:41:50 PM PDT 24 |
Aug 09 07:21:26 PM PDT 24 |
68235462468 ps |
T43 |
/workspace/coverage/default/29.sram_ctrl_smoke.760740828 |
|
|
Aug 09 06:45:01 PM PDT 24 |
Aug 09 06:47:19 PM PDT 24 |
3002488193 ps |
T45 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1800304223 |
|
|
Aug 09 06:41:06 PM PDT 24 |
Aug 09 07:06:26 PM PDT 24 |
40306621172 ps |
T44 |
/workspace/coverage/default/26.sram_ctrl_partial_access.2066763474 |
|
|
Aug 09 06:44:23 PM PDT 24 |
Aug 09 06:44:27 PM PDT 24 |
388809719 ps |
T143 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3207615170 |
|
|
Aug 09 06:41:40 PM PDT 24 |
Aug 09 06:42:53 PM PDT 24 |
795266778 ps |
T7 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.857990638 |
|
|
Aug 09 06:41:29 PM PDT 24 |
Aug 09 06:42:40 PM PDT 24 |
31947663416 ps |
T56 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.2678568862 |
|
|
Aug 09 06:46:24 PM PDT 24 |
Aug 09 06:49:08 PM PDT 24 |
14104658645 ps |
T14 |
/workspace/coverage/default/25.sram_ctrl_alert_test.252887007 |
|
|
Aug 09 06:44:15 PM PDT 24 |
Aug 09 06:44:16 PM PDT 24 |
46178189 ps |
T29 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3104408805 |
|
|
Aug 09 06:42:49 PM PDT 24 |
Aug 09 06:43:22 PM PDT 24 |
4220652758 ps |
T142 |
/workspace/coverage/default/41.sram_ctrl_partial_access.1352732936 |
|
|
Aug 09 06:48:57 PM PDT 24 |
Aug 09 06:49:15 PM PDT 24 |
2640049553 ps |
T84 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3439522837 |
|
|
Aug 09 06:41:32 PM PDT 24 |
Aug 09 06:41:40 PM PDT 24 |
2206068605 ps |
T144 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.76002772 |
|
|
Aug 09 06:43:29 PM PDT 24 |
Aug 09 06:46:18 PM PDT 24 |
5881953327 ps |
T85 |
/workspace/coverage/default/27.sram_ctrl_partial_access.860023297 |
|
|
Aug 09 06:44:38 PM PDT 24 |
Aug 09 06:44:44 PM PDT 24 |
2729425483 ps |
T103 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3847110908 |
|
|
Aug 09 06:46:16 PM PDT 24 |
Aug 09 06:49:54 PM PDT 24 |
4314230985 ps |
T145 |
/workspace/coverage/default/26.sram_ctrl_bijection.4114356584 |
|
|
Aug 09 06:44:23 PM PDT 24 |
Aug 09 07:04:53 PM PDT 24 |
50819825556 ps |
T146 |
/workspace/coverage/default/35.sram_ctrl_smoke.1839132238 |
|
|
Aug 09 06:46:43 PM PDT 24 |
Aug 09 06:47:25 PM PDT 24 |
3987012062 ps |
T147 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3584437546 |
|
|
Aug 09 06:41:37 PM PDT 24 |
Aug 09 06:42:34 PM PDT 24 |
770267902 ps |
T46 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2487141285 |
|
|
Aug 09 06:43:59 PM PDT 24 |
Aug 09 06:52:22 PM PDT 24 |
23250256264 ps |
T8 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1788676584 |
|
|
Aug 09 06:50:33 PM PDT 24 |
Aug 09 06:50:39 PM PDT 24 |
2719991369 ps |
T15 |
/workspace/coverage/default/0.sram_ctrl_alert_test.4052780250 |
|
|
Aug 09 06:41:04 PM PDT 24 |
Aug 09 06:41:05 PM PDT 24 |
14816640 ps |
T148 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2063167392 |
|
|
Aug 09 06:41:28 PM PDT 24 |
Aug 09 06:41:52 PM PDT 24 |
7026415755 ps |
T104 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2623211438 |
|
|
Aug 09 06:46:53 PM PDT 24 |
Aug 09 06:50:46 PM PDT 24 |
14664126250 ps |
T33 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3440816957 |
|
|
Aug 09 06:51:17 PM PDT 24 |
Aug 09 06:51:20 PM PDT 24 |
354896214 ps |
T105 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2129022553 |
|
|
Aug 09 06:50:17 PM PDT 24 |
Aug 09 06:54:47 PM PDT 24 |
21067585502 ps |
T16 |
/workspace/coverage/default/31.sram_ctrl_alert_test.3944078782 |
|
|
Aug 09 06:45:47 PM PDT 24 |
Aug 09 06:45:47 PM PDT 24 |
20544325 ps |
T149 |
/workspace/coverage/default/39.sram_ctrl_smoke.2765984880 |
|
|
Aug 09 06:47:58 PM PDT 24 |
Aug 09 06:49:24 PM PDT 24 |
788895458 ps |
T22 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.230267297 |
|
|
Aug 09 06:41:19 PM PDT 24 |
Aug 09 06:42:15 PM PDT 24 |
30568428165 ps |
T72 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1954699202 |
|
|
Aug 09 06:50:09 PM PDT 24 |
Aug 09 06:50:54 PM PDT 24 |
26744956931 ps |
T106 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3442830826 |
|
|
Aug 09 06:48:57 PM PDT 24 |
Aug 09 06:53:00 PM PDT 24 |
40059798066 ps |
T57 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3393207308 |
|
|
Aug 09 06:41:44 PM PDT 24 |
Aug 09 06:47:12 PM PDT 24 |
106132392992 ps |
T150 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.3009872779 |
|
|
Aug 09 06:45:29 PM PDT 24 |
Aug 09 06:47:34 PM PDT 24 |
3872523742 ps |
T151 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.604112698 |
|
|
Aug 09 06:51:06 PM PDT 24 |
Aug 09 06:51:10 PM PDT 24 |
366096840 ps |
T17 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.2838365102 |
|
|
Aug 09 06:41:15 PM PDT 24 |
Aug 09 06:41:17 PM PDT 24 |
1836802742 ps |
T36 |
/workspace/coverage/default/42.sram_ctrl_partial_access.2010257881 |
|
|
Aug 09 06:49:15 PM PDT 24 |
Aug 09 06:49:22 PM PDT 24 |
614778404 ps |
T37 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.1308560126 |
|
|
Aug 09 06:46:00 PM PDT 24 |
Aug 09 06:46:04 PM PDT 24 |
347749978 ps |
T38 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3287201288 |
|
|
Aug 09 06:42:18 PM PDT 24 |
Aug 09 06:42:41 PM PDT 24 |
2899409465 ps |
T39 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.1286214857 |
|
|
Aug 09 06:49:16 PM PDT 24 |
Aug 09 06:49:43 PM PDT 24 |
735126118 ps |
T40 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1489454807 |
|
|
Aug 09 06:44:55 PM PDT 24 |
Aug 09 06:53:57 PM PDT 24 |
66872316909 ps |
T41 |
/workspace/coverage/default/47.sram_ctrl_bijection.3941650254 |
|
|
Aug 09 06:50:37 PM PDT 24 |
Aug 09 07:30:26 PM PDT 24 |
187026769437 ps |
T30 |
/workspace/coverage/default/26.sram_ctrl_regwen.3150095630 |
|
|
Aug 09 06:44:30 PM PDT 24 |
Aug 09 06:53:06 PM PDT 24 |
2725167953 ps |
T23 |
/workspace/coverage/default/49.sram_ctrl_stress_all.358096697 |
|
|
Aug 09 06:51:35 PM PDT 24 |
Aug 09 08:40:51 PM PDT 24 |
579915636329 ps |
T42 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3313475738 |
|
|
Aug 09 06:41:28 PM PDT 24 |
Aug 09 06:43:42 PM PDT 24 |
1579425037 ps |
T116 |
/workspace/coverage/default/28.sram_ctrl_partial_access.398347017 |
|
|
Aug 09 06:44:46 PM PDT 24 |
Aug 09 06:45:57 PM PDT 24 |
854065132 ps |
T117 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.520339226 |
|
|
Aug 09 06:43:27 PM PDT 24 |
Aug 09 06:43:31 PM PDT 24 |
6692844870 ps |
T58 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.2086024770 |
|
|
Aug 09 06:42:57 PM PDT 24 |
Aug 09 06:45:24 PM PDT 24 |
6260954949 ps |
T152 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.1761991888 |
|
|
Aug 09 06:45:20 PM PDT 24 |
Aug 09 07:10:19 PM PDT 24 |
8148215489 ps |
T153 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.3618415060 |
|
|
Aug 09 06:49:49 PM PDT 24 |
Aug 09 06:54:13 PM PDT 24 |
15755608057 ps |
T134 |
/workspace/coverage/default/11.sram_ctrl_executable.3800553646 |
|
|
Aug 09 06:41:47 PM PDT 24 |
Aug 09 06:59:08 PM PDT 24 |
41798759161 ps |
T154 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1289330071 |
|
|
Aug 09 06:51:08 PM PDT 24 |
Aug 09 06:51:22 PM PDT 24 |
1778391230 ps |
T155 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.147465491 |
|
|
Aug 09 06:48:57 PM PDT 24 |
Aug 09 06:49:00 PM PDT 24 |
349926315 ps |
T156 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.1047310468 |
|
|
Aug 09 06:46:17 PM PDT 24 |
Aug 09 06:47:06 PM PDT 24 |
1454757562 ps |
T107 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.4024890001 |
|
|
Aug 09 06:41:13 PM PDT 24 |
Aug 09 06:44:52 PM PDT 24 |
13669066968 ps |
T48 |
/workspace/coverage/default/30.sram_ctrl_regwen.3839829950 |
|
|
Aug 09 06:45:29 PM PDT 24 |
Aug 09 06:48:38 PM PDT 24 |
7035328893 ps |
T59 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1665015918 |
|
|
Aug 09 06:41:07 PM PDT 24 |
Aug 09 06:46:12 PM PDT 24 |
5306969775 ps |
T51 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3049537828 |
|
|
Aug 09 06:44:45 PM PDT 24 |
Aug 09 06:45:55 PM PDT 24 |
1844346483 ps |
T157 |
/workspace/coverage/default/37.sram_ctrl_alert_test.2116031083 |
|
|
Aug 09 06:47:33 PM PDT 24 |
Aug 09 06:47:34 PM PDT 24 |
21796655 ps |
T47 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.4098721713 |
|
|
Aug 09 06:41:12 PM PDT 24 |
Aug 09 06:58:13 PM PDT 24 |
59297718318 ps |
T158 |
/workspace/coverage/default/2.sram_ctrl_alert_test.871351596 |
|
|
Aug 09 06:41:10 PM PDT 24 |
Aug 09 06:41:11 PM PDT 24 |
29293538 ps |
T52 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.2950641988 |
|
|
Aug 09 06:41:11 PM PDT 24 |
Aug 09 06:44:06 PM PDT 24 |
32787259926 ps |
T159 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2657361029 |
|
|
Aug 09 06:41:38 PM PDT 24 |
Aug 09 06:41:46 PM PDT 24 |
811915420 ps |
T141 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2040289215 |
|
|
Aug 09 06:41:29 PM PDT 24 |
Aug 09 06:42:37 PM PDT 24 |
10630611877 ps |
T90 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2884457355 |
|
|
Aug 09 06:41:27 PM PDT 24 |
Aug 09 06:42:46 PM PDT 24 |
52412514389 ps |
T73 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3943410461 |
|
|
Aug 09 06:46:35 PM PDT 24 |
Aug 09 06:47:06 PM PDT 24 |
2380165190 ps |
T160 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.926067611 |
|
|
Aug 09 06:42:55 PM PDT 24 |
Aug 09 07:05:07 PM PDT 24 |
23538382854 ps |
T161 |
/workspace/coverage/default/2.sram_ctrl_bijection.2788655537 |
|
|
Aug 09 06:41:11 PM PDT 24 |
Aug 09 06:51:48 PM PDT 24 |
144896259587 ps |
T54 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3349057107 |
|
|
Aug 09 06:43:43 PM PDT 24 |
Aug 09 06:45:15 PM PDT 24 |
12741756649 ps |
T108 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2876691803 |
|
|
Aug 09 06:43:03 PM PDT 24 |
Aug 09 06:50:00 PM PDT 24 |
16922964330 ps |
T91 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.4117864558 |
|
|
Aug 09 06:45:10 PM PDT 24 |
Aug 09 07:11:02 PM PDT 24 |
38309848942 ps |
T60 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.288905971 |
|
|
Aug 09 06:46:22 PM PDT 24 |
Aug 09 06:48:56 PM PDT 24 |
17306207649 ps |
T132 |
/workspace/coverage/default/10.sram_ctrl_regwen.2740980169 |
|
|
Aug 09 06:41:37 PM PDT 24 |
Aug 09 06:53:46 PM PDT 24 |
2256948672 ps |
T74 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2778080519 |
|
|
Aug 09 06:48:13 PM PDT 24 |
Aug 09 06:48:44 PM PDT 24 |
1739484585 ps |
T162 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.3515865476 |
|
|
Aug 09 06:42:47 PM PDT 24 |
Aug 09 06:42:50 PM PDT 24 |
1540517644 ps |
T163 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4032042051 |
|
|
Aug 09 06:41:27 PM PDT 24 |
Aug 09 06:42:10 PM PDT 24 |
10579431498 ps |
T164 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.1946283431 |
|
|
Aug 09 06:44:23 PM PDT 24 |
Aug 09 06:45:09 PM PDT 24 |
2139635024 ps |
T165 |
/workspace/coverage/default/10.sram_ctrl_bijection.1852255407 |
|
|
Aug 09 06:41:38 PM PDT 24 |
Aug 09 07:19:53 PM PDT 24 |
386765202435 ps |
T166 |
/workspace/coverage/default/12.sram_ctrl_smoke.4212204590 |
|
|
Aug 09 06:41:44 PM PDT 24 |
Aug 09 06:41:50 PM PDT 24 |
471107363 ps |
T167 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2465997047 |
|
|
Aug 09 06:51:08 PM PDT 24 |
Aug 09 06:55:04 PM PDT 24 |
24913877610 ps |
T99 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.827183289 |
|
|
Aug 09 06:44:02 PM PDT 24 |
Aug 09 06:45:07 PM PDT 24 |
1967809301 ps |
T168 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3649183517 |
|
|
Aug 09 06:50:08 PM PDT 24 |
Aug 09 06:52:51 PM PDT 24 |
3482297761 ps |
T169 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1009584562 |
|
|
Aug 09 06:43:50 PM PDT 24 |
Aug 09 06:44:29 PM PDT 24 |
1510680326 ps |
T26 |
/workspace/coverage/default/26.sram_ctrl_stress_all.191905162 |
|
|
Aug 09 06:44:29 PM PDT 24 |
Aug 09 07:45:39 PM PDT 24 |
147755601287 ps |
T61 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.437512340 |
|
|
Aug 09 06:45:48 PM PDT 24 |
Aug 09 06:47:33 PM PDT 24 |
1276011788 ps |
T170 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.1777782041 |
|
|
Aug 09 06:48:27 PM PDT 24 |
Aug 09 06:48:50 PM PDT 24 |
2259010791 ps |
T24 |
/workspace/coverage/default/5.sram_ctrl_regwen.1324389506 |
|
|
Aug 09 06:41:29 PM PDT 24 |
Aug 09 06:50:27 PM PDT 24 |
25759492120 ps |
T171 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.919903207 |
|
|
Aug 09 06:41:15 PM PDT 24 |
Aug 09 06:47:34 PM PDT 24 |
6188568576 ps |
T172 |
/workspace/coverage/default/42.sram_ctrl_bijection.1255473392 |
|
|
Aug 09 06:49:08 PM PDT 24 |
Aug 09 07:07:38 PM PDT 24 |
270512410644 ps |
T118 |
/workspace/coverage/default/29.sram_ctrl_stress_all.1639431777 |
|
|
Aug 09 06:45:14 PM PDT 24 |
Aug 09 07:32:43 PM PDT 24 |
272389971621 ps |
T173 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.4256254962 |
|
|
Aug 09 06:51:10 PM PDT 24 |
Aug 09 06:57:28 PM PDT 24 |
82755014790 ps |
T174 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.566100707 |
|
|
Aug 09 06:48:12 PM PDT 24 |
Aug 09 06:48:16 PM PDT 24 |
710697277 ps |
T175 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.1551505499 |
|
|
Aug 09 06:47:33 PM PDT 24 |
Aug 09 06:47:36 PM PDT 24 |
706281701 ps |
T176 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.1875152539 |
|
|
Aug 09 06:46:09 PM PDT 24 |
Aug 09 06:47:33 PM PDT 24 |
24287190638 ps |
T177 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2093378506 |
|
|
Aug 09 06:41:13 PM PDT 24 |
Aug 09 06:41:24 PM PDT 24 |
760921163 ps |
T178 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.1371955344 |
|
|
Aug 09 06:45:46 PM PDT 24 |
Aug 09 06:48:15 PM PDT 24 |
9147688247 ps |
T179 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.4147980890 |
|
|
Aug 09 06:48:47 PM PDT 24 |
Aug 09 06:54:16 PM PDT 24 |
10719626939 ps |
T180 |
/workspace/coverage/default/17.sram_ctrl_executable.3427611046 |
|
|
Aug 09 06:42:33 PM PDT 24 |
Aug 09 07:04:33 PM PDT 24 |
14549641690 ps |
T181 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.669732379 |
|
|
Aug 09 06:41:44 PM PDT 24 |
Aug 09 06:46:25 PM PDT 24 |
9748636520 ps |
T182 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.435439848 |
|
|
Aug 09 06:43:01 PM PDT 24 |
Aug 09 06:54:39 PM PDT 24 |
92116980795 ps |
T183 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.1712780989 |
|
|
Aug 09 06:43:29 PM PDT 24 |
Aug 09 06:46:16 PM PDT 24 |
13322881928 ps |
T25 |
/workspace/coverage/default/6.sram_ctrl_stress_all.272995328 |
|
|
Aug 09 06:41:32 PM PDT 24 |
Aug 09 09:08:04 PM PDT 24 |
1922058644193 ps |
T184 |
/workspace/coverage/default/5.sram_ctrl_bijection.1590274021 |
|
|
Aug 09 06:41:18 PM PDT 24 |
Aug 09 07:08:47 PM PDT 24 |
94248494765 ps |
T185 |
/workspace/coverage/default/3.sram_ctrl_smoke.871117356 |
|
|
Aug 09 06:41:16 PM PDT 24 |
Aug 09 06:41:28 PM PDT 24 |
544168227 ps |
T186 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.3354326686 |
|
|
Aug 09 06:42:39 PM PDT 24 |
Aug 09 07:11:15 PM PDT 24 |
21680117399 ps |
T187 |
/workspace/coverage/default/46.sram_ctrl_smoke.307637463 |
|
|
Aug 09 06:50:17 PM PDT 24 |
Aug 09 06:52:11 PM PDT 24 |
2575735018 ps |
T62 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3102847047 |
|
|
Aug 09 06:43:35 PM PDT 24 |
Aug 09 06:44:34 PM PDT 24 |
972780306 ps |
T188 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.3327471037 |
|
|
Aug 09 06:43:19 PM PDT 24 |
Aug 09 06:53:51 PM PDT 24 |
38645944692 ps |
T137 |
/workspace/coverage/default/36.sram_ctrl_executable.682047636 |
|
|
Aug 09 06:47:01 PM PDT 24 |
Aug 09 07:13:09 PM PDT 24 |
18664962183 ps |
T189 |
/workspace/coverage/default/28.sram_ctrl_bijection.1536799212 |
|
|
Aug 09 06:44:45 PM PDT 24 |
Aug 09 06:59:21 PM PDT 24 |
39028719416 ps |
T190 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3275750134 |
|
|
Aug 09 06:41:27 PM PDT 24 |
Aug 09 06:41:32 PM PDT 24 |
2659793229 ps |
T191 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.396145857 |
|
|
Aug 09 06:43:44 PM PDT 24 |
Aug 09 07:02:18 PM PDT 24 |
37042757267 ps |
T192 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1476441444 |
|
|
Aug 09 06:48:57 PM PDT 24 |
Aug 09 06:50:12 PM PDT 24 |
829429776 ps |
T135 |
/workspace/coverage/default/6.sram_ctrl_regwen.140156456 |
|
|
Aug 09 06:41:29 PM PDT 24 |
Aug 09 06:53:59 PM PDT 24 |
38648895564 ps |
T193 |
/workspace/coverage/default/18.sram_ctrl_regwen.3020374196 |
|
|
Aug 09 06:42:45 PM PDT 24 |
Aug 09 06:44:05 PM PDT 24 |
9171189207 ps |
T194 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.4159907875 |
|
|
Aug 09 06:42:47 PM PDT 24 |
Aug 09 06:45:36 PM PDT 24 |
15023061346 ps |
T195 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.1903998892 |
|
|
Aug 09 06:41:57 PM PDT 24 |
Aug 09 06:42:07 PM PDT 24 |
711374831 ps |
T196 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.4059010310 |
|
|
Aug 09 06:47:58 PM PDT 24 |
Aug 09 06:48:02 PM PDT 24 |
356751584 ps |
T197 |
/workspace/coverage/default/5.sram_ctrl_smoke.2945371698 |
|
|
Aug 09 06:41:19 PM PDT 24 |
Aug 09 06:41:36 PM PDT 24 |
5865090395 ps |
T198 |
/workspace/coverage/default/40.sram_ctrl_executable.4055785316 |
|
|
Aug 09 06:48:36 PM PDT 24 |
Aug 09 07:06:11 PM PDT 24 |
51979517661 ps |
T199 |
/workspace/coverage/default/35.sram_ctrl_executable.4170293748 |
|
|
Aug 09 06:46:48 PM PDT 24 |
Aug 09 06:57:16 PM PDT 24 |
25918420197 ps |
T200 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1052531581 |
|
|
Aug 09 06:48:25 PM PDT 24 |
Aug 09 06:51:57 PM PDT 24 |
4537239525 ps |
T201 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.803106897 |
|
|
Aug 09 06:45:43 PM PDT 24 |
Aug 09 06:46:14 PM PDT 24 |
5937010241 ps |
T202 |
/workspace/coverage/default/26.sram_ctrl_smoke.3974779788 |
|
|
Aug 09 06:44:23 PM PDT 24 |
Aug 09 06:44:44 PM PDT 24 |
1239885966 ps |
T203 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.4215037773 |
|
|
Aug 09 06:51:06 PM PDT 24 |
Aug 09 06:53:58 PM PDT 24 |
20717467519 ps |
T204 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.1090048080 |
|
|
Aug 09 06:41:52 PM PDT 24 |
Aug 09 06:41:55 PM PDT 24 |
712743690 ps |
T205 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3004981676 |
|
|
Aug 09 06:42:33 PM PDT 24 |
Aug 09 06:50:58 PM PDT 24 |
22143043110 ps |
T206 |
/workspace/coverage/default/0.sram_ctrl_bijection.1275129869 |
|
|
Aug 09 06:40:59 PM PDT 24 |
Aug 09 07:04:08 PM PDT 24 |
20841288608 ps |
T207 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.138061876 |
|
|
Aug 09 06:46:49 PM PDT 24 |
Aug 09 06:49:46 PM PDT 24 |
10797756322 ps |
T208 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.855740509 |
|
|
Aug 09 06:49:58 PM PDT 24 |
Aug 09 06:53:02 PM PDT 24 |
10912696645 ps |
T209 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2397167396 |
|
|
Aug 09 06:51:08 PM PDT 24 |
Aug 09 06:51:16 PM PDT 24 |
732815824 ps |
T210 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.2312131190 |
|
|
Aug 09 06:43:09 PM PDT 24 |
Aug 09 07:09:23 PM PDT 24 |
151698465588 ps |
T211 |
/workspace/coverage/default/46.sram_ctrl_bijection.1016142009 |
|
|
Aug 09 06:50:16 PM PDT 24 |
Aug 09 07:06:09 PM PDT 24 |
200200203780 ps |
T212 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3450025608 |
|
|
Aug 09 06:49:58 PM PDT 24 |
Aug 09 06:50:01 PM PDT 24 |
1409916197 ps |
T213 |
/workspace/coverage/default/3.sram_ctrl_regwen.3669013548 |
|
|
Aug 09 06:41:20 PM PDT 24 |
Aug 09 06:53:37 PM PDT 24 |
9666953989 ps |
T214 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.4238312431 |
|
|
Aug 09 06:45:28 PM PDT 24 |
Aug 09 06:49:51 PM PDT 24 |
3860251651 ps |
T215 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2450818375 |
|
|
Aug 09 06:41:39 PM PDT 24 |
Aug 09 06:41:39 PM PDT 24 |
23345453 ps |
T216 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.3271006747 |
|
|
Aug 09 06:42:10 PM PDT 24 |
Aug 09 06:44:14 PM PDT 24 |
2125147813 ps |
T217 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3237497785 |
|
|
Aug 09 06:51:08 PM PDT 24 |
Aug 09 06:53:26 PM PDT 24 |
5214970427 ps |
T218 |
/workspace/coverage/default/13.sram_ctrl_executable.2957099256 |
|
|
Aug 09 06:41:57 PM PDT 24 |
Aug 09 06:58:25 PM PDT 24 |
35720948787 ps |
T219 |
/workspace/coverage/default/33.sram_ctrl_alert_test.73052435 |
|
|
Aug 09 06:46:22 PM PDT 24 |
Aug 09 06:46:23 PM PDT 24 |
33537094 ps |
T220 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2729802388 |
|
|
Aug 09 06:48:25 PM PDT 24 |
Aug 09 06:48:45 PM PDT 24 |
581627197 ps |
T221 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.820358857 |
|
|
Aug 09 06:41:20 PM PDT 24 |
Aug 09 07:07:29 PM PDT 24 |
19291681351 ps |
T222 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1164141450 |
|
|
Aug 09 06:49:48 PM PDT 24 |
Aug 09 06:50:00 PM PDT 24 |
3728007577 ps |
T223 |
/workspace/coverage/default/30.sram_ctrl_smoke.3379877417 |
|
|
Aug 09 06:45:13 PM PDT 24 |
Aug 09 06:45:22 PM PDT 24 |
7516371863 ps |
T224 |
/workspace/coverage/default/24.sram_ctrl_executable.226613112 |
|
|
Aug 09 06:44:00 PM PDT 24 |
Aug 09 06:51:23 PM PDT 24 |
27306864822 ps |
T225 |
/workspace/coverage/default/0.sram_ctrl_smoke.2768692601 |
|
|
Aug 09 06:40:59 PM PDT 24 |
Aug 09 06:41:34 PM PDT 24 |
986500394 ps |
T226 |
/workspace/coverage/default/3.sram_ctrl_partial_access.171949859 |
|
|
Aug 09 06:41:11 PM PDT 24 |
Aug 09 06:41:23 PM PDT 24 |
1054565196 ps |
T75 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3006727361 |
|
|
Aug 09 06:49:49 PM PDT 24 |
Aug 09 06:50:14 PM PDT 24 |
3389850439 ps |
T227 |
/workspace/coverage/default/34.sram_ctrl_bijection.3878338720 |
|
|
Aug 09 06:46:29 PM PDT 24 |
Aug 09 07:15:59 PM PDT 24 |
819981718165 ps |
T109 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2687217192 |
|
|
Aug 09 06:41:30 PM PDT 24 |
Aug 09 06:41:50 PM PDT 24 |
3240429279 ps |
T228 |
/workspace/coverage/default/42.sram_ctrl_regwen.3531379062 |
|
|
Aug 09 06:49:16 PM PDT 24 |
Aug 09 06:56:15 PM PDT 24 |
9921790709 ps |
T63 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2744804831 |
|
|
Aug 09 06:41:47 PM PDT 24 |
Aug 09 06:43:07 PM PDT 24 |
1406493184 ps |
T229 |
/workspace/coverage/default/15.sram_ctrl_smoke.609187943 |
|
|
Aug 09 06:42:09 PM PDT 24 |
Aug 09 06:42:38 PM PDT 24 |
962542404 ps |
T230 |
/workspace/coverage/default/17.sram_ctrl_smoke.1507467406 |
|
|
Aug 09 06:42:31 PM PDT 24 |
Aug 09 06:42:51 PM PDT 24 |
726845149 ps |
T231 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.497485079 |
|
|
Aug 09 06:41:11 PM PDT 24 |
Aug 09 06:41:29 PM PDT 24 |
422312160 ps |
T232 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2094912325 |
|
|
Aug 09 06:41:25 PM PDT 24 |
Aug 09 06:46:45 PM PDT 24 |
61405642319 ps |
T136 |
/workspace/coverage/default/32.sram_ctrl_stress_all.3466638788 |
|
|
Aug 09 06:46:10 PM PDT 24 |
Aug 09 07:31:14 PM PDT 24 |
43309249094 ps |
T233 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3234838454 |
|
|
Aug 09 06:42:55 PM PDT 24 |
Aug 09 06:50:08 PM PDT 24 |
62419469201 ps |
T234 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.2587905025 |
|
|
Aug 09 06:41:17 PM PDT 24 |
Aug 09 06:41:21 PM PDT 24 |
1352021952 ps |
T235 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2623892199 |
|
|
Aug 09 06:41:05 PM PDT 24 |
Aug 09 06:41:12 PM PDT 24 |
723249880 ps |
T236 |
/workspace/coverage/default/26.sram_ctrl_executable.180249771 |
|
|
Aug 09 06:44:30 PM PDT 24 |
Aug 09 06:51:42 PM PDT 24 |
10009949589 ps |
T237 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.2613560617 |
|
|
Aug 09 06:42:54 PM PDT 24 |
Aug 09 06:43:01 PM PDT 24 |
688917613 ps |
T238 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2495483443 |
|
|
Aug 09 06:41:03 PM PDT 24 |
Aug 09 06:41:27 PM PDT 24 |
1000378209 ps |
T64 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1382837503 |
|
|
Aug 09 06:50:34 PM PDT 24 |
Aug 09 06:53:34 PM PDT 24 |
35075757452 ps |
T239 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.126422307 |
|
|
Aug 09 06:44:53 PM PDT 24 |
Aug 09 06:47:10 PM PDT 24 |
6309190618 ps |
T240 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3710668349 |
|
|
Aug 09 06:43:28 PM PDT 24 |
Aug 09 06:43:36 PM PDT 24 |
762982504 ps |
T241 |
/workspace/coverage/default/47.sram_ctrl_stress_all.3818868878 |
|
|
Aug 09 06:51:07 PM PDT 24 |
Aug 09 08:40:14 PM PDT 24 |
75024954584 ps |
T242 |
/workspace/coverage/default/39.sram_ctrl_stress_all.971889403 |
|
|
Aug 09 06:48:14 PM PDT 24 |
Aug 09 07:48:44 PM PDT 24 |
29872040317 ps |
T243 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.1954288763 |
|
|
Aug 09 06:48:57 PM PDT 24 |
Aug 09 06:49:27 PM PDT 24 |
738459481 ps |
T244 |
/workspace/coverage/default/8.sram_ctrl_executable.1411372017 |
|
|
Aug 09 06:41:44 PM PDT 24 |
Aug 09 06:48:42 PM PDT 24 |
44851008110 ps |
T245 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3979631798 |
|
|
Aug 09 06:44:24 PM PDT 24 |
Aug 09 06:44:47 PM PDT 24 |
728166476 ps |
T246 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2842334427 |
|
|
Aug 09 06:40:58 PM PDT 24 |
Aug 09 06:44:56 PM PDT 24 |
3676657568 ps |
T247 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2416485281 |
|
|
Aug 09 06:42:08 PM PDT 24 |
Aug 09 07:19:32 PM PDT 24 |
156961999680 ps |
T248 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.822890139 |
|
|
Aug 09 06:44:14 PM PDT 24 |
Aug 09 06:49:57 PM PDT 24 |
14397684216 ps |
T249 |
/workspace/coverage/default/18.sram_ctrl_bijection.3972014130 |
|
|
Aug 09 06:42:40 PM PDT 24 |
Aug 09 07:03:47 PM PDT 24 |
18705342781 ps |
T250 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3046495339 |
|
|
Aug 09 06:41:37 PM PDT 24 |
Aug 09 06:46:50 PM PDT 24 |
17107171305 ps |
T251 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.130176436 |
|
|
Aug 09 06:41:36 PM PDT 24 |
Aug 09 06:49:16 PM PDT 24 |
8247390459 ps |
T138 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.856434427 |
|
|
Aug 09 06:41:18 PM PDT 24 |
Aug 09 06:49:22 PM PDT 24 |
22508152080 ps |
T110 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1177657043 |
|
|
Aug 09 06:45:35 PM PDT 24 |
Aug 09 06:45:37 PM PDT 24 |
157196534 ps |
T252 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3496114817 |
|
|
Aug 09 06:41:30 PM PDT 24 |
Aug 09 06:41:34 PM PDT 24 |
351856340 ps |
T253 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1270968294 |
|
|
Aug 09 06:47:50 PM PDT 24 |
Aug 09 06:49:16 PM PDT 24 |
785225283 ps |
T254 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2165515882 |
|
|
Aug 09 06:46:00 PM PDT 24 |
Aug 09 06:57:40 PM PDT 24 |
46935307822 ps |
T255 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3581025661 |
|
|
Aug 09 06:43:20 PM PDT 24 |
Aug 09 06:43:28 PM PDT 24 |
3046575472 ps |
T256 |
/workspace/coverage/default/17.sram_ctrl_regwen.1482793890 |
|
|
Aug 09 06:42:31 PM PDT 24 |
Aug 09 06:42:36 PM PDT 24 |
401680839 ps |
T257 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1060998304 |
|
|
Aug 09 06:50:16 PM PDT 24 |
Aug 09 06:50:42 PM PDT 24 |
774043141 ps |
T258 |
/workspace/coverage/default/2.sram_ctrl_stress_all.2535323662 |
|
|
Aug 09 06:41:11 PM PDT 24 |
Aug 09 08:10:31 PM PDT 24 |
76009146279 ps |
T259 |
/workspace/coverage/default/24.sram_ctrl_bijection.2393087222 |
|
|
Aug 09 06:43:52 PM PDT 24 |
Aug 09 07:19:16 PM PDT 24 |
30496265520 ps |
T260 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2680445921 |
|
|
Aug 09 06:42:01 PM PDT 24 |
Aug 09 06:42:12 PM PDT 24 |
958157783 ps |
T65 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2417207465 |
|
|
Aug 09 06:51:06 PM PDT 24 |
Aug 09 06:53:48 PM PDT 24 |
2468523582 ps |
T261 |
/workspace/coverage/default/35.sram_ctrl_stress_all.2158154044 |
|
|
Aug 09 06:46:55 PM PDT 24 |
Aug 09 08:04:16 PM PDT 24 |
1331020997183 ps |
T262 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2215400524 |
|
|
Aug 09 06:41:28 PM PDT 24 |
Aug 09 06:56:16 PM PDT 24 |
75509410680 ps |
T263 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3352721359 |
|
|
Aug 09 06:51:07 PM PDT 24 |
Aug 09 07:09:36 PM PDT 24 |
19193446920 ps |
T264 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2782289393 |
|
|
Aug 09 06:48:47 PM PDT 24 |
Aug 09 06:48:58 PM PDT 24 |
317519131 ps |
T265 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1952152995 |
|
|
Aug 09 06:41:29 PM PDT 24 |
Aug 09 06:44:30 PM PDT 24 |
28859461158 ps |
T139 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.849235919 |
|
|
Aug 09 06:41:29 PM PDT 24 |
Aug 09 06:50:24 PM PDT 24 |
90278754361 ps |
T266 |
/workspace/coverage/default/7.sram_ctrl_stress_all.350882941 |
|
|
Aug 09 06:41:29 PM PDT 24 |
Aug 09 07:24:25 PM PDT 24 |
192399293649 ps |
T267 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.1626357010 |
|
|
Aug 09 06:44:09 PM PDT 24 |
Aug 09 06:44:29 PM PDT 24 |
1412553822 ps |
T268 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3742819128 |
|
|
Aug 09 06:41:45 PM PDT 24 |
Aug 09 06:45:10 PM PDT 24 |
3704869130 ps |
T269 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.693938101 |
|
|
Aug 09 06:50:37 PM PDT 24 |
Aug 09 06:56:54 PM PDT 24 |
24363476669 ps |
T270 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.386592101 |
|
|
Aug 09 06:44:22 PM PDT 24 |
Aug 09 06:44:49 PM PDT 24 |
20119643428 ps |
T271 |
/workspace/coverage/default/25.sram_ctrl_bijection.298930256 |
|
|
Aug 09 06:44:08 PM PDT 24 |
Aug 09 07:03:13 PM PDT 24 |
16078270736 ps |
T140 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2434476191 |
|
|
Aug 09 06:46:15 PM PDT 24 |
Aug 09 06:52:01 PM PDT 24 |
65940403543 ps |
T272 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1635881111 |
|
|
Aug 09 06:50:35 PM PDT 24 |
Aug 09 06:50:36 PM PDT 24 |
26477615 ps |
T273 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3737822377 |
|
|
Aug 09 06:41:30 PM PDT 24 |
Aug 09 06:49:41 PM PDT 24 |
23146529127 ps |
T49 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1892485914 |
|
|
Aug 09 06:45:16 PM PDT 24 |
Aug 09 06:45:43 PM PDT 24 |
894204913 ps |
T274 |
/workspace/coverage/default/27.sram_ctrl_bijection.472878090 |
|
|
Aug 09 06:44:38 PM PDT 24 |
Aug 09 07:08:49 PM PDT 24 |
79464141307 ps |
T275 |
/workspace/coverage/default/4.sram_ctrl_stress_all.4093851183 |
|
|
Aug 09 06:41:16 PM PDT 24 |
Aug 09 07:51:13 PM PDT 24 |
219442547337 ps |
T276 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1316466949 |
|
|
Aug 09 06:45:21 PM PDT 24 |
Aug 09 06:51:35 PM PDT 24 |
16228750071 ps |
T277 |
/workspace/coverage/default/30.sram_ctrl_alert_test.1940088767 |
|
|
Aug 09 06:45:34 PM PDT 24 |
Aug 09 06:45:34 PM PDT 24 |
12414817 ps |
T278 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.3090561700 |
|
|
Aug 09 06:45:15 PM PDT 24 |
Aug 09 06:45:18 PM PDT 24 |
388457541 ps |
T50 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1422772067 |
|
|
Aug 09 06:42:31 PM PDT 24 |
Aug 09 06:43:05 PM PDT 24 |
2558393938 ps |
T279 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1689839493 |
|
|
Aug 09 06:49:09 PM PDT 24 |
Aug 09 06:49:32 PM PDT 24 |
3564330530 ps |
T280 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1692058759 |
|
|
Aug 09 06:41:50 PM PDT 24 |
Aug 09 08:32:07 PM PDT 24 |
224524052739 ps |
T281 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.934877008 |
|
|
Aug 09 06:46:30 PM PDT 24 |
Aug 09 06:47:21 PM PDT 24 |
777716474 ps |
T282 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.3603662822 |
|
|
Aug 09 06:44:29 PM PDT 24 |
Aug 09 06:44:33 PM PDT 24 |
3708411526 ps |
T283 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.708428065 |
|
|
Aug 09 06:44:02 PM PDT 24 |
Aug 09 06:44:05 PM PDT 24 |
1208745303 ps |
T284 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1819730927 |
|
|
Aug 09 06:44:39 PM PDT 24 |
Aug 09 06:48:40 PM PDT 24 |
11483700580 ps |
T285 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2814863944 |
|
|
Aug 09 06:47:32 PM PDT 24 |
Aug 09 06:48:21 PM PDT 24 |
2648147451 ps |
T286 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1901350054 |
|
|
Aug 09 06:42:00 PM PDT 24 |
Aug 09 06:48:27 PM PDT 24 |
69725795502 ps |
T287 |
/workspace/coverage/default/22.sram_ctrl_smoke.4069533108 |
|
|
Aug 09 06:43:28 PM PDT 24 |
Aug 09 06:43:37 PM PDT 24 |
2083260158 ps |
T288 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.1896368995 |
|
|
Aug 09 06:48:36 PM PDT 24 |
Aug 09 07:06:28 PM PDT 24 |
75116990606 ps |
T289 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.169715654 |
|
|
Aug 09 06:40:59 PM PDT 24 |
Aug 09 06:55:19 PM PDT 24 |
13775338202 ps |
T290 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.899414813 |
|
|
Aug 09 06:51:08 PM PDT 24 |
Aug 09 07:00:18 PM PDT 24 |
21823115649 ps |
T291 |
/workspace/coverage/default/31.sram_ctrl_regwen.3955191926 |
|
|
Aug 09 06:45:40 PM PDT 24 |
Aug 09 06:49:50 PM PDT 24 |
5257497689 ps |
T292 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3223955076 |
|
|
Aug 09 06:51:35 PM PDT 24 |
Aug 09 06:54:25 PM PDT 24 |
20376643527 ps |
T293 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.12536241 |
|
|
Aug 09 06:48:12 PM PDT 24 |
Aug 09 06:48:31 PM PDT 24 |
736020535 ps |
T294 |
/workspace/coverage/default/44.sram_ctrl_regwen.1453109880 |
|
|
Aug 09 06:49:58 PM PDT 24 |
Aug 09 06:54:34 PM PDT 24 |
1901980264 ps |
T295 |
/workspace/coverage/default/23.sram_ctrl_alert_test.3178656154 |
|
|
Aug 09 06:43:53 PM PDT 24 |
Aug 09 06:43:53 PM PDT 24 |
13653260 ps |
T296 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1864563377 |
|
|
Aug 09 06:42:34 PM PDT 24 |
Aug 09 07:02:58 PM PDT 24 |
61533356929 ps |
T297 |
/workspace/coverage/default/24.sram_ctrl_regwen.538907370 |
|
|
Aug 09 06:44:02 PM PDT 24 |
Aug 09 06:50:45 PM PDT 24 |
11596776555 ps |
T298 |
/workspace/coverage/default/31.sram_ctrl_stress_all.3719851963 |
|
|
Aug 09 06:45:49 PM PDT 24 |
Aug 09 07:14:43 PM PDT 24 |
311866674290 ps |
T299 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.4166079841 |
|
|
Aug 09 06:42:00 PM PDT 24 |
Aug 09 06:43:04 PM PDT 24 |
43766775285 ps |
T300 |
/workspace/coverage/default/16.sram_ctrl_bijection.3311218115 |
|
|
Aug 09 06:42:16 PM PDT 24 |
Aug 09 07:10:44 PM PDT 24 |
99706972354 ps |
T301 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2997070270 |
|
|
Aug 09 06:46:36 PM PDT 24 |
Aug 09 06:48:02 PM PDT 24 |
3000593701 ps |
T302 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1931167019 |
|
|
Aug 09 06:41:45 PM PDT 24 |
Aug 09 06:48:18 PM PDT 24 |
39785803868 ps |