| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3622653838 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3186674732 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.8374784 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3149863106 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.285050041 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1466961871 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.177883938 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3646208834 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1018089825 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2639697484 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2779243390 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2402375494 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3666686080 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1401271594 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3001744507 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2602550185 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.828170732 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4232999282 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.765178243 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1114083391 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3311979282 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3202620188 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1990933527 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2772235056 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.168762399 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2837223218 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1040921180 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3264140323 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.623603073 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2350435646 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.297283499 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.372526700 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.247029406 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1055055037 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4108372678 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3458690757 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1887570968 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3119075177 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2362534008 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3055063222 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3259006810 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3085341059 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2555312167 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3673188149 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1777693324 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3149595994 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2437751771 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1715605820 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3823701064 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2139276075 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.142871086 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1337358451 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2089447803 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1682178324 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2536567434 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1897465744 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.765579661 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2907601104 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3684799504 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.4189062632 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.725270275 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2224338445 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1529648402 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1422364763 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.4229906522 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2131215345 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1110072624 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4095471087 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1661793871 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1059321594 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4252933793 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3767053042 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.343756681 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2035378046 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2266009433 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2803071148 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2983695210 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.216323821 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2806389430 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1047545045 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3933479041 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3765874941 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.773144936 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1443568576 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.369640749 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3711417295 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.657254089 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4119403337 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.196358669 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2714147105 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4001958384 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3215339579 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2412322401 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1965590480 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2676257615 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3012811830 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1204966150 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4143684878 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.887346286 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.513737055 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.539932254 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2309605282 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1627206637 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3343101852 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2178413760 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3310606155 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.4282827246 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2820493259 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1937997952 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4058133257 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1079222444 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2475467349 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3145508397 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3658272147 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3538620054 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2931010325 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1681115926 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.4031001853 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2227878281 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.983448444 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2081053905 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4124546748 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3809347138 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.657907312 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3230844564 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2875692737 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1907492197 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4187635663 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3885159642 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.850936491 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.1928270521 |
| /workspace/coverage/default/0.sram_ctrl_bijection.1842014761 |
| /workspace/coverage/default/0.sram_ctrl_executable.4071880118 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.646761695 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.4114997062 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1216513324 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.2055268931 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.934071136 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.3840040071 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2186594963 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.3638466219 |
| /workspace/coverage/default/0.sram_ctrl_regwen.729114256 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.3596915665 |
| /workspace/coverage/default/0.sram_ctrl_smoke.380075673 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.3939380217 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.504532087 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1592237063 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.431898697 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2732839159 |
| /workspace/coverage/default/1.sram_ctrl_bijection.549435798 |
| /workspace/coverage/default/1.sram_ctrl_executable.767948980 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.1915383197 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.888578724 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3346929783 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.1108050236 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.1613338044 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.4237604348 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.430852091 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.2659698060 |
| /workspace/coverage/default/1.sram_ctrl_smoke.20013288 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.3369406915 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2209544720 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1313814441 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.818365574 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2770123957 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.752105670 |
| /workspace/coverage/default/10.sram_ctrl_bijection.412557527 |
| /workspace/coverage/default/10.sram_ctrl_executable.1281128588 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.2708405029 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.4274342409 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2072796453 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.489911031 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.2833018561 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.525800316 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.268824598 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.1614453188 |
| /workspace/coverage/default/10.sram_ctrl_regwen.1034499294 |
| /workspace/coverage/default/10.sram_ctrl_smoke.4052693259 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.1047575894 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3389947044 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.917021209 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4273276694 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3470840836 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.749677119 |
| /workspace/coverage/default/11.sram_ctrl_bijection.2713462640 |
| /workspace/coverage/default/11.sram_ctrl_executable.3612111788 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.3399179221 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.3773473666 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1275258683 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.1235771592 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.3543975615 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.2155004004 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.791199538 |
| /workspace/coverage/default/11.sram_ctrl_regwen.1421977057 |
| /workspace/coverage/default/11.sram_ctrl_smoke.757627169 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.255642384 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.913376159 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.2389658499 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1626680344 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1810454596 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.2161702921 |
| /workspace/coverage/default/12.sram_ctrl_bijection.2220087929 |
| /workspace/coverage/default/12.sram_ctrl_executable.532633467 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.214565279 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.1468750761 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.1067916545 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.3068760203 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.1944450954 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.773235135 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.384280366 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.2271922065 |
| /workspace/coverage/default/12.sram_ctrl_regwen.1047428679 |
| /workspace/coverage/default/12.sram_ctrl_smoke.387698571 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.1731570101 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.488945332 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1756346845 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3793140014 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.755808153 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.3302387657 |
| /workspace/coverage/default/13.sram_ctrl_bijection.529132979 |
| /workspace/coverage/default/13.sram_ctrl_executable.2613163672 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.1497036511 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.3171626847 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.841328965 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.3321520873 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.887200656 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.627354583 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4060796475 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.2838189976 |
| /workspace/coverage/default/13.sram_ctrl_regwen.1393867369 |
| /workspace/coverage/default/13.sram_ctrl_smoke.1447504293 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.422719302 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3953390702 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.522348745 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1467997789 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.298876100 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.102975025 |
| /workspace/coverage/default/14.sram_ctrl_bijection.3715526358 |
| /workspace/coverage/default/14.sram_ctrl_executable.2322836298 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.2314992842 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.89267203 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1335080722 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.3658124255 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.66507543 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.2388821841 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1661221958 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.1043799170 |
| /workspace/coverage/default/14.sram_ctrl_regwen.1757521806 |
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| /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2000715540 |
| /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3652349984 |
| /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3689231647 |
| /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2176657762 |
| /workspace/coverage/default/43.sram_ctrl_alert_test.818015873 |
| /workspace/coverage/default/43.sram_ctrl_bijection.2305669067 |
| /workspace/coverage/default/43.sram_ctrl_executable.600630684 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.2822906400 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.1876954739 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.702404416 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.2953603861 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.508839393 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.1071747733 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2528776601 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.57452898 |
| /workspace/coverage/default/43.sram_ctrl_regwen.1061938668 |
| /workspace/coverage/default/43.sram_ctrl_smoke.1037026740 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.2358163752 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2961458628 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3050268106 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1597116771 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.1696382707 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.1554635470 |
| /workspace/coverage/default/44.sram_ctrl_bijection.3983424083 |
| /workspace/coverage/default/44.sram_ctrl_executable.2274617160 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.3922616278 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.1342149778 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.457111721 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.2636810901 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.2650150342 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.335008663 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.597782144 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.3123886362 |
| /workspace/coverage/default/44.sram_ctrl_regwen.3879266794 |
| /workspace/coverage/default/44.sram_ctrl_smoke.3010830109 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.1166899751 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2813439071 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.416979392 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3329250179 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.2084471873 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.3245379487 |
| /workspace/coverage/default/45.sram_ctrl_bijection.2092074246 |
| /workspace/coverage/default/45.sram_ctrl_executable.1020762317 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.3603100855 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.3361921582 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3898581272 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.146694043 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.1374249927 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1072589604 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.212287151 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.2262153529 |
| /workspace/coverage/default/45.sram_ctrl_regwen.2637083706 |
| /workspace/coverage/default/45.sram_ctrl_smoke.720993213 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.4293939030 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1164911331 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1827755157 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2489207672 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.4055056609 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.3626458504 |
| /workspace/coverage/default/46.sram_ctrl_bijection.4119340610 |
| /workspace/coverage/default/46.sram_ctrl_executable.1401891865 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.3698373115 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.4167873909 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.3494218478 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.1058713029 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.3835693285 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.17121773 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1266092883 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.3783923976 |
| /workspace/coverage/default/46.sram_ctrl_regwen.4142236659 |
| /workspace/coverage/default/46.sram_ctrl_smoke.3942495759 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.750835729 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4222226635 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3861004246 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3860108929 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1434264769 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.3001627468 |
| /workspace/coverage/default/47.sram_ctrl_bijection.3140535246 |
| /workspace/coverage/default/47.sram_ctrl_executable.1488550874 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.1697433404 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.770015885 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3741225911 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.2382927491 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.408920089 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.2050464753 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2986647797 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.298147580 |
| /workspace/coverage/default/47.sram_ctrl_regwen.979663274 |
| /workspace/coverage/default/47.sram_ctrl_smoke.3998721076 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.3807399121 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2873942731 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3465237990 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3013232939 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1194821911 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.3101985445 |
| /workspace/coverage/default/48.sram_ctrl_bijection.942806713 |
| /workspace/coverage/default/48.sram_ctrl_executable.3681479951 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.265783297 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.424950662 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.1198625180 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.2367571317 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.1974322281 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.1528867568 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1374561934 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.3707358022 |
| /workspace/coverage/default/48.sram_ctrl_regwen.3427249571 |
| /workspace/coverage/default/48.sram_ctrl_smoke.3218684211 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4060816239 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.259032762 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3758338664 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.875046104 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.2120509438 |
| /workspace/coverage/default/49.sram_ctrl_bijection.483585865 |
| /workspace/coverage/default/49.sram_ctrl_executable.3636053354 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.2726427119 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.2051889446 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.2903675920 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.3758856057 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.965748206 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.33702592 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2338802460 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.1488370920 |
| /workspace/coverage/default/49.sram_ctrl_regwen.3596206597 |
| /workspace/coverage/default/49.sram_ctrl_smoke.2552175280 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.3483890022 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2766439629 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3343739113 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2120734983 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.1499006880 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.3964794478 |
| /workspace/coverage/default/5.sram_ctrl_bijection.119011108 |
| /workspace/coverage/default/5.sram_ctrl_executable.572251255 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.2506279005 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.2728995071 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3422607485 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.3725521461 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.2290308307 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.1330181987 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.4035607495 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.3723819851 |
| /workspace/coverage/default/5.sram_ctrl_regwen.24051346 |
| /workspace/coverage/default/5.sram_ctrl_smoke.559564185 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.295411959 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2044077097 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.4027177027 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.53185521 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1058518863 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.3313936634 |
| /workspace/coverage/default/6.sram_ctrl_bijection.2271736989 |
| /workspace/coverage/default/6.sram_ctrl_executable.2615361724 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.2963621263 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.666765671 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.421548190 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.3139637890 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1206058580 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.1951437377 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2510497846 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.836836584 |
| /workspace/coverage/default/6.sram_ctrl_regwen.2035784979 |
| /workspace/coverage/default/6.sram_ctrl_smoke.711810046 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.3875032433 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.768269661 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3333083219 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3077476482 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.2098585471 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.572227172 |
| /workspace/coverage/default/7.sram_ctrl_bijection.4147062660 |
| /workspace/coverage/default/7.sram_ctrl_executable.2634070872 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.371697207 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.616481601 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1423973499 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.1961203074 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.3283412111 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.253031172 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.18280994 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.1484414543 |
| /workspace/coverage/default/7.sram_ctrl_regwen.1601034359 |
| /workspace/coverage/default/7.sram_ctrl_smoke.2418285479 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.3037404637 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3720405530 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1780560794 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3922729951 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.201045971 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.518035668 |
| /workspace/coverage/default/8.sram_ctrl_bijection.4122102110 |
| /workspace/coverage/default/8.sram_ctrl_executable.1795858617 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.1621429735 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.868443043 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2064201755 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.3030509710 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.3417428850 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.1786365372 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3104204050 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.1407985939 |
| /workspace/coverage/default/8.sram_ctrl_regwen.1546170047 |
| /workspace/coverage/default/8.sram_ctrl_smoke.946208792 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.4153967581 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.648328550 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.4105674838 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3613761312 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3243253791 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.2827430306 |
| /workspace/coverage/default/9.sram_ctrl_bijection.832517652 |
| /workspace/coverage/default/9.sram_ctrl_executable.1832537865 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.1010739276 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.1445773183 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.268078810 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.872051143 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.2526092288 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.3574879039 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.165739854 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.1766100604 |
| /workspace/coverage/default/9.sram_ctrl_regwen.291471127 |
| /workspace/coverage/default/9.sram_ctrl_smoke.3428459198 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.3911357764 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.183351215 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.3688689639 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3367544710 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/40.sram_ctrl_partial_access.1619054919 |
|
|
Aug 12 05:41:03 PM PDT 24 |
Aug 12 05:42:32 PM PDT 24 |
3604784821 ps |
| T2 |
/workspace/coverage/default/18.sram_ctrl_executable.3350871402 |
|
|
Aug 12 05:39:50 PM PDT 24 |
Aug 12 05:55:00 PM PDT 24 |
31491839232 ps |
| T3 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.638527991 |
|
|
Aug 12 05:40:06 PM PDT 24 |
Aug 12 05:42:56 PM PDT 24 |
10337005541 ps |
| T4 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.3643272452 |
|
|
Aug 12 05:39:43 PM PDT 24 |
Aug 12 05:53:37 PM PDT 24 |
43101063624 ps |
| T8 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2741802206 |
|
|
Aug 12 05:41:01 PM PDT 24 |
Aug 12 05:42:15 PM PDT 24 |
5317670227 ps |
| T9 |
/workspace/coverage/default/12.sram_ctrl_bijection.2220087929 |
|
|
Aug 12 05:40:10 PM PDT 24 |
Aug 12 05:55:08 PM PDT 24 |
37060364219 ps |
| T10 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2089179944 |
|
|
Aug 12 05:39:57 PM PDT 24 |
Aug 12 05:42:47 PM PDT 24 |
3299913208 ps |
| T11 |
/workspace/coverage/default/39.sram_ctrl_executable.1450202161 |
|
|
Aug 12 05:41:02 PM PDT 24 |
Aug 12 05:51:04 PM PDT 24 |
26267029844 ps |
| T12 |
/workspace/coverage/default/46.sram_ctrl_executable.1401891865 |
|
|
Aug 12 05:41:46 PM PDT 24 |
Aug 12 05:46:33 PM PDT 24 |
11500848616 ps |
| T13 |
/workspace/coverage/default/32.sram_ctrl_smoke.2573648982 |
|
|
Aug 12 05:40:29 PM PDT 24 |
Aug 12 05:41:07 PM PDT 24 |
2845166059 ps |
| T44 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.3592258258 |
|
|
Aug 12 05:40:29 PM PDT 24 |
Aug 12 05:45:16 PM PDT 24 |
16501192042 ps |
| T45 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.2128141982 |
|
|
Aug 12 05:40:23 PM PDT 24 |
Aug 12 05:47:49 PM PDT 24 |
61485703999 ps |
| T26 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2703413123 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:40:24 PM PDT 24 |
1072441599 ps |
| T30 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2262153529 |
|
|
Aug 12 05:41:41 PM PDT 24 |
Aug 12 05:41:45 PM PDT 24 |
346164715 ps |
| T29 |
/workspace/coverage/default/11.sram_ctrl_regwen.1421977057 |
|
|
Aug 12 05:39:39 PM PDT 24 |
Aug 12 06:09:16 PM PDT 24 |
20211597345 ps |
| T76 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2786412124 |
|
|
Aug 12 05:40:00 PM PDT 24 |
Aug 12 05:40:08 PM PDT 24 |
703231459 ps |
| T14 |
/workspace/coverage/default/49.sram_ctrl_alert_test.2120509438 |
|
|
Aug 12 05:42:05 PM PDT 24 |
Aug 12 05:42:06 PM PDT 24 |
34160463 ps |
| T77 |
/workspace/coverage/default/29.sram_ctrl_partial_access.1005664525 |
|
|
Aug 12 05:40:09 PM PDT 24 |
Aug 12 05:40:22 PM PDT 24 |
391501535 ps |
| T43 |
/workspace/coverage/default/20.sram_ctrl_partial_access.2133792209 |
|
|
Aug 12 05:40:04 PM PDT 24 |
Aug 12 05:41:14 PM PDT 24 |
4817572388 ps |
| T78 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.408132077 |
|
|
Aug 12 05:41:08 PM PDT 24 |
Aug 12 05:47:13 PM PDT 24 |
13764534363 ps |
| T20 |
/workspace/coverage/default/33.sram_ctrl_regwen.341684716 |
|
|
Aug 12 05:40:33 PM PDT 24 |
Aug 12 06:04:06 PM PDT 24 |
117066576183 ps |
| T28 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.1687857585 |
|
|
Aug 12 05:40:45 PM PDT 24 |
Aug 12 05:45:12 PM PDT 24 |
16412114605 ps |
| T86 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.353612980 |
|
|
Aug 12 05:41:08 PM PDT 24 |
Aug 12 05:43:14 PM PDT 24 |
1602584432 ps |
| T87 |
/workspace/coverage/default/7.sram_ctrl_partial_access.253031172 |
|
|
Aug 12 05:39:17 PM PDT 24 |
Aug 12 05:39:31 PM PDT 24 |
1138328792 ps |
| T21 |
/workspace/coverage/default/42.sram_ctrl_bijection.2234716372 |
|
|
Aug 12 05:41:17 PM PDT 24 |
Aug 12 06:04:50 PM PDT 24 |
221363022301 ps |
| T147 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.3773473666 |
|
|
Aug 12 05:39:24 PM PDT 24 |
Aug 12 05:41:38 PM PDT 24 |
5081308471 ps |
| T27 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.488945332 |
|
|
Aug 12 05:39:23 PM PDT 24 |
Aug 12 05:39:48 PM PDT 24 |
953472833 ps |
| T24 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2437023591 |
|
|
Aug 12 05:39:53 PM PDT 24 |
Aug 12 05:43:06 PM PDT 24 |
3151887698 ps |
| T15 |
/workspace/coverage/default/32.sram_ctrl_alert_test.3615168404 |
|
|
Aug 12 05:40:20 PM PDT 24 |
Aug 12 05:40:21 PM PDT 24 |
33247999 ps |
| T25 |
/workspace/coverage/default/36.sram_ctrl_stress_all.2360934104 |
|
|
Aug 12 05:40:42 PM PDT 24 |
Aug 12 07:50:38 PM PDT 24 |
158719358063 ps |
| T66 |
/workspace/coverage/default/20.sram_ctrl_regwen.820462826 |
|
|
Aug 12 05:39:57 PM PDT 24 |
Aug 12 05:49:15 PM PDT 24 |
11579500203 ps |
| T67 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.4083210820 |
|
|
Aug 12 05:40:09 PM PDT 24 |
Aug 12 05:41:34 PM PDT 24 |
2686513919 ps |
| T68 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2464298125 |
|
|
Aug 12 05:39:11 PM PDT 24 |
Aug 12 05:48:25 PM PDT 24 |
89607653752 ps |
| T69 |
/workspace/coverage/default/7.sram_ctrl_executable.2634070872 |
|
|
Aug 12 05:39:15 PM PDT 24 |
Aug 12 05:55:03 PM PDT 24 |
15763784116 ps |
| T70 |
/workspace/coverage/default/32.sram_ctrl_executable.3284719121 |
|
|
Aug 12 05:40:23 PM PDT 24 |
Aug 12 05:41:45 PM PDT 24 |
15757883644 ps |
| T5 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.1361185134 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:39:59 PM PDT 24 |
3237635893 ps |
| T71 |
/workspace/coverage/default/48.sram_ctrl_smoke.3218684211 |
|
|
Aug 12 05:41:56 PM PDT 24 |
Aug 12 05:42:36 PM PDT 24 |
1715569054 ps |
| T6 |
/workspace/coverage/default/48.sram_ctrl_stress_all.921495288 |
|
|
Aug 12 05:41:55 PM PDT 24 |
Aug 12 07:24:10 PM PDT 24 |
199974448219 ps |
| T148 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.1235092637 |
|
|
Aug 12 05:40:49 PM PDT 24 |
Aug 12 05:41:19 PM PDT 24 |
2836964613 ps |
| T46 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2000715540 |
|
|
Aug 12 05:41:17 PM PDT 24 |
Aug 12 05:41:43 PM PDT 24 |
912329743 ps |
| T16 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2554016790 |
|
|
Aug 12 05:39:35 PM PDT 24 |
Aug 12 05:39:35 PM PDT 24 |
26639739 ps |
| T149 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.1951020492 |
|
|
Aug 12 05:39:49 PM PDT 24 |
Aug 12 06:03:30 PM PDT 24 |
9388878621 ps |
| T56 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2700323265 |
|
|
Aug 12 05:41:01 PM PDT 24 |
Aug 12 05:46:10 PM PDT 24 |
21873792647 ps |
| T150 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.3800257515 |
|
|
Aug 12 05:40:22 PM PDT 24 |
Aug 12 05:42:10 PM PDT 24 |
767479425 ps |
| T105 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1499006880 |
|
|
Aug 12 05:39:16 PM PDT 24 |
Aug 12 05:44:26 PM PDT 24 |
7834570390 ps |
| T151 |
/workspace/coverage/default/5.sram_ctrl_bijection.119011108 |
|
|
Aug 12 05:39:10 PM PDT 24 |
Aug 12 06:23:41 PM PDT 24 |
110474773950 ps |
| T122 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1756346845 |
|
|
Aug 12 05:39:30 PM PDT 24 |
Aug 12 05:45:07 PM PDT 24 |
5030537982 ps |
| T54 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.1828645225 |
|
|
Aug 12 05:39:49 PM PDT 24 |
Aug 12 05:45:27 PM PDT 24 |
21573296151 ps |
| T152 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1467997789 |
|
|
Aug 12 05:39:30 PM PDT 24 |
Aug 12 05:39:37 PM PDT 24 |
2677285224 ps |
| T153 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2388821841 |
|
|
Aug 12 05:39:53 PM PDT 24 |
Aug 12 05:42:15 PM PDT 24 |
2204817742 ps |
| T83 |
/workspace/coverage/default/44.sram_ctrl_regwen.3879266794 |
|
|
Aug 12 05:41:32 PM PDT 24 |
Aug 12 05:46:24 PM PDT 24 |
6131622270 ps |
| T154 |
/workspace/coverage/default/29.sram_ctrl_alert_test.1958013423 |
|
|
Aug 12 05:40:08 PM PDT 24 |
Aug 12 05:40:09 PM PDT 24 |
45545314 ps |
| T84 |
/workspace/coverage/default/32.sram_ctrl_regwen.3422407542 |
|
|
Aug 12 05:40:31 PM PDT 24 |
Aug 12 05:45:07 PM PDT 24 |
1061277617 ps |
| T155 |
/workspace/coverage/default/47.sram_ctrl_bijection.3140535246 |
|
|
Aug 12 05:41:51 PM PDT 24 |
Aug 12 06:20:37 PM PDT 24 |
176908641985 ps |
| T7 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1697433404 |
|
|
Aug 12 05:41:48 PM PDT 24 |
Aug 12 05:42:10 PM PDT 24 |
4623395444 ps |
| T156 |
/workspace/coverage/default/5.sram_ctrl_smoke.559564185 |
|
|
Aug 12 05:39:00 PM PDT 24 |
Aug 12 05:39:16 PM PDT 24 |
1140748494 ps |
| T57 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3720405530 |
|
|
Aug 12 05:39:17 PM PDT 24 |
Aug 12 05:39:44 PM PDT 24 |
4084706159 ps |
| T157 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2161702921 |
|
|
Aug 12 05:39:18 PM PDT 24 |
Aug 12 05:39:18 PM PDT 24 |
14906227 ps |
| T123 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1716392745 |
|
|
Aug 12 05:39:37 PM PDT 24 |
Aug 12 05:45:43 PM PDT 24 |
6412353418 ps |
| T85 |
/workspace/coverage/default/8.sram_ctrl_regwen.1546170047 |
|
|
Aug 12 05:39:47 PM PDT 24 |
Aug 12 05:53:04 PM PDT 24 |
9321905120 ps |
| T106 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.623483569 |
|
|
Aug 12 05:39:02 PM PDT 24 |
Aug 12 05:55:21 PM PDT 24 |
24968429964 ps |
| T144 |
/workspace/coverage/default/15.sram_ctrl_regwen.985742592 |
|
|
Aug 12 05:39:29 PM PDT 24 |
Aug 12 06:09:17 PM PDT 24 |
4867498102 ps |
| T22 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.2314992842 |
|
|
Aug 12 05:39:45 PM PDT 24 |
Aug 12 05:40:05 PM PDT 24 |
5437116662 ps |
| T158 |
/workspace/coverage/default/10.sram_ctrl_partial_access.525800316 |
|
|
Aug 12 05:39:25 PM PDT 24 |
Aug 12 05:40:01 PM PDT 24 |
726980089 ps |
| T159 |
/workspace/coverage/default/10.sram_ctrl_regwen.1034499294 |
|
|
Aug 12 05:39:28 PM PDT 24 |
Aug 12 05:43:06 PM PDT 24 |
6705267626 ps |
| T160 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3329250179 |
|
|
Aug 12 05:41:32 PM PDT 24 |
Aug 12 05:42:50 PM PDT 24 |
809043502 ps |
| T161 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2827430306 |
|
|
Aug 12 05:39:36 PM PDT 24 |
Aug 12 05:39:36 PM PDT 24 |
77151453 ps |
| T124 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2182717072 |
|
|
Aug 12 05:40:44 PM PDT 24 |
Aug 12 05:45:36 PM PDT 24 |
5460547403 ps |
| T162 |
/workspace/coverage/default/5.sram_ctrl_executable.572251255 |
|
|
Aug 12 05:39:16 PM PDT 24 |
Aug 12 05:45:23 PM PDT 24 |
13108210690 ps |
| T125 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1933370630 |
|
|
Aug 12 05:40:08 PM PDT 24 |
Aug 12 05:44:45 PM PDT 24 |
5024636285 ps |
| T126 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.1592573089 |
|
|
Aug 12 05:39:44 PM PDT 24 |
Aug 12 05:45:57 PM PDT 24 |
11851521911 ps |
| T79 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2258522857 |
|
|
Aug 12 05:40:05 PM PDT 24 |
Aug 12 05:42:20 PM PDT 24 |
9996438100 ps |
| T163 |
/workspace/coverage/default/8.sram_ctrl_alert_test.518035668 |
|
|
Aug 12 05:39:15 PM PDT 24 |
Aug 12 05:39:16 PM PDT 24 |
21236888 ps |
| T58 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3068760203 |
|
|
Aug 12 05:39:18 PM PDT 24 |
Aug 12 05:41:54 PM PDT 24 |
4315987596 ps |
| T164 |
/workspace/coverage/default/26.sram_ctrl_executable.1959238568 |
|
|
Aug 12 05:40:04 PM PDT 24 |
Aug 12 05:58:23 PM PDT 24 |
14160371857 ps |
| T23 |
/workspace/coverage/default/21.sram_ctrl_stress_all.386607379 |
|
|
Aug 12 05:39:53 PM PDT 24 |
Aug 12 06:35:36 PM PDT 24 |
47848411761 ps |
| T165 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.1045577717 |
|
|
Aug 12 05:39:54 PM PDT 24 |
Aug 12 05:40:01 PM PDT 24 |
3161522331 ps |
| T17 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.734506351 |
|
|
Aug 12 05:39:04 PM PDT 24 |
Aug 12 05:39:07 PM PDT 24 |
523783330 ps |
| T35 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2057935015 |
|
|
Aug 12 05:40:30 PM PDT 24 |
Aug 12 05:46:09 PM PDT 24 |
11618456809 ps |
| T36 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3722863230 |
|
|
Aug 12 05:39:05 PM PDT 24 |
Aug 12 05:39:05 PM PDT 24 |
105677404 ps |
| T37 |
/workspace/coverage/default/43.sram_ctrl_executable.600630684 |
|
|
Aug 12 05:41:25 PM PDT 24 |
Aug 12 05:45:39 PM PDT 24 |
26262362724 ps |
| T38 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.589970940 |
|
|
Aug 12 05:39:13 PM PDT 24 |
Aug 12 05:45:36 PM PDT 24 |
47313574447 ps |
| T39 |
/workspace/coverage/default/45.sram_ctrl_alert_test.3245379487 |
|
|
Aug 12 05:41:41 PM PDT 24 |
Aug 12 05:41:42 PM PDT 24 |
25006845 ps |
| T40 |
/workspace/coverage/default/34.sram_ctrl_regwen.883466929 |
|
|
Aug 12 05:40:33 PM PDT 24 |
Aug 12 06:12:14 PM PDT 24 |
21790808996 ps |
| T41 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.888578724 |
|
|
Aug 12 05:38:58 PM PDT 24 |
Aug 12 05:39:06 PM PDT 24 |
3059230766 ps |
| T31 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3707358022 |
|
|
Aug 12 05:41:58 PM PDT 24 |
Aug 12 05:42:01 PM PDT 24 |
355310056 ps |
| T42 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.1151492612 |
|
|
Aug 12 05:40:14 PM PDT 24 |
Aug 12 05:41:02 PM PDT 24 |
28403516626 ps |
| T145 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2426291428 |
|
|
Aug 12 05:39:44 PM PDT 24 |
Aug 12 05:46:58 PM PDT 24 |
40025379758 ps |
| T59 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.1336625022 |
|
|
Aug 12 05:40:02 PM PDT 24 |
Aug 12 05:42:55 PM PDT 24 |
27772144477 ps |
| T166 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.1907082287 |
|
|
Aug 12 05:40:10 PM PDT 24 |
Aug 12 05:51:38 PM PDT 24 |
14477421628 ps |
| T167 |
/workspace/coverage/default/44.sram_ctrl_smoke.3010830109 |
|
|
Aug 12 05:41:24 PM PDT 24 |
Aug 12 05:41:28 PM PDT 24 |
838393600 ps |
| T168 |
/workspace/coverage/default/3.sram_ctrl_smoke.2565785279 |
|
|
Aug 12 05:39:41 PM PDT 24 |
Aug 12 05:40:03 PM PDT 24 |
2231092824 ps |
| T169 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.430852091 |
|
|
Aug 12 05:39:04 PM PDT 24 |
Aug 12 05:41:42 PM PDT 24 |
7686910318 ps |
| T170 |
/workspace/coverage/default/1.sram_ctrl_regwen.2707687785 |
|
|
Aug 12 05:39:16 PM PDT 24 |
Aug 12 05:40:23 PM PDT 24 |
5725999734 ps |
| T60 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1961203074 |
|
|
Aug 12 05:39:28 PM PDT 24 |
Aug 12 05:42:22 PM PDT 24 |
22029473507 ps |
| T171 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3548963294 |
|
|
Aug 12 05:41:07 PM PDT 24 |
Aug 12 06:22:26 PM PDT 24 |
332150222956 ps |
| T32 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3469990716 |
|
|
Aug 12 05:39:20 PM PDT 24 |
Aug 12 05:39:23 PM PDT 24 |
348843778 ps |
| T172 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.1708520215 |
|
|
Aug 12 05:39:43 PM PDT 24 |
Aug 12 06:12:03 PM PDT 24 |
18372234715 ps |
| T173 |
/workspace/coverage/default/20.sram_ctrl_smoke.2165000387 |
|
|
Aug 12 05:39:45 PM PDT 24 |
Aug 12 05:40:04 PM PDT 24 |
882967759 ps |
| T174 |
/workspace/coverage/default/49.sram_ctrl_regwen.3596206597 |
|
|
Aug 12 05:42:07 PM PDT 24 |
Aug 12 06:00:54 PM PDT 24 |
13827575888 ps |
| T175 |
/workspace/coverage/default/27.sram_ctrl_partial_access.1524765348 |
|
|
Aug 12 05:39:55 PM PDT 24 |
Aug 12 05:40:14 PM PDT 24 |
896318844 ps |
| T176 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.894614794 |
|
|
Aug 12 05:39:02 PM PDT 24 |
Aug 12 05:40:09 PM PDT 24 |
4695923591 ps |
| T177 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3144616730 |
|
|
Aug 12 05:40:42 PM PDT 24 |
Aug 12 05:42:01 PM PDT 24 |
132888187978 ps |
| T178 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3246765631 |
|
|
Aug 12 05:40:50 PM PDT 24 |
Aug 12 05:41:42 PM PDT 24 |
792316577 ps |
| T179 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.156466511 |
|
|
Aug 12 05:40:23 PM PDT 24 |
Aug 12 05:42:11 PM PDT 24 |
1631584076 ps |
| T146 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1813928310 |
|
|
Aug 12 05:39:58 PM PDT 24 |
Aug 12 05:43:29 PM PDT 24 |
19864110465 ps |
| T61 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1235771592 |
|
|
Aug 12 05:39:38 PM PDT 24 |
Aug 12 05:45:14 PM PDT 24 |
21114160843 ps |
| T180 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.489911031 |
|
|
Aug 12 05:39:26 PM PDT 24 |
Aug 12 05:45:44 PM PDT 24 |
89920848129 ps |
| T181 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.138096942 |
|
|
Aug 12 05:40:11 PM PDT 24 |
Aug 12 05:40:14 PM PDT 24 |
912222912 ps |
| T107 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1058518863 |
|
|
Aug 12 05:39:17 PM PDT 24 |
Aug 12 05:44:20 PM PDT 24 |
42408344469 ps |
| T182 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.1127379161 |
|
|
Aug 12 05:41:07 PM PDT 24 |
Aug 12 05:41:11 PM PDT 24 |
712361993 ps |
| T183 |
/workspace/coverage/default/2.sram_ctrl_alert_test.1945166019 |
|
|
Aug 12 05:39:17 PM PDT 24 |
Aug 12 05:39:18 PM PDT 24 |
49707225 ps |
| T184 |
/workspace/coverage/default/23.sram_ctrl_partial_access.2169516890 |
|
|
Aug 12 05:40:00 PM PDT 24 |
Aug 12 05:42:25 PM PDT 24 |
4183705713 ps |
| T185 |
/workspace/coverage/default/12.sram_ctrl_executable.532633467 |
|
|
Aug 12 05:39:35 PM PDT 24 |
Aug 12 06:08:07 PM PDT 24 |
138134348870 ps |
| T80 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2730655695 |
|
|
Aug 12 05:41:09 PM PDT 24 |
Aug 12 05:41:22 PM PDT 24 |
285900657 ps |
| T186 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.3758856057 |
|
|
Aug 12 05:42:06 PM PDT 24 |
Aug 12 05:47:26 PM PDT 24 |
14410715880 ps |
| T187 |
/workspace/coverage/default/39.sram_ctrl_smoke.2854572741 |
|
|
Aug 12 05:41:02 PM PDT 24 |
Aug 12 05:41:14 PM PDT 24 |
3556305763 ps |
| T188 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1374249927 |
|
|
Aug 12 05:41:31 PM PDT 24 |
Aug 12 05:54:06 PM PDT 24 |
70864194609 ps |
| T189 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1780560794 |
|
|
Aug 12 05:39:13 PM PDT 24 |
Aug 12 05:42:11 PM PDT 24 |
11778008891 ps |
| T131 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3911357764 |
|
|
Aug 12 05:39:24 PM PDT 24 |
Aug 12 06:18:56 PM PDT 24 |
245302835687 ps |
| T190 |
/workspace/coverage/default/23.sram_ctrl_stress_all.1689406116 |
|
|
Aug 12 05:40:00 PM PDT 24 |
Aug 12 07:07:21 PM PDT 24 |
280926604885 ps |
| T191 |
/workspace/coverage/default/20.sram_ctrl_stress_all.3772756755 |
|
|
Aug 12 05:39:48 PM PDT 24 |
Aug 12 06:53:25 PM PDT 24 |
228168187764 ps |
| T192 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3546602891 |
|
|
Aug 12 05:40:04 PM PDT 24 |
Aug 12 05:40:34 PM PDT 24 |
4611661696 ps |
| T193 |
/workspace/coverage/default/13.sram_ctrl_bijection.529132979 |
|
|
Aug 12 05:39:45 PM PDT 24 |
Aug 12 05:55:55 PM PDT 24 |
162992344326 ps |
| T194 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1407985939 |
|
|
Aug 12 05:39:05 PM PDT 24 |
Aug 12 05:39:09 PM PDT 24 |
351838140 ps |
| T195 |
/workspace/coverage/default/33.sram_ctrl_executable.2697081729 |
|
|
Aug 12 05:40:31 PM PDT 24 |
Aug 12 05:41:58 PM PDT 24 |
1033657149 ps |
| T196 |
/workspace/coverage/default/5.sram_ctrl_stress_all.295411959 |
|
|
Aug 12 05:39:25 PM PDT 24 |
Aug 12 06:52:56 PM PDT 24 |
323666088184 ps |
| T197 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.856576051 |
|
|
Aug 12 05:41:10 PM PDT 24 |
Aug 12 05:44:08 PM PDT 24 |
26572571144 ps |
| T198 |
/workspace/coverage/default/37.sram_ctrl_smoke.1724987691 |
|
|
Aug 12 05:40:42 PM PDT 24 |
Aug 12 05:41:01 PM PDT 24 |
2182037209 ps |
| T199 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.1691589853 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:39:55 PM PDT 24 |
1400937429 ps |
| T200 |
/workspace/coverage/default/45.sram_ctrl_regwen.2637083706 |
|
|
Aug 12 05:41:40 PM PDT 24 |
Aug 12 05:55:06 PM PDT 24 |
50588951821 ps |
| T201 |
/workspace/coverage/default/1.sram_ctrl_bijection.549435798 |
|
|
Aug 12 05:39:09 PM PDT 24 |
Aug 12 06:23:47 PM PDT 24 |
165316712658 ps |
| T202 |
/workspace/coverage/default/30.sram_ctrl_partial_access.3016499831 |
|
|
Aug 12 05:40:06 PM PDT 24 |
Aug 12 05:40:15 PM PDT 24 |
1449786956 ps |
| T48 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4060816239 |
|
|
Aug 12 05:41:56 PM PDT 24 |
Aug 12 05:42:24 PM PDT 24 |
3401860323 ps |
| T203 |
/workspace/coverage/default/29.sram_ctrl_bijection.3554815129 |
|
|
Aug 12 05:40:11 PM PDT 24 |
Aug 12 05:52:41 PM PDT 24 |
34142650971 ps |
| T204 |
/workspace/coverage/default/27.sram_ctrl_executable.1682698582 |
|
|
Aug 12 05:39:57 PM PDT 24 |
Aug 12 06:15:04 PM PDT 24 |
20078879617 ps |
| T205 |
/workspace/coverage/default/15.sram_ctrl_partial_access.3510462221 |
|
|
Aug 12 05:39:26 PM PDT 24 |
Aug 12 05:39:45 PM PDT 24 |
1194819252 ps |
| T108 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.833308386 |
|
|
Aug 12 05:39:53 PM PDT 24 |
Aug 12 05:54:30 PM PDT 24 |
8112538660 ps |
| T206 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2367571317 |
|
|
Aug 12 05:41:57 PM PDT 24 |
Aug 12 05:44:51 PM PDT 24 |
28853712492 ps |
| T49 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.1843437088 |
|
|
Aug 12 05:40:43 PM PDT 24 |
Aug 12 05:43:24 PM PDT 24 |
9696139460 ps |
| T207 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.4100134176 |
|
|
Aug 12 05:40:05 PM PDT 24 |
Aug 12 05:42:40 PM PDT 24 |
3128522002 ps |
| T119 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.1731038199 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:41:11 PM PDT 24 |
2545784091 ps |
| T55 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2072796453 |
|
|
Aug 12 05:39:28 PM PDT 24 |
Aug 12 05:40:44 PM PDT 24 |
5747548679 ps |
| T208 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.1343123618 |
|
|
Aug 12 05:39:47 PM PDT 24 |
Aug 12 05:41:16 PM PDT 24 |
47603078786 ps |
| T209 |
/workspace/coverage/default/28.sram_ctrl_smoke.847056980 |
|
|
Aug 12 05:40:04 PM PDT 24 |
Aug 12 05:40:26 PM PDT 24 |
2905454524 ps |
| T210 |
/workspace/coverage/default/7.sram_ctrl_regwen.1601034359 |
|
|
Aug 12 05:39:32 PM PDT 24 |
Aug 12 05:55:16 PM PDT 24 |
42934063119 ps |
| T211 |
/workspace/coverage/default/2.sram_ctrl_stress_all.489410618 |
|
|
Aug 12 05:39:19 PM PDT 24 |
Aug 12 08:00:47 PM PDT 24 |
200620902969 ps |
| T212 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1537266443 |
|
|
Aug 12 05:40:07 PM PDT 24 |
Aug 12 05:45:39 PM PDT 24 |
21433745267 ps |
| T213 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.834260233 |
|
|
Aug 12 05:39:28 PM PDT 24 |
Aug 12 05:41:06 PM PDT 24 |
1650998712 ps |
| T214 |
/workspace/coverage/default/40.sram_ctrl_alert_test.1441144699 |
|
|
Aug 12 05:41:09 PM PDT 24 |
Aug 12 05:41:09 PM PDT 24 |
18626180 ps |
| T215 |
/workspace/coverage/default/20.sram_ctrl_bijection.824824073 |
|
|
Aug 12 05:41:34 PM PDT 24 |
Aug 12 05:58:37 PM PDT 24 |
53779611022 ps |
| T216 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.2623114870 |
|
|
Aug 12 05:40:35 PM PDT 24 |
Aug 12 05:42:23 PM PDT 24 |
61949539508 ps |
| T217 |
/workspace/coverage/default/12.sram_ctrl_partial_access.773235135 |
|
|
Aug 12 05:39:22 PM PDT 24 |
Aug 12 05:39:39 PM PDT 24 |
875215058 ps |
| T218 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.586204073 |
|
|
Aug 12 05:40:46 PM PDT 24 |
Aug 12 05:41:10 PM PDT 24 |
1464894845 ps |
| T219 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.562305425 |
|
|
Aug 12 05:39:43 PM PDT 24 |
Aug 12 05:39:53 PM PDT 24 |
10211658512 ps |
| T220 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.2823685744 |
|
|
Aug 12 05:39:00 PM PDT 24 |
Aug 12 05:41:44 PM PDT 24 |
3231721985 ps |
| T221 |
/workspace/coverage/default/42.sram_ctrl_alert_test.606965885 |
|
|
Aug 12 05:41:15 PM PDT 24 |
Aug 12 05:41:16 PM PDT 24 |
29001977 ps |
| T222 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.1758739540 |
|
|
Aug 12 05:40:00 PM PDT 24 |
Aug 12 06:00:59 PM PDT 24 |
42841059558 ps |
| T223 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.260773625 |
|
|
Aug 12 05:40:45 PM PDT 24 |
Aug 12 05:40:48 PM PDT 24 |
363626313 ps |
| T224 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.477622292 |
|
|
Aug 12 05:39:29 PM PDT 24 |
Aug 12 05:59:24 PM PDT 24 |
29273122309 ps |
| T225 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.4167873909 |
|
|
Aug 12 05:41:41 PM PDT 24 |
Aug 12 05:43:17 PM PDT 24 |
981798588 ps |
| T226 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.309696293 |
|
|
Aug 12 05:40:32 PM PDT 24 |
Aug 12 05:47:55 PM PDT 24 |
11209470914 ps |
| T227 |
/workspace/coverage/default/3.sram_ctrl_regwen.512977412 |
|
|
Aug 12 05:39:18 PM PDT 24 |
Aug 12 05:45:04 PM PDT 24 |
1169592655 ps |
| T228 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2128684455 |
|
|
Aug 12 05:39:55 PM PDT 24 |
Aug 12 05:42:46 PM PDT 24 |
784726487 ps |
| T229 |
/workspace/coverage/default/0.sram_ctrl_bijection.1842014761 |
|
|
Aug 12 05:39:11 PM PDT 24 |
Aug 12 05:58:48 PM PDT 24 |
32135122338 ps |
| T230 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.2728995071 |
|
|
Aug 12 05:39:25 PM PDT 24 |
Aug 12 05:39:39 PM PDT 24 |
710370414 ps |
| T231 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3922729951 |
|
|
Aug 12 05:39:10 PM PDT 24 |
Aug 12 05:39:42 PM PDT 24 |
1479399469 ps |
| T232 |
/workspace/coverage/default/11.sram_ctrl_executable.3612111788 |
|
|
Aug 12 05:39:48 PM PDT 24 |
Aug 12 05:49:39 PM PDT 24 |
68536406625 ps |
| T233 |
/workspace/coverage/default/43.sram_ctrl_stress_all.2358163752 |
|
|
Aug 12 05:41:24 PM PDT 24 |
Aug 12 07:19:53 PM PDT 24 |
175040013046 ps |
| T234 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.3366328047 |
|
|
Aug 12 05:40:10 PM PDT 24 |
Aug 12 05:41:47 PM PDT 24 |
3140287209 ps |
| T235 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.2547289210 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:59:23 PM PDT 24 |
57638337918 ps |
| T236 |
/workspace/coverage/default/18.sram_ctrl_regwen.1193293745 |
|
|
Aug 12 05:39:39 PM PDT 24 |
Aug 12 05:54:07 PM PDT 24 |
2684881899 ps |
| T237 |
/workspace/coverage/default/42.sram_ctrl_executable.3031468662 |
|
|
Aug 12 05:41:16 PM PDT 24 |
Aug 12 06:01:54 PM PDT 24 |
25186552352 ps |
| T238 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2978069381 |
|
|
Aug 12 05:40:18 PM PDT 24 |
Aug 12 05:40:31 PM PDT 24 |
2786299913 ps |
| T239 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.508220785 |
|
|
Aug 12 05:39:54 PM PDT 24 |
Aug 12 05:39:58 PM PDT 24 |
709342605 ps |
| T240 |
/workspace/coverage/default/19.sram_ctrl_partial_access.101303602 |
|
|
Aug 12 05:39:59 PM PDT 24 |
Aug 12 05:40:20 PM PDT 24 |
3115712911 ps |
| T241 |
/workspace/coverage/default/34.sram_ctrl_alert_test.3237753646 |
|
|
Aug 12 05:40:35 PM PDT 24 |
Aug 12 05:40:36 PM PDT 24 |
36586159 ps |
| T242 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.4114997062 |
|
|
Aug 12 05:38:59 PM PDT 24 |
Aug 12 05:41:02 PM PDT 24 |
3145019957 ps |
| T243 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3652349984 |
|
|
Aug 12 05:41:16 PM PDT 24 |
Aug 12 05:44:44 PM PDT 24 |
11709385262 ps |
| T244 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.18280994 |
|
|
Aug 12 05:39:15 PM PDT 24 |
Aug 12 05:44:51 PM PDT 24 |
27788632616 ps |
| T52 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.820988607 |
|
|
Aug 12 05:40:05 PM PDT 24 |
Aug 12 05:42:54 PM PDT 24 |
5892510325 ps |
| T245 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.328550882 |
|
|
Aug 12 05:40:10 PM PDT 24 |
Aug 12 05:46:02 PM PDT 24 |
4489070954 ps |
| T246 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.1986055577 |
|
|
Aug 12 05:41:17 PM PDT 24 |
Aug 12 05:44:13 PM PDT 24 |
10679444885 ps |
| T247 |
/workspace/coverage/default/46.sram_ctrl_alert_test.3626458504 |
|
|
Aug 12 05:41:48 PM PDT 24 |
Aug 12 05:41:49 PM PDT 24 |
20516796 ps |
| T248 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.1279375049 |
|
|
Aug 12 05:40:31 PM PDT 24 |
Aug 12 05:40:35 PM PDT 24 |
1408196105 ps |
| T249 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.3225524964 |
|
|
Aug 12 05:40:08 PM PDT 24 |
Aug 12 05:43:04 PM PDT 24 |
10549118005 ps |
| T250 |
/workspace/coverage/default/17.sram_ctrl_smoke.727710406 |
|
|
Aug 12 05:40:00 PM PDT 24 |
Aug 12 05:40:16 PM PDT 24 |
1652303356 ps |
| T251 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.207209493 |
|
|
Aug 12 05:40:35 PM PDT 24 |
Aug 12 05:45:16 PM PDT 24 |
170488510496 ps |
| T252 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1528867568 |
|
|
Aug 12 05:41:57 PM PDT 24 |
Aug 12 05:42:21 PM PDT 24 |
3029531185 ps |
| T81 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1067952960 |
|
|
Aug 12 05:39:18 PM PDT 24 |
Aug 12 05:39:54 PM PDT 24 |
5119613002 ps |
| T253 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1682527693 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:49:05 PM PDT 24 |
30774520710 ps |
| T254 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3125030357 |
|
|
Aug 12 05:39:44 PM PDT 24 |
Aug 12 06:02:59 PM PDT 24 |
65980509520 ps |
| T255 |
/workspace/coverage/default/37.sram_ctrl_bijection.2887653640 |
|
|
Aug 12 05:40:48 PM PDT 24 |
Aug 12 06:09:57 PM PDT 24 |
93608713562 ps |
| T256 |
/workspace/coverage/default/32.sram_ctrl_bijection.2348418553 |
|
|
Aug 12 05:40:20 PM PDT 24 |
Aug 12 06:12:33 PM PDT 24 |
27397232940 ps |
| T257 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3922616278 |
|
|
Aug 12 05:41:31 PM PDT 24 |
Aug 12 05:42:26 PM PDT 24 |
10054851103 ps |
| T258 |
/workspace/coverage/default/38.sram_ctrl_regwen.4041051961 |
|
|
Aug 12 05:40:53 PM PDT 24 |
Aug 12 05:44:07 PM PDT 24 |
1908388665 ps |
| T259 |
/workspace/coverage/default/47.sram_ctrl_regwen.979663274 |
|
|
Aug 12 05:41:49 PM PDT 24 |
Aug 12 06:09:36 PM PDT 24 |
23910433048 ps |
| T260 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2493647410 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:40:29 PM PDT 24 |
1409669567 ps |
| T261 |
/workspace/coverage/default/43.sram_ctrl_alert_test.818015873 |
|
|
Aug 12 05:41:24 PM PDT 24 |
Aug 12 05:41:25 PM PDT 24 |
25513379 ps |
| T262 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.3363700798 |
|
|
Aug 12 05:39:38 PM PDT 24 |
Aug 12 05:40:15 PM PDT 24 |
722394164 ps |
| T263 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.389330480 |
|
|
Aug 12 05:39:47 PM PDT 24 |
Aug 12 05:39:50 PM PDT 24 |
539630851 ps |
| T264 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1928270521 |
|
|
Aug 12 05:39:02 PM PDT 24 |
Aug 12 05:39:03 PM PDT 24 |
62969625 ps |
| T265 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.582589139 |
|
|
Aug 12 05:39:17 PM PDT 24 |
Aug 12 06:00:47 PM PDT 24 |
12417131531 ps |
| T132 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.3455253078 |
|
|
Aug 12 05:40:02 PM PDT 24 |
Aug 12 05:41:25 PM PDT 24 |
51677134746 ps |
| T266 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2118408678 |
|
|
Aug 12 05:40:59 PM PDT 24 |
Aug 12 05:41:33 PM PDT 24 |
6692868235 ps |
| T82 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2873942731 |
|
|
Aug 12 05:41:49 PM PDT 24 |
Aug 12 05:41:59 PM PDT 24 |
1925399163 ps |
| T53 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1423973499 |
|
|
Aug 12 05:39:20 PM PDT 24 |
Aug 12 05:40:49 PM PDT 24 |
11939626509 ps |
| T267 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.4027177027 |
|
|
Aug 12 05:39:36 PM PDT 24 |
Aug 12 05:42:15 PM PDT 24 |
5234823853 ps |
| T268 |
/workspace/coverage/default/18.sram_ctrl_stress_all.3112478182 |
|
|
Aug 12 05:40:05 PM PDT 24 |
Aug 12 07:34:32 PM PDT 24 |
301147871080 ps |
| T269 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2787185764 |
|
|
Aug 12 05:39:51 PM PDT 24 |
Aug 12 06:28:35 PM PDT 24 |
63998546078 ps |
| T270 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.495767055 |
|
|
Aug 12 05:39:54 PM PDT 24 |
Aug 12 05:44:45 PM PDT 24 |
22342095626 ps |
| T62 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1275258683 |
|
|
Aug 12 05:39:38 PM PDT 24 |
Aug 12 05:41:06 PM PDT 24 |
12862529485 ps |
| T271 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.1065117987 |
|
|
Aug 12 05:39:59 PM PDT 24 |
Aug 12 05:42:56 PM PDT 24 |
52684841302 ps |
| T63 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2974749261 |
|
|
Aug 12 05:40:19 PM PDT 24 |
Aug 12 05:41:47 PM PDT 24 |
3078029534 ps |
| T272 |
/workspace/coverage/default/47.sram_ctrl_smoke.3998721076 |
|
|
Aug 12 05:41:48 PM PDT 24 |
Aug 12 05:43:56 PM PDT 24 |
3690836311 ps |
| T273 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.2012232479 |
|
|
Aug 12 05:40:01 PM PDT 24 |
Aug 12 05:42:56 PM PDT 24 |
44779977765 ps |
| T274 |
/workspace/coverage/default/33.sram_ctrl_alert_test.1362162665 |
|
|
Aug 12 05:40:32 PM PDT 24 |
Aug 12 05:40:33 PM PDT 24 |
22223709 ps |
| T275 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.3643576340 |
|
|
Aug 12 05:40:45 PM PDT 24 |
Aug 12 06:08:25 PM PDT 24 |
100993429070 ps |
| T276 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1266092883 |
|
|
Aug 12 05:41:40 PM PDT 24 |
Aug 12 05:49:21 PM PDT 24 |
21811411620 ps |
| T277 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.1172493027 |
|
|
Aug 12 05:39:46 PM PDT 24 |
Aug 12 05:42:21 PM PDT 24 |
7002524593 ps |
| T278 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2120734983 |
|
|
Aug 12 05:42:07 PM PDT 24 |
Aug 12 05:42:18 PM PDT 24 |
713941963 ps |
| T279 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2209544720 |
|
|
Aug 12 05:39:14 PM PDT 24 |
Aug 12 05:40:03 PM PDT 24 |
1860989716 ps |
| T280 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1216513324 |
|
|
Aug 12 05:39:01 PM PDT 24 |
Aug 12 05:40:05 PM PDT 24 |
1922958937 ps |
| T281 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3603100855 |
|
|
Aug 12 05:41:31 PM PDT 24 |
Aug 12 05:42:22 PM PDT 24 |
18568074760 ps |
| T282 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.1454783219 |
|
|
Aug 12 05:41:00 PM PDT 24 |
Aug 12 06:03:15 PM PDT 24 |
25387871340 ps |
| T283 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.3276382693 |
|
|
Aug 12 05:40:37 PM PDT 24 |
Aug 12 06:11:46 PM PDT 24 |
88891459776 ps |
| T284 |
/workspace/coverage/default/4.sram_ctrl_stress_all.232720437 |
|
|
Aug 12 05:39:22 PM PDT 24 |
Aug 12 06:58:34 PM PDT 24 |
227061966644 ps |
| T285 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3053094821 |
|
|
Aug 12 05:40:45 PM PDT 24 |
Aug 12 05:40:52 PM PDT 24 |
688526822 ps |
| T286 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2967768236 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:39:57 PM PDT 24 |
1460329741 ps |
| T287 |
/workspace/coverage/default/25.sram_ctrl_alert_test.3765815298 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:39:52 PM PDT 24 |
23871310 ps |
| T288 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3317171162 |
|
|
Aug 12 05:40:47 PM PDT 24 |
Aug 12 06:02:23 PM PDT 24 |
63311481229 ps |
| T289 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2084471873 |
|
|
Aug 12 05:41:33 PM PDT 24 |
Aug 12 05:49:28 PM PDT 24 |
6640279044 ps |
| T290 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.502530315 |
|
|
Aug 12 05:40:59 PM PDT 24 |
Aug 12 05:45:39 PM PDT 24 |
30466162337 ps |
| T291 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3407035201 |
|
|
Aug 12 05:40:44 PM PDT 24 |
Aug 12 05:41:37 PM PDT 24 |
1541948046 ps |
| T292 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2074336356 |
|
|
Aug 12 05:39:53 PM PDT 24 |
Aug 12 05:41:01 PM PDT 24 |
1949355078 ps |
| T293 |
/workspace/coverage/default/30.sram_ctrl_bijection.1928013226 |
|
|
Aug 12 05:40:10 PM PDT 24 |
Aug 12 06:17:09 PM PDT 24 |
203234068506 ps |
| T294 |
/workspace/coverage/default/1.sram_ctrl_partial_access.4237604348 |
|
|
Aug 12 05:39:10 PM PDT 24 |
Aug 12 05:39:25 PM PDT 24 |
2843203537 ps |
| T295 |
/workspace/coverage/default/36.sram_ctrl_smoke.754577849 |
|
|
Aug 12 05:40:45 PM PDT 24 |
Aug 12 05:41:02 PM PDT 24 |
2439509506 ps |
| T296 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.1475058865 |
|
|
Aug 12 05:39:52 PM PDT 24 |
Aug 12 05:46:16 PM PDT 24 |
86597190448 ps |
| T297 |
/workspace/coverage/default/9.sram_ctrl_executable.1832537865 |
|
|
Aug 12 05:39:34 PM PDT 24 |
Aug 12 05:40:03 PM PDT 24 |
3214811154 ps |
| T298 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3483890022 |
|
|
Aug 12 05:42:07 PM PDT 24 |
Aug 12 07:48:44 PM PDT 24 |
179969304689 ps |
| T299 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1206058580 |
|
|
Aug 12 05:39:19 PM PDT 24 |
Aug 12 05:46:56 PM PDT 24 |
5758577179 ps |
| T300 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.504532087 |
|
|
Aug 12 05:39:06 PM PDT 24 |
Aug 12 05:39:30 PM PDT 24 |
2315822459 ps |
| T301 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3283412111 |
|
|
Aug 12 05:39:20 PM PDT 24 |
Aug 12 05:46:57 PM PDT 24 |
13027247579 ps |
| T302 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.354004416 |
|
|
Aug 12 05:39:39 PM PDT 24 |
Aug 12 05:43:54 PM PDT 24 |
8215074795 ps |
| T303 |
/workspace/coverage/default/17.sram_ctrl_executable.2982687631 |
|
|
Aug 12 05:39:55 PM PDT 24 |
Aug 12 05:55:42 PM PDT 24 |
71386954961 ps |
| T304 |
/workspace/coverage/default/45.sram_ctrl_bijection.2092074246 |
|
|
Aug 12 05:41:31 PM PDT 24 |
Aug 12 05:53:07 PM PDT 24 |
18654099228 ps |
| T305 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.841328965 |
|
|
Aug 12 05:39:29 PM PDT 24 |
Aug 12 05:40:51 PM PDT 24 |
2745043561 ps |
| T306 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1072589604 |
|
|
Aug 12 05:41:31 PM PDT 24 |
Aug 12 05:41:37 PM PDT 24 |
744459792 ps |
| T307 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.666765671 |
|
|
Aug 12 05:39:40 PM PDT 24 |
Aug 12 05:39:49 PM PDT 24 |
6158691301 ps |