Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15691035	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

162380884

1

T1

160609

T2

6925

T3

40267

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	87700709	1			T1	88758		T2	4303		T3	110713
values[0x0]	43623530	1			T1	42269		T2	2004		T3	36966
values[0x1]	46747680	1			T1	45750		T2	2214		T3	73164

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7984558	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

170087361

1

T1

168739

T2

7723

T3

130853

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	604468	1			T1	219		T3	878		T4	443
valid_sources[0x01]	601554	1			T1	33		T3	810		T4	413
valid_sources[0x02]	692363	1			T1	358		T3	800		T4	458
valid_sources[0x03]	598482	1			T1	303		T3	856		T4	436
valid_sources[0x04]	608629	1			T1	147		T3	861		T4	432
valid_sources[0x05]	591203	1			T1	382		T3	855		T4	448
valid_sources[0x06]	591085	1			T1	115		T3	858		T4	435
valid_sources[0x07]	601084	1			T3	867		T4	388		T8	376
valid_sources[0x08]	2178433	1			T3	848		T4	450		T8	390
valid_sources[0x09]	624235	1			T1	3574		T3	854		T4	455
valid_sources[0x0a]	579570	1			T1	34		T3	866		T4	405
valid_sources[0x0b]	657456	1			T1	1170		T3	899		T4	448
valid_sources[0x0c]	607863	1			T1	1051		T3	862		T4	427
valid_sources[0x0d]	595204	1			T1	459		T3	859		T4	468
valid_sources[0x0e]	603454	1			T1	194		T3	885		T4	429
valid_sources[0x0f]	622644	1			T1	260		T3	910		T4	460
valid_sources[0x10]	1862295	1			T1	630		T3	794		T4	391
valid_sources[0x11]	674533	1			T1	1368		T3	940		T4	441
valid_sources[0x12]	579680	1			T1	15		T3	876		T4	440
valid_sources[0x13]	685818	1			T1	396		T3	862		T4	384
valid_sources[0x14]	599629	1			T3	858		T4	458		T8	379
valid_sources[0x15]	671592	1			T1	468		T3	864		T4	455
valid_sources[0x16]	2013876	1			T1	283		T3	898		T4	392
valid_sources[0x17]	589873	1			T1	173		T3	875		T4	437
valid_sources[0x18]	634847	1			T1	97		T3	884		T4	456
valid_sources[0x19]	600925	1			T1	116		T3	914		T4	436
valid_sources[0x1a]	737679	1			T3	794		T4	452		T8	342
valid_sources[0x1b]	1869631	1			T1	6		T3	824		T4	483
valid_sources[0x1c]	582810	1			T1	72		T3	800		T4	440
valid_sources[0x1d]	629240	1			T3	819		T4	475		T8	382
valid_sources[0x1e]	588398	1			T3	868		T4	452		T8	373
valid_sources[0x1f]	1590479	1			T1	92		T3	860		T4	428
valid_sources[0x20]	693283	1			T1	1651		T3	925		T4	445
valid_sources[0x21]	617664	1			T1	1		T3	851		T4	412
valid_sources[0x22]	619866	1			T1	149		T3	890		T4	446
valid_sources[0x23]	637849	1			T1	107		T3	873		T4	476
valid_sources[0x24]	588981	1			T1	278		T3	881		T4	485
valid_sources[0x25]	638308	1			T1	38		T3	825		T4	410
valid_sources[0x26]	1918835	1			T1	45		T3	913		T4	390
valid_sources[0x27]	640500	1			T1	624		T3	869		T4	379
valid_sources[0x28]	1575747	1			T1	340		T3	846		T4	473
valid_sources[0x29]	591915	1			T1	511		T3	836		T4	457
valid_sources[0x2a]	658920	1			T1	111		T3	887		T4	377
valid_sources[0x2b]	629439	1			T1	36		T3	911		T4	457
valid_sources[0x2c]	631821	1			T1	24		T3	867		T4	401
valid_sources[0x2d]	617995	1			T1	31		T3	860		T4	417
valid_sources[0x2e]	594751	1			T1	547		T3	846		T4	477
valid_sources[0x2f]	603992	1			T1	131		T3	812		T4	430
valid_sources[0x30]	612798	1			T1	18196		T3	806		T4	502
valid_sources[0x31]	638823	1			T1	435		T3	870		T4	397
valid_sources[0x32]	584406	1			T1	1		T3	862		T4	451
valid_sources[0x33]	617255	1			T1	118		T3	922		T4	452
valid_sources[0x34]	660298	1			T1	323		T3	844		T4	421
valid_sources[0x35]	591828	1			T1	542		T3	933		T4	501
valid_sources[0x36]	590024	1			T1	294		T3	803		T4	436
valid_sources[0x37]	595048	1			T3	815		T4	417		T8	348
valid_sources[0x38]	637283	1			T3	894		T4	412		T8	353
valid_sources[0x39]	617828	1			T1	266		T3	840		T4	458
valid_sources[0x3a]	2170616	1			T1	549		T3	959		T4	405
valid_sources[0x3b]	600773	1			T1	276		T3	866		T4	416
valid_sources[0x3c]	629656	1			T1	35		T3	878		T4	406
valid_sources[0x3d]	817578	1			T3	884		T4	378		T8	374
valid_sources[0x3e]	619750	1			T1	1058		T3	855		T4	467
valid_sources[0x3f]	647433	1			T1	715		T3	887		T4	476
valid_sources[0x40]	606282	1			T1	342		T3	823		T4	412
valid_sources[0x41]	586082	1			T3	826		T4	403		T8	357
valid_sources[0x42]	1122299	1			T1	165		T3	860		T4	472
valid_sources[0x43]	596176	1			T3	820		T4	490		T8	415
valid_sources[0x44]	589756	1			T1	558		T3	922		T4	467
valid_sources[0x45]	631750	1			T1	519		T3	904		T4	449
valid_sources[0x46]	648544	1			T1	1		T3	856		T4	466
valid_sources[0x47]	597664	1			T3	858		T4	483		T8	372
valid_sources[0x48]	1183876	1			T1	140		T3	816		T4	402
valid_sources[0x49]	605020	1			T3	853		T4	436		T8	384
valid_sources[0x4a]	640928	1			T1	204		T3	854		T4	437
valid_sources[0x4b]	584473	1			T1	87		T3	873		T4	428
valid_sources[0x4c]	587116	1			T3	846		T4	474		T8	407
valid_sources[0x4d]	638027	1			T1	249		T3	852		T4	407
valid_sources[0x4e]	623583	1			T1	7897		T3	790		T4	450
valid_sources[0x4f]	579064	1			T1	89		T3	908		T4	440
valid_sources[0x50]	585795	1			T1	107		T3	848		T4	491
valid_sources[0x51]	604079	1			T1	357		T3	817		T4	454
valid_sources[0x52]	660439	1			T1	436		T2	4261		T3	889
valid_sources[0x53]	693384	1			T1	555		T3	895		T4	414
valid_sources[0x54]	607566	1			T1	206		T3	858		T4	423
valid_sources[0x55]	610221	1			T1	149		T3	865		T4	442
valid_sources[0x56]	625101	1			T1	62		T3	852		T4	398
valid_sources[0x57]	634230	1			T1	11		T3	854		T4	444
valid_sources[0x58]	586068	1			T1	550		T3	881		T4	426
valid_sources[0x59]	668560	1			T1	20		T3	902		T4	417
valid_sources[0x5a]	659776	1			T1	992		T3	871		T4	474
valid_sources[0x5b]	619560	1			T1	33		T3	829		T4	393
valid_sources[0x5c]	622338	1			T1	184		T3	908		T4	397
valid_sources[0x5d]	627642	1			T1	50		T3	887		T4	435
valid_sources[0x5e]	635148	1			T1	1		T3	897		T4	447
valid_sources[0x5f]	584417	1			T1	1256		T3	875		T4	394
valid_sources[0x60]	618393	1			T1	354		T3	900		T4	434
valid_sources[0x61]	612091	1			T1	82		T3	862		T4	387
valid_sources[0x62]	634727	1			T1	429		T3	846		T4	426
valid_sources[0x63]	590834	1			T1	457		T3	859		T4	477
valid_sources[0x64]	625381	1			T3	828		T4	404		T8	330
valid_sources[0x65]	791663	1			T1	229		T3	916		T4	432
valid_sources[0x66]	589532	1			T1	239		T3	853		T4	434
valid_sources[0x67]	623865	1			T1	428		T3	876		T4	416
valid_sources[0x68]	628772	1			T1	17		T3	858		T4	447
valid_sources[0x69]	2756988	1			T1	410		T3	902		T4	477
valid_sources[0x6a]	700490	1			T1	313		T3	846		T4	403
valid_sources[0x6b]	580073	1			T1	90		T3	819		T4	444
valid_sources[0x6c]	600003	1			T1	52		T3	797		T4	452
valid_sources[0x6d]	583437	1			T1	108		T3	930		T4	485
valid_sources[0x6e]	586900	1			T1	106		T3	878		T4	432
valid_sources[0x6f]	606014	1			T3	867		T4	399		T8	394
valid_sources[0x70]	611115	1			T1	454		T3	785		T4	456
valid_sources[0x71]	617717	1			T1	20755		T3	866		T4	470
valid_sources[0x72]	626855	1			T3	797		T4	427		T8	341
valid_sources[0x73]	626502	1			T1	1141		T3	870		T4	440
valid_sources[0x74]	601542	1			T3	830		T4	416		T8	348
valid_sources[0x75]	756653	1			T1	211		T3	821		T4	431
valid_sources[0x76]	593762	1			T1	275		T3	890		T4	405
valid_sources[0x77]	1646513	1			T1	1		T3	855		T4	369
valid_sources[0x78]	584360	1			T1	693		T3	895		T4	399
valid_sources[0x79]	658748	1			T1	11		T3	903		T4	425
valid_sources[0x7a]	632608	1			T3	878		T4	363		T8	377
valid_sources[0x7b]	1583246	1			T3	841		T4	448		T8	356
valid_sources[0x7c]	620641	1			T1	459		T3	906		T4	459
valid_sources[0x7d]	603285	1			T1	107		T3	840		T4	418
valid_sources[0x7e]	604800	1			T3	875		T4	401		T8	407
valid_sources[0x7f]	593702	1			T1	563		T3	868		T4	459
valid_sources[0x80]	633129	1			T1	580		T3	824		T4	440

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

79813383

1

T1

80617

T2

3497

T3

19967

values[0x0]

all_enables

biggest_size

41282689

1

T1

39880

T2

1752

T3

10113

values[0x1]

all_enables

biggest_size

41284812

1

T1

40112

T2

1676

T3

10187

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47407	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

160963

1

T1

14

T2

1

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	57029	1			T5	17		T6	28		T27	13
values[0x0]	72927	1			T1	25		T2	1		T3	2
values[0x1]	78414	1			T1	15		T2	1		T3	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36508	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

171862

1

T1

16

T2

2

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	849	1			T10	1		T170	1		T25	26
valid_sources[0x01]	905	1			T5	1		T42	1		T20	4
valid_sources[0x02]	650	1			T10	1		T20	2		T25	20
valid_sources[0x03]	918	1			T10	2		T13	1		T28	1
valid_sources[0x04]	962	1			T123	1		T24	7		T25	27
valid_sources[0x05]	663	1			T20	1		T44	1		T25	26
valid_sources[0x06]	964	1			T20	1		T24	52		T25	21
valid_sources[0x07]	900	1			T95	1		T25	26		T26	2
valid_sources[0x08]	888	1			T10	1		T20	1		T24	6
valid_sources[0x09]	1030	1			T10	2		T25	18		T26	6
valid_sources[0x0a]	625	1			T10	2		T25	19		T21	1
valid_sources[0x0b]	1093	1			T10	1		T20	3		T123	2
valid_sources[0x0c]	586	1			T24	2		T25	13		T26	10
valid_sources[0x0d]	655	1			T12	1		T24	1		T25	26
valid_sources[0x0e]	950	1			T8	3		T98	1		T20	1
valid_sources[0x0f]	1153	1			T10	1		T6	4		T74	5
valid_sources[0x10]	944	1			T94	5		T25	20		T21	1
valid_sources[0x11]	604	1			T10	2		T5	1		T25	19
valid_sources[0x12]	784	1			T10	2		T25	25		T21	1
valid_sources[0x13]	738	1			T9	1		T10	2		T12	2
valid_sources[0x14]	878	1			T25	27		T21	4		T26	5
valid_sources[0x15]	652	1			T10	1		T20	1		T25	23
valid_sources[0x16]	732	1			T10	2		T20	3		T44	1
valid_sources[0x17]	798	1			T10	1		T25	22		T26	4
valid_sources[0x18]	752	1			T10	4		T42	1		T44	1
valid_sources[0x19]	680	1			T10	1		T24	3		T25	25
valid_sources[0x1a]	571	1			T10	1		T5	2		T120	2
valid_sources[0x1b]	861	1			T10	2		T5	1		T44	1
valid_sources[0x1c]	566	1			T10	1		T70	2		T20	2
valid_sources[0x1d]	891	1			T10	1		T41	3		T24	135
valid_sources[0x1e]	792	1			T4	1		T10	2		T6	64
valid_sources[0x1f]	634	1			T10	2		T24	3		T25	24
valid_sources[0x20]	936	1			T10	1		T13	1		T27	44
valid_sources[0x21]	862	1			T10	1		T25	28		T21	2
valid_sources[0x22]	631	1			T44	1		T25	27		T21	1
valid_sources[0x23]	845	1			T10	1		T25	22		T26	5
valid_sources[0x24]	722	1			T4	1		T10	1		T25	23
valid_sources[0x25]	1086	1			T25	30		T26	6		T75	4
valid_sources[0x26]	914	1			T41	3		T20	2		T25	17
valid_sources[0x27]	1095	1			T10	1		T5	3		T20	1
valid_sources[0x28]	744	1			T10	2		T25	21		T21	1
valid_sources[0x29]	721	1			T10	3		T25	28		T21	2
valid_sources[0x2a]	593	1			T10	1		T6	24		T94	2
valid_sources[0x2b]	998	1			T10	1		T24	202		T25	24
valid_sources[0x2c]	650	1			T20	1		T25	19		T26	1
valid_sources[0x2d]	673	1			T8	3		T10	2		T43	1
valid_sources[0x2e]	747	1			T10	1		T24	1		T25	20
valid_sources[0x2f]	797	1			T10	1		T20	2		T25	25
valid_sources[0x30]	847	1			T10	4		T20	1		T25	20
valid_sources[0x31]	1044	1			T5	1		T24	40		T25	24
valid_sources[0x32]	1337	1			T10	1		T24	198		T25	31
valid_sources[0x33]	676	1			T10	8		T74	1		T97	1
valid_sources[0x34]	629	1			T10	3		T74	2		T20	2
valid_sources[0x35]	610	1			T25	32		T26	3		T75	2
valid_sources[0x36]	647	1			T10	2		T5	1		T44	1
valid_sources[0x37]	858	1			T3	4		T10	2		T74	4
valid_sources[0x38]	1384	1			T10	1		T7	2		T24	2
valid_sources[0x39]	915	1			T20	1		T25	28		T26	4
valid_sources[0x3a]	893	1			T10	1		T20	1		T25	19
valid_sources[0x3b]	597	1			T10	1		T25	50		T26	3
valid_sources[0x3c]	694	1			T25	38		T26	3		T75	1
valid_sources[0x3d]	580	1			T10	2		T74	3		T20	1
valid_sources[0x3e]	781	1			T4	1		T10	2		T74	1
valid_sources[0x3f]	937	1			T10	1		T5	1		T25	18
valid_sources[0x40]	635	1			T20	1		T25	27		T26	7
valid_sources[0x41]	756	1			T10	2		T5	1		T25	17
valid_sources[0x42]	608	1			T10	1		T20	2		T25	16
valid_sources[0x43]	817	1			T42	1		T25	24		T26	7
valid_sources[0x44]	834	1			T94	1		T44	1		T24	1
valid_sources[0x45]	825	1			T4	1		T43	1		T24	2
valid_sources[0x46]	754	1			T10	2		T25	21		T26	4
valid_sources[0x47]	885	1			T10	3		T74	1		T41	1
valid_sources[0x48]	1269	1			T10	2		T98	1		T25	33
valid_sources[0x49]	890	1			T10	2		T7	2		T25	26
valid_sources[0x4a]	841	1			T10	1		T20	1		T25	26
valid_sources[0x4b]	775	1			T24	1		T25	25		T26	3
valid_sources[0x4c]	830	1			T10	2		T95	2		T24	102
valid_sources[0x4d]	956	1			T10	3		T29	1		T24	3
valid_sources[0x4e]	763	1			T10	2		T41	1		T44	1
valid_sources[0x4f]	1313	1			T10	1		T24	1		T25	21
valid_sources[0x50]	682	1			T24	2		T25	32		T21	2
valid_sources[0x51]	678	1			T10	2		T97	1		T25	36
valid_sources[0x52]	922	1			T24	208		T25	17		T26	6
valid_sources[0x53]	1045	1			T8	1		T10	2		T24	1
valid_sources[0x54]	709	1			T24	82		T25	19		T26	8
valid_sources[0x55]	715	1			T10	3		T5	1		T25	23
valid_sources[0x56]	601	1			T7	1		T24	2		T25	25
valid_sources[0x57]	1168	1			T20	1		T25	30		T21	2
valid_sources[0x58]	728	1			T10	1		T20	2		T24	23
valid_sources[0x59]	1025	1			T10	1		T25	14		T80	2
valid_sources[0x5a]	712	1			T10	5		T74	2		T25	16
valid_sources[0x5b]	781	1			T25	26		T26	6		T75	7
valid_sources[0x5c]	571	1			T10	1		T94	1		T20	2
valid_sources[0x5d]	688	1			T10	4		T20	2		T25	16
valid_sources[0x5e]	665	1			T10	5		T94	2		T25	31
valid_sources[0x5f]	543	1			T5	1		T13	1		T20	1
valid_sources[0x60]	577	1			T10	1		T43	3		T25	27
valid_sources[0x61]	899	1			T4	1		T10	2		T12	1
valid_sources[0x62]	619	1			T25	20		T21	1		T26	5
valid_sources[0x63]	663	1			T4	1		T10	1		T98	1
valid_sources[0x64]	662	1			T10	1		T25	29		T26	7
valid_sources[0x65]	843	1			T10	4		T25	22		T26	2
valid_sources[0x66]	773	1			T25	19		T26	6		T75	11
valid_sources[0x67]	697	1			T10	3		T44	1		T25	15
valid_sources[0x68]	902	1			T10	2		T25	19		T26	4
valid_sources[0x69]	683	1			T5	1		T6	22		T94	1
valid_sources[0x6a]	659	1			T24	1		T25	9		T26	5
valid_sources[0x6b]	632	1			T10	2		T43	2		T25	10
valid_sources[0x6c]	746	1			T10	3		T25	19		T26	4
valid_sources[0x6d]	922	1			T10	2		T20	2		T24	2
valid_sources[0x6e]	720	1			T10	2		T20	1		T25	29
valid_sources[0x6f]	677	1			T10	1		T7	3		T25	24
valid_sources[0x70]	705	1			T10	2		T25	26		T26	6
valid_sources[0x71]	738	1			T2	1		T5	1		T25	18
valid_sources[0x72]	704	1			T24	3		T25	22		T26	3
valid_sources[0x73]	725	1			T8	3		T10	2		T25	23
valid_sources[0x74]	611	1			T10	1		T123	1		T25	26
valid_sources[0x75]	877	1			T41	2		T25	22		T26	3
valid_sources[0x76]	622	1			T123	1		T24	1		T25	20
valid_sources[0x77]	1090	1			T10	2		T25	28		T26	8
valid_sources[0x78]	822	1			T42	1		T20	1		T25	17
valid_sources[0x79]	862	1			T10	3		T25	31		T26	2
valid_sources[0x7a]	897	1			T7	2		T24	1		T25	17
valid_sources[0x7b]	679	1			T10	2		T24	1		T25	18
valid_sources[0x7c]	631	1			T10	2		T42	1		T41	8
valid_sources[0x7d]	682	1			T8	2		T10	3		T25	23
valid_sources[0x7e]	754	1			T8	1		T10	2		T94	3
valid_sources[0x7f]	832	1			T74	2		T24	3		T25	15
valid_sources[0x80]	964	1			T10	1		T44	1		T24	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

43031

1

T5

8

T6

14

T27

6

values[0x0]

all_enables

biggest_size

60422

1

T1

11

T2

1

T4

1

values[0x1]

all_enables

biggest_size

57510

1

T1

3

T3

1

T9

2