Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1037
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
70.71 70.71 92.23 92.23 67.30 67.30 84.71 84.71 33.33 33.33 81.04 81.04 93.57 93.57 42.78 42.78 /workspace/coverage/default/37.sram_ctrl_lc_escalation.413888298
83.94 13.23 96.48 4.25 74.05 6.75 85.33 0.62 80.95 47.62 87.44 6.40 95.47 1.90 67.82 25.05 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.520641944
89.15 5.21 97.06 0.57 84.60 10.55 97.45 12.12 80.95 0.00 91.00 3.55 95.47 0.00 77.51 9.69 /workspace/coverage/default/13.sram_ctrl_stress_all.1438352254
93.30 4.15 98.28 1.23 85.66 1.07 97.52 0.07 100.00 19.05 93.36 2.37 95.47 0.00 82.82 5.30 /workspace/coverage/default/41.sram_ctrl_mem_walk.3288055465
94.23 0.92 98.61 0.33 87.91 2.25 98.48 0.96 100.00 0.00 94.79 1.42 96.05 0.58 83.73 0.91 /workspace/coverage/default/1.sram_ctrl_sec_cm.1105137249
95.10 0.87 99.10 0.49 89.69 1.78 98.62 0.14 100.00 0.00 95.73 0.95 96.05 0.00 86.47 2.74 /workspace/coverage/default/34.sram_ctrl_stress_all.1589290072
95.83 0.73 99.10 0.00 90.05 0.36 98.62 0.00 100.00 0.00 95.73 0.00 96.05 0.00 91.22 4.75 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.618687209
96.29 0.46 99.10 0.00 90.05 0.00 98.62 0.00 100.00 0.00 95.73 0.00 96.20 0.15 94.33 3.11 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1837207889
96.57 0.28 99.10 0.00 90.28 0.24 98.69 0.07 100.00 0.00 95.73 0.00 97.51 1.32 94.70 0.37 /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.937987304
96.80 0.23 99.10 0.00 90.28 0.00 98.83 0.14 100.00 0.00 95.73 0.00 98.25 0.73 95.43 0.73 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3875743003
96.96 0.16 99.10 0.00 90.28 0.00 98.83 0.00 100.00 0.00 95.73 0.00 98.25 0.00 96.53 1.10 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3810345900
97.09 0.13 99.18 0.08 90.28 0.00 99.66 0.83 100.00 0.00 95.73 0.00 98.25 0.00 96.53 0.00 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2584989501
97.22 0.13 99.18 0.00 90.28 0.00 99.66 0.00 100.00 0.00 95.73 0.00 99.12 0.88 96.53 0.00 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.650425976
97.33 0.11 99.18 0.00 90.52 0.24 99.66 0.00 100.00 0.00 95.73 0.00 99.12 0.00 97.07 0.55 /workspace/coverage/default/49.sram_ctrl_regwen.880819049
97.41 0.08 99.18 0.00 90.64 0.12 99.66 0.00 100.00 0.00 96.21 0.47 99.12 0.00 97.07 0.00 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1940563739
97.47 0.06 99.18 0.00 91.00 0.36 99.72 0.07 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.00 /workspace/coverage/default/1.sram_ctrl_alert_test.1836113551
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1659230635
97.52 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/0.sram_ctrl_executable.3676076006

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1607626371
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2598893589
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3557203625
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3282298700
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.985352211
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.4231931241
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2648865740
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2864748849
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1785590051
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3295882181
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1796737759
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.4252677576
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.753744585
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2142300820
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.850972571
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.32986924
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1675724352
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1552177535
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.23113916
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2617486818
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3024289316
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.695144060
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1412336775
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2705202477
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1724867622
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3999411899
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3684692428
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2607264549
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3599794731
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3333141823
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.378320348
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3017952700
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3280156668
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4267607759
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.250679033
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3147219243
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.397020811
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.177334373
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.585383284
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1151323279
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2391180125
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1823897982
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2721152812
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2078860490
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1441370822
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4147227339
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1657696681
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.951209055
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.446165957
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.33814700
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3925511616
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.897778538
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3248700233
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3750226330
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1961592074
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3043457158
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.918670130
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4087445121
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2908559809
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.589339215
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1680796190
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3301779481
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1074685920
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.117797525
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1357988072
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3678575180
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2259403677
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2534487982
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2752689099
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.701461296
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3778865558
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4201103867
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3661625960
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1938973474
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3698174139
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1090815970
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.97582750
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1359513507
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1771679410
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.61767374
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1503757166
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.4145856712
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.924645455
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3748245874
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.37213496
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3933489341
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.4067307896
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2029921643
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1924159891
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3725609562
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2433382940
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.168889504
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3820755390
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1381232304
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3120892175
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3692655310
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2339396292
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1046613471
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.615436676
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2706195271
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.825565892
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.100700731
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.889803723
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3588524220
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1937253880
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1210464828
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.280334447
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2493765079
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3311772933
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3236123323
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.32056359
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3319314510
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1997935813
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.512504404
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3590300258
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.856296347
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2813081345
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2153557227
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2282444049
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1343507461
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.295810523
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2004405124
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1381749288
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1950026490
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2806750208
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1460992769
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3519880714
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2964424790
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2085707222
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.641844545
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3861671582
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3097381957
/workspace/coverage/default/0.sram_ctrl_alert_test.4222374308
/workspace/coverage/default/0.sram_ctrl_bijection.2305164731
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3993981489
/workspace/coverage/default/0.sram_ctrl_max_throughput.4188758527
/workspace/coverage/default/0.sram_ctrl_mem_walk.2746180141
/workspace/coverage/default/0.sram_ctrl_multiple_keys.50448828
/workspace/coverage/default/0.sram_ctrl_partial_access.3539351180
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.765380205
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3411470433
/workspace/coverage/default/0.sram_ctrl_regwen.3601795832
/workspace/coverage/default/0.sram_ctrl_sec_cm.1628149498
/workspace/coverage/default/0.sram_ctrl_smoke.79422797
/workspace/coverage/default/0.sram_ctrl_stress_all.3053312982
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.398810318
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3358725671
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2467239061
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1600008917
/workspace/coverage/default/1.sram_ctrl_bijection.1834464418
/workspace/coverage/default/1.sram_ctrl_executable.3118353788
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1801517309
/workspace/coverage/default/1.sram_ctrl_max_throughput.2645743655
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2622924967
/workspace/coverage/default/1.sram_ctrl_mem_walk.2355755969
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2401900078
/workspace/coverage/default/1.sram_ctrl_partial_access.76664575
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1899754850
/workspace/coverage/default/1.sram_ctrl_regwen.950034831
/workspace/coverage/default/1.sram_ctrl_smoke.4053953192
/workspace/coverage/default/1.sram_ctrl_stress_all.3601959818
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1340710623
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.28684593
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3585814546
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2109362087
/workspace/coverage/default/10.sram_ctrl_alert_test.3804466044
/workspace/coverage/default/10.sram_ctrl_bijection.424829505
/workspace/coverage/default/10.sram_ctrl_executable.601652461
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3671991316
/workspace/coverage/default/10.sram_ctrl_max_throughput.2390978346
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1000861235
/workspace/coverage/default/10.sram_ctrl_mem_walk.1780170664
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3961287937
/workspace/coverage/default/10.sram_ctrl_partial_access.3679718860
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1934355946
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3180750751
/workspace/coverage/default/10.sram_ctrl_regwen.1773104464
/workspace/coverage/default/10.sram_ctrl_smoke.1841199658
/workspace/coverage/default/10.sram_ctrl_stress_all.852270018
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1777754264
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.484732304
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2100582771
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2753537343
/workspace/coverage/default/11.sram_ctrl_alert_test.2979033048
/workspace/coverage/default/11.sram_ctrl_bijection.467393019
/workspace/coverage/default/11.sram_ctrl_executable.3460498077
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2658276935
/workspace/coverage/default/11.sram_ctrl_max_throughput.3279985833
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2149202292
/workspace/coverage/default/11.sram_ctrl_mem_walk.3239357797
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1216564445
/workspace/coverage/default/11.sram_ctrl_partial_access.3511431649
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2340454334
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1794901947
/workspace/coverage/default/11.sram_ctrl_regwen.2975944467
/workspace/coverage/default/11.sram_ctrl_smoke.4153499263
/workspace/coverage/default/11.sram_ctrl_stress_all.618246701
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3939135933
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.878436034
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1028898505
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1081285360
/workspace/coverage/default/12.sram_ctrl_alert_test.1165784912
/workspace/coverage/default/12.sram_ctrl_bijection.3994108914
/workspace/coverage/default/12.sram_ctrl_executable.820277705
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2555919855
/workspace/coverage/default/12.sram_ctrl_max_throughput.1637665763
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3091950042
/workspace/coverage/default/12.sram_ctrl_mem_walk.4156784457
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2146112789
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/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2931527484
/workspace/coverage/default/43.sram_ctrl_alert_test.2671119973
/workspace/coverage/default/43.sram_ctrl_bijection.1486092204
/workspace/coverage/default/43.sram_ctrl_executable.1717959137
/workspace/coverage/default/43.sram_ctrl_lc_escalation.961516089
/workspace/coverage/default/43.sram_ctrl_max_throughput.820334655
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.873289351
/workspace/coverage/default/43.sram_ctrl_mem_walk.3479380422
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1593900770
/workspace/coverage/default/43.sram_ctrl_partial_access.1915882225
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.194424439
/workspace/coverage/default/43.sram_ctrl_ram_cfg.507632260
/workspace/coverage/default/43.sram_ctrl_regwen.2404279216
/workspace/coverage/default/43.sram_ctrl_smoke.4083935744
/workspace/coverage/default/43.sram_ctrl_stress_all.460815767
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1986720994
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1456611414
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1202198129
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.190420065
/workspace/coverage/default/44.sram_ctrl_alert_test.4143145933
/workspace/coverage/default/44.sram_ctrl_bijection.219793231
/workspace/coverage/default/44.sram_ctrl_executable.620657039
/workspace/coverage/default/44.sram_ctrl_lc_escalation.48590462
/workspace/coverage/default/44.sram_ctrl_max_throughput.2928017527
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2753175230
/workspace/coverage/default/44.sram_ctrl_mem_walk.1223886000
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3864432054
/workspace/coverage/default/44.sram_ctrl_partial_access.3297815929
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2210705612
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3945688574
/workspace/coverage/default/44.sram_ctrl_regwen.2828618605
/workspace/coverage/default/44.sram_ctrl_smoke.140665725
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1395703985
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2774780294
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.37587680
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3946942396
/workspace/coverage/default/45.sram_ctrl_alert_test.162105276
/workspace/coverage/default/45.sram_ctrl_bijection.3583188322
/workspace/coverage/default/45.sram_ctrl_executable.979887268
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3821434598
/workspace/coverage/default/45.sram_ctrl_max_throughput.3274177127
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3395860347
/workspace/coverage/default/45.sram_ctrl_mem_walk.816113990
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1197018853
/workspace/coverage/default/45.sram_ctrl_partial_access.3510829771
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2136462654
/workspace/coverage/default/45.sram_ctrl_ram_cfg.4005313844
/workspace/coverage/default/45.sram_ctrl_regwen.4002990212
/workspace/coverage/default/45.sram_ctrl_smoke.1068687937
/workspace/coverage/default/45.sram_ctrl_stress_all.2461262829
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3974605850
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3477580858
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2435826569
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2526495225
/workspace/coverage/default/46.sram_ctrl_alert_test.223030716
/workspace/coverage/default/46.sram_ctrl_bijection.1892777939
/workspace/coverage/default/46.sram_ctrl_executable.3615474941
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3397760436
/workspace/coverage/default/46.sram_ctrl_max_throughput.2976589844
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1989986420
/workspace/coverage/default/46.sram_ctrl_mem_walk.1896505986
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1465826989
/workspace/coverage/default/46.sram_ctrl_partial_access.1361446874
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.464270346
/workspace/coverage/default/46.sram_ctrl_ram_cfg.877133280
/workspace/coverage/default/46.sram_ctrl_regwen.3368590534
/workspace/coverage/default/46.sram_ctrl_smoke.313723854
/workspace/coverage/default/46.sram_ctrl_stress_all.520091056
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4108340094
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1538933200
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3922175032
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.42197044
/workspace/coverage/default/47.sram_ctrl_alert_test.1395785567
/workspace/coverage/default/47.sram_ctrl_bijection.4083161551
/workspace/coverage/default/47.sram_ctrl_executable.2440324782
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3581745288
/workspace/coverage/default/47.sram_ctrl_max_throughput.3179436485
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3483834640
/workspace/coverage/default/47.sram_ctrl_mem_walk.84379977
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1541181655
/workspace/coverage/default/47.sram_ctrl_partial_access.1322682513
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.598605913
/workspace/coverage/default/47.sram_ctrl_ram_cfg.123441753
/workspace/coverage/default/47.sram_ctrl_regwen.1413249927
/workspace/coverage/default/47.sram_ctrl_smoke.619868790
/workspace/coverage/default/47.sram_ctrl_stress_all.1944716788
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.797949669
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1133129792
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3263643320
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3003633444
/workspace/coverage/default/48.sram_ctrl_alert_test.2455888260
/workspace/coverage/default/48.sram_ctrl_bijection.3189298711
/workspace/coverage/default/48.sram_ctrl_executable.29463749
/workspace/coverage/default/48.sram_ctrl_lc_escalation.4233708129
/workspace/coverage/default/48.sram_ctrl_max_throughput.3930744612
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.701882486
/workspace/coverage/default/48.sram_ctrl_mem_walk.259964754
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4222161549
/workspace/coverage/default/48.sram_ctrl_partial_access.3810526364
/workspace/coverage/default/48.sram_ctrl_ram_cfg.900092127
/workspace/coverage/default/48.sram_ctrl_regwen.1764401523
/workspace/coverage/default/48.sram_ctrl_smoke.2867737392
/workspace/coverage/default/48.sram_ctrl_stress_all.3134371497
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.4009173519
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1074553383
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.764429391
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1943226671
/workspace/coverage/default/49.sram_ctrl_alert_test.3627308944
/workspace/coverage/default/49.sram_ctrl_bijection.2815796001
/workspace/coverage/default/49.sram_ctrl_executable.4154368085
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2204788197
/workspace/coverage/default/49.sram_ctrl_max_throughput.3735539183
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2386486356
/workspace/coverage/default/49.sram_ctrl_mem_walk.282872225
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3400755362
/workspace/coverage/default/49.sram_ctrl_partial_access.2737982343
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2848497105
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2832901595
/workspace/coverage/default/49.sram_ctrl_smoke.2252109617
/workspace/coverage/default/49.sram_ctrl_stress_all.2588491144
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.751908031
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1942835048
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1501722547
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1977353313
/workspace/coverage/default/5.sram_ctrl_alert_test.713538780
/workspace/coverage/default/5.sram_ctrl_bijection.2353749757
/workspace/coverage/default/5.sram_ctrl_executable.493556480
/workspace/coverage/default/5.sram_ctrl_lc_escalation.678890245
/workspace/coverage/default/5.sram_ctrl_max_throughput.500116825
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3124138750
/workspace/coverage/default/5.sram_ctrl_mem_walk.498600936
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1936775935
/workspace/coverage/default/5.sram_ctrl_partial_access.478212025
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2111333017
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2438617413
/workspace/coverage/default/5.sram_ctrl_regwen.1175651790
/workspace/coverage/default/5.sram_ctrl_smoke.551805748
/workspace/coverage/default/5.sram_ctrl_stress_all.1018197825
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1219525237
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3012184645
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.442123142
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3839291415
/workspace/coverage/default/6.sram_ctrl_alert_test.3465696238
/workspace/coverage/default/6.sram_ctrl_bijection.4009970472
/workspace/coverage/default/6.sram_ctrl_executable.1118358522
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1675229464
/workspace/coverage/default/6.sram_ctrl_max_throughput.1057376680
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1736371694
/workspace/coverage/default/6.sram_ctrl_mem_walk.2688006802
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1929272568
/workspace/coverage/default/6.sram_ctrl_partial_access.1623645698
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3744050937
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3347691218
/workspace/coverage/default/6.sram_ctrl_regwen.3766678331
/workspace/coverage/default/6.sram_ctrl_smoke.2706957106
/workspace/coverage/default/6.sram_ctrl_stress_all.427756223
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2964945992
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4188401119
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.498498739
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1533610253
/workspace/coverage/default/7.sram_ctrl_alert_test.2754704172
/workspace/coverage/default/7.sram_ctrl_bijection.2730542517
/workspace/coverage/default/7.sram_ctrl_executable.3039595138
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1698821289
/workspace/coverage/default/7.sram_ctrl_max_throughput.1406684525
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1669783881
/workspace/coverage/default/7.sram_ctrl_mem_walk.2027003907
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2489929893
/workspace/coverage/default/7.sram_ctrl_partial_access.942887826
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2425775411
/workspace/coverage/default/7.sram_ctrl_ram_cfg.211766475
/workspace/coverage/default/7.sram_ctrl_regwen.1522124198
/workspace/coverage/default/7.sram_ctrl_smoke.4022027545
/workspace/coverage/default/7.sram_ctrl_stress_all.4182582490
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3246067087
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.878753215
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1604737553
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1458629986
/workspace/coverage/default/8.sram_ctrl_alert_test.3445878053
/workspace/coverage/default/8.sram_ctrl_bijection.4055342395
/workspace/coverage/default/8.sram_ctrl_executable.322405941
/workspace/coverage/default/8.sram_ctrl_lc_escalation.571571794
/workspace/coverage/default/8.sram_ctrl_max_throughput.729810102
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2598001344
/workspace/coverage/default/8.sram_ctrl_mem_walk.101129303
/workspace/coverage/default/8.sram_ctrl_multiple_keys.220587225
/workspace/coverage/default/8.sram_ctrl_partial_access.2742811729
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2236228309
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2717193816
/workspace/coverage/default/8.sram_ctrl_regwen.1532105683
/workspace/coverage/default/8.sram_ctrl_smoke.1529915331
/workspace/coverage/default/8.sram_ctrl_stress_all.1863544752
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.4151094552
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3331694935
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3255481319
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1143266121
/workspace/coverage/default/9.sram_ctrl_alert_test.3963806645
/workspace/coverage/default/9.sram_ctrl_bijection.1084798722
/workspace/coverage/default/9.sram_ctrl_executable.2421843546
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2503098831
/workspace/coverage/default/9.sram_ctrl_max_throughput.2921942041
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2732941467
/workspace/coverage/default/9.sram_ctrl_mem_walk.950192573
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2091331475
/workspace/coverage/default/9.sram_ctrl_partial_access.2480048388
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2392953397
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2601984770
/workspace/coverage/default/9.sram_ctrl_regwen.1239852994
/workspace/coverage/default/9.sram_ctrl_smoke.1963852466
/workspace/coverage/default/9.sram_ctrl_stress_all.695972979
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.487765861
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.279174784
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3083830381



Total test records in report: 1037
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/39.sram_ctrl_executable.3687153493 Aug 15 04:56:04 PM PDT 24 Aug 15 05:12:07 PM PDT 24 76372358721 ps
T2 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.574138203 Aug 15 04:54:04 PM PDT 24 Aug 15 04:55:59 PM PDT 24 846455023 ps
T3 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.621621690 Aug 15 04:53:33 PM PDT 24 Aug 15 04:58:53 PM PDT 24 14141392065 ps
T4 /workspace/coverage/default/12.sram_ctrl_executable.820277705 Aug 15 04:53:29 PM PDT 24 Aug 15 05:03:47 PM PDT 24 4455089583 ps
T8 /workspace/coverage/default/18.sram_ctrl_multiple_keys.613386897 Aug 15 04:53:43 PM PDT 24 Aug 15 05:01:32 PM PDT 24 53987877166 ps
T9 /workspace/coverage/default/36.sram_ctrl_bijection.1103486828 Aug 15 04:55:35 PM PDT 24 Aug 15 05:36:02 PM PDT 24 34538824874 ps
T10 /workspace/coverage/default/41.sram_ctrl_mem_walk.3288055465 Aug 15 04:56:18 PM PDT 24 Aug 15 05:02:17 PM PDT 24 18719415673 ps
T5 /workspace/coverage/default/37.sram_ctrl_lc_escalation.413888298 Aug 15 04:55:42 PM PDT 24 Aug 15 04:56:21 PM PDT 24 6683166373 ps
T11 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1538933200 Aug 15 04:57:02 PM PDT 24 Aug 15 05:02:04 PM PDT 24 19645557576 ps
T12 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1238627379 Aug 15 04:53:26 PM PDT 24 Aug 15 05:02:31 PM PDT 24 89030372660 ps
T6 /workspace/coverage/default/13.sram_ctrl_stress_all.1438352254 Aug 15 04:53:35 PM PDT 24 Aug 15 06:06:57 PM PDT 24 405387122770 ps
T13 /workspace/coverage/default/18.sram_ctrl_alert_test.3798435898 Aug 15 04:53:54 PM PDT 24 Aug 15 04:53:55 PM PDT 24 45389441 ps
T55 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3852708922 Aug 15 04:55:09 PM PDT 24 Aug 15 04:58:42 PM PDT 24 46636269892 ps
T27 /workspace/coverage/default/43.sram_ctrl_regwen.2404279216 Aug 15 04:56:38 PM PDT 24 Aug 15 05:10:20 PM PDT 24 10491453633 ps
T7 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1416716991 Aug 15 04:53:43 PM PDT 24 Aug 15 04:54:24 PM PDT 24 24322260605 ps
T28 /workspace/coverage/default/33.sram_ctrl_ram_cfg.2604715919 Aug 15 04:55:16 PM PDT 24 Aug 15 04:55:20 PM PDT 24 1407308250 ps
T74 /workspace/coverage/default/43.sram_ctrl_stress_all.460815767 Aug 15 04:56:45 PM PDT 24 Aug 15 05:29:49 PM PDT 24 143868297923 ps
T70 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3019855966 Aug 15 04:54:13 PM PDT 24 Aug 15 04:55:01 PM PDT 24 763195494 ps
T42 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.2354280610 Aug 15 04:52:51 PM PDT 24 Aug 15 05:00:42 PM PDT 24 12960843634 ps
T97 /workspace/coverage/default/14.sram_ctrl_max_throughput.4147455248 Aug 15 04:53:40 PM PDT 24 Aug 15 04:56:05 PM PDT 24 3303481123 ps
T94 /workspace/coverage/default/25.sram_ctrl_executable.3116193337 Aug 15 04:54:20 PM PDT 24 Aug 15 05:24:04 PM PDT 24 26014595341 ps
T95 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.3442999195 Aug 15 04:54:47 PM PDT 24 Aug 15 04:58:08 PM PDT 24 3328087760 ps
T96 /workspace/coverage/default/2.sram_ctrl_partial_access.2059786047 Aug 15 04:52:50 PM PDT 24 Aug 15 04:53:21 PM PDT 24 784848406 ps
T41 /workspace/coverage/default/49.sram_ctrl_regwen.880819049 Aug 15 04:57:32 PM PDT 24 Aug 15 05:02:59 PM PDT 24 5268787012 ps
T98 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3012184645 Aug 15 04:52:56 PM PDT 24 Aug 15 04:57:25 PM PDT 24 9835755837 ps
T99 /workspace/coverage/default/27.sram_ctrl_max_throughput.3154408696 Aug 15 04:54:29 PM PDT 24 Aug 15 04:55:32 PM PDT 24 908935696 ps
T20 /workspace/coverage/default/42.sram_ctrl_regwen.1586031007 Aug 15 04:56:29 PM PDT 24 Aug 15 05:15:30 PM PDT 24 14450819483 ps
T43 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3003633444 Aug 15 04:57:25 PM PDT 24 Aug 15 05:04:46 PM PDT 24 4646244769 ps
T120 /workspace/coverage/default/45.sram_ctrl_smoke.1068687937 Aug 15 04:56:45 PM PDT 24 Aug 15 04:57:00 PM PDT 24 850524302 ps
T121 /workspace/coverage/default/21.sram_ctrl_partial_access.1379411189 Aug 15 04:53:57 PM PDT 24 Aug 15 04:54:18 PM PDT 24 10211047124 ps
T122 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1837207889 Aug 15 04:57:24 PM PDT 24 Aug 15 05:05:01 PM PDT 24 86015037424 ps
T45 /workspace/coverage/default/6.sram_ctrl_mem_walk.2688006802 Aug 15 04:53:05 PM PDT 24 Aug 15 04:59:24 PM PDT 24 138218131959 ps
T123 /workspace/coverage/default/4.sram_ctrl_bijection.3853968081 Aug 15 04:52:59 PM PDT 24 Aug 15 05:11:30 PM PDT 24 192640501503 ps
T124 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.506484190 Aug 15 04:53:55 PM PDT 24 Aug 15 04:57:35 PM PDT 24 7479918079 ps
T125 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.2774780294 Aug 15 04:56:45 PM PDT 24 Aug 15 05:01:07 PM PDT 24 12526711228 ps
T29 /workspace/coverage/default/29.sram_ctrl_ram_cfg.2841622219 Aug 15 04:54:45 PM PDT 24 Aug 15 04:54:49 PM PDT 24 2405024506 ps
T44 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1143266121 Aug 15 04:53:12 PM PDT 24 Aug 15 05:02:57 PM PDT 24 7784263348 ps
T16 /workspace/coverage/default/46.sram_ctrl_alert_test.223030716 Aug 15 04:57:08 PM PDT 24 Aug 15 04:57:09 PM PDT 24 20593240 ps
T170 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3836457388 Aug 15 04:52:58 PM PDT 24 Aug 15 04:53:04 PM PDT 24 972988496 ps
T24 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3897390608 Aug 15 04:55:17 PM PDT 24 Aug 15 04:55:43 PM PDT 24 3129061082 ps
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T80 /workspace/coverage/default/33.sram_ctrl_partial_access.2499881292 Aug 15 04:55:11 PM PDT 24 Aug 15 04:55:31 PM PDT 24 735847330 ps
T81 /workspace/coverage/default/45.sram_ctrl_multiple_keys.1197018853 Aug 15 04:56:52 PM PDT 24 Aug 15 05:05:16 PM PDT 24 6622340236 ps
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T21 /workspace/coverage/default/34.sram_ctrl_stress_all.1589290072 Aug 15 04:55:24 PM PDT 24 Aug 15 06:42:29 PM PDT 24 1259315189741 ps
T83 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1417185124 Aug 15 04:54:20 PM PDT 24 Aug 15 04:56:55 PM PDT 24 21933491623 ps
T26 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1021650649 Aug 15 04:54:38 PM PDT 24 Aug 15 04:54:49 PM PDT 24 306687097 ps
T84 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.3526998139 Aug 15 04:56:19 PM PDT 24 Aug 15 05:17:56 PM PDT 24 12138828090 ps
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T75 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3875743003 Aug 15 04:53:38 PM PDT 24 Aug 15 04:53:46 PM PDT 24 248639683 ps
T145 /workspace/coverage/default/31.sram_ctrl_ram_cfg.2930653055 Aug 15 04:54:53 PM PDT 24 Aug 15 04:54:57 PM PDT 24 1473428270 ps
T146 /workspace/coverage/default/7.sram_ctrl_partial_access.942887826 Aug 15 04:53:04 PM PDT 24 Aug 15 04:54:00 PM PDT 24 2765337861 ps
T147 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2100535736 Aug 15 04:54:30 PM PDT 24 Aug 15 04:55:53 PM PDT 24 802085436 ps
T148 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3856673532 Aug 15 04:53:49 PM PDT 24 Aug 15 04:53:53 PM PDT 24 1356206752 ps
T14 /workspace/coverage/default/1.sram_ctrl_alert_test.1836113551 Aug 15 04:52:46 PM PDT 24 Aug 15 04:52:47 PM PDT 24 48268327 ps
T149 /workspace/coverage/default/49.sram_ctrl_executable.4154368085 Aug 15 04:57:34 PM PDT 24 Aug 15 05:09:34 PM PDT 24 17005584901 ps
T150 /workspace/coverage/default/4.sram_ctrl_partial_access.3038736444 Aug 15 04:52:54 PM PDT 24 Aug 15 04:53:08 PM PDT 24 7150047968 ps
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T23 /workspace/coverage/default/16.sram_ctrl_lc_escalation.259547859 Aug 15 04:53:44 PM PDT 24 Aug 15 04:54:52 PM PDT 24 11371245050 ps
T171 /workspace/coverage/default/15.sram_ctrl_ram_cfg.1030181953 Aug 15 04:53:41 PM PDT 24 Aug 15 04:53:45 PM PDT 24 351826857 ps
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T52 /workspace/coverage/default/45.sram_ctrl_mem_walk.816113990 Aug 15 04:57:00 PM PDT 24 Aug 15 05:02:37 PM PDT 24 55307652515 ps
T173 /workspace/coverage/default/36.sram_ctrl_max_throughput.2581329995 Aug 15 04:55:36 PM PDT 24 Aug 15 04:57:45 PM PDT 24 2376620857 ps
T174 /workspace/coverage/default/2.sram_ctrl_executable.2121725182 Aug 15 04:52:50 PM PDT 24 Aug 15 04:54:29 PM PDT 24 8351926086 ps
T175 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1482111582 Aug 15 04:53:55 PM PDT 24 Aug 15 04:54:02 PM PDT 24 2674651004 ps
T176 /workspace/coverage/default/38.sram_ctrl_multiple_keys.609032638 Aug 15 04:55:49 PM PDT 24 Aug 15 05:18:29 PM PDT 24 40428426540 ps
T166 /workspace/coverage/default/33.sram_ctrl_multiple_keys.333230039 Aug 15 04:55:09 PM PDT 24 Aug 15 05:15:18 PM PDT 24 98446918648 ps
T85 /workspace/coverage/default/27.sram_ctrl_lc_escalation.371475943 Aug 15 04:54:29 PM PDT 24 Aug 15 04:54:52 PM PDT 24 15436752436 ps
T177 /workspace/coverage/default/4.sram_ctrl_executable.1952323362 Aug 15 04:52:56 PM PDT 24 Aug 15 04:54:30 PM PDT 24 7378732059 ps
T178 /workspace/coverage/default/24.sram_ctrl_bijection.1366700499 Aug 15 04:54:11 PM PDT 24 Aug 15 05:26:07 PM PDT 24 116107650133 ps
T179 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.2422718183 Aug 15 04:56:19 PM PDT 24 Aug 15 04:56:28 PM PDT 24 5214868800 ps
T180 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2236228309 Aug 15 04:53:11 PM PDT 24 Aug 15 04:58:49 PM PDT 24 5919911135 ps
T164 /workspace/coverage/default/5.sram_ctrl_executable.493556480 Aug 15 04:53:04 PM PDT 24 Aug 15 05:07:35 PM PDT 24 37636797251 ps
T181 /workspace/coverage/default/13.sram_ctrl_executable.553435518 Aug 15 04:53:34 PM PDT 24 Aug 15 05:02:35 PM PDT 24 8142205561 ps
T17 /workspace/coverage/default/0.sram_ctrl_sec_cm.1628149498 Aug 15 04:52:50 PM PDT 24 Aug 15 04:52:52 PM PDT 24 329453356 ps
T22 /workspace/coverage/default/17.sram_ctrl_stress_all.2919601709 Aug 15 04:53:41 PM PDT 24 Aug 15 05:32:26 PM PDT 24 46427781775 ps
T33 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.597687027 Aug 15 04:56:08 PM PDT 24 Aug 15 05:20:44 PM PDT 24 54053185168 ps
T34 /workspace/coverage/default/49.sram_ctrl_smoke.2252109617 Aug 15 04:57:26 PM PDT 24 Aug 15 04:58:16 PM PDT 24 1639199438 ps
T35 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.2045799857 Aug 15 04:53:36 PM PDT 24 Aug 15 04:59:32 PM PDT 24 5980094331 ps
T36 /workspace/coverage/default/15.sram_ctrl_mem_walk.1101492577 Aug 15 04:53:43 PM PDT 24 Aug 15 04:59:09 PM PDT 24 14262300768 ps
T37 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2734910368 Aug 15 04:55:25 PM PDT 24 Aug 15 05:00:10 PM PDT 24 47205147318 ps
T38 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.4226406215 Aug 15 04:52:55 PM PDT 24 Aug 15 04:53:18 PM PDT 24 750086901 ps
T39 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.484732304 Aug 15 04:53:17 PM PDT 24 Aug 15 04:57:20 PM PDT 24 15061814368 ps
T40 /workspace/coverage/default/18.sram_ctrl_mem_walk.2171938852 Aug 15 04:53:49 PM PDT 24 Aug 15 04:56:48 PM PDT 24 8993450878 ps
T165 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2111333017 Aug 15 04:53:04 PM PDT 24 Aug 15 04:57:14 PM PDT 24 9827539654 ps
T152 /workspace/coverage/default/34.sram_ctrl_lc_escalation.793120157 Aug 15 04:55:17 PM PDT 24 Aug 15 04:56:43 PM PDT 24 73305361607 ps
T182 /workspace/coverage/default/39.sram_ctrl_bijection.31572571 Aug 15 04:55:56 PM PDT 24 Aug 15 05:08:52 PM PDT 24 43319430713 ps
T183 /workspace/coverage/default/40.sram_ctrl_lc_escalation.2882729365 Aug 15 04:56:11 PM PDT 24 Aug 15 04:56:23 PM PDT 24 4964940476 ps
T184 /workspace/coverage/default/11.sram_ctrl_max_throughput.3279985833 Aug 15 04:53:25 PM PDT 24 Aug 15 04:55:34 PM PDT 24 1493356444 ps
T185 /workspace/coverage/default/7.sram_ctrl_stress_all.4182582490 Aug 15 04:53:04 PM PDT 24 Aug 15 05:47:48 PM PDT 24 79024700936 ps
T186 /workspace/coverage/default/32.sram_ctrl_lc_escalation.1523178453 Aug 15 04:55:05 PM PDT 24 Aug 15 04:56:35 PM PDT 24 29831621638 ps
T187 /workspace/coverage/default/47.sram_ctrl_max_throughput.3179436485 Aug 15 04:57:09 PM PDT 24 Aug 15 04:58:30 PM PDT 24 1504193752 ps
T188 /workspace/coverage/default/5.sram_ctrl_mem_walk.498600936 Aug 15 04:53:07 PM PDT 24 Aug 15 04:55:14 PM PDT 24 5198089797 ps
T189 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1816636914 Aug 15 04:53:50 PM PDT 24 Aug 15 04:54:29 PM PDT 24 1532533177 ps
T190 /workspace/coverage/default/5.sram_ctrl_ram_cfg.2438617413 Aug 15 04:53:06 PM PDT 24 Aug 15 04:53:10 PM PDT 24 1129101791 ps
T191 /workspace/coverage/default/16.sram_ctrl_multiple_keys.676604255 Aug 15 04:53:41 PM PDT 24 Aug 15 05:14:14 PM PDT 24 100877683328 ps
T192 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2100582771 Aug 15 04:53:12 PM PDT 24 Aug 15 04:55:15 PM PDT 24 3264511039 ps
T193 /workspace/coverage/default/17.sram_ctrl_regwen.336878208 Aug 15 04:53:43 PM PDT 24 Aug 15 04:54:13 PM PDT 24 1631391516 ps
T194 /workspace/coverage/default/15.sram_ctrl_stress_all.2042002138 Aug 15 04:53:41 PM PDT 24 Aug 15 06:22:22 PM PDT 24 55381450084 ps
T76 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3669162943 Aug 15 04:52:45 PM PDT 24 Aug 15 04:52:56 PM PDT 24 1126650953 ps
T195 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2425775411 Aug 15 04:53:05 PM PDT 24 Aug 15 04:57:48 PM PDT 24 4776219834 ps
T196 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.4180290187 Aug 15 04:55:23 PM PDT 24 Aug 15 04:58:25 PM PDT 24 8018485717 ps
T197 /workspace/coverage/default/2.sram_ctrl_regwen.1020655400 Aug 15 04:52:49 PM PDT 24 Aug 15 05:09:11 PM PDT 24 13687422642 ps
T198 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2584989501 Aug 15 04:52:46 PM PDT 24 Aug 15 04:52:50 PM PDT 24 360051070 ps
T199 /workspace/coverage/default/7.sram_ctrl_bijection.2730542517 Aug 15 04:53:05 PM PDT 24 Aug 15 05:29:57 PM PDT 24 263059758530 ps
T200 /workspace/coverage/default/30.sram_ctrl_partial_access.2494445188 Aug 15 04:54:46 PM PDT 24 Aug 15 04:54:54 PM PDT 24 764885839 ps
T201 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2098341914 Aug 15 04:54:21 PM PDT 24 Aug 15 04:55:38 PM PDT 24 196693889504 ps
T163 /workspace/coverage/default/0.sram_ctrl_executable.3676076006 Aug 15 04:52:40 PM PDT 24 Aug 15 04:56:02 PM PDT 24 23320279273 ps
T202 /workspace/coverage/default/10.sram_ctrl_smoke.1841199658 Aug 15 04:53:15 PM PDT 24 Aug 15 04:53:37 PM PDT 24 2848865727 ps
T203 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.3324947443 Aug 15 04:54:22 PM PDT 24 Aug 15 04:59:48 PM PDT 24 23505963430 ps
T49 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.650425976 Aug 15 04:52:47 PM PDT 24 Aug 15 04:55:30 PM PDT 24 10011335811 ps
T59 /workspace/coverage/default/11.sram_ctrl_bijection.467393019 Aug 15 04:53:25 PM PDT 24 Aug 15 05:35:09 PM PDT 24 551765261068 ps
T60 /workspace/coverage/default/39.sram_ctrl_stress_all.2537309962 Aug 15 04:56:13 PM PDT 24 Aug 15 05:25:50 PM PDT 24 81533155257 ps
T61 /workspace/coverage/default/38.sram_ctrl_bijection.2470029340 Aug 15 04:55:49 PM PDT 24 Aug 15 05:05:40 PM PDT 24 68232847488 ps
T62 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3744050937 Aug 15 04:53:02 PM PDT 24 Aug 15 04:58:30 PM PDT 24 27685317716 ps
T63 /workspace/coverage/default/8.sram_ctrl_lc_escalation.571571794 Aug 15 04:53:14 PM PDT 24 Aug 15 04:54:43 PM PDT 24 28289646618 ps
T64 /workspace/coverage/default/6.sram_ctrl_partial_access.1623645698 Aug 15 04:53:05 PM PDT 24 Aug 15 04:55:42 PM PDT 24 2108172372 ps
T65 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2712192457 Aug 15 04:53:48 PM PDT 24 Aug 15 04:57:11 PM PDT 24 16687520596 ps
T66 /workspace/coverage/default/37.sram_ctrl_mem_walk.3810489349 Aug 15 04:55:43 PM PDT 24 Aug 15 04:57:50 PM PDT 24 2064245872 ps
T50 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.1730309144 Aug 15 04:55:07 PM PDT 24 Aug 15 04:57:44 PM PDT 24 4959024435 ps
T204 /workspace/coverage/default/4.sram_ctrl_lc_escalation.1977710696 Aug 15 04:52:57 PM PDT 24 Aug 15 04:54:05 PM PDT 24 57550354870 ps
T205 /workspace/coverage/default/46.sram_ctrl_partial_access.1361446874 Aug 15 04:57:01 PM PDT 24 Aug 15 04:57:08 PM PDT 24 374685825 ps
T51 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3395860347 Aug 15 04:57:01 PM PDT 24 Aug 15 04:59:33 PM PDT 24 2580433082 ps
T53 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.520641944 Aug 15 04:55:08 PM PDT 24 Aug 15 04:59:22 PM PDT 24 12883050612 ps
T206 /workspace/coverage/default/12.sram_ctrl_bijection.3994108914 Aug 15 04:53:26 PM PDT 24 Aug 15 05:16:48 PM PDT 24 60635536258 ps
T207 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.1133129792 Aug 15 04:57:09 PM PDT 24 Aug 15 05:00:40 PM PDT 24 14218385544 ps
T77 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2421259576 Aug 15 04:53:33 PM PDT 24 Aug 15 04:54:05 PM PDT 24 4791997918 ps
T208 /workspace/coverage/default/19.sram_ctrl_regwen.3793343936 Aug 15 04:53:53 PM PDT 24 Aug 15 04:58:20 PM PDT 24 14511714261 ps
T106 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.2711307333 Aug 15 04:55:16 PM PDT 24 Aug 15 05:33:10 PM PDT 24 18520792870 ps
T209 /workspace/coverage/default/46.sram_ctrl_stress_all.520091056 Aug 15 04:57:09 PM PDT 24 Aug 15 05:29:34 PM PDT 24 30143499682 ps
T210 /workspace/coverage/default/12.sram_ctrl_smoke.2821816747 Aug 15 04:53:31 PM PDT 24 Aug 15 04:54:33 PM PDT 24 839811139 ps
T128 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2046134494 Aug 15 04:53:31 PM PDT 24 Aug 15 05:14:38 PM PDT 24 226879023708 ps
T15 /workspace/coverage/default/38.sram_ctrl_alert_test.3604861905 Aug 15 04:55:56 PM PDT 24 Aug 15 04:55:57 PM PDT 24 31675420 ps
T211 /workspace/coverage/default/9.sram_ctrl_bijection.1084798722 Aug 15 04:53:12 PM PDT 24 Aug 15 05:36:12 PM PDT 24 308217986637 ps
T212 /workspace/coverage/default/28.sram_ctrl_lc_escalation.4022584232 Aug 15 04:54:37 PM PDT 24 Aug 15 04:55:30 PM PDT 24 8221658612 ps
T213 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3411774802 Aug 15 04:54:29 PM PDT 24 Aug 15 04:59:48 PM PDT 24 11579505573 ps
T214 /workspace/coverage/default/15.sram_ctrl_partial_access.1324085093 Aug 15 04:53:34 PM PDT 24 Aug 15 04:54:01 PM PDT 24 937495467 ps
T18 /workspace/coverage/default/1.sram_ctrl_sec_cm.1105137249 Aug 15 04:52:48 PM PDT 24 Aug 15 04:52:53 PM PDT 24 1723168156 ps
T215 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.3109502826 Aug 15 04:53:27 PM PDT 24 Aug 15 04:59:22 PM PDT 24 21327898363 ps
T78 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.751908031 Aug 15 04:57:40 PM PDT 24 Aug 15 04:57:46 PM PDT 24 675404782 ps
T56 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.797949669 Aug 15 04:57:17 PM PDT 24 Aug 15 04:58:49 PM PDT 24 2102763000 ps
T216 /workspace/coverage/default/29.sram_ctrl_max_throughput.2808140184 Aug 15 04:54:37 PM PDT 24 Aug 15 04:54:45 PM PDT 24 2402635019 ps
T217 /workspace/coverage/default/23.sram_ctrl_smoke.3900750113 Aug 15 04:54:05 PM PDT 24 Aug 15 04:54:24 PM PDT 24 3999943323 ps
T218 /workspace/coverage/default/0.sram_ctrl_stress_all.3053312982 Aug 15 04:52:46 PM PDT 24 Aug 15 06:33:24 PM PDT 24 409796165138 ps
T219 /workspace/coverage/default/26.sram_ctrl_alert_test.126586650 Aug 15 04:54:21 PM PDT 24 Aug 15 04:54:22 PM PDT 24 18246821 ps
T220 /workspace/coverage/default/40.sram_ctrl_multiple_keys.236958622 Aug 15 04:56:11 PM PDT 24 Aug 15 05:13:37 PM PDT 24 67393899896 ps
T221 /workspace/coverage/default/45.sram_ctrl_stress_all.2461262829 Aug 15 04:57:01 PM PDT 24 Aug 15 06:27:28 PM PDT 24 119682194132 ps
T222 /workspace/coverage/default/16.sram_ctrl_ram_cfg.788715265 Aug 15 04:53:42 PM PDT 24 Aug 15 04:53:46 PM PDT 24 2595602116 ps
T223 /workspace/coverage/default/40.sram_ctrl_max_throughput.1081971474 Aug 15 04:56:10 PM PDT 24 Aug 15 04:58:31 PM PDT 24 1378185706 ps
T79 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1134645086 Aug 15 04:56:36 PM PDT 24 Aug 15 04:56:47 PM PDT 24 359755326 ps
T224 /workspace/coverage/default/31.sram_ctrl_smoke.3721030662 Aug 15 04:54:52 PM PDT 24 Aug 15 04:55:02 PM PDT 24 2976639799 ps
T225 /workspace/coverage/default/27.sram_ctrl_ram_cfg.3355809738 Aug 15 04:54:29 PM PDT 24 Aug 15 04:54:33 PM PDT 24 1403228755 ps
T226 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3316904981 Aug 15 04:54:45 PM PDT 24 Aug 15 04:56:09 PM PDT 24 3400558430 ps
T54 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3124138750 Aug 15 04:53:04 PM PDT 24 Aug 15 04:55:58 PM PDT 24 25182435241 ps
T167 /workspace/coverage/default/37.sram_ctrl_multiple_keys.2975197031 Aug 15 04:55:43 PM PDT 24 Aug 15 05:05:29 PM PDT 24 10565446639 ps
T227 /workspace/coverage/default/32.sram_ctrl_alert_test.564386527 Aug 15 04:55:11 PM PDT 24 Aug 15 04:55:12 PM PDT 24 33808213 ps
T228 /workspace/coverage/default/25.sram_ctrl_alert_test.2660092450 Aug 15 04:54:19 PM PDT 24 Aug 15 04:54:20 PM PDT 24 43275341 ps
T129 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.3519865798 Aug 15 04:54:45 PM PDT 24 Aug 15 04:57:00 PM PDT 24 6837429177 ps
T229 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2467239061 Aug 15 04:52:40 PM PDT 24 Aug 15 04:52:59 PM PDT 24 2944320442 ps
T230 /workspace/coverage/default/2.sram_ctrl_max_throughput.3042787149 Aug 15 04:52:47 PM PDT 24 Aug 15 04:54:20 PM PDT 24 1662863216 ps
T231 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1585027705 Aug 15 04:54:12 PM PDT 24 Aug 15 04:58:31 PM PDT 24 7898769698 ps
T232 /workspace/coverage/default/21.sram_ctrl_ram_cfg.359348480 Aug 15 04:54:06 PM PDT 24 Aug 15 04:54:11 PM PDT 24 2391460688 ps
T233 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.2251833607 Aug 15 04:54:47 PM PDT 24 Aug 15 05:04:50 PM PDT 24 20527806637 ps
T234 /workspace/coverage/default/18.sram_ctrl_partial_access.172013356 Aug 15 04:53:48 PM PDT 24 Aug 15 04:54:24 PM PDT 24 724405649 ps
T235 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3485294366 Aug 15 04:53:31 PM PDT 24 Aug 15 04:53:35 PM PDT 24 743601434 ps
T236 /workspace/coverage/default/5.sram_ctrl_stress_all.1018197825 Aug 15 04:53:03 PM PDT 24 Aug 15 05:58:21 PM PDT 24 26773129036 ps
T168 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3149870909 Aug 15 04:54:19 PM PDT 24 Aug 15 05:00:27 PM PDT 24 29490379190 ps
T237 /workspace/coverage/default/18.sram_ctrl_ram_cfg.3040032532 Aug 15 04:53:49 PM PDT 24 Aug 15 04:53:52 PM PDT 24 376764711 ps
T238 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3671991316 Aug 15 04:53:13 PM PDT 24 Aug 15 04:54:43 PM PDT 24 57988620930 ps
T239 /workspace/coverage/default/30.sram_ctrl_smoke.1623503596 Aug 15 04:54:49 PM PDT 24 Aug 15 04:55:02 PM PDT 24 5201935493 ps
T240 /workspace/coverage/default/23.sram_ctrl_lc_escalation.3020993229 Aug 15 04:54:03 PM PDT 24 Aug 15 04:54:17 PM PDT 24 2257190078 ps
T241 /workspace/coverage/default/24.sram_ctrl_max_throughput.2063023252 Aug 15 04:54:15 PM PDT 24 Aug 15 04:54:25 PM PDT 24 691752924 ps
T242 /workspace/coverage/default/32.sram_ctrl_ram_cfg.256567830 Aug 15 04:55:08 PM PDT 24 Aug 15 04:55:12 PM PDT 24 4774494033 ps
T243 /workspace/coverage/default/9.sram_ctrl_regwen.1239852994 Aug 15 04:53:12 PM PDT 24 Aug 15 04:59:17 PM PDT 24 15512619403 ps
T244 /workspace/coverage/default/13.sram_ctrl_mem_walk.1896395749 Aug 15 04:53:39 PM PDT 24 Aug 15 04:55:44 PM PDT 24 2061292313 ps
T245 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2526495225 Aug 15 04:57:03 PM PDT 24 Aug 15 05:03:39 PM PDT 24 6537516910 ps
T246 /workspace/coverage/default/34.sram_ctrl_mem_walk.1910057093 Aug 15 04:55:18 PM PDT 24 Aug 15 05:01:25 PM PDT 24 188177747373 ps
T247 /workspace/coverage/default/29.sram_ctrl_stress_all.1552599517 Aug 15 04:54:46 PM PDT 24 Aug 15 05:48:11 PM PDT 24 24648915858 ps
T46 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1940563739 Aug 15 04:53:56 PM PDT 24 Aug 15 04:55:15 PM PDT 24 2531816993 ps
T248 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.484069158 Aug 15 04:53:43 PM PDT 24 Aug 15 04:57:45 PM PDT 24 4715992303 ps
T249 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.542588521 Aug 15 04:53:48 PM PDT 24 Aug 15 05:14:16 PM PDT 24 55023873535 ps
T138 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2862204983 Aug 15 04:54:12 PM PDT 24 Aug 15 04:54:21 PM PDT 24 904001296 ps
T250 /workspace/coverage/default/6.sram_ctrl_multiple_keys.1929272568 Aug 15 04:53:03 PM PDT 24 Aug 15 05:04:47 PM PDT 24 9667027966 ps
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T252 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2462727480 Aug 15 04:53:50 PM PDT 24 Aug 15 05:00:13 PM PDT 24 21944800186 ps
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