T304 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2617470753 |
|
|
Aug 16 05:57:07 PM PDT 24 |
Aug 16 05:57:29 PM PDT 24 |
1087760264 ps |
T305 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.897327240 |
|
|
Aug 16 05:57:16 PM PDT 24 |
Aug 16 06:02:07 PM PDT 24 |
21884000165 ps |
T306 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.3072247843 |
|
|
Aug 16 05:57:48 PM PDT 24 |
Aug 16 05:58:48 PM PDT 24 |
7690366466 ps |
T307 |
/workspace/coverage/default/26.sram_ctrl_executable.1436480682 |
|
|
Aug 16 05:57:41 PM PDT 24 |
Aug 16 06:33:25 PM PDT 24 |
90945313964 ps |
T308 |
/workspace/coverage/default/34.sram_ctrl_regwen.2449835605 |
|
|
Aug 16 05:58:37 PM PDT 24 |
Aug 16 06:03:30 PM PDT 24 |
7245196629 ps |
T309 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1511405322 |
|
|
Aug 16 05:57:54 PM PDT 24 |
Aug 16 05:59:18 PM PDT 24 |
7116334261 ps |
T310 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.1709557897 |
|
|
Aug 16 05:59:13 PM PDT 24 |
Aug 16 05:59:21 PM PDT 24 |
5321089721 ps |
T311 |
/workspace/coverage/default/45.sram_ctrl_regwen.1111652308 |
|
|
Aug 16 05:59:20 PM PDT 24 |
Aug 16 06:08:50 PM PDT 24 |
81998801816 ps |
T312 |
/workspace/coverage/default/16.sram_ctrl_stress_all.1329595064 |
|
|
Aug 16 05:57:51 PM PDT 24 |
Aug 16 08:03:58 PM PDT 24 |
324098322508 ps |
T313 |
/workspace/coverage/default/30.sram_ctrl_partial_access.4215259613 |
|
|
Aug 16 05:58:04 PM PDT 24 |
Aug 16 05:58:18 PM PDT 24 |
4151960725 ps |
T314 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3437373973 |
|
|
Aug 16 05:58:38 PM PDT 24 |
Aug 16 05:58:47 PM PDT 24 |
1617255850 ps |
T315 |
/workspace/coverage/default/18.sram_ctrl_bijection.650878273 |
|
|
Aug 16 05:57:19 PM PDT 24 |
Aug 16 06:38:20 PM PDT 24 |
132503445448 ps |
T316 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.2114192129 |
|
|
Aug 16 05:58:32 PM PDT 24 |
Aug 16 05:59:36 PM PDT 24 |
2240646922 ps |
T317 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2699730849 |
|
|
Aug 16 05:57:29 PM PDT 24 |
Aug 16 05:59:03 PM PDT 24 |
2743816191 ps |
T318 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2296855072 |
|
|
Aug 16 05:59:50 PM PDT 24 |
Aug 16 06:00:29 PM PDT 24 |
1086871514 ps |
T319 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3945143318 |
|
|
Aug 16 05:56:59 PM PDT 24 |
Aug 16 05:57:58 PM PDT 24 |
10957780982 ps |
T320 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1054139125 |
|
|
Aug 16 05:57:55 PM PDT 24 |
Aug 16 05:57:56 PM PDT 24 |
43277101 ps |
T321 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.408906888 |
|
|
Aug 16 05:59:04 PM PDT 24 |
Aug 16 06:04:02 PM PDT 24 |
2914367011 ps |
T322 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3999558095 |
|
|
Aug 16 05:59:42 PM PDT 24 |
Aug 16 06:09:14 PM PDT 24 |
17342472652 ps |
T323 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.2523018735 |
|
|
Aug 16 05:57:08 PM PDT 24 |
Aug 16 06:10:49 PM PDT 24 |
15159340347 ps |
T324 |
/workspace/coverage/default/22.sram_ctrl_smoke.2720560628 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 05:58:09 PM PDT 24 |
639560997 ps |
T325 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.2617545027 |
|
|
Aug 16 05:56:38 PM PDT 24 |
Aug 16 05:56:54 PM PDT 24 |
2470329381 ps |
T326 |
/workspace/coverage/default/8.sram_ctrl_smoke.1835747785 |
|
|
Aug 16 05:57:14 PM PDT 24 |
Aug 16 05:58:18 PM PDT 24 |
1351153000 ps |
T327 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2269026507 |
|
|
Aug 16 05:58:34 PM PDT 24 |
Aug 16 05:58:45 PM PDT 24 |
704680227 ps |
T328 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2234772395 |
|
|
Aug 16 05:59:45 PM PDT 24 |
Aug 16 06:01:44 PM PDT 24 |
8838381203 ps |
T17 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.1212127037 |
|
|
Aug 16 05:56:42 PM PDT 24 |
Aug 16 05:56:45 PM PDT 24 |
302327291 ps |
T329 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1532565620 |
|
|
Aug 16 05:57:14 PM PDT 24 |
Aug 16 05:59:55 PM PDT 24 |
14711414895 ps |
T330 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2488969726 |
|
|
Aug 16 05:57:05 PM PDT 24 |
Aug 16 05:57:56 PM PDT 24 |
2305874437 ps |
T140 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2954241209 |
|
|
Aug 16 05:59:00 PM PDT 24 |
Aug 16 06:01:47 PM PDT 24 |
4969584081 ps |
T331 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2954775954 |
|
|
Aug 16 05:59:40 PM PDT 24 |
Aug 16 06:02:10 PM PDT 24 |
3123442363 ps |
T332 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.761689629 |
|
|
Aug 16 05:58:00 PM PDT 24 |
Aug 16 06:04:27 PM PDT 24 |
25577610713 ps |
T333 |
/workspace/coverage/default/31.sram_ctrl_regwen.1447685274 |
|
|
Aug 16 05:58:12 PM PDT 24 |
Aug 16 06:05:23 PM PDT 24 |
12028099195 ps |
T334 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2596219911 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 05:58:06 PM PDT 24 |
1413190387 ps |
T335 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1069287499 |
|
|
Aug 16 05:59:59 PM PDT 24 |
Aug 16 06:00:24 PM PDT 24 |
690409274 ps |
T336 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.591254869 |
|
|
Aug 16 05:59:23 PM PDT 24 |
Aug 16 06:06:58 PM PDT 24 |
28136919163 ps |
T337 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2882156522 |
|
|
Aug 16 05:58:07 PM PDT 24 |
Aug 16 05:58:10 PM PDT 24 |
457379090 ps |
T338 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.4229582274 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 05:58:07 PM PDT 24 |
5574793036 ps |
T339 |
/workspace/coverage/default/14.sram_ctrl_partial_access.3626625363 |
|
|
Aug 16 05:57:22 PM PDT 24 |
Aug 16 05:57:47 PM PDT 24 |
5471545765 ps |
T340 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3330898772 |
|
|
Aug 16 05:58:29 PM PDT 24 |
Aug 16 06:40:07 PM PDT 24 |
45555144297 ps |
T341 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.4251921188 |
|
|
Aug 16 05:57:11 PM PDT 24 |
Aug 16 05:57:23 PM PDT 24 |
1071519409 ps |
T342 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.110769339 |
|
|
Aug 16 05:57:17 PM PDT 24 |
Aug 16 06:27:16 PM PDT 24 |
73961985725 ps |
T343 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1849185169 |
|
|
Aug 16 05:59:43 PM PDT 24 |
Aug 16 06:05:09 PM PDT 24 |
5256382093 ps |
T344 |
/workspace/coverage/default/26.sram_ctrl_smoke.2890307752 |
|
|
Aug 16 05:57:37 PM PDT 24 |
Aug 16 05:58:01 PM PDT 24 |
3514209517 ps |
T345 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2545340876 |
|
|
Aug 16 05:59:21 PM PDT 24 |
Aug 16 05:59:26 PM PDT 24 |
2590647314 ps |
T346 |
/workspace/coverage/default/10.sram_ctrl_regwen.1979804890 |
|
|
Aug 16 05:56:58 PM PDT 24 |
Aug 16 06:23:36 PM PDT 24 |
13279175569 ps |
T347 |
/workspace/coverage/default/44.sram_ctrl_stress_all.351579747 |
|
|
Aug 16 05:59:11 PM PDT 24 |
Aug 16 08:29:02 PM PDT 24 |
163104739877 ps |
T348 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3798484657 |
|
|
Aug 16 05:57:57 PM PDT 24 |
Aug 16 06:04:22 PM PDT 24 |
16375816101 ps |
T349 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1754210755 |
|
|
Aug 16 05:57:56 PM PDT 24 |
Aug 16 06:04:43 PM PDT 24 |
16711907511 ps |
T350 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3910908306 |
|
|
Aug 16 05:57:52 PM PDT 24 |
Aug 16 06:12:36 PM PDT 24 |
31382040622 ps |
T351 |
/workspace/coverage/default/23.sram_ctrl_executable.1398458693 |
|
|
Aug 16 05:57:28 PM PDT 24 |
Aug 16 06:01:04 PM PDT 24 |
4924179865 ps |
T352 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2211251535 |
|
|
Aug 16 05:58:12 PM PDT 24 |
Aug 16 06:20:16 PM PDT 24 |
31139754590 ps |
T353 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.3094233831 |
|
|
Aug 16 05:57:54 PM PDT 24 |
Aug 16 05:58:10 PM PDT 24 |
1460495325 ps |
T354 |
/workspace/coverage/default/9.sram_ctrl_bijection.184407815 |
|
|
Aug 16 05:57:24 PM PDT 24 |
Aug 16 06:30:00 PM PDT 24 |
380526015200 ps |
T355 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4268871907 |
|
|
Aug 16 05:56:51 PM PDT 24 |
Aug 16 05:58:16 PM PDT 24 |
121728471457 ps |
T356 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1972370968 |
|
|
Aug 16 05:57:20 PM PDT 24 |
Aug 16 05:59:35 PM PDT 24 |
1661842616 ps |
T357 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2278634109 |
|
|
Aug 16 05:59:49 PM PDT 24 |
Aug 16 06:00:06 PM PDT 24 |
2325058868 ps |
T358 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.2993549524 |
|
|
Aug 16 05:57:08 PM PDT 24 |
Aug 16 06:00:09 PM PDT 24 |
24892249457 ps |
T359 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2584218301 |
|
|
Aug 16 05:58:03 PM PDT 24 |
Aug 16 05:58:06 PM PDT 24 |
691881641 ps |
T360 |
/workspace/coverage/default/7.sram_ctrl_partial_access.273824011 |
|
|
Aug 16 05:57:10 PM PDT 24 |
Aug 16 05:57:27 PM PDT 24 |
1304464120 ps |
T361 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.356631408 |
|
|
Aug 16 05:57:23 PM PDT 24 |
Aug 16 05:58:08 PM PDT 24 |
846898903 ps |
T362 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3643321372 |
|
|
Aug 16 05:56:47 PM PDT 24 |
Aug 16 05:56:59 PM PDT 24 |
1403452292 ps |
T363 |
/workspace/coverage/default/10.sram_ctrl_partial_access.931589734 |
|
|
Aug 16 05:57:14 PM PDT 24 |
Aug 16 05:57:22 PM PDT 24 |
3975436885 ps |
T364 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.268220026 |
|
|
Aug 16 05:57:30 PM PDT 24 |
Aug 16 06:01:41 PM PDT 24 |
4118907232 ps |
T365 |
/workspace/coverage/default/24.sram_ctrl_alert_test.3508454553 |
|
|
Aug 16 05:57:33 PM PDT 24 |
Aug 16 05:57:33 PM PDT 24 |
27810144 ps |
T366 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3910256176 |
|
|
Aug 16 05:57:30 PM PDT 24 |
Aug 16 06:02:15 PM PDT 24 |
10821121798 ps |
T367 |
/workspace/coverage/default/30.sram_ctrl_bijection.311569707 |
|
|
Aug 16 05:58:12 PM PDT 24 |
Aug 16 06:20:51 PM PDT 24 |
86534458636 ps |
T368 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3234235719 |
|
|
Aug 16 05:57:23 PM PDT 24 |
Aug 16 06:00:26 PM PDT 24 |
6764704139 ps |
T369 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2475068126 |
|
|
Aug 16 05:59:50 PM PDT 24 |
Aug 16 06:00:12 PM PDT 24 |
3026552051 ps |
T370 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3485115422 |
|
|
Aug 16 05:57:59 PM PDT 24 |
Aug 16 06:05:44 PM PDT 24 |
88195473949 ps |
T371 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1360719087 |
|
|
Aug 16 05:58:39 PM PDT 24 |
Aug 16 06:00:43 PM PDT 24 |
1583701160 ps |
T372 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.601242788 |
|
|
Aug 16 05:59:42 PM PDT 24 |
Aug 16 06:26:37 PM PDT 24 |
20957238555 ps |
T373 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2706345913 |
|
|
Aug 16 05:58:11 PM PDT 24 |
Aug 16 05:58:12 PM PDT 24 |
19802298 ps |
T374 |
/workspace/coverage/default/17.sram_ctrl_bijection.1026904704 |
|
|
Aug 16 05:57:21 PM PDT 24 |
Aug 16 06:23:56 PM PDT 24 |
174006314186 ps |
T375 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2444766537 |
|
|
Aug 16 05:57:30 PM PDT 24 |
Aug 16 05:59:42 PM PDT 24 |
8225820988 ps |
T376 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.1169406924 |
|
|
Aug 16 05:57:46 PM PDT 24 |
Aug 16 06:00:25 PM PDT 24 |
5981661523 ps |
T377 |
/workspace/coverage/default/6.sram_ctrl_executable.3102299590 |
|
|
Aug 16 05:56:48 PM PDT 24 |
Aug 16 06:14:16 PM PDT 24 |
49176944194 ps |
T378 |
/workspace/coverage/default/49.sram_ctrl_executable.4276380086 |
|
|
Aug 16 05:59:49 PM PDT 24 |
Aug 16 06:14:30 PM PDT 24 |
32222778897 ps |
T141 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.336982191 |
|
|
Aug 16 05:58:11 PM PDT 24 |
Aug 16 05:59:20 PM PDT 24 |
4381646749 ps |
T379 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.2123360514 |
|
|
Aug 16 05:58:04 PM PDT 24 |
Aug 16 06:17:55 PM PDT 24 |
14941501635 ps |
T380 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.4073929643 |
|
|
Aug 16 05:58:13 PM PDT 24 |
Aug 16 05:59:42 PM PDT 24 |
18017154998 ps |
T381 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.3735583816 |
|
|
Aug 16 05:59:41 PM PDT 24 |
Aug 16 05:59:49 PM PDT 24 |
700045896 ps |
T382 |
/workspace/coverage/default/29.sram_ctrl_alert_test.2792279277 |
|
|
Aug 16 05:58:04 PM PDT 24 |
Aug 16 05:58:05 PM PDT 24 |
13410878 ps |
T383 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.428508168 |
|
|
Aug 16 05:56:49 PM PDT 24 |
Aug 16 06:03:59 PM PDT 24 |
6165861396 ps |
T384 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2168227291 |
|
|
Aug 16 05:56:58 PM PDT 24 |
Aug 16 05:57:18 PM PDT 24 |
1073275432 ps |
T385 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3629706380 |
|
|
Aug 16 05:57:59 PM PDT 24 |
Aug 16 06:00:06 PM PDT 24 |
10952922418 ps |
T386 |
/workspace/coverage/default/35.sram_ctrl_alert_test.541943230 |
|
|
Aug 16 05:58:42 PM PDT 24 |
Aug 16 05:58:43 PM PDT 24 |
39269842 ps |
T387 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.226986069 |
|
|
Aug 16 05:58:30 PM PDT 24 |
Aug 16 06:02:14 PM PDT 24 |
17910017033 ps |
T388 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3782109704 |
|
|
Aug 16 05:57:49 PM PDT 24 |
Aug 16 06:18:46 PM PDT 24 |
9046310951 ps |
T389 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.843389653 |
|
|
Aug 16 05:57:11 PM PDT 24 |
Aug 16 05:57:17 PM PDT 24 |
2682245901 ps |
T390 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3016148804 |
|
|
Aug 16 05:58:01 PM PDT 24 |
Aug 16 06:16:56 PM PDT 24 |
31209790258 ps |
T391 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.1144789288 |
|
|
Aug 16 05:57:53 PM PDT 24 |
Aug 16 05:58:20 PM PDT 24 |
2960487322 ps |
T392 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3547723029 |
|
|
Aug 16 05:59:21 PM PDT 24 |
Aug 16 06:16:58 PM PDT 24 |
57943365599 ps |
T393 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.610563845 |
|
|
Aug 16 05:59:12 PM PDT 24 |
Aug 16 05:59:16 PM PDT 24 |
683073769 ps |
T394 |
/workspace/coverage/default/8.sram_ctrl_bijection.716424567 |
|
|
Aug 16 05:57:38 PM PDT 24 |
Aug 16 06:45:37 PM PDT 24 |
351494468158 ps |
T395 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3686008286 |
|
|
Aug 16 05:57:19 PM PDT 24 |
Aug 16 05:58:26 PM PDT 24 |
11386719909 ps |
T396 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.804314218 |
|
|
Aug 16 05:57:26 PM PDT 24 |
Aug 16 05:57:29 PM PDT 24 |
2596646116 ps |
T397 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3849627773 |
|
|
Aug 16 05:59:29 PM PDT 24 |
Aug 16 06:14:24 PM PDT 24 |
7442166190 ps |
T398 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.1234449751 |
|
|
Aug 16 05:58:12 PM PDT 24 |
Aug 16 06:00:52 PM PDT 24 |
6987097510 ps |
T399 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1485633312 |
|
|
Aug 16 05:59:12 PM PDT 24 |
Aug 16 06:00:47 PM PDT 24 |
2761023354 ps |
T400 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.3681825773 |
|
|
Aug 16 05:59:43 PM PDT 24 |
Aug 16 06:01:02 PM PDT 24 |
1490734614 ps |
T401 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.1371388644 |
|
|
Aug 16 05:57:41 PM PDT 24 |
Aug 16 06:19:39 PM PDT 24 |
12147312686 ps |
T402 |
/workspace/coverage/default/45.sram_ctrl_smoke.2567727165 |
|
|
Aug 16 05:59:09 PM PDT 24 |
Aug 16 05:59:37 PM PDT 24 |
1185585546 ps |
T403 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3379181221 |
|
|
Aug 16 05:56:48 PM PDT 24 |
Aug 16 06:02:40 PM PDT 24 |
29835837140 ps |
T404 |
/workspace/coverage/default/30.sram_ctrl_stress_all.2413126484 |
|
|
Aug 16 05:58:05 PM PDT 24 |
Aug 16 07:00:01 PM PDT 24 |
41480051524 ps |
T405 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.4138402137 |
|
|
Aug 16 05:58:15 PM PDT 24 |
Aug 16 05:59:40 PM PDT 24 |
58415684895 ps |
T406 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.231084703 |
|
|
Aug 16 05:56:50 PM PDT 24 |
Aug 16 05:58:18 PM PDT 24 |
4627165712 ps |
T407 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.1040672383 |
|
|
Aug 16 05:58:23 PM PDT 24 |
Aug 16 06:01:17 PM PDT 24 |
14114848684 ps |
T408 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2421573252 |
|
|
Aug 16 05:56:41 PM PDT 24 |
Aug 16 06:11:24 PM PDT 24 |
24218130080 ps |
T409 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.363500532 |
|
|
Aug 16 05:56:47 PM PDT 24 |
Aug 16 05:59:13 PM PDT 24 |
2679361650 ps |
T410 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3867190173 |
|
|
Aug 16 05:57:54 PM PDT 24 |
Aug 16 06:01:53 PM PDT 24 |
13674937094 ps |
T411 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1517242127 |
|
|
Aug 16 05:56:53 PM PDT 24 |
Aug 16 05:57:12 PM PDT 24 |
5033938124 ps |
T412 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.1782953029 |
|
|
Aug 16 05:59:15 PM PDT 24 |
Aug 16 06:01:05 PM PDT 24 |
800167512 ps |
T413 |
/workspace/coverage/default/0.sram_ctrl_executable.710318061 |
|
|
Aug 16 05:56:31 PM PDT 24 |
Aug 16 06:20:51 PM PDT 24 |
71691141503 ps |
T414 |
/workspace/coverage/default/41.sram_ctrl_alert_test.2760556952 |
|
|
Aug 16 05:58:54 PM PDT 24 |
Aug 16 05:58:55 PM PDT 24 |
32284839 ps |
T415 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.4170797655 |
|
|
Aug 16 05:56:42 PM PDT 24 |
Aug 16 06:01:51 PM PDT 24 |
4547294644 ps |
T416 |
/workspace/coverage/default/14.sram_ctrl_alert_test.1823778693 |
|
|
Aug 16 05:57:28 PM PDT 24 |
Aug 16 05:57:28 PM PDT 24 |
16331645 ps |
T417 |
/workspace/coverage/default/21.sram_ctrl_bijection.1839978025 |
|
|
Aug 16 05:57:29 PM PDT 24 |
Aug 16 06:17:15 PM PDT 24 |
188106464684 ps |
T418 |
/workspace/coverage/default/21.sram_ctrl_executable.747430571 |
|
|
Aug 16 05:58:04 PM PDT 24 |
Aug 16 06:14:36 PM PDT 24 |
7837551468 ps |
T419 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.853242277 |
|
|
Aug 16 05:57:59 PM PDT 24 |
Aug 16 05:58:02 PM PDT 24 |
362122731 ps |
T420 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2299527877 |
|
|
Aug 16 05:56:57 PM PDT 24 |
Aug 16 05:59:44 PM PDT 24 |
5680181365 ps |
T421 |
/workspace/coverage/default/35.sram_ctrl_bijection.1096207894 |
|
|
Aug 16 05:58:25 PM PDT 24 |
Aug 16 06:35:06 PM PDT 24 |
140182286257 ps |
T422 |
/workspace/coverage/default/5.sram_ctrl_executable.3050026479 |
|
|
Aug 16 05:56:43 PM PDT 24 |
Aug 16 06:27:51 PM PDT 24 |
125190112676 ps |
T423 |
/workspace/coverage/default/46.sram_ctrl_executable.3784612342 |
|
|
Aug 16 05:59:29 PM PDT 24 |
Aug 16 06:10:00 PM PDT 24 |
8009537725 ps |
T424 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.565891031 |
|
|
Aug 16 05:58:07 PM PDT 24 |
Aug 16 06:00:17 PM PDT 24 |
3810800050 ps |
T425 |
/workspace/coverage/default/4.sram_ctrl_alert_test.2093447641 |
|
|
Aug 16 05:57:11 PM PDT 24 |
Aug 16 05:57:12 PM PDT 24 |
14571556 ps |
T426 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2796478389 |
|
|
Aug 16 05:59:07 PM PDT 24 |
Aug 16 06:02:10 PM PDT 24 |
5401375465 ps |
T427 |
/workspace/coverage/default/9.sram_ctrl_smoke.500110917 |
|
|
Aug 16 05:57:14 PM PDT 24 |
Aug 16 05:57:34 PM PDT 24 |
1374874860 ps |
T428 |
/workspace/coverage/default/4.sram_ctrl_smoke.2060780185 |
|
|
Aug 16 05:57:13 PM PDT 24 |
Aug 16 05:57:21 PM PDT 24 |
761513486 ps |
T429 |
/workspace/coverage/default/2.sram_ctrl_partial_access.3335350334 |
|
|
Aug 16 05:57:05 PM PDT 24 |
Aug 16 05:59:13 PM PDT 24 |
3981557858 ps |
T430 |
/workspace/coverage/default/44.sram_ctrl_partial_access.3564115574 |
|
|
Aug 16 05:59:16 PM PDT 24 |
Aug 16 06:01:38 PM PDT 24 |
4178120590 ps |
T431 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1529545236 |
|
|
Aug 16 05:56:30 PM PDT 24 |
Aug 16 05:57:34 PM PDT 24 |
1402686422 ps |
T432 |
/workspace/coverage/default/41.sram_ctrl_executable.2245347156 |
|
|
Aug 16 05:59:01 PM PDT 24 |
Aug 16 06:23:06 PM PDT 24 |
22956945183 ps |
T433 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.1332022729 |
|
|
Aug 16 05:58:11 PM PDT 24 |
Aug 16 06:02:50 PM PDT 24 |
20094096609 ps |
T434 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2235339433 |
|
|
Aug 16 05:59:10 PM PDT 24 |
Aug 16 06:31:24 PM PDT 24 |
101057495690 ps |
T435 |
/workspace/coverage/default/28.sram_ctrl_bijection.604412186 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 06:23:23 PM PDT 24 |
22858723516 ps |
T436 |
/workspace/coverage/default/2.sram_ctrl_smoke.2630024279 |
|
|
Aug 16 05:56:37 PM PDT 24 |
Aug 16 05:56:47 PM PDT 24 |
747015800 ps |
T437 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.691356808 |
|
|
Aug 16 05:58:07 PM PDT 24 |
Aug 16 05:58:24 PM PDT 24 |
2934501319 ps |
T438 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.2886345292 |
|
|
Aug 16 05:57:37 PM PDT 24 |
Aug 16 06:02:58 PM PDT 24 |
14582573708 ps |
T439 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2813400157 |
|
|
Aug 16 05:59:03 PM PDT 24 |
Aug 16 06:01:28 PM PDT 24 |
2583513378 ps |
T440 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4266594335 |
|
|
Aug 16 05:57:36 PM PDT 24 |
Aug 16 05:57:42 PM PDT 24 |
671641963 ps |
T441 |
/workspace/coverage/default/47.sram_ctrl_regwen.1525298101 |
|
|
Aug 16 05:59:41 PM PDT 24 |
Aug 16 06:24:45 PM PDT 24 |
4070216262 ps |
T442 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.863694156 |
|
|
Aug 16 05:58:43 PM PDT 24 |
Aug 16 06:03:13 PM PDT 24 |
21271211178 ps |
T443 |
/workspace/coverage/default/0.sram_ctrl_smoke.1765719861 |
|
|
Aug 16 05:56:37 PM PDT 24 |
Aug 16 05:56:42 PM PDT 24 |
1880598987 ps |
T444 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.900791506 |
|
|
Aug 16 05:58:00 PM PDT 24 |
Aug 16 06:19:51 PM PDT 24 |
70251727666 ps |
T445 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1544300866 |
|
|
Aug 16 05:58:45 PM PDT 24 |
Aug 16 06:09:09 PM PDT 24 |
27429414054 ps |
T446 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1569172402 |
|
|
Aug 16 05:57:56 PM PDT 24 |
Aug 16 06:11:47 PM PDT 24 |
144573832033 ps |
T447 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1390186934 |
|
|
Aug 16 05:57:58 PM PDT 24 |
Aug 16 06:00:08 PM PDT 24 |
4076084355 ps |
T448 |
/workspace/coverage/default/49.sram_ctrl_bijection.3259760050 |
|
|
Aug 16 05:59:57 PM PDT 24 |
Aug 16 06:49:17 PM PDT 24 |
916960370169 ps |
T449 |
/workspace/coverage/default/30.sram_ctrl_alert_test.805594355 |
|
|
Aug 16 05:58:14 PM PDT 24 |
Aug 16 05:58:15 PM PDT 24 |
27814194 ps |
T450 |
/workspace/coverage/default/33.sram_ctrl_stress_all.2782823593 |
|
|
Aug 16 05:58:11 PM PDT 24 |
Aug 16 06:28:37 PM PDT 24 |
79601220482 ps |
T451 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.288846877 |
|
|
Aug 16 05:57:55 PM PDT 24 |
Aug 16 05:58:04 PM PDT 24 |
2344213012 ps |
T452 |
/workspace/coverage/default/47.sram_ctrl_partial_access.126131447 |
|
|
Aug 16 05:59:30 PM PDT 24 |
Aug 16 06:00:00 PM PDT 24 |
11280828893 ps |
T453 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2314583332 |
|
|
Aug 16 05:58:43 PM PDT 24 |
Aug 16 05:59:21 PM PDT 24 |
7318676725 ps |
T454 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3603629828 |
|
|
Aug 16 05:59:39 PM PDT 24 |
Aug 16 06:02:07 PM PDT 24 |
13107163546 ps |
T455 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.2708442725 |
|
|
Aug 16 05:56:41 PM PDT 24 |
Aug 16 05:59:25 PM PDT 24 |
28847381882 ps |
T456 |
/workspace/coverage/default/27.sram_ctrl_bijection.2034577231 |
|
|
Aug 16 05:57:43 PM PDT 24 |
Aug 16 06:28:00 PM PDT 24 |
78378367973 ps |
T457 |
/workspace/coverage/default/5.sram_ctrl_regwen.723485446 |
|
|
Aug 16 05:57:09 PM PDT 24 |
Aug 16 06:21:25 PM PDT 24 |
70599582787 ps |
T458 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2463219777 |
|
|
Aug 16 05:59:20 PM PDT 24 |
Aug 16 05:59:28 PM PDT 24 |
559539546 ps |
T459 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.1061815270 |
|
|
Aug 16 05:57:59 PM PDT 24 |
Aug 16 05:58:03 PM PDT 24 |
361789457 ps |
T460 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.4164551518 |
|
|
Aug 16 05:57:18 PM PDT 24 |
Aug 16 05:59:56 PM PDT 24 |
9680101091 ps |
T461 |
/workspace/coverage/default/28.sram_ctrl_stress_all.3510782572 |
|
|
Aug 16 05:57:53 PM PDT 24 |
Aug 16 07:15:08 PM PDT 24 |
222334146568 ps |
T462 |
/workspace/coverage/default/7.sram_ctrl_stress_all.3952721382 |
|
|
Aug 16 05:57:13 PM PDT 24 |
Aug 16 06:08:27 PM PDT 24 |
8663284792 ps |
T463 |
/workspace/coverage/default/15.sram_ctrl_executable.3835158411 |
|
|
Aug 16 05:57:38 PM PDT 24 |
Aug 16 06:32:24 PM PDT 24 |
29483312240 ps |
T464 |
/workspace/coverage/default/16.sram_ctrl_bijection.2974114897 |
|
|
Aug 16 05:57:46 PM PDT 24 |
Aug 16 06:25:16 PM PDT 24 |
23126704219 ps |
T465 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2053628800 |
|
|
Aug 16 05:58:42 PM PDT 24 |
Aug 16 06:01:36 PM PDT 24 |
20911421392 ps |
T466 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.2285394674 |
|
|
Aug 16 05:57:15 PM PDT 24 |
Aug 16 05:57:56 PM PDT 24 |
2194133987 ps |
T467 |
/workspace/coverage/default/11.sram_ctrl_bijection.2038176856 |
|
|
Aug 16 05:57:21 PM PDT 24 |
Aug 16 06:10:05 PM PDT 24 |
120107293109 ps |
T468 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.4193679359 |
|
|
Aug 16 05:57:21 PM PDT 24 |
Aug 16 06:22:30 PM PDT 24 |
90296638103 ps |
T469 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2535556431 |
|
|
Aug 16 05:57:46 PM PDT 24 |
Aug 16 05:57:59 PM PDT 24 |
3257939420 ps |
T470 |
/workspace/coverage/default/13.sram_ctrl_regwen.4169835583 |
|
|
Aug 16 05:57:15 PM PDT 24 |
Aug 16 06:00:27 PM PDT 24 |
8810192766 ps |
T471 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1338260940 |
|
|
Aug 16 05:57:13 PM PDT 24 |
Aug 16 05:58:23 PM PDT 24 |
1420577685 ps |
T472 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.931631235 |
|
|
Aug 16 05:56:47 PM PDT 24 |
Aug 16 05:56:56 PM PDT 24 |
335315510 ps |
T473 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.271604063 |
|
|
Aug 16 05:57:14 PM PDT 24 |
Aug 16 06:23:34 PM PDT 24 |
40111495071 ps |
T474 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1871668775 |
|
|
Aug 16 05:57:17 PM PDT 24 |
Aug 16 05:59:48 PM PDT 24 |
7833705729 ps |
T475 |
/workspace/coverage/default/39.sram_ctrl_smoke.2036613267 |
|
|
Aug 16 05:58:46 PM PDT 24 |
Aug 16 06:00:36 PM PDT 24 |
1610343273 ps |
T476 |
/workspace/coverage/default/31.sram_ctrl_partial_access.1006128752 |
|
|
Aug 16 05:58:10 PM PDT 24 |
Aug 16 05:58:31 PM PDT 24 |
1272141656 ps |
T477 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3592745037 |
|
|
Aug 16 05:57:13 PM PDT 24 |
Aug 16 05:57:59 PM PDT 24 |
14728579618 ps |
T142 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.3971026983 |
|
|
Aug 16 05:58:09 PM PDT 24 |
Aug 16 05:58:20 PM PDT 24 |
528143173 ps |
T478 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.128110841 |
|
|
Aug 16 05:57:11 PM PDT 24 |
Aug 16 05:58:22 PM PDT 24 |
2639606110 ps |
T479 |
/workspace/coverage/default/26.sram_ctrl_bijection.17318539 |
|
|
Aug 16 05:58:00 PM PDT 24 |
Aug 16 06:38:15 PM PDT 24 |
230224438662 ps |
T480 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.2894320234 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 06:00:40 PM PDT 24 |
5171166629 ps |
T481 |
/workspace/coverage/default/36.sram_ctrl_bijection.1772810839 |
|
|
Aug 16 05:58:46 PM PDT 24 |
Aug 16 06:16:32 PM PDT 24 |
15708489278 ps |
T482 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2291342984 |
|
|
Aug 16 05:56:58 PM PDT 24 |
Aug 16 05:57:01 PM PDT 24 |
696284685 ps |
T483 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1023410033 |
|
|
Aug 16 05:57:03 PM PDT 24 |
Aug 16 06:02:37 PM PDT 24 |
35015407924 ps |
T484 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3097504122 |
|
|
Aug 16 05:58:01 PM PDT 24 |
Aug 16 06:00:50 PM PDT 24 |
7020675644 ps |
T485 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3343648838 |
|
|
Aug 16 05:59:26 PM PDT 24 |
Aug 16 06:00:20 PM PDT 24 |
12405342052 ps |
T486 |
/workspace/coverage/default/20.sram_ctrl_regwen.4010775161 |
|
|
Aug 16 05:57:57 PM PDT 24 |
Aug 16 06:03:10 PM PDT 24 |
3882523578 ps |
T487 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.440721081 |
|
|
Aug 16 05:57:16 PM PDT 24 |
Aug 16 05:57:20 PM PDT 24 |
1977980671 ps |
T488 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.428515716 |
|
|
Aug 16 05:56:39 PM PDT 24 |
Aug 16 05:56:51 PM PDT 24 |
699945350 ps |
T489 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3928105857 |
|
|
Aug 16 05:57:35 PM PDT 24 |
Aug 16 06:01:57 PM PDT 24 |
29680918871 ps |
T490 |
/workspace/coverage/default/11.sram_ctrl_regwen.918333847 |
|
|
Aug 16 05:57:13 PM PDT 24 |
Aug 16 06:07:56 PM PDT 24 |
35011059470 ps |
T491 |
/workspace/coverage/default/36.sram_ctrl_executable.1134415232 |
|
|
Aug 16 05:58:51 PM PDT 24 |
Aug 16 06:03:56 PM PDT 24 |
14319507680 ps |
T492 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2241897574 |
|
|
Aug 16 05:56:55 PM PDT 24 |
Aug 16 05:56:55 PM PDT 24 |
34569365 ps |
T493 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2557346498 |
|
|
Aug 16 05:58:44 PM PDT 24 |
Aug 16 06:01:43 PM PDT 24 |
69375873460 ps |
T494 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2647038432 |
|
|
Aug 16 05:56:32 PM PDT 24 |
Aug 16 05:56:44 PM PDT 24 |
1403011246 ps |
T495 |
/workspace/coverage/default/24.sram_ctrl_executable.3289212768 |
|
|
Aug 16 05:57:57 PM PDT 24 |
Aug 16 06:12:13 PM PDT 24 |
17367714452 ps |
T496 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1480280171 |
|
|
Aug 16 05:57:59 PM PDT 24 |
Aug 16 05:58:49 PM PDT 24 |
752717224 ps |
T497 |
/workspace/coverage/default/44.sram_ctrl_executable.2051815958 |
|
|
Aug 16 05:59:34 PM PDT 24 |
Aug 16 06:15:25 PM PDT 24 |
58999779570 ps |
T498 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1747674856 |
|
|
Aug 16 05:59:49 PM PDT 24 |
Aug 16 06:00:45 PM PDT 24 |
32019977617 ps |
T499 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.875334077 |
|
|
Aug 16 05:57:23 PM PDT 24 |
Aug 16 05:57:48 PM PDT 24 |
628790162 ps |
T500 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.3037512768 |
|
|
Aug 16 05:58:01 PM PDT 24 |
Aug 16 06:18:27 PM PDT 24 |
28755668898 ps |
T501 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.933906458 |
|
|
Aug 16 05:57:00 PM PDT 24 |
Aug 16 05:58:08 PM PDT 24 |
35334637779 ps |
T502 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.252511170 |
|
|
Aug 16 05:56:55 PM PDT 24 |
Aug 16 05:56:59 PM PDT 24 |
2253068058 ps |
T503 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.4141644481 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 06:02:32 PM PDT 24 |
3837984297 ps |
T504 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.2870969811 |
|
|
Aug 16 05:58:50 PM PDT 24 |
Aug 16 06:27:50 PM PDT 24 |
20260362814 ps |
T505 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.1606246951 |
|
|
Aug 16 05:57:05 PM PDT 24 |
Aug 16 06:14:43 PM PDT 24 |
9967041449 ps |
T506 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.20415571 |
|
|
Aug 16 05:59:20 PM PDT 24 |
Aug 16 06:05:26 PM PDT 24 |
31822610455 ps |
T507 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.4107980237 |
|
|
Aug 16 05:58:53 PM PDT 24 |
Aug 16 05:58:57 PM PDT 24 |
1355064423 ps |
T508 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1532505328 |
|
|
Aug 16 05:58:44 PM PDT 24 |
Aug 16 05:58:48 PM PDT 24 |
706411089 ps |
T509 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2053422154 |
|
|
Aug 16 05:56:44 PM PDT 24 |
Aug 16 06:06:03 PM PDT 24 |
9732797125 ps |
T510 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3699979852 |
|
|
Aug 16 05:59:10 PM PDT 24 |
Aug 16 06:04:20 PM PDT 24 |
5476381510 ps |
T511 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.3505618001 |
|
|
Aug 16 05:57:30 PM PDT 24 |
Aug 16 06:04:22 PM PDT 24 |
10020648272 ps |
T512 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.2781629356 |
|
|
Aug 16 05:57:52 PM PDT 24 |
Aug 16 06:00:42 PM PDT 24 |
9370966597 ps |
T513 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2565576072 |
|
|
Aug 16 05:56:56 PM PDT 24 |
Aug 16 07:18:07 PM PDT 24 |
771412288242 ps |
T514 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2389790123 |
|
|
Aug 16 05:57:11 PM PDT 24 |
Aug 16 06:28:18 PM PDT 24 |
105973721626 ps |
T515 |
/workspace/coverage/default/28.sram_ctrl_alert_test.1651403043 |
|
|
Aug 16 05:58:09 PM PDT 24 |
Aug 16 05:58:10 PM PDT 24 |
33359815 ps |
T516 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2938604950 |
|
|
Aug 16 05:57:14 PM PDT 24 |
Aug 16 05:57:32 PM PDT 24 |
645747821 ps |
T517 |
/workspace/coverage/default/25.sram_ctrl_executable.310475334 |
|
|
Aug 16 05:57:37 PM PDT 24 |
Aug 16 06:00:44 PM PDT 24 |
35515683879 ps |
T518 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1791590782 |
|
|
Aug 16 05:57:01 PM PDT 24 |
Aug 16 05:57:15 PM PDT 24 |
2766813381 ps |
T519 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.4192852899 |
|
|
Aug 16 05:57:47 PM PDT 24 |
Aug 16 06:02:17 PM PDT 24 |
3785858253 ps |
T520 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.240706127 |
|
|
Aug 16 05:58:00 PM PDT 24 |
Aug 16 05:59:21 PM PDT 24 |
2857983466 ps |
T521 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2938494640 |
|
|
Aug 16 05:59:53 PM PDT 24 |
Aug 16 06:55:12 PM PDT 24 |
136167156362 ps |
T522 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.601231161 |
|
|
Aug 16 05:57:21 PM PDT 24 |
Aug 16 06:05:42 PM PDT 24 |
20142471534 ps |
T523 |
/workspace/coverage/default/34.sram_ctrl_smoke.2795171732 |
|
|
Aug 16 05:58:14 PM PDT 24 |
Aug 16 05:58:21 PM PDT 24 |
2876881203 ps |
T524 |
/workspace/coverage/default/32.sram_ctrl_smoke.4116329267 |
|
|
Aug 16 05:58:04 PM PDT 24 |
Aug 16 05:59:36 PM PDT 24 |
1688481434 ps |
T525 |
/workspace/coverage/default/7.sram_ctrl_regwen.883557144 |
|
|
Aug 16 05:57:13 PM PDT 24 |
Aug 16 05:58:23 PM PDT 24 |
4004407173 ps |
T526 |
/workspace/coverage/default/40.sram_ctrl_regwen.2712447741 |
|
|
Aug 16 05:59:11 PM PDT 24 |
Aug 16 06:08:48 PM PDT 24 |
69244456400 ps |
T527 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3403162433 |
|
|
Aug 16 05:57:55 PM PDT 24 |
Aug 16 05:58:22 PM PDT 24 |
4261696513 ps |
T528 |
/workspace/coverage/default/32.sram_ctrl_executable.1432808382 |
|
|
Aug 16 05:58:07 PM PDT 24 |
Aug 16 06:14:00 PM PDT 24 |
177796708731 ps |
T529 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1716985576 |
|
|
Aug 16 05:57:10 PM PDT 24 |
Aug 16 05:58:57 PM PDT 24 |
2511524709 ps |
T530 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.186381348 |
|
|
Aug 16 05:59:04 PM PDT 24 |
Aug 16 06:04:40 PM PDT 24 |
6498878686 ps |
T531 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3192410257 |
|
|
Aug 16 05:56:34 PM PDT 24 |
Aug 16 06:00:52 PM PDT 24 |
8678069565 ps |
T532 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1337654494 |
|
|
Aug 16 05:56:54 PM PDT 24 |
Aug 16 06:03:34 PM PDT 24 |
14677782870 ps |
T533 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.218278661 |
|
|
Aug 16 05:58:17 PM PDT 24 |
Aug 16 06:04:06 PM PDT 24 |
55925014008 ps |
T534 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.768169211 |
|
|
Aug 16 05:57:09 PM PDT 24 |
Aug 16 05:58:00 PM PDT 24 |
1362725816 ps |
T535 |
/workspace/coverage/default/4.sram_ctrl_executable.1213508092 |
|
|
Aug 16 05:56:46 PM PDT 24 |
Aug 16 06:27:17 PM PDT 24 |
69316676571 ps |
T536 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.1004999990 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 06:11:41 PM PDT 24 |
41305958749 ps |
T537 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2380653003 |
|
|
Aug 16 05:56:41 PM PDT 24 |
Aug 16 05:56:42 PM PDT 24 |
24337969 ps |
T538 |
/workspace/coverage/default/19.sram_ctrl_partial_access.4122569059 |
|
|
Aug 16 05:57:52 PM PDT 24 |
Aug 16 05:57:57 PM PDT 24 |
387142723 ps |
T539 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2546276983 |
|
|
Aug 16 05:59:15 PM PDT 24 |
Aug 16 06:00:14 PM PDT 24 |
26394090876 ps |
T540 |
/workspace/coverage/default/38.sram_ctrl_regwen.1222089286 |
|
|
Aug 16 05:58:51 PM PDT 24 |
Aug 16 06:10:56 PM PDT 24 |
8135983802 ps |
T541 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3837264747 |
|
|
Aug 16 05:57:57 PM PDT 24 |
Aug 16 06:00:42 PM PDT 24 |
821477355 ps |
T143 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2717149178 |
|
|
Aug 16 05:58:56 PM PDT 24 |
Aug 16 05:59:48 PM PDT 24 |
2055413523 ps |
T542 |
/workspace/coverage/default/29.sram_ctrl_stress_all.2758216271 |
|
|
Aug 16 05:58:02 PM PDT 24 |
Aug 16 06:56:54 PM PDT 24 |
77064779528 ps |
T543 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1670694816 |
|
|
Aug 16 05:56:36 PM PDT 24 |
Aug 16 06:01:53 PM PDT 24 |
98934874111 ps |
T544 |
/workspace/coverage/default/14.sram_ctrl_bijection.208433308 |
|
|
Aug 16 05:57:12 PM PDT 24 |
Aug 16 06:09:49 PM PDT 24 |
22551845906 ps |
T545 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3397908630 |
|
|
Aug 16 05:56:58 PM PDT 24 |
Aug 16 05:57:24 PM PDT 24 |
959241653 ps |
T546 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.1804990684 |
|
|
Aug 16 05:57:59 PM PDT 24 |
Aug 16 05:58:36 PM PDT 24 |
759230950 ps |
T547 |
/workspace/coverage/default/17.sram_ctrl_regwen.2511694961 |
|
|
Aug 16 05:57:21 PM PDT 24 |
Aug 16 05:59:21 PM PDT 24 |
4516997069 ps |
T548 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.234266687 |
|
|
Aug 16 05:58:01 PM PDT 24 |
Aug 16 05:58:15 PM PDT 24 |
2868275766 ps |