Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(8,32'h00000096,32'h00000069)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(8,32'h00000096,32'h00000069)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_31/sram_ctrl_main-sim-vcs/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi8_cov_of_mubi8_cov_of_tb.dut.u_otp_en_sram_ifetch_mubi_cov_if	100.00	1	100	1	64	64

---

Group Instance : mubi8_cov_of_mubi8_cov_of_tb.dut.u_otp_en_sram_ifetch_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi8_cov_of_mubi8_cov_of_tb.dut.u_otp_en_sram_ifetch_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	10	0	10	100.00

Variables for Group Instance mubi8_cov_of_mubi8_cov_of_tb.dut.u_otp_en_sram_ifetch_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	10	0	10	100.00	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	57	1			T26	1		T66	2		T141	1
others[1]	64	1			T38	1		T18	2		T142	2
others[2]	74	1			T25	1		T39	1		T144	1
others[3]	66	1			T66	1		T39	1		T18	1
others[4]	58	1			T66	1		T39	2		T145	1
others[5]	52	1			T25	1		T26	1		T66	2
others[6]	67	1			T38	1		T39	1		T18	1
others[7]	83	1			T66	2		T38	1		T19	1
false	5781	1			T1	1		T2	1		T3	1
true	675	1			T27	1		T25	2		T66	5