Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16429151	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

157874881

1

T2

9090

T3

41309

T4

505

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	85812026	1			T2	5067		T3	22819		T4	286
values[0x0]	42606400	1			T2	2351		T3	10787		T4	134
values[0x1]	45885606	1			T2	2630		T3	11817		T4	140

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8361525	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

165942507

1

T2

9584

T3

43371

T4

530

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	592098	1			T2	45		T3	211		T4	14
valid_sources[0x01]	578089	1			T2	34		T3	192		T5	2
valid_sources[0x02]	576364	1			T2	39		T3	161		T5	9
valid_sources[0x03]	588370	1			T2	56		T3	167		T6	3
valid_sources[0x04]	577864	1			T2	62		T3	161		T6	4
valid_sources[0x05]	564406	1			T2	40		T3	148		T6	3
valid_sources[0x06]	563562	1			T2	42		T3	153		T5	8
valid_sources[0x07]	585577	1			T2	46		T3	182		T6	2
valid_sources[0x08]	543915	1			T2	26		T3	211		T5	6
valid_sources[0x09]	661214	1			T2	40		T3	132		T6	4
valid_sources[0x0a]	672034	1			T2	55		T3	210		T6	2
valid_sources[0x0b]	548050	1			T2	32		T3	177		T7	1554
valid_sources[0x0c]	594194	1			T2	60		T3	129		T6	1
valid_sources[0x0d]	612374	1			T2	33		T3	165		T6	1
valid_sources[0x0e]	536757	1			T2	47		T3	179		T4	18
valid_sources[0x0f]	570077	1			T2	48		T3	192		T11	3
valid_sources[0x10]	651177	1			T2	16		T3	173		T5	4
valid_sources[0x11]	546786	1			T2	52		T3	190		T5	2
valid_sources[0x12]	573742	1			T2	40		T3	189		T6	3
valid_sources[0x13]	557550	1			T2	31		T3	215		T5	16
valid_sources[0x14]	582690	1			T2	29		T3	147		T5	14
valid_sources[0x15]	550018	1			T2	21		T3	141		T5	19
valid_sources[0x16]	610399	1			T2	36		T3	172		T6	2
valid_sources[0x17]	559367	1			T2	57		T3	169		T11	9
valid_sources[0x18]	617596	1			T2	39		T3	227		T6	3
valid_sources[0x19]	559681	1			T2	37		T3	214		T5	5
valid_sources[0x1a]	1534160	1			T2	43		T3	174		T5	41
valid_sources[0x1b]	558282	1			T2	49		T3	166		T6	2
valid_sources[0x1c]	650685	1			T2	46		T3	149		T6	2
valid_sources[0x1d]	555424	1			T2	46		T3	197		T5	18
valid_sources[0x1e]	998522	1			T2	28		T3	145		T11	4
valid_sources[0x1f]	553661	1			T2	40		T3	139		T4	10
valid_sources[0x20]	613584	1			T2	44		T3	173		T4	17
valid_sources[0x21]	642713	1			T2	47		T3	177		T6	2
valid_sources[0x22]	574130	1			T2	53		T3	196		T6	2
valid_sources[0x23]	606283	1			T2	35		T3	176		T5	9
valid_sources[0x24]	581579	1			T2	31		T3	195		T5	14
valid_sources[0x25]	589991	1			T2	37		T3	176		T5	4
valid_sources[0x26]	568655	1			T2	38		T3	126		T11	3
valid_sources[0x27]	577893	1			T2	37		T3	139		T6	1
valid_sources[0x28]	562278	1			T2	29		T3	208		T6	1
valid_sources[0x29]	564608	1			T2	47		T3	182		T6	4
valid_sources[0x2a]	546985	1			T2	48		T3	179		T6	1
valid_sources[0x2b]	568432	1			T2	33		T3	188		T6	4
valid_sources[0x2c]	613969	1			T2	26		T3	176		T4	4
valid_sources[0x2d]	951084	1			T2	43		T3	168		T5	4
valid_sources[0x2e]	537636	1			T2	34		T3	239		T6	1
valid_sources[0x2f]	536054	1			T2	40		T3	181		T5	22
valid_sources[0x30]	546359	1			T2	29		T3	151		T11	10
valid_sources[0x31]	568553	1			T2	33		T3	123		T6	3
valid_sources[0x32]	680442	1			T2	40		T3	150		T4	9
valid_sources[0x33]	617950	1			T2	36		T3	192		T6	3
valid_sources[0x34]	550538	1			T2	26		T3	160		T5	2
valid_sources[0x35]	565488	1			T2	38		T3	172		T5	3
valid_sources[0x36]	603129	1			T2	41		T3	200		T6	1
valid_sources[0x37]	539483	1			T2	49		T3	210		T4	12
valid_sources[0x38]	569878	1			T2	43		T3	192		T4	22
valid_sources[0x39]	602554	1			T2	28		T3	195		T6	2
valid_sources[0x3a]	543356	1			T2	24		T3	172		T6	1
valid_sources[0x3b]	706602	1			T2	46		T3	213		T6	1
valid_sources[0x3c]	590354	1			T2	55		T3	202		T11	15
valid_sources[0x3d]	614400	1			T2	51		T3	190		T5	21
valid_sources[0x3e]	600680	1			T2	33		T3	152		T5	4
valid_sources[0x3f]	576443	1			T2	37		T3	179		T6	5
valid_sources[0x40]	2965819	1			T2	57		T3	168		T6	3
valid_sources[0x41]	580772	1			T2	34		T3	150		T6	1
valid_sources[0x42]	560044	1			T2	36		T3	169		T5	13
valid_sources[0x43]	566180	1			T2	46		T3	202		T6	2
valid_sources[0x44]	600822	1			T2	27		T3	172		T11	3
valid_sources[0x45]	550196	1			T2	42		T3	190		T6	1
valid_sources[0x46]	2086369	1			T2	46		T3	208		T6	3
valid_sources[0x47]	747857	1			T2	30		T3	177		T5	13
valid_sources[0x48]	567245	1			T2	37		T3	179		T4	15
valid_sources[0x49]	725765	1			T2	44		T3	200		T6	1
valid_sources[0x4a]	644879	1			T2	41		T3	182		T5	3
valid_sources[0x4b]	580803	1			T2	29		T3	163		T4	3
valid_sources[0x4c]	578345	1			T2	28		T3	173		T5	4
valid_sources[0x4d]	630786	1			T2	39		T3	140		T5	6
valid_sources[0x4e]	561634	1			T2	31		T3	181		T7	1553
valid_sources[0x4f]	586501	1			T2	51		T3	189		T6	3
valid_sources[0x50]	702452	1			T2	28		T3	172		T4	2
valid_sources[0x51]	766419	1			T2	50		T3	162		T6	2
valid_sources[0x52]	1301755	1			T2	38		T3	165		T5	9
valid_sources[0x53]	632888	1			T2	39		T3	189		T5	6
valid_sources[0x54]	612249	1			T2	44		T3	158		T5	7
valid_sources[0x55]	583524	1			T2	38		T3	135		T6	2
valid_sources[0x56]	539632	1			T2	35		T3	162		T6	3
valid_sources[0x57]	556054	1			T2	56		T3	168		T4	11
valid_sources[0x58]	1131609	1			T2	29		T3	225		T4	7
valid_sources[0x59]	1517049	1			T2	39		T3	148		T5	4
valid_sources[0x5a]	568620	1			T2	34		T3	159		T4	24
valid_sources[0x5b]	573095	1			T2	40		T3	190		T6	5
valid_sources[0x5c]	2022275	1			T2	50		T3	205		T6	1
valid_sources[0x5d]	651656	1			T2	36		T3	184		T6	1
valid_sources[0x5e]	2846111	1			T2	49		T3	190		T6	2
valid_sources[0x5f]	543195	1			T2	35		T3	186		T6	2
valid_sources[0x60]	568292	1			T2	37		T3	188		T4	23
valid_sources[0x61]	548569	1			T2	35		T3	150		T6	1
valid_sources[0x62]	594254	1			T2	50		T3	158		T6	1
valid_sources[0x63]	557371	1			T2	31		T3	209		T5	22
valid_sources[0x64]	592178	1			T2	35		T3	172		T6	2
valid_sources[0x65]	752830	1			T2	46		T3	161		T4	16
valid_sources[0x66]	541913	1			T2	52		T3	196		T5	9
valid_sources[0x67]	553737	1			T2	38		T3	152		T6	2
valid_sources[0x68]	2281677	1			T2	33		T3	177		T11	12
valid_sources[0x69]	625560	1			T2	21		T3	179		T4	29
valid_sources[0x6a]	572718	1			T2	48		T3	183		T6	3
valid_sources[0x6b]	573453	1			T2	52		T3	158		T6	2
valid_sources[0x6c]	575635	1			T2	27		T3	189		T6	8
valid_sources[0x6d]	553423	1			T2	36		T3	194		T6	2
valid_sources[0x6e]	657928	1			T2	36		T3	191		T5	9
valid_sources[0x6f]	548742	1			T2	40		T3	178		T6	2
valid_sources[0x70]	574771	1			T2	32		T3	181		T5	37
valid_sources[0x71]	587392	1			T2	40		T3	163		T6	4
valid_sources[0x72]	577596	1			T2	35		T3	147		T4	23
valid_sources[0x73]	548305	1			T2	38		T3	140		T4	15
valid_sources[0x74]	571258	1			T2	32		T3	153		T5	21
valid_sources[0x75]	695869	1			T2	19		T3	192		T11	7
valid_sources[0x76]	565077	1			T2	50		T3	161		T6	2
valid_sources[0x77]	570351	1			T2	44		T3	215		T6	4
valid_sources[0x78]	569854	1			T2	55		T3	180		T5	9
valid_sources[0x79]	573374	1			T2	50		T3	189		T5	3
valid_sources[0x7a]	592010	1			T2	30		T3	181		T5	5
valid_sources[0x7b]	595686	1			T2	34		T3	171		T4	44
valid_sources[0x7c]	573517	1			T2	54		T3	178		T6	3
valid_sources[0x7d]	556206	1			T2	36		T3	196		T5	5
valid_sources[0x7e]	592777	1			T2	38		T3	178		T6	4
valid_sources[0x7f]	552353	1			T2	40		T3	158		T4	7
valid_sources[0x80]	598938	1			T2	55		T3	217		T6	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

77552105

1

T2

4579

T3

20760

T4

262

values[0x0]

all_enables

biggest_size

40156121

1

T2

2197

T3

10191

T4

123

values[0x1]

all_enables

biggest_size

40166655

1

T2

2314

T3

10358

T4

120

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49180	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

158132

1

T1

3

T2

1

T3

20

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	57898	1			T3	24		T4	40		T5	80
values[0x0]	71942	1			T1	11		T2	1		T3	18
values[0x1]	77472	1			T1	11		T3	22		T12	13

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	38211	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

169101

1

T1

6

T2

1

T3

23

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	567	1			T11	4		T21	11		T22	5
valid_sources[0x01]	714	1			T11	3		T21	3		T22	3
valid_sources[0x02]	824	1			T3	8		T5	2		T11	7
valid_sources[0x03]	686	1			T5	1		T11	4		T21	3
valid_sources[0x04]	615	1			T11	4		T21	9		T22	2
valid_sources[0x05]	643	1			T11	5		T21	6		T22	3
valid_sources[0x06]	756	1			T5	1		T11	1		T21	8
valid_sources[0x07]	647	1			T11	2		T21	7		T53	5
valid_sources[0x08]	1075	1			T11	4		T21	7		T22	5
valid_sources[0x09]	620	1			T11	6		T21	9		T22	1
valid_sources[0x0a]	778	1			T11	3		T21	9		T22	10
valid_sources[0x0b]	776	1			T11	6		T21	8		T22	3
valid_sources[0x0c]	658	1			T4	2		T11	5		T22	3
valid_sources[0x0d]	815	1			T15	1		T11	6		T21	10
valid_sources[0x0e]	756	1			T4	1		T11	1		T21	9
valid_sources[0x0f]	812	1			T5	1		T11	5		T21	13
valid_sources[0x10]	1254	1			T3	1		T11	5		T21	8
valid_sources[0x11]	1007	1			T14	1		T11	1		T21	7
valid_sources[0x12]	831	1			T5	1		T11	2		T21	16
valid_sources[0x13]	684	1			T11	5		T21	10		T22	8
valid_sources[0x14]	528	1			T11	5		T21	8		T22	10
valid_sources[0x15]	1051	1			T11	2		T21	8		T22	8
valid_sources[0x16]	1116	1			T11	8		T21	2		T22	4
valid_sources[0x17]	467	1			T15	1		T11	5		T21	10
valid_sources[0x18]	727	1			T11	8		T21	8		T22	8
valid_sources[0x19]	839	1			T11	5		T21	8		T22	9
valid_sources[0x1a]	611	1			T4	2		T11	6		T21	6
valid_sources[0x1b]	665	1			T11	8		T21	6		T39	1
valid_sources[0x1c]	608	1			T11	6		T21	8		T22	2
valid_sources[0x1d]	898	1			T11	5		T21	4		T22	4
valid_sources[0x1e]	872	1			T11	7		T21	6		T22	8
valid_sources[0x1f]	942	1			T7	2		T11	10		T21	6
valid_sources[0x20]	637	1			T11	11		T21	10		T22	3
valid_sources[0x21]	888	1			T11	6		T21	4		T22	7
valid_sources[0x22]	1040	1			T11	3		T21	8		T22	12
valid_sources[0x23]	1058	1			T4	1		T5	1		T11	5
valid_sources[0x24]	655	1			T2	1		T11	7		T21	7
valid_sources[0x25]	745	1			T5	2		T11	9		T21	7
valid_sources[0x26]	850	1			T4	1		T11	3		T21	10
valid_sources[0x27]	1227	1			T3	3		T11	2		T21	14
valid_sources[0x28]	831	1			T5	1		T11	4		T21	7
valid_sources[0x29]	575	1			T11	2		T21	6		T22	8
valid_sources[0x2a]	672	1			T5	2		T11	7		T21	6
valid_sources[0x2b]	1044	1			T4	3		T21	5		T8	1
valid_sources[0x2c]	753	1			T11	1		T21	11		T22	12
valid_sources[0x2d]	1049	1			T3	5		T11	5		T21	6
valid_sources[0x2e]	615	1			T11	8		T21	7		T22	5
valid_sources[0x2f]	733	1			T5	1		T11	5		T21	5
valid_sources[0x30]	837	1			T4	5		T5	1		T11	2
valid_sources[0x31]	680	1			T3	5		T11	5		T21	5
valid_sources[0x32]	610	1			T3	1		T11	3		T21	3
valid_sources[0x33]	725	1			T5	2		T11	2		T21	8
valid_sources[0x34]	727	1			T11	9		T29	2		T21	8
valid_sources[0x35]	640	1			T11	2		T21	1		T22	1
valid_sources[0x36]	618	1			T11	1		T21	9		T22	7
valid_sources[0x37]	1035	1			T5	3		T11	7		T21	6
valid_sources[0x38]	871	1			T11	8		T21	7		T22	5
valid_sources[0x39]	1055	1			T3	1		T11	2		T21	5
valid_sources[0x3a]	809	1			T11	5		T21	5		T22	5
valid_sources[0x3b]	1003	1			T5	1		T11	5		T21	11
valid_sources[0x3c]	666	1			T5	1		T11	5		T21	11
valid_sources[0x3d]	1168	1			T11	7		T21	6		T22	8
valid_sources[0x3e]	1110	1			T11	4		T21	11		T22	4
valid_sources[0x3f]	655	1			T3	3		T5	1		T11	2
valid_sources[0x40]	608	1			T11	7		T21	10		T22	2
valid_sources[0x41]	751	1			T4	1		T11	7		T21	5
valid_sources[0x42]	754	1			T11	5		T21	8		T22	2
valid_sources[0x43]	710	1			T5	1		T11	5		T21	4
valid_sources[0x44]	713	1			T11	10		T21	10		T22	12
valid_sources[0x45]	1082	1			T11	3		T21	6		T22	2
valid_sources[0x46]	634	1			T11	2		T21	5		T22	6
valid_sources[0x47]	711	1			T4	6		T11	3		T21	8
valid_sources[0x48]	1137	1			T11	3		T21	8		T22	9
valid_sources[0x49]	1001	1			T11	5		T21	6		T22	6
valid_sources[0x4a]	1028	1			T11	5		T21	11		T22	14
valid_sources[0x4b]	654	1			T11	6		T21	10		T22	3
valid_sources[0x4c]	863	1			T11	3		T21	13		T53	3
valid_sources[0x4d]	888	1			T11	3		T21	6		T22	1
valid_sources[0x4e]	1108	1			T5	1		T11	8		T21	6
valid_sources[0x4f]	543	1			T5	1		T11	5		T21	8
valid_sources[0x50]	897	1			T3	4		T5	1		T11	6
valid_sources[0x51]	601	1			T11	6		T21	5		T22	3
valid_sources[0x52]	767	1			T3	1		T11	3		T21	12
valid_sources[0x53]	1012	1			T3	2		T6	40		T11	6
valid_sources[0x54]	604	1			T15	1		T11	4		T21	5
valid_sources[0x55]	895	1			T11	4		T21	4		T22	10
valid_sources[0x56]	637	1			T11	4		T21	10		T22	8
valid_sources[0x57]	793	1			T11	4		T21	4		T22	12
valid_sources[0x58]	569	1			T11	1		T21	9		T22	5
valid_sources[0x59]	935	1			T11	1		T21	7		T53	3
valid_sources[0x5a]	996	1			T5	1		T11	4		T21	9
valid_sources[0x5b]	952	1			T11	3		T21	9		T22	10
valid_sources[0x5c]	1219	1			T3	1		T11	2		T21	12
valid_sources[0x5d]	574	1			T5	1		T11	1		T21	10
valid_sources[0x5e]	963	1			T11	10		T21	9		T22	5
valid_sources[0x5f]	635	1			T11	7		T21	8		T22	6
valid_sources[0x60]	529	1			T5	1		T11	7		T21	6
valid_sources[0x61]	1486	1			T11	4		T21	7		T22	5
valid_sources[0x62]	975	1			T11	3		T21	5		T22	16
valid_sources[0x63]	1048	1			T11	4		T21	7		T22	4
valid_sources[0x64]	1036	1			T11	2		T21	7		T22	3
valid_sources[0x65]	615	1			T11	3		T21	9		T53	3
valid_sources[0x66]	637	1			T11	2		T21	1		T22	8
valid_sources[0x67]	960	1			T11	8		T21	4		T22	12
valid_sources[0x68]	884	1			T11	5		T21	3		T22	7
valid_sources[0x69]	1050	1			T11	8		T21	8		T22	3
valid_sources[0x6a]	539	1			T5	4		T11	4		T21	6
valid_sources[0x6b]	596	1			T4	5		T11	2		T21	5
valid_sources[0x6c]	1018	1			T11	6		T25	1		T21	10
valid_sources[0x6d]	691	1			T5	3		T11	4		T21	10
valid_sources[0x6e]	575	1			T11	2		T25	1		T21	11
valid_sources[0x6f]	891	1			T11	5		T22	6		T53	13
valid_sources[0x70]	961	1			T3	4		T11	5		T21	4
valid_sources[0x71]	1253	1			T1	22		T11	2		T21	8
valid_sources[0x72]	726	1			T5	1		T11	1		T21	8
valid_sources[0x73]	1036	1			T3	1		T5	3		T11	5
valid_sources[0x74]	1055	1			T15	1		T11	6		T21	8
valid_sources[0x75]	1184	1			T12	1		T11	2		T21	5
valid_sources[0x76]	655	1			T11	6		T21	12		T22	8
valid_sources[0x77]	708	1			T11	5		T21	4		T22	5
valid_sources[0x78]	630	1			T11	3		T21	6		T22	4
valid_sources[0x79]	661	1			T11	3		T21	12		T22	13
valid_sources[0x7a]	842	1			T5	2		T11	5		T21	10
valid_sources[0x7b]	1378	1			T11	8		T21	9		T53	5
valid_sources[0x7c]	740	1			T11	2		T21	4		T22	6
valid_sources[0x7d]	1055	1			T11	5		T21	8		T22	10
valid_sources[0x7e]	720	1			T5	2		T11	8		T21	5
valid_sources[0x7f]	767	1			T12	1		T11	2		T21	11
valid_sources[0x80]	900	1			T12	1		T5	1		T11	8

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

43143

1

T3

7

T11

260

T21

474

values[0x0]

all_enables

biggest_size

58952

1

T1

2

T2

1

T3

8

values[0x1]

all_enables

biggest_size

56037

1

T1

1

T3

5

T12

2