| T263 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.380124353 |
|
|
Dec 27 01:00:32 PM PST 23 |
Dec 27 01:00:46 PM PST 23 |
595037168 ps |
| T264 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.3813574272 |
|
|
Dec 27 01:00:02 PM PST 23 |
Dec 27 01:21:15 PM PST 23 |
12350070699 ps |
| T265 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.4263129481 |
|
|
Dec 27 12:59:56 PM PST 23 |
Dec 27 01:00:03 PM PST 23 |
395950037 ps |
| T266 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3009403530 |
|
|
Dec 27 12:59:40 PM PST 23 |
Dec 27 12:59:50 PM PST 23 |
434287958 ps |
| T267 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.4270897286 |
|
|
Dec 27 12:59:44 PM PST 23 |
Dec 27 12:59:52 PM PST 23 |
67962333 ps |
| T268 |
/workspace/coverage/default/27.sram_ctrl_bijection.3482346569 |
|
|
Dec 27 01:00:21 PM PST 23 |
Dec 27 01:00:53 PM PST 23 |
6069028890 ps |
| T114 |
/workspace/coverage/default/25.sram_ctrl_executable.1161916922 |
|
|
Dec 27 01:00:00 PM PST 23 |
Dec 27 01:17:54 PM PST 23 |
2595956093 ps |
| T269 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3228282114 |
|
|
Dec 27 01:00:10 PM PST 23 |
Dec 27 01:00:45 PM PST 23 |
99650695 ps |
| T270 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.1132793558 |
|
|
Dec 27 01:00:46 PM PST 23 |
Dec 27 01:02:02 PM PST 23 |
133637220 ps |
| T271 |
/workspace/coverage/default/36.sram_ctrl_smoke.3897321621 |
|
|
Dec 27 01:00:33 PM PST 23 |
Dec 27 01:00:56 PM PST 23 |
3287544871 ps |
| T272 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1059508869 |
|
|
Dec 27 12:59:32 PM PST 23 |
Dec 27 01:20:58 PM PST 23 |
13456644088 ps |
| T273 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2839897699 |
|
|
Dec 27 01:00:22 PM PST 23 |
Dec 27 01:07:30 PM PST 23 |
28001063432 ps |
| T120 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.278811899 |
|
|
Dec 27 01:00:48 PM PST 23 |
Dec 27 01:06:11 PM PST 23 |
7271656954 ps |
| T274 |
/workspace/coverage/default/17.sram_ctrl_regwen.3647471743 |
|
|
Dec 27 01:00:06 PM PST 23 |
Dec 27 01:03:41 PM PST 23 |
1581006966 ps |
| T275 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1552022431 |
|
|
Dec 27 01:00:30 PM PST 23 |
Dec 27 02:32:44 PM PST 23 |
886865763 ps |
| T276 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1925453149 |
|
|
Dec 27 01:00:00 PM PST 23 |
Dec 27 01:00:10 PM PST 23 |
137309570 ps |
| T277 |
/workspace/coverage/default/49.sram_ctrl_bijection.439204725 |
|
|
Dec 27 01:00:40 PM PST 23 |
Dec 27 01:01:05 PM PST 23 |
3361997417 ps |
| T278 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1349888819 |
|
|
Dec 27 01:00:40 PM PST 23 |
Dec 27 01:00:52 PM PST 23 |
89026145 ps |
| T121 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3079009344 |
|
|
Dec 27 12:59:03 PM PST 23 |
Dec 27 01:22:58 PM PST 23 |
14452135737 ps |
| T279 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1694993377 |
|
|
Dec 27 01:01:06 PM PST 23 |
Dec 27 01:01:09 PM PST 23 |
36323230 ps |
| T280 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2195332280 |
|
|
Dec 27 01:00:23 PM PST 23 |
Dec 27 01:01:24 PM PST 23 |
203508526 ps |
| T281 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1884948894 |
|
|
Dec 27 01:00:14 PM PST 23 |
Dec 27 01:05:19 PM PST 23 |
3306279773 ps |
| T282 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1394718584 |
|
|
Dec 27 01:00:04 PM PST 23 |
Dec 27 01:01:00 PM PST 23 |
644431534 ps |
| T283 |
/workspace/coverage/default/26.sram_ctrl_partial_access.922277964 |
|
|
Dec 27 01:00:25 PM PST 23 |
Dec 27 01:00:49 PM PST 23 |
3755579871 ps |
| T284 |
/workspace/coverage/default/15.sram_ctrl_partial_access.3514477321 |
|
|
Dec 27 01:00:02 PM PST 23 |
Dec 27 01:00:19 PM PST 23 |
4743153537 ps |
| T117 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.45361506 |
|
|
Dec 27 12:59:57 PM PST 23 |
Dec 27 01:00:04 PM PST 23 |
169311185 ps |
| T285 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1570523104 |
|
|
Dec 27 01:00:25 PM PST 23 |
Dec 27 01:14:27 PM PST 23 |
11018745236 ps |
| T286 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2988784629 |
|
|
Dec 27 01:00:33 PM PST 23 |
Dec 27 01:06:16 PM PST 23 |
30781539135 ps |
| T287 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.1127883974 |
|
|
Dec 27 01:00:25 PM PST 23 |
Dec 27 01:02:03 PM PST 23 |
1951891239 ps |
| T288 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2690059425 |
|
|
Dec 27 01:00:40 PM PST 23 |
Dec 27 01:19:50 PM PST 23 |
14353509676 ps |
| T289 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1785136335 |
|
|
Dec 27 01:00:42 PM PST 23 |
Dec 27 01:00:59 PM PST 23 |
136585439 ps |
| T290 |
/workspace/coverage/default/13.sram_ctrl_alert_test.1035116072 |
|
|
Dec 27 12:59:42 PM PST 23 |
Dec 27 12:59:47 PM PST 23 |
78725014 ps |
| T291 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3332265466 |
|
|
Dec 27 01:00:30 PM PST 23 |
Dec 27 01:04:22 PM PST 23 |
18814640182 ps |
| T292 |
/workspace/coverage/default/33.sram_ctrl_alert_test.1733536874 |
|
|
Dec 27 01:00:31 PM PST 23 |
Dec 27 01:00:38 PM PST 23 |
12473945 ps |
| T293 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.39505827 |
|
|
Dec 27 01:00:08 PM PST 23 |
Dec 27 01:00:14 PM PST 23 |
51930117 ps |
| T294 |
/workspace/coverage/default/5.sram_ctrl_alert_test.406309021 |
|
|
Dec 27 12:59:11 PM PST 23 |
Dec 27 12:59:22 PM PST 23 |
39149482 ps |
| T295 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2609305723 |
|
|
Dec 27 01:00:27 PM PST 23 |
Dec 27 01:00:34 PM PST 23 |
19660258 ps |
| T296 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.2618539971 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 01:05:06 PM PST 23 |
767534356 ps |
| T297 |
/workspace/coverage/default/37.sram_ctrl_executable.2250542772 |
|
|
Dec 27 01:00:18 PM PST 23 |
Dec 27 01:02:09 PM PST 23 |
319185483 ps |
| T298 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.3791014574 |
|
|
Dec 27 01:00:24 PM PST 23 |
Dec 27 01:00:39 PM PST 23 |
831599686 ps |
| T299 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.2631877250 |
|
|
Dec 27 12:59:12 PM PST 23 |
Dec 27 01:00:29 PM PST 23 |
378453117 ps |
| T300 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.411560885 |
|
|
Dec 27 01:00:28 PM PST 23 |
Dec 27 01:05:33 PM PST 23 |
4261782481 ps |
| T301 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.3329276917 |
|
|
Dec 27 01:00:37 PM PST 23 |
Dec 27 01:00:53 PM PST 23 |
1768713528 ps |
| T118 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.1576157007 |
|
|
Dec 27 12:59:58 PM PST 23 |
Dec 27 01:00:03 PM PST 23 |
92609097 ps |
| T115 |
/workspace/coverage/default/5.sram_ctrl_regwen.3803252451 |
|
|
Dec 27 12:59:17 PM PST 23 |
Dec 27 01:15:32 PM PST 23 |
3001188517 ps |
| T302 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1322186029 |
|
|
Dec 27 12:59:54 PM PST 23 |
Dec 27 01:05:10 PM PST 23 |
13902614057 ps |
| T303 |
/workspace/coverage/default/26.sram_ctrl_executable.1373671140 |
|
|
Dec 27 01:00:20 PM PST 23 |
Dec 27 01:05:43 PM PST 23 |
5530834029 ps |
| T304 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.4065661349 |
|
|
Dec 27 01:00:20 PM PST 23 |
Dec 27 01:06:38 PM PST 23 |
14377081174 ps |
| T305 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2487199606 |
|
|
Dec 27 01:00:31 PM PST 23 |
Dec 27 01:26:23 PM PST 23 |
2684764671 ps |
| T306 |
/workspace/coverage/default/37.sram_ctrl_regwen.1201922052 |
|
|
Dec 27 01:00:14 PM PST 23 |
Dec 27 01:08:37 PM PST 23 |
1473231153 ps |
| T307 |
/workspace/coverage/default/46.sram_ctrl_regwen.3082801558 |
|
|
Dec 27 01:00:46 PM PST 23 |
Dec 27 01:27:10 PM PST 23 |
16598878653 ps |
| T308 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3105968020 |
|
|
Dec 27 01:00:22 PM PST 23 |
Dec 27 01:02:05 PM PST 23 |
146409617 ps |
| T309 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2448864123 |
|
|
Dec 27 01:00:03 PM PST 23 |
Dec 27 01:00:11 PM PST 23 |
244502696 ps |
| T310 |
/workspace/coverage/default/27.sram_ctrl_executable.3354959739 |
|
|
Dec 27 01:00:33 PM PST 23 |
Dec 27 01:01:06 PM PST 23 |
396781249 ps |
| T311 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.1805797455 |
|
|
Dec 27 12:59:07 PM PST 23 |
Dec 27 01:02:04 PM PST 23 |
6904739807 ps |
| T312 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.2062602947 |
|
|
Dec 27 01:00:31 PM PST 23 |
Dec 27 01:05:06 PM PST 23 |
6811019536 ps |
| T313 |
/workspace/coverage/default/26.sram_ctrl_regwen.284158527 |
|
|
Dec 27 01:00:17 PM PST 23 |
Dec 27 01:17:56 PM PST 23 |
45837590741 ps |
| T314 |
/workspace/coverage/default/49.sram_ctrl_executable.981090954 |
|
|
Dec 27 01:00:55 PM PST 23 |
Dec 27 01:14:27 PM PST 23 |
1713591258 ps |
| T315 |
/workspace/coverage/default/35.sram_ctrl_executable.944311542 |
|
|
Dec 27 01:00:38 PM PST 23 |
Dec 27 01:03:20 PM PST 23 |
2328546962 ps |
| T316 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.719953669 |
|
|
Dec 27 01:00:29 PM PST 23 |
Dec 27 01:01:01 PM PST 23 |
357387908 ps |
| T317 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.765048553 |
|
|
Dec 27 12:59:27 PM PST 23 |
Dec 27 01:04:19 PM PST 23 |
12410623965 ps |
| T318 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.747056263 |
|
|
Dec 27 01:00:06 PM PST 23 |
Dec 27 01:00:18 PM PST 23 |
2621088082 ps |
| T319 |
/workspace/coverage/default/6.sram_ctrl_alert_test.394283625 |
|
|
Dec 27 12:59:38 PM PST 23 |
Dec 27 12:59:43 PM PST 23 |
13316322 ps |
| T320 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2500521035 |
|
|
Dec 27 12:59:09 PM PST 23 |
Dec 27 01:02:40 PM PST 23 |
2165133461 ps |
| T321 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3687995842 |
|
|
Dec 27 01:00:27 PM PST 23 |
Dec 27 01:00:41 PM PST 23 |
142202736 ps |
| T322 |
/workspace/coverage/default/39.sram_ctrl_executable.3628322383 |
|
|
Dec 27 01:00:40 PM PST 23 |
Dec 27 01:15:07 PM PST 23 |
10424691088 ps |
| T323 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2503752446 |
|
|
Dec 27 01:00:41 PM PST 23 |
Dec 27 01:00:50 PM PST 23 |
79550962 ps |
| T324 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3590440458 |
|
|
Dec 27 12:59:39 PM PST 23 |
Dec 27 12:59:44 PM PST 23 |
85086789 ps |
| T325 |
/workspace/coverage/default/3.sram_ctrl_regwen.401038501 |
|
|
Dec 27 12:59:29 PM PST 23 |
Dec 27 01:01:51 PM PST 23 |
6896708079 ps |
| T326 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.3379568684 |
|
|
Dec 27 01:00:34 PM PST 23 |
Dec 27 01:00:50 PM PST 23 |
138212862 ps |
| T327 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1460405022 |
|
|
Dec 27 12:59:11 PM PST 23 |
Dec 27 01:09:46 PM PST 23 |
7851118145 ps |
| T328 |
/workspace/coverage/default/25.sram_ctrl_regwen.3418492289 |
|
|
Dec 27 01:00:42 PM PST 23 |
Dec 27 01:19:18 PM PST 23 |
28034400274 ps |
| T329 |
/workspace/coverage/default/33.sram_ctrl_smoke.2332621546 |
|
|
Dec 27 01:00:34 PM PST 23 |
Dec 27 01:01:19 PM PST 23 |
455775880 ps |
| T330 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2181098672 |
|
|
Dec 27 12:59:33 PM PST 23 |
Dec 27 01:04:07 PM PST 23 |
41406112261 ps |
| T331 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.1525829346 |
|
|
Dec 27 01:00:10 PM PST 23 |
Dec 27 01:00:28 PM PST 23 |
2808993438 ps |
| T332 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3317369282 |
|
|
Dec 27 01:00:37 PM PST 23 |
Dec 27 01:28:06 PM PST 23 |
1747284790 ps |
| T333 |
/workspace/coverage/default/16.sram_ctrl_stress_all.2608210576 |
|
|
Dec 27 12:59:46 PM PST 23 |
Dec 27 02:10:46 PM PST 23 |
119848985699 ps |
| T334 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2856020054 |
|
|
Dec 27 12:59:21 PM PST 23 |
Dec 27 01:48:58 PM PST 23 |
7319136392 ps |
| T335 |
/workspace/coverage/default/39.sram_ctrl_bijection.158825663 |
|
|
Dec 27 01:00:35 PM PST 23 |
Dec 27 01:01:30 PM PST 23 |
25960310695 ps |
| T336 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4074711735 |
|
|
Dec 27 12:59:09 PM PST 23 |
Dec 27 01:13:13 PM PST 23 |
6917780621 ps |
| T337 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.4152736960 |
|
|
Dec 27 12:59:32 PM PST 23 |
Dec 27 01:01:42 PM PST 23 |
1348136373 ps |
| T338 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.3080591690 |
|
|
Dec 27 01:00:36 PM PST 23 |
Dec 27 01:03:08 PM PST 23 |
1516380030 ps |
| T339 |
/workspace/coverage/default/46.sram_ctrl_bijection.3795117849 |
|
|
Dec 27 01:00:41 PM PST 23 |
Dec 27 01:01:55 PM PST 23 |
2014317307 ps |
| T340 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3274699788 |
|
|
Dec 27 01:00:38 PM PST 23 |
Dec 27 01:00:46 PM PST 23 |
45883651 ps |
| T341 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3505920400 |
|
|
Dec 27 01:00:11 PM PST 23 |
Dec 27 01:00:15 PM PST 23 |
43185237 ps |
| T342 |
/workspace/coverage/default/43.sram_ctrl_smoke.22852639 |
|
|
Dec 27 01:00:30 PM PST 23 |
Dec 27 01:00:46 PM PST 23 |
1537778191 ps |
| T343 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2639794690 |
|
|
Dec 27 01:00:22 PM PST 23 |
Dec 27 01:06:45 PM PST 23 |
37203429653 ps |
| T344 |
/workspace/coverage/default/49.sram_ctrl_smoke.1816883328 |
|
|
Dec 27 01:00:42 PM PST 23 |
Dec 27 01:03:24 PM PST 23 |
740812740 ps |
| T345 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1091764462 |
|
|
Dec 27 12:59:33 PM PST 23 |
Dec 27 01:01:24 PM PST 23 |
544319142 ps |
| T346 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.602566195 |
|
|
Dec 27 01:00:19 PM PST 23 |
Dec 27 01:01:09 PM PST 23 |
225762994 ps |
| T347 |
/workspace/coverage/default/43.sram_ctrl_stress_all.2382378615 |
|
|
Dec 27 01:00:37 PM PST 23 |
Dec 27 01:27:18 PM PST 23 |
44761007216 ps |
| T348 |
/workspace/coverage/default/24.sram_ctrl_alert_test.3541578807 |
|
|
Dec 27 01:00:36 PM PST 23 |
Dec 27 01:00:44 PM PST 23 |
35117681 ps |
| T349 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3904850127 |
|
|
Dec 27 12:59:48 PM PST 23 |
Dec 27 12:59:59 PM PST 23 |
1453519968 ps |
| T350 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.1673407960 |
|
|
Dec 27 12:59:56 PM PST 23 |
Dec 27 01:00:04 PM PST 23 |
1367648865 ps |
| T351 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2801198979 |
|
|
Dec 27 12:59:05 PM PST 23 |
Dec 27 01:07:36 PM PST 23 |
39208948392 ps |
| T352 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.2762873243 |
|
|
Dec 27 01:00:35 PM PST 23 |
Dec 27 01:00:45 PM PST 23 |
1604460062 ps |
| T353 |
/workspace/coverage/default/16.sram_ctrl_bijection.1155599991 |
|
|
Dec 27 12:59:53 PM PST 23 |
Dec 27 01:00:36 PM PST 23 |
10369538982 ps |
| T354 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1276138001 |
|
|
Dec 27 01:00:38 PM PST 23 |
Dec 27 01:16:03 PM PST 23 |
1566825664 ps |
| T355 |
/workspace/coverage/default/44.sram_ctrl_partial_access.3068858559 |
|
|
Dec 27 01:00:49 PM PST 23 |
Dec 27 01:01:12 PM PST 23 |
872458802 ps |
| T356 |
/workspace/coverage/default/19.sram_ctrl_smoke.1056884448 |
|
|
Dec 27 01:00:14 PM PST 23 |
Dec 27 01:00:26 PM PST 23 |
4453748552 ps |
| T357 |
/workspace/coverage/default/35.sram_ctrl_smoke.378081326 |
|
|
Dec 27 01:00:30 PM PST 23 |
Dec 27 01:01:20 PM PST 23 |
112447113 ps |
| T358 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.1307595053 |
|
|
Dec 27 12:59:56 PM PST 23 |
Dec 27 01:09:23 PM PST 23 |
3192823829 ps |
| T359 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.331063454 |
|
|
Dec 27 12:59:55 PM PST 23 |
Dec 27 01:04:02 PM PST 23 |
2514776801 ps |
| T360 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.745025297 |
|
|
Dec 27 01:00:19 PM PST 23 |
Dec 27 01:06:30 PM PST 23 |
2955895317 ps |
| T361 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1340854578 |
|
|
Dec 27 01:00:21 PM PST 23 |
Dec 27 01:02:50 PM PST 23 |
525503027 ps |
| T362 |
/workspace/coverage/default/41.sram_ctrl_partial_access.817145924 |
|
|
Dec 27 01:00:23 PM PST 23 |
Dec 27 01:00:33 PM PST 23 |
204131747 ps |
| T363 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3656645983 |
|
|
Dec 27 12:59:53 PM PST 23 |
Dec 27 01:00:01 PM PST 23 |
1159097791 ps |
| T364 |
/workspace/coverage/default/38.sram_ctrl_executable.609892443 |
|
|
Dec 27 01:00:37 PM PST 23 |
Dec 27 01:26:08 PM PST 23 |
35488247152 ps |
| T122 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3294772265 |
|
|
Dec 27 12:59:24 PM PST 23 |
Dec 27 01:11:30 PM PST 23 |
130626857435 ps |
| T365 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3922868267 |
|
|
Dec 27 01:00:22 PM PST 23 |
Dec 27 01:45:14 PM PST 23 |
633938740 ps |
| T366 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3449766989 |
|
|
Dec 27 01:00:41 PM PST 23 |
Dec 27 01:29:43 PM PST 23 |
3931579408 ps |
| T367 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.248483440 |
|
|
Dec 27 12:59:39 PM PST 23 |
Dec 27 01:16:59 PM PST 23 |
12377809829 ps |
| T368 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.4237767235 |
|
|
Dec 27 01:00:37 PM PST 23 |
Dec 27 01:13:34 PM PST 23 |
3408441490 ps |
| T369 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1002622994 |
|
|
Dec 27 01:00:34 PM PST 23 |
Dec 27 01:00:55 PM PST 23 |
461980045 ps |
| T370 |
/workspace/coverage/default/42.sram_ctrl_executable.4151566273 |
|
|
Dec 27 01:00:27 PM PST 23 |
Dec 27 01:20:06 PM PST 23 |
64270830792 ps |
| T371 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.489668519 |
|
|
Dec 27 01:00:21 PM PST 23 |
Dec 27 01:00:54 PM PST 23 |
785881837 ps |
| T372 |
/workspace/coverage/default/48.sram_ctrl_executable.2182451092 |
|
|
Dec 27 01:00:57 PM PST 23 |
Dec 27 01:11:26 PM PST 23 |
8676735714 ps |
| T373 |
/workspace/coverage/default/44.sram_ctrl_stress_all.3117309408 |
|
|
Dec 27 01:00:56 PM PST 23 |
Dec 27 01:29:20 PM PST 23 |
41542460945 ps |
| T374 |
/workspace/coverage/default/47.sram_ctrl_regwen.564412225 |
|
|
Dec 27 01:00:46 PM PST 23 |
Dec 27 01:16:48 PM PST 23 |
3031950149 ps |
| T375 |
/workspace/coverage/default/48.sram_ctrl_partial_access.583099388 |
|
|
Dec 27 01:00:52 PM PST 23 |
Dec 27 01:01:16 PM PST 23 |
1225721515 ps |
| T376 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3970528824 |
|
|
Dec 27 01:00:44 PM PST 23 |
Dec 27 01:02:57 PM PST 23 |
303808775 ps |
| T377 |
/workspace/coverage/default/8.sram_ctrl_partial_access.796289779 |
|
|
Dec 27 12:59:41 PM PST 23 |
Dec 27 01:01:38 PM PST 23 |
896116368 ps |
| T378 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.127670029 |
|
|
Dec 27 12:59:36 PM PST 23 |
Dec 27 12:59:53 PM PST 23 |
497262265 ps |
| T379 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2984719585 |
|
|
Dec 27 01:00:42 PM PST 23 |
Dec 27 01:00:56 PM PST 23 |
177066383 ps |
| T380 |
/workspace/coverage/default/36.sram_ctrl_bijection.3119225045 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 01:00:48 PM PST 23 |
275274358 ps |
| T381 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2920622888 |
|
|
Dec 27 12:59:52 PM PST 23 |
Dec 27 01:04:50 PM PST 23 |
4093390655 ps |
| T382 |
/workspace/coverage/default/11.sram_ctrl_executable.1976804260 |
|
|
Dec 27 12:59:32 PM PST 23 |
Dec 27 01:10:45 PM PST 23 |
17418756926 ps |
| T383 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.2827469360 |
|
|
Dec 27 01:00:28 PM PST 23 |
Dec 27 01:00:35 PM PST 23 |
223514989 ps |
| T384 |
/workspace/coverage/default/4.sram_ctrl_smoke.729819171 |
|
|
Dec 27 12:59:27 PM PST 23 |
Dec 27 12:59:39 PM PST 23 |
73057424 ps |
| T385 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1416243939 |
|
|
Dec 27 01:00:29 PM PST 23 |
Dec 27 01:00:38 PM PST 23 |
364748823 ps |
| T386 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.4152461746 |
|
|
Dec 27 01:00:46 PM PST 23 |
Dec 27 01:01:00 PM PST 23 |
258497320 ps |
| T387 |
/workspace/coverage/default/24.sram_ctrl_regwen.3218961198 |
|
|
Dec 27 12:59:49 PM PST 23 |
Dec 27 01:08:46 PM PST 23 |
96517533115 ps |
| T388 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.2136137197 |
|
|
Dec 27 12:59:59 PM PST 23 |
Dec 27 01:03:37 PM PST 23 |
611150702 ps |
| T389 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.860290603 |
|
|
Dec 27 12:59:31 PM PST 23 |
Dec 27 12:59:43 PM PST 23 |
264382819 ps |
| T390 |
/workspace/coverage/default/47.sram_ctrl_executable.748917060 |
|
|
Dec 27 01:01:04 PM PST 23 |
Dec 27 01:25:58 PM PST 23 |
2744582618 ps |
| T391 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.2832253846 |
|
|
Dec 27 01:00:23 PM PST 23 |
Dec 27 01:21:22 PM PST 23 |
15083427291 ps |
| T392 |
/workspace/coverage/default/35.sram_ctrl_partial_access.4103182568 |
|
|
Dec 27 01:00:32 PM PST 23 |
Dec 27 01:00:55 PM PST 23 |
625697074 ps |
| T393 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.4213909847 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 01:05:58 PM PST 23 |
17825642850 ps |
| T394 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.1397309532 |
|
|
Dec 27 01:00:19 PM PST 23 |
Dec 27 01:01:42 PM PST 23 |
115227990 ps |
| T395 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3938666422 |
|
|
Dec 27 12:59:59 PM PST 23 |
Dec 27 01:00:49 PM PST 23 |
113243205 ps |
| T396 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.640194804 |
|
|
Dec 27 12:59:49 PM PST 23 |
Dec 27 01:13:39 PM PST 23 |
2161934630 ps |
| T397 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.64213673 |
|
|
Dec 27 12:59:36 PM PST 23 |
Dec 27 01:00:56 PM PST 23 |
419989615 ps |
| T398 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1232630749 |
|
|
Dec 27 01:00:18 PM PST 23 |
Dec 27 01:06:26 PM PST 23 |
5023536826 ps |
| T399 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.259006060 |
|
|
Dec 27 12:59:24 PM PST 23 |
Dec 27 12:59:40 PM PST 23 |
56408876 ps |
| T400 |
/workspace/coverage/default/0.sram_ctrl_bijection.1642206627 |
|
|
Dec 27 12:59:07 PM PST 23 |
Dec 27 01:00:19 PM PST 23 |
1718599218 ps |
| T401 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4054028076 |
|
|
Dec 27 01:00:08 PM PST 23 |
Dec 27 01:19:07 PM PST 23 |
15370356029 ps |
| T402 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2359273879 |
|
|
Dec 27 01:00:36 PM PST 23 |
Dec 27 01:00:46 PM PST 23 |
40706801 ps |
| T403 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3845511363 |
|
|
Dec 27 12:59:56 PM PST 23 |
Dec 27 01:01:12 PM PST 23 |
140352275 ps |
| T404 |
/workspace/coverage/default/35.sram_ctrl_bijection.214814401 |
|
|
Dec 27 01:00:29 PM PST 23 |
Dec 27 01:00:59 PM PST 23 |
8535987437 ps |
| T123 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.21354114 |
|
|
Dec 27 12:59:16 PM PST 23 |
Dec 27 01:08:41 PM PST 23 |
90467467116 ps |
| T405 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.2791594642 |
|
|
Dec 27 12:59:17 PM PST 23 |
Dec 27 12:59:32 PM PST 23 |
1406836850 ps |
| T406 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2941856330 |
|
|
Dec 27 12:59:32 PM PST 23 |
Dec 27 12:59:42 PM PST 23 |
233477006 ps |
| T407 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.795851956 |
|
|
Dec 27 01:00:39 PM PST 23 |
Dec 27 01:00:48 PM PST 23 |
33357783 ps |
| T408 |
/workspace/coverage/default/1.sram_ctrl_executable.3510742673 |
|
|
Dec 27 12:59:09 PM PST 23 |
Dec 27 01:33:57 PM PST 23 |
74241187740 ps |
| T409 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1531710506 |
|
|
Dec 27 12:59:33 PM PST 23 |
Dec 27 01:07:04 PM PST 23 |
3392505095 ps |
| T410 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.268158920 |
|
|
Dec 27 12:59:59 PM PST 23 |
Dec 27 01:01:10 PM PST 23 |
132183860 ps |
| T411 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2542570292 |
|
|
Dec 27 01:00:25 PM PST 23 |
Dec 27 01:02:01 PM PST 23 |
523087826 ps |
| T412 |
/workspace/coverage/default/23.sram_ctrl_smoke.3528743604 |
|
|
Dec 27 12:59:56 PM PST 23 |
Dec 27 01:00:17 PM PST 23 |
69107059 ps |
| T413 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2800391137 |
|
|
Dec 27 12:59:19 PM PST 23 |
Dec 27 12:59:46 PM PST 23 |
636198190 ps |
| T414 |
/workspace/coverage/default/30.sram_ctrl_stress_all.2957301941 |
|
|
Dec 27 01:00:29 PM PST 23 |
Dec 27 02:03:39 PM PST 23 |
126969001978 ps |
| T415 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2898281171 |
|
|
Dec 27 12:59:08 PM PST 23 |
Dec 27 01:05:15 PM PST 23 |
15343918457 ps |
| T416 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.2054518297 |
|
|
Dec 27 01:00:55 PM PST 23 |
Dec 27 01:03:19 PM PST 23 |
479327007 ps |
| T417 |
/workspace/coverage/default/28.sram_ctrl_alert_test.2874771236 |
|
|
Dec 27 01:00:33 PM PST 23 |
Dec 27 01:00:40 PM PST 23 |
41339394 ps |
| T418 |
/workspace/coverage/default/22.sram_ctrl_stress_all.3997195133 |
|
|
Dec 27 12:59:56 PM PST 23 |
Dec 27 01:21:11 PM PST 23 |
4343726122 ps |
| T419 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.327841503 |
|
|
Dec 27 01:00:44 PM PST 23 |
Dec 27 01:01:19 PM PST 23 |
657451470 ps |
| T420 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.699814036 |
|
|
Dec 27 01:00:14 PM PST 23 |
Dec 27 01:00:17 PM PST 23 |
89379065 ps |
| T421 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.1721804774 |
|
|
Dec 27 12:59:28 PM PST 23 |
Dec 27 12:59:36 PM PST 23 |
86979146 ps |
| T422 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.4025174378 |
|
|
Dec 27 01:00:27 PM PST 23 |
Dec 27 01:00:38 PM PST 23 |
943603772 ps |
| T423 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.4014435623 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 01:18:43 PM PST 23 |
4423216673 ps |
| T424 |
/workspace/coverage/default/45.sram_ctrl_alert_test.2785276293 |
|
|
Dec 27 01:00:40 PM PST 23 |
Dec 27 01:00:49 PM PST 23 |
44123657 ps |
| T425 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3906662699 |
|
|
Dec 27 01:00:55 PM PST 23 |
Dec 27 01:04:22 PM PST 23 |
2699735953 ps |
| T426 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.4175204543 |
|
|
Dec 27 01:00:35 PM PST 23 |
Dec 27 01:00:51 PM PST 23 |
66117724 ps |
| T427 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.1004489279 |
|
|
Dec 27 01:00:14 PM PST 23 |
Dec 27 01:02:30 PM PST 23 |
1325437566 ps |
| T428 |
/workspace/coverage/default/33.sram_ctrl_bijection.3346024821 |
|
|
Dec 27 01:00:24 PM PST 23 |
Dec 27 01:01:36 PM PST 23 |
1078923289 ps |
| T429 |
/workspace/coverage/default/36.sram_ctrl_alert_test.2527379938 |
|
|
Dec 27 01:00:35 PM PST 23 |
Dec 27 01:00:43 PM PST 23 |
24694179 ps |
| T430 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.2410986911 |
|
|
Dec 27 01:00:29 PM PST 23 |
Dec 27 01:04:32 PM PST 23 |
2475948895 ps |
| T431 |
/workspace/coverage/default/37.sram_ctrl_smoke.4264650616 |
|
|
Dec 27 01:00:52 PM PST 23 |
Dec 27 01:01:09 PM PST 23 |
1685934902 ps |
| T432 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2786958786 |
|
|
Dec 27 01:00:47 PM PST 23 |
Dec 27 01:00:57 PM PST 23 |
25943231 ps |
| T433 |
/workspace/coverage/default/40.sram_ctrl_executable.1848725520 |
|
|
Dec 27 01:00:38 PM PST 23 |
Dec 27 01:18:45 PM PST 23 |
13372318357 ps |
| T434 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1966614891 |
|
|
Dec 27 12:59:14 PM PST 23 |
Dec 27 01:00:31 PM PST 23 |
4244497183 ps |
| T435 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.1744651877 |
|
|
Dec 27 12:59:53 PM PST 23 |
Dec 27 01:14:46 PM PST 23 |
12199155191 ps |
| T436 |
/workspace/coverage/default/5.sram_ctrl_bijection.1747820904 |
|
|
Dec 27 12:59:29 PM PST 23 |
Dec 27 01:00:09 PM PST 23 |
1466103835 ps |
| T437 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3823774537 |
|
|
Dec 27 01:00:49 PM PST 23 |
Dec 27 01:30:53 PM PST 23 |
15727886309 ps |
| T438 |
/workspace/coverage/default/36.sram_ctrl_regwen.2093325364 |
|
|
Dec 27 01:00:37 PM PST 23 |
Dec 27 01:09:06 PM PST 23 |
7658639886 ps |
| T439 |
/workspace/coverage/default/33.sram_ctrl_stress_all.1000965504 |
|
|
Dec 27 01:00:15 PM PST 23 |
Dec 27 02:01:41 PM PST 23 |
58737317750 ps |
| T440 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.2028272458 |
|
|
Dec 27 01:00:41 PM PST 23 |
Dec 27 01:00:51 PM PST 23 |
29134297 ps |
| T441 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.443097405 |
|
|
Dec 27 12:59:16 PM PST 23 |
Dec 27 12:59:33 PM PST 23 |
236909735 ps |
| T442 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.377119008 |
|
|
Dec 27 01:00:29 PM PST 23 |
Dec 27 01:07:19 PM PST 23 |
16105856125 ps |
| T443 |
/workspace/coverage/default/31.sram_ctrl_regwen.2527346917 |
|
|
Dec 27 01:00:39 PM PST 23 |
Dec 27 01:30:59 PM PST 23 |
93000633299 ps |
| T444 |
/workspace/coverage/default/37.sram_ctrl_stress_all.2947531147 |
|
|
Dec 27 01:00:33 PM PST 23 |
Dec 27 01:27:11 PM PST 23 |
12576778683 ps |
| T445 |
/workspace/coverage/default/35.sram_ctrl_alert_test.1926977030 |
|
|
Dec 27 01:00:42 PM PST 23 |
Dec 27 01:00:52 PM PST 23 |
25888742 ps |
| T446 |
/workspace/coverage/default/46.sram_ctrl_smoke.876746774 |
|
|
Dec 27 01:00:36 PM PST 23 |
Dec 27 01:00:47 PM PST 23 |
550977417 ps |
| T447 |
/workspace/coverage/default/18.sram_ctrl_regwen.329585525 |
|
|
Dec 27 12:59:48 PM PST 23 |
Dec 27 01:09:46 PM PST 23 |
31047128523 ps |
| T448 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2415347418 |
|
|
Dec 27 01:00:08 PM PST 23 |
Dec 27 01:00:19 PM PST 23 |
71860950 ps |
| T449 |
/workspace/coverage/default/37.sram_ctrl_alert_test.2813516479 |
|
|
Dec 27 01:00:24 PM PST 23 |
Dec 27 01:00:30 PM PST 23 |
44912520 ps |
| T450 |
/workspace/coverage/default/27.sram_ctrl_regwen.1330806586 |
|
|
Dec 27 01:00:09 PM PST 23 |
Dec 27 01:02:19 PM PST 23 |
2457629744 ps |
| T451 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.1634448829 |
|
|
Dec 27 12:59:16 PM PST 23 |
Dec 27 12:59:36 PM PST 23 |
256768799 ps |
| T452 |
/workspace/coverage/default/20.sram_ctrl_regwen.4035007400 |
|
|
Dec 27 12:59:43 PM PST 23 |
Dec 27 01:15:13 PM PST 23 |
36034392323 ps |
| T453 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.3962208802 |
|
|
Dec 27 12:59:53 PM PST 23 |
Dec 27 01:06:25 PM PST 23 |
4437644971 ps |
| T454 |
/workspace/coverage/default/15.sram_ctrl_stress_all.884307834 |
|
|
Dec 27 12:59:46 PM PST 23 |
Dec 27 02:14:16 PM PST 23 |
48732327897 ps |
| T455 |
/workspace/coverage/default/14.sram_ctrl_smoke.2850626027 |
|
|
Dec 27 12:59:57 PM PST 23 |
Dec 27 01:00:28 PM PST 23 |
291088634 ps |
| T456 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1936004479 |
|
|
Dec 27 01:00:47 PM PST 23 |
Dec 27 01:03:06 PM PST 23 |
10571277790 ps |
| T457 |
/workspace/coverage/default/3.sram_ctrl_bijection.1185936137 |
|
|
Dec 27 12:59:25 PM PST 23 |
Dec 27 01:00:44 PM PST 23 |
14979767615 ps |
| T458 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.3026175839 |
|
|
Dec 27 01:00:44 PM PST 23 |
Dec 27 01:03:05 PM PST 23 |
917307173 ps |
| T459 |
/workspace/coverage/default/20.sram_ctrl_alert_test.2921896518 |
|
|
Dec 27 12:59:46 PM PST 23 |
Dec 27 12:59:50 PM PST 23 |
29622457 ps |
| T460 |
/workspace/coverage/default/30.sram_ctrl_bijection.3274517407 |
|
|
Dec 27 01:00:28 PM PST 23 |
Dec 27 01:01:30 PM PST 23 |
3383190459 ps |
| T461 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3607333584 |
|
|
Dec 27 12:59:42 PM PST 23 |
Dec 27 12:59:49 PM PST 23 |
48092906 ps |
| T462 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.48956588 |
|
|
Dec 27 12:59:45 PM PST 23 |
Dec 27 02:05:53 PM PST 23 |
4953431022 ps |
| T463 |
/workspace/coverage/default/41.sram_ctrl_stress_all.3407079921 |
|
|
Dec 27 01:00:47 PM PST 23 |
Dec 27 01:49:28 PM PST 23 |
44891426075 ps |
| T464 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4288533999 |
|
|
Dec 27 01:00:42 PM PST 23 |
Dec 27 01:00:53 PM PST 23 |
125123321 ps |
| T465 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.2559484329 |
|
|
Dec 27 01:00:21 PM PST 23 |
Dec 27 01:02:27 PM PST 23 |
138306522 ps |
| T466 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.3427918631 |
|
|
Dec 27 01:00:34 PM PST 23 |
Dec 27 01:00:47 PM PST 23 |
399221883 ps |
| T467 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.3458006813 |
|
|
Dec 27 01:00:24 PM PST 23 |
Dec 27 01:00:35 PM PST 23 |
227096984 ps |
| T468 |
/workspace/coverage/default/43.sram_ctrl_executable.400125103 |
|
|
Dec 27 01:01:00 PM PST 23 |
Dec 27 01:12:40 PM PST 23 |
2340552136 ps |
| T469 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.2829778864 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 01:04:15 PM PST 23 |
9884090642 ps |
| T470 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2396634901 |
|
|
Dec 27 12:59:21 PM PST 23 |
Dec 27 01:02:16 PM PST 23 |
15146701842 ps |
| T471 |
/workspace/coverage/default/6.sram_ctrl_bijection.2747324802 |
|
|
Dec 27 12:59:28 PM PST 23 |
Dec 27 12:59:54 PM PST 23 |
2056174229 ps |
| T472 |
/workspace/coverage/default/13.sram_ctrl_smoke.4281181551 |
|
|
Dec 27 12:59:51 PM PST 23 |
Dec 27 01:00:30 PM PST 23 |
89757572 ps |
| T473 |
/workspace/coverage/default/1.sram_ctrl_bijection.980265039 |
|
|
Dec 27 12:59:14 PM PST 23 |
Dec 27 01:00:29 PM PST 23 |
6272142920 ps |
| T474 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1810884084 |
|
|
Dec 27 12:59:14 PM PST 23 |
Dec 27 01:06:40 PM PST 23 |
7864442922 ps |
| T475 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2923357614 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 02:28:20 PM PST 23 |
8074529422 ps |
| T476 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.767197773 |
|
|
Dec 27 12:59:35 PM PST 23 |
Dec 27 12:59:51 PM PST 23 |
2700353310 ps |
| T477 |
/workspace/coverage/default/12.sram_ctrl_alert_test.4211100053 |
|
|
Dec 27 12:59:41 PM PST 23 |
Dec 27 12:59:46 PM PST 23 |
14794227 ps |
| T478 |
/workspace/coverage/default/29.sram_ctrl_stress_all.2967565993 |
|
|
Dec 27 01:00:31 PM PST 23 |
Dec 27 01:36:23 PM PST 23 |
94527078985 ps |
| T479 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2340977641 |
|
|
Dec 27 12:59:39 PM PST 23 |
Dec 27 01:00:29 PM PST 23 |
180206906 ps |
| T480 |
/workspace/coverage/default/44.sram_ctrl_executable.2542180300 |
|
|
Dec 27 01:00:25 PM PST 23 |
Dec 27 01:15:01 PM PST 23 |
7578700021 ps |
| T481 |
/workspace/coverage/default/4.sram_ctrl_stress_all.957794180 |
|
|
Dec 27 12:59:07 PM PST 23 |
Dec 27 01:35:26 PM PST 23 |
119982553673 ps |
| T482 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1513511767 |
|
|
Dec 27 01:00:13 PM PST 23 |
Dec 27 01:19:45 PM PST 23 |
13881607147 ps |
| T483 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2870990802 |
|
|
Dec 27 01:00:23 PM PST 23 |
Dec 27 01:06:10 PM PST 23 |
14396989779 ps |
| T484 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3282449060 |
|
|
Dec 27 01:00:39 PM PST 23 |
Dec 27 01:06:39 PM PST 23 |
14069595708 ps |
| T485 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2177129212 |
|
|
Dec 27 12:59:07 PM PST 23 |
Dec 27 01:37:02 PM PST 23 |
2763777671 ps |
| T486 |
/workspace/coverage/default/4.sram_ctrl_regwen.3713717947 |
|
|
Dec 27 12:59:15 PM PST 23 |
Dec 27 01:14:16 PM PST 23 |
2003247165 ps |
| T487 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2668590450 |
|
|
Dec 27 01:00:45 PM PST 23 |
Dec 27 01:01:32 PM PST 23 |
102109326 ps |
| T488 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1146328419 |
|
|
Dec 27 01:00:38 PM PST 23 |
Dec 27 01:00:48 PM PST 23 |
160528731 ps |
| T489 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.196944956 |
|
|
Dec 27 01:00:31 PM PST 23 |
Dec 27 01:00:40 PM PST 23 |
93112411 ps |
| T490 |
/workspace/coverage/default/45.sram_ctrl_smoke.2970593830 |
|
|
Dec 27 01:00:45 PM PST 23 |
Dec 27 01:01:02 PM PST 23 |
942649737 ps |
| T491 |
/workspace/coverage/default/11.sram_ctrl_bijection.2139374918 |
|
|
Dec 27 01:00:09 PM PST 23 |
Dec 27 01:00:39 PM PST 23 |
1753833672 ps |
| T492 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.3241087656 |
|
|
Dec 27 01:00:44 PM PST 23 |
Dec 27 01:01:06 PM PST 23 |
7512491266 ps |
| T493 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.2870070913 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 01:09:04 PM PST 23 |
8875981679 ps |
| T494 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2130580445 |
|
|
Dec 27 12:59:11 PM PST 23 |
Dec 27 12:59:23 PM PST 23 |
65764096 ps |
| T495 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.632343567 |
|
|
Dec 27 01:00:03 PM PST 23 |
Dec 27 01:00:06 PM PST 23 |
33479633 ps |
| T496 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.116386544 |
|
|
Dec 27 01:00:42 PM PST 23 |
Dec 27 01:01:04 PM PST 23 |
480764194 ps |
| T497 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.1810390049 |
|
|
Dec 27 01:00:26 PM PST 23 |
Dec 27 01:00:37 PM PST 23 |
303751616 ps |
| T498 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1525736540 |
|
|
Dec 27 12:59:25 PM PST 23 |
Dec 27 12:59:38 PM PST 23 |
494563402 ps |
| T499 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4096816135 |
|
|
Dec 27 01:00:37 PM PST 23 |
Dec 27 01:00:50 PM PST 23 |
2149191321 ps |
| T500 |
/workspace/coverage/default/30.sram_ctrl_partial_access.2795297990 |
|
|
Dec 27 01:00:23 PM PST 23 |
Dec 27 01:00:39 PM PST 23 |
3858344550 ps |
| T501 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3582198522 |
|
|
Dec 27 01:00:39 PM PST 23 |
Dec 27 01:15:18 PM PST 23 |
4806011050 ps |
| T502 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1298105779 |
|
|
Dec 27 01:00:21 PM PST 23 |
Dec 27 01:04:11 PM PST 23 |
3195260540 ps |
| T503 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.4004042230 |
|
|
Dec 27 01:00:17 PM PST 23 |
Dec 27 01:03:55 PM PST 23 |
9459795277 ps |
| T504 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2727586710 |
|
|
Dec 27 01:00:19 PM PST 23 |
Dec 27 01:07:32 PM PST 23 |
17215566237 ps |