Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	12821069	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

57906526

1

T1

87999

T2

446435

T3

3229

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	35261767	1			T1	48426		T2	242795		T3	1767
values[0x0]	16448020	1			T1	23314		T2	117738		T3	885
values[0x1]	19017808	1			T1	25084		T2	125535		T3	924

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6387463	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

64340132

1

T1

92388

T2

466295

T3

3391

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	249781	1			T1	415		T2	1829		T3	23
valid_sources[0x01]	285096	1			T1	352		T2	1808		T3	32
valid_sources[0x02]	260066	1			T1	370		T2	1940		T3	11
valid_sources[0x03]	297532	1			T1	363		T2	1850		T3	22
valid_sources[0x04]	251733	1			T1	372		T2	1891		T3	9
valid_sources[0x05]	254269	1			T1	375		T2	1908		T3	10
valid_sources[0x06]	288014	1			T1	358		T2	1832		T3	7
valid_sources[0x07]	271824	1			T1	317		T2	1952		T3	14
valid_sources[0x08]	263413	1			T1	334		T2	1995		T3	17
valid_sources[0x09]	272825	1			T1	427		T2	1880		T3	15
valid_sources[0x0a]	281416	1			T1	364		T2	1995		T3	15
valid_sources[0x0b]	307432	1			T1	420		T2	1975		T3	27
valid_sources[0x0c]	238575	1			T1	304		T2	1816		T3	17
valid_sources[0x0d]	286419	1			T1	281		T2	1866		T3	13
valid_sources[0x0e]	253795	1			T1	404		T2	1865		T3	14
valid_sources[0x0f]	232496	1			T1	348		T2	1893		T3	21
valid_sources[0x10]	270347	1			T1	398		T2	1878		T3	8
valid_sources[0x11]	263038	1			T1	291		T2	1841		T3	22
valid_sources[0x12]	248802	1			T1	340		T2	1891		T3	9
valid_sources[0x13]	255116	1			T1	349		T2	1828		T3	16
valid_sources[0x14]	345369	1			T1	315		T2	1903		T3	15
valid_sources[0x15]	233080	1			T1	284		T2	1848		T3	3
valid_sources[0x16]	258579	1			T1	353		T2	1866		T3	14
valid_sources[0x17]	303283	1			T1	293		T2	1874		T3	20
valid_sources[0x18]	327588	1			T1	393		T2	1867		T3	4
valid_sources[0x19]	298272	1			T1	349		T2	1934		T3	4
valid_sources[0x1a]	261507	1			T1	414		T2	1835		T3	14
valid_sources[0x1b]	271465	1			T1	378		T2	1972		T3	15
valid_sources[0x1c]	287053	1			T1	358		T2	2013		T3	9
valid_sources[0x1d]	289607	1			T1	407		T2	1974		T3	14
valid_sources[0x1e]	243076	1			T1	480		T2	1889		T3	13
valid_sources[0x1f]	234839	1			T1	420		T2	1988		T3	38
valid_sources[0x20]	242099	1			T1	386		T2	1871		T3	6
valid_sources[0x21]	279133	1			T1	314		T2	1798		T3	8
valid_sources[0x22]	319727	1			T1	403		T2	1924		T3	7
valid_sources[0x23]	250090	1			T1	377		T2	1955		T3	9
valid_sources[0x24]	267857	1			T1	462		T2	1904		T3	16
valid_sources[0x25]	257004	1			T1	445		T2	1935		T3	17
valid_sources[0x26]	241250	1			T1	425		T2	1920		T3	13
valid_sources[0x27]	253138	1			T1	453		T2	1799		T3	11
valid_sources[0x28]	326439	1			T1	300		T2	1965		T3	20
valid_sources[0x29]	263769	1			T1	340		T2	1859		T3	15
valid_sources[0x2a]	278926	1			T1	304		T2	1844		T3	10
valid_sources[0x2b]	298725	1			T1	319		T2	1955		T3	15
valid_sources[0x2c]	310555	1			T1	359		T2	1918		T3	9
valid_sources[0x2d]	430208	1			T1	469		T2	1956		T3	15
valid_sources[0x2e]	322903	1			T1	234		T2	1943		T3	7
valid_sources[0x2f]	269061	1			T1	350		T2	1911		T3	13
valid_sources[0x30]	240528	1			T1	285		T2	1928		T3	3
valid_sources[0x31]	272415	1			T1	401		T2	1824		T3	21
valid_sources[0x32]	321813	1			T1	327		T2	1820		T3	17
valid_sources[0x33]	253035	1			T1	396		T2	1991		T3	18
valid_sources[0x34]	294150	1			T1	295		T2	1910		T3	24
valid_sources[0x35]	267493	1			T1	403		T2	1945		T3	33
valid_sources[0x36]	322470	1			T1	487		T2	1887		T3	6
valid_sources[0x37]	246528	1			T1	270		T2	1909		T3	10
valid_sources[0x38]	280506	1			T1	384		T2	1899		T3	12
valid_sources[0x39]	266694	1			T1	350		T2	1929		T3	10
valid_sources[0x3a]	254016	1			T1	383		T2	1950		T3	14
valid_sources[0x3b]	253540	1			T1	365		T2	1887		T3	35
valid_sources[0x3c]	247701	1			T1	290		T2	1839		T3	8
valid_sources[0x3d]	242197	1			T1	367		T2	1897		T3	12
valid_sources[0x3e]	250072	1			T1	413		T2	1934		T3	14
valid_sources[0x3f]	246727	1			T1	425		T2	2018		T3	9
valid_sources[0x40]	303817	1			T1	442		T2	1876		T3	26
valid_sources[0x41]	245836	1			T1	437		T2	1852		T3	17
valid_sources[0x42]	267544	1			T1	374		T2	1927		T3	19
valid_sources[0x43]	270736	1			T1	410		T2	1809		T3	12
valid_sources[0x44]	308079	1			T1	371		T2	1858		T3	14
valid_sources[0x45]	252863	1			T1	326		T2	1937		T3	2
valid_sources[0x46]	250879	1			T1	309		T2	1859		T3	16
valid_sources[0x47]	233168	1			T1	362		T2	1809		T3	13
valid_sources[0x48]	293459	1			T1	360		T2	1875		T3	19
valid_sources[0x49]	251777	1			T1	357		T2	1932		T3	14
valid_sources[0x4a]	275888	1			T1	231		T2	1917		T3	16
valid_sources[0x4b]	289216	1			T1	392		T2	1984		T3	10
valid_sources[0x4c]	259398	1			T1	338		T2	1866		T3	9
valid_sources[0x4d]	383961	1			T1	323		T2	1833		T3	15
valid_sources[0x4e]	244630	1			T1	512		T2	1823		T3	17
valid_sources[0x4f]	335967	1			T1	309		T2	1835		T3	7
valid_sources[0x50]	262031	1			T1	378		T2	1934		T3	7
valid_sources[0x51]	257825	1			T1	304		T2	2031		T3	16
valid_sources[0x52]	288409	1			T1	300		T2	1924		T3	5
valid_sources[0x53]	298391	1			T1	335		T2	1899		T3	9
valid_sources[0x54]	246575	1			T1	401		T2	1880		T3	26
valid_sources[0x55]	256535	1			T1	434		T2	1852		T3	14
valid_sources[0x56]	304306	1			T1	423		T2	1940		T3	13
valid_sources[0x57]	243863	1			T1	404		T2	1900		T3	10
valid_sources[0x58]	263226	1			T1	391		T2	1865		T3	20
valid_sources[0x59]	260459	1			T1	354		T2	1967		T3	9
valid_sources[0x5a]	252294	1			T1	403		T2	1905		T3	7
valid_sources[0x5b]	273362	1			T1	383		T2	1850		T3	16
valid_sources[0x5c]	272514	1			T1	331		T2	1861		T3	14
valid_sources[0x5d]	246278	1			T1	360		T2	1788		T3	19
valid_sources[0x5e]	269080	1			T1	495		T2	1932		T3	17
valid_sources[0x5f]	279204	1			T1	313		T2	1966		T3	12
valid_sources[0x60]	268058	1			T1	466		T2	1892		T3	11
valid_sources[0x61]	300083	1			T1	426		T2	1798		T3	8
valid_sources[0x62]	290635	1			T1	330		T2	1886		T3	18
valid_sources[0x63]	313523	1			T1	419		T2	1952		T3	4
valid_sources[0x64]	257409	1			T1	351		T2	1935		T3	15
valid_sources[0x65]	298028	1			T1	348		T2	1779		T3	13
valid_sources[0x66]	274623	1			T1	408		T2	1787		T3	17
valid_sources[0x67]	247420	1			T1	321		T2	1969		T3	7
valid_sources[0x68]	257071	1			T1	378		T2	1861		T3	12
valid_sources[0x69]	317694	1			T1	347		T2	1873		T3	16
valid_sources[0x6a]	286181	1			T1	427		T2	1840		T3	12
valid_sources[0x6b]	236589	1			T1	262		T2	1929		T3	17
valid_sources[0x6c]	311058	1			T1	384		T2	1895		T3	18
valid_sources[0x6d]	323808	1			T1	479		T2	1923		T3	14
valid_sources[0x6e]	409893	1			T1	313		T2	1942		T3	20
valid_sources[0x6f]	309616	1			T1	309		T2	1869		T3	18
valid_sources[0x70]	305311	1			T1	520		T2	1964		T3	15
valid_sources[0x71]	267468	1			T1	399		T2	1895		T3	11
valid_sources[0x72]	340374	1			T1	381		T2	1965		T3	13
valid_sources[0x73]	308978	1			T1	375		T2	1877		T3	5
valid_sources[0x74]	234934	1			T1	362		T2	1933		T3	26
valid_sources[0x75]	267950	1			T1	412		T2	1933		T3	11
valid_sources[0x76]	296764	1			T1	465		T2	1903		T3	16
valid_sources[0x77]	253861	1			T1	448		T2	1951		T3	7
valid_sources[0x78]	311029	1			T1	378		T2	1990		T3	18
valid_sources[0x79]	267173	1			T1	390		T2	1804		T3	14
valid_sources[0x7a]	257115	1			T1	246		T2	1905		T3	10
valid_sources[0x7b]	275028	1			T1	309		T2	1906		T3	13
valid_sources[0x7c]	229651	1			T1	292		T2	1786		T3	10
valid_sources[0x7d]	254862	1			T1	488		T2	1901		T3	20
valid_sources[0x7e]	302707	1			T1	360		T2	1910		T3	14
valid_sources[0x7f]	359194	1			T1	357		T2	1917		T3	13
valid_sources[0x80]	251963	1			T1	244		T2	1886		T3	15

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

28855323

1

T1

44033

T2

223001

T3

1602

values[0x0]

all_enables

biggest_size

14525356

1

T1

21962

T2

111686

T3

826

values[0x1]

all_enables

biggest_size

14525847

1

T1

22004

T2

111748

T3

801

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	2055451	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

131291

1

T1

19

T2

67

T3

31

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2071539	1			T1	2081		T2	966		T3	8393
values[0x0]	55912	1			T1	19		T2	88		T3	16
values[0x1]	59291	1			T1	30		T2	93		T3	22

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	1374138	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

812604

1

T1

705

T2

404

T3

2745

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	10090	1			T7	10		T8	1		T11	5
valid_sources[0x01]	6307	1			T7	13		T8	3		T11	10
valid_sources[0x02]	9727	1			T7	26		T8	6		T10	5
valid_sources[0x03]	6028	1			T7	3		T10	3		T11	11
valid_sources[0x04]	10666	1			T7	9		T11	11		T14	16
valid_sources[0x05]	7160	1			T8	5		T10	13		T11	2
valid_sources[0x06]	18962	1			T7	4		T8	4		T10	32
valid_sources[0x07]	6859	1			T7	6		T8	1		T11	10
valid_sources[0x08]	9037	1			T7	12		T8	1		T11	8
valid_sources[0x09]	9344	1			T7	34		T8	3		T10	1
valid_sources[0x0a]	5971	1			T7	11		T8	1		T11	5
valid_sources[0x0b]	6246	1			T8	1		T11	11		T14	12
valid_sources[0x0c]	10671	1			T7	33		T8	3		T10	20
valid_sources[0x0d]	7863	1			T7	26		T8	3		T10	23
valid_sources[0x0e]	6300	1			T7	1		T8	3		T10	14
valid_sources[0x0f]	9568	1			T8	2		T11	4		T14	16
valid_sources[0x10]	16022	1			T7	43		T8	2		T10	4
valid_sources[0x11]	6256	1			T7	11		T8	2		T11	5
valid_sources[0x12]	6328	1			T8	1		T11	8		T14	15
valid_sources[0x13]	6588	1			T7	15		T8	3		T11	12
valid_sources[0x14]	6845	1			T7	25		T10	8		T11	8
valid_sources[0x15]	7583	1			T7	9		T8	1		T10	9
valid_sources[0x16]	7162	1			T7	7		T8	3		T10	6
valid_sources[0x17]	10314	1			T7	23		T8	4		T11	11
valid_sources[0x18]	7373	1			T7	27		T8	3		T10	12
valid_sources[0x19]	21801	1			T7	41		T8	1		T11	10
valid_sources[0x1a]	7000	1			T7	31		T8	1		T11	14
valid_sources[0x1b]	6411	1			T7	52		T8	2		T11	12
valid_sources[0x1c]	6843	1			T7	45		T8	1		T10	2
valid_sources[0x1d]	7242	1			T7	6		T8	6		T11	7
valid_sources[0x1e]	10608	1			T7	23		T8	1		T11	7
valid_sources[0x1f]	6187	1			T10	3		T11	5		T14	6
valid_sources[0x20]	6135	1			T7	42		T8	2		T11	14
valid_sources[0x21]	6585	1			T8	1		T11	16		T14	12
valid_sources[0x22]	8412	1			T7	2		T8	3		T11	9
valid_sources[0x23]	6529	1			T7	8		T11	9		T14	14
valid_sources[0x24]	6498	1			T7	20		T8	1		T10	3
valid_sources[0x25]	6859	1			T7	6		T8	2		T10	9
valid_sources[0x26]	9614	1			T7	13		T8	2		T10	1
valid_sources[0x27]	6240	1			T8	2		T11	7		T14	11
valid_sources[0x28]	8898	1			T7	6		T8	1		T10	14
valid_sources[0x29]	8306	1			T11	9		T14	13		T53	4
valid_sources[0x2a]	6149	1			T7	4		T8	3		T11	7
valid_sources[0x2b]	7494	1			T7	8		T8	4		T10	13
valid_sources[0x2c]	6214	1			T7	37		T8	1		T10	4
valid_sources[0x2d]	6366	1			T7	20		T8	2		T11	6
valid_sources[0x2e]	9568	1			T7	8		T8	2		T11	8
valid_sources[0x2f]	6412	1			T7	9		T8	1		T10	2
valid_sources[0x30]	6535	1			T8	1		T10	1		T11	9
valid_sources[0x31]	11378	1			T1	2130		T7	16		T8	1
valid_sources[0x32]	6450	1			T7	13		T11	3		T14	22
valid_sources[0x33]	11730	1			T8	1		T11	8		T14	12
valid_sources[0x34]	7462	1			T7	3		T8	2		T11	11
valid_sources[0x35]	6976	1			T7	29		T10	19		T11	10
valid_sources[0x36]	8380	1			T7	43		T8	3		T10	7
valid_sources[0x37]	6826	1			T7	27		T8	5		T11	9
valid_sources[0x38]	10122	1			T7	10		T8	3		T10	8
valid_sources[0x39]	11261	1			T7	11		T8	3		T10	7
valid_sources[0x3a]	6269	1			T7	14		T8	2		T11	11
valid_sources[0x3b]	12013	1			T7	8		T8	3		T10	8
valid_sources[0x3c]	6037	1			T7	13		T8	2		T10	3
valid_sources[0x3d]	7218	1			T7	20		T8	2		T11	5
valid_sources[0x3e]	7067	1			T7	19		T8	4		T10	17
valid_sources[0x3f]	6412	1			T7	45		T8	3		T11	11
valid_sources[0x40]	6429	1			T7	15		T8	2		T11	10
valid_sources[0x41]	6744	1			T7	6		T8	1		T11	13
valid_sources[0x42]	16731	1			T7	4		T8	3		T11	6
valid_sources[0x43]	10570	1			T7	16		T8	2		T11	10
valid_sources[0x44]	6324	1			T7	12		T8	4		T11	6
valid_sources[0x45]	5993	1			T7	20		T8	1		T10	13
valid_sources[0x46]	7711	1			T7	7		T8	1		T10	5
valid_sources[0x47]	5975	1			T8	2		T11	7		T14	18
valid_sources[0x48]	10113	1			T7	22		T8	4		T11	9
valid_sources[0x49]	10467	1			T7	4		T8	2		T10	8
valid_sources[0x4a]	8289	1			T7	38		T8	5		T11	10
valid_sources[0x4b]	6024	1			T7	11		T8	1		T11	10
valid_sources[0x4c]	6134	1			T7	24		T10	6		T11	10
valid_sources[0x4d]	7391	1			T7	17		T8	1		T11	11
valid_sources[0x4e]	6898	1			T7	10		T8	5		T10	25
valid_sources[0x4f]	9882	1			T7	15		T8	3		T11	10
valid_sources[0x50]	12961	1			T8	1		T11	10		T14	14
valid_sources[0x51]	6360	1			T7	13		T8	1		T11	7
valid_sources[0x52]	6265	1			T7	1		T8	1		T11	9
valid_sources[0x53]	5926	1			T7	19		T11	8		T14	20
valid_sources[0x54]	9412	1			T7	13		T8	3		T10	1
valid_sources[0x55]	6230	1			T7	18		T8	3		T11	9
valid_sources[0x56]	7911	1			T7	17		T8	1		T11	9
valid_sources[0x57]	7163	1			T7	10		T8	1		T11	9
valid_sources[0x58]	14426	1			T8	1		T10	22		T11	7
valid_sources[0x59]	6329	1			T7	34		T8	1		T10	1
valid_sources[0x5a]	6115	1			T7	5		T8	3		T10	6
valid_sources[0x5b]	6613	1			T7	13		T8	2		T10	5
valid_sources[0x5c]	7726	1			T7	1		T10	4		T11	4
valid_sources[0x5d]	6724	1			T7	3		T8	2		T10	1
valid_sources[0x5e]	5919	1			T7	1		T8	1		T10	5
valid_sources[0x5f]	6921	1			T8	1		T11	6		T14	16
valid_sources[0x60]	7184	1			T7	20		T10	3		T11	12
valid_sources[0x61]	11746	1			T8	3		T11	7		T14	14
valid_sources[0x62]	7166	1			T7	14		T8	1		T11	5
valid_sources[0x63]	6284	1			T7	20		T8	11		T10	2
valid_sources[0x64]	6573	1			T7	41		T8	3		T11	13
valid_sources[0x65]	6667	1			T8	2		T11	13		T14	15
valid_sources[0x66]	6489	1			T7	20		T8	3		T10	20
valid_sources[0x67]	6232	1			T7	6		T8	1		T10	3
valid_sources[0x68]	7563	1			T7	2		T8	1		T10	2
valid_sources[0x69]	15492	1			T7	29		T8	2		T11	8
valid_sources[0x6a]	6999	1			T7	11		T8	1		T11	7
valid_sources[0x6b]	17798	1			T7	3		T8	4		T11	11
valid_sources[0x6c]	9421	1			T7	8		T8	2		T11	9
valid_sources[0x6d]	26996	1			T7	24		T10	11		T11	4
valid_sources[0x6e]	7389	1			T7	14		T8	1		T10	9
valid_sources[0x6f]	6753	1			T7	1		T8	6		T11	8
valid_sources[0x70]	8014	1			T2	1147		T8	6		T11	10
valid_sources[0x71]	13865	1			T7	28		T8	2		T10	24
valid_sources[0x72]	7830	1			T7	7		T8	1		T10	2
valid_sources[0x73]	29919	1			T7	6		T8	3		T9	3164
valid_sources[0x74]	11242	1			T7	17		T11	9		T14	11
valid_sources[0x75]	6611	1			T7	13		T11	11		T14	16
valid_sources[0x76]	6390	1			T8	7		T10	13		T11	13
valid_sources[0x77]	6296	1			T7	25		T8	7		T11	9
valid_sources[0x78]	6438	1			T7	3		T10	2		T11	15
valid_sources[0x79]	6295	1			T7	4		T10	10		T11	10
valid_sources[0x7a]	6220	1			T7	25		T8	2		T10	1
valid_sources[0x7b]	17941	1			T7	21		T11	6		T14	11
valid_sources[0x7c]	7168	1			T7	13		T8	3		T10	2
valid_sources[0x7d]	6741	1			T8	1		T11	9		T14	16
valid_sources[0x7e]	11636	1			T7	16		T8	6		T11	8
valid_sources[0x7f]	6146	1			T7	18		T10	1		T11	14
valid_sources[0x80]	6301	1			T8	5		T10	7		T11	8

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

35972

1

T1

8

T2

24

T3

19

values[0x0]

all_enables

biggest_size

48516

1

T1

6

T2

32

T3

8

values[0x1]

all_enables

biggest_size

46803

1

T1

5

T2

11

T3

4