Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 13370390 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 56463124 1 T1 979 T2 122 T3 136037



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 34803148 1 T1 589 T2 863 T3 74963
values[0x0] 16181288 1 T1 270 T2 361 T3 35759
values[0x1] 18849078 1 T1 329 T2 765 T3 39127



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 6662219 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 63171295 1 T1 1083 T2 897 T3 142968



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 264005 1 T1 9 T2 5 T3 548
valid_sources[0x01] 249958 1 T1 2 T2 5 T3 582
valid_sources[0x02] 306104 1 T1 5 T2 2 T3 615
valid_sources[0x03] 292969 1 T1 2 T2 18 T3 600
valid_sources[0x04] 251024 1 T1 1 T2 5 T3 562
valid_sources[0x05] 267054 1 T1 10 T3 577 T6 806
valid_sources[0x06] 257594 1 T1 2 T3 590 T6 877
valid_sources[0x07] 278842 1 T1 7 T2 7 T3 578
valid_sources[0x08] 283461 1 T1 1 T2 4 T3 600
valid_sources[0x09] 291343 1 T1 7 T3 589 T6 810
valid_sources[0x0a] 273488 1 T1 1 T2 9 T3 579
valid_sources[0x0b] 266605 1 T1 3 T2 6 T3 561
valid_sources[0x0c] 269337 1 T1 10 T2 6 T3 590
valid_sources[0x0d] 285916 1 T1 5 T2 1 T3 565
valid_sources[0x0e] 250534 1 T1 2 T2 14 T3 610
valid_sources[0x0f] 261664 1 T1 2 T3 593 T6 716
valid_sources[0x10] 291231 1 T1 8 T2 11 T3 613
valid_sources[0x11] 293654 1 T1 7 T3 538 T6 849
valid_sources[0x12] 246005 1 T1 5 T3 499 T6 893
valid_sources[0x13] 259239 1 T1 5 T2 19 T3 596
valid_sources[0x14] 247188 1 T1 13 T2 3 T3 545
valid_sources[0x15] 246942 1 T1 15 T2 9 T3 626
valid_sources[0x16] 243478 1 T1 2 T2 6 T3 543
valid_sources[0x17] 245393 1 T1 10 T2 10 T3 599
valid_sources[0x18] 252893 1 T1 3 T2 14 T3 583
valid_sources[0x19] 266467 1 T1 9 T2 4 T3 635
valid_sources[0x1a] 260954 1 T1 8 T2 1 T3 600
valid_sources[0x1b] 277874 1 T1 3 T2 22 T3 602
valid_sources[0x1c] 261591 1 T1 4 T2 28 T3 553
valid_sources[0x1d] 253314 1 T1 2 T2 8 T3 625
valid_sources[0x1e] 286503 1 T1 2 T2 1 T3 564
valid_sources[0x1f] 240469 1 T1 8 T2 2 T3 609
valid_sources[0x20] 239555 1 T1 6 T2 6 T3 525
valid_sources[0x21] 247276 1 T1 3 T2 2 T3 594
valid_sources[0x22] 310590 1 T1 6 T2 30 T3 565
valid_sources[0x23] 278663 1 T1 2 T2 10 T3 580
valid_sources[0x24] 265199 1 T1 5 T3 578 T4 2649
valid_sources[0x25] 254824 1 T1 3 T2 26 T3 540
valid_sources[0x26] 273184 1 T1 2 T2 12 T3 574
valid_sources[0x27] 247060 1 T1 2 T2 16 T3 599
valid_sources[0x28] 254335 1 T1 3 T2 6 T3 582
valid_sources[0x29] 311326 1 T1 4 T2 11 T3 554
valid_sources[0x2a] 252257 1 T1 8 T2 5 T3 584
valid_sources[0x2b] 270131 1 T1 2 T2 12 T3 609
valid_sources[0x2c] 240409 1 T1 4 T2 18 T3 586
valid_sources[0x2d] 307235 1 T1 7 T2 3 T3 619
valid_sources[0x2e] 291930 1 T1 1 T2 4 T3 580
valid_sources[0x2f] 286536 1 T1 2 T2 1 T3 596
valid_sources[0x30] 277503 1 T1 3 T3 553 T6 669
valid_sources[0x31] 266456 1 T1 6 T2 19 T3 547
valid_sources[0x32] 281420 1 T1 4 T3 585 T6 672
valid_sources[0x33] 291059 1 T1 3 T2 1 T3 571
valid_sources[0x34] 275623 1 T1 1 T2 9 T3 606
valid_sources[0x35] 244224 1 T1 3 T2 33 T3 608
valid_sources[0x36] 266135 1 T1 7 T2 5 T3 577
valid_sources[0x37] 255359 1 T1 4 T2 28 T3 593
valid_sources[0x38] 249566 1 T1 2 T2 3 T3 529
valid_sources[0x39] 256533 1 T1 3 T2 7 T3 573
valid_sources[0x3a] 250922 1 T1 3 T2 3 T3 519
valid_sources[0x3b] 366991 1 T1 5 T2 15 T3 620
valid_sources[0x3c] 264660 1 T1 4 T2 11 T3 594
valid_sources[0x3d] 251809 1 T1 3 T2 3 T3 634
valid_sources[0x3e] 283936 1 T1 6 T3 588 T6 788
valid_sources[0x3f] 298660 1 T1 5 T2 6 T3 566
valid_sources[0x40] 252739 1 T1 4 T2 16 T3 608
valid_sources[0x41] 279503 1 T1 5 T3 613 T6 937
valid_sources[0x42] 254667 1 T1 8 T2 1 T3 595
valid_sources[0x43] 325457 1 T1 2 T2 4 T3 610
valid_sources[0x44] 291183 1 T1 5 T2 5 T3 565
valid_sources[0x45] 315156 1 T1 7 T2 3 T3 570
valid_sources[0x46] 254245 1 T1 9 T3 530 T6 984
valid_sources[0x47] 343507 1 T1 8 T3 582 T6 874
valid_sources[0x48] 260774 1 T1 9 T2 7 T3 545
valid_sources[0x49] 245703 1 T1 4 T3 530 T6 907
valid_sources[0x4a] 255417 1 T1 4 T2 9 T3 562
valid_sources[0x4b] 298020 1 T1 9 T2 5 T3 620
valid_sources[0x4c] 277875 1 T1 1 T2 3 T3 601
valid_sources[0x4d] 276129 1 T1 3 T2 4 T3 633
valid_sources[0x4e] 296149 1 T1 4 T2 5 T3 584
valid_sources[0x4f] 270275 1 T1 3 T2 3 T3 646
valid_sources[0x50] 280516 1 T1 8 T2 4 T3 588
valid_sources[0x51] 241180 1 T1 6 T2 9 T3 608
valid_sources[0x52] 282736 1 T1 6 T2 15 T3 525
valid_sources[0x53] 274133 1 T1 4 T2 1 T3 561
valid_sources[0x54] 264126 1 T1 1 T3 598 T6 967
valid_sources[0x55] 294562 1 T1 5 T2 8 T3 634
valid_sources[0x56] 262275 1 T1 2 T2 21 T3 594
valid_sources[0x57] 289849 1 T1 5 T2 22 T3 605
valid_sources[0x58] 266436 1 T1 4 T3 631 T6 701
valid_sources[0x59] 268376 1 T1 7 T2 2 T3 585
valid_sources[0x5a] 313127 1 T3 653 T6 826 T5 882
valid_sources[0x5b] 266747 1 T2 9 T3 563 T6 913
valid_sources[0x5c] 257098 1 T1 10 T3 581 T6 896
valid_sources[0x5d] 247573 1 T1 7 T2 3 T3 590
valid_sources[0x5e] 241895 1 T1 3 T2 11 T3 594
valid_sources[0x5f] 259263 1 T1 4 T2 3 T3 570
valid_sources[0x60] 257583 1 T1 10 T2 15 T3 600
valid_sources[0x61] 279393 1 T1 1 T2 2 T3 583
valid_sources[0x62] 241073 1 T1 5 T2 1 T3 598
valid_sources[0x63] 259383 1 T1 4 T2 2 T3 594
valid_sources[0x64] 276794 1 T1 1 T2 18 T3 591
valid_sources[0x65] 260012 1 T1 4 T2 5 T3 613
valid_sources[0x66] 261151 1 T1 4 T2 3 T3 596
valid_sources[0x67] 252751 1 T1 4 T3 563 T6 709
valid_sources[0x68] 275190 1 T1 7 T3 581 T6 870
valid_sources[0x69] 298791 1 T1 4 T2 1 T3 617
valid_sources[0x6a] 302122 1 T1 4 T2 5 T3 591
valid_sources[0x6b] 263096 1 T1 2 T2 4 T3 591
valid_sources[0x6c] 278158 1 T1 7 T2 7 T3 574
valid_sources[0x6d] 256857 1 T1 4 T2 12 T3 583
valid_sources[0x6e] 256054 1 T1 2 T2 13 T3 607
valid_sources[0x6f] 322489 1 T1 6 T2 4 T3 533
valid_sources[0x70] 283072 1 T1 4 T2 4 T3 562
valid_sources[0x71] 250160 1 T1 3 T2 5 T3 604
valid_sources[0x72] 403632 1 T1 3 T3 600 T6 900
valid_sources[0x73] 281149 1 T1 4 T2 20 T3 616
valid_sources[0x74] 311774 1 T1 3 T2 26 T3 541
valid_sources[0x75] 289483 1 T1 7 T2 1 T3 606
valid_sources[0x76] 258081 1 T1 2 T3 527 T6 811
valid_sources[0x77] 308846 1 T1 2 T2 2 T3 543
valid_sources[0x78] 264039 1 T1 8 T2 7 T3 585
valid_sources[0x79] 245005 1 T1 1 T2 5 T3 555
valid_sources[0x7a] 266425 1 T1 4 T2 1 T3 541
valid_sources[0x7b] 247317 1 T1 8 T2 10 T3 559
valid_sources[0x7c] 284153 1 T1 4 T2 7 T3 600
valid_sources[0x7d] 302463 1 T1 3 T2 3 T3 620
valid_sources[0x7e] 250605 1 T1 13 T3 569 T6 867
valid_sources[0x7f] 276772 1 T1 1 T3 581 T6 870
valid_sources[0x80] 263824 1 T1 5 T2 3 T3 564



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 28120332 1 T1 507 T2 8 T3 68090
values[0x0] all_enables biggest_size 14175961 1 T1 234 T2 54 T3 33673
values[0x1] all_enables biggest_size 14166831 1 T1 238 T2 60 T3 34274


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 2025502 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 146952 1 T3 4 T8 1 T4 2703



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2046755 1 T1 1055 T2 153 T3 6582
values[0x0] 61049 1 T1 1 T3 7 T8 1
values[0x1] 64650 1 T1 1 T2 1 T3 5



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 1352939 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 819515 1 T1 326 T2 52 T3 2136



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 7861 1 T3 18 T4 30 T6 35
valid_sources[0x01] 7975 1 T2 1 T3 23 T4 78
valid_sources[0x02] 9985 1 T3 27 T4 19 T6 24
valid_sources[0x03] 12197 1 T2 1 T3 20 T4 2
valid_sources[0x04] 6348 1 T2 1 T3 32 T6 10
valid_sources[0x05] 10579 1 T3 27 T4 9 T6 33
valid_sources[0x06] 12259 1 T3 39 T4 2 T6 30
valid_sources[0x07] 6700 1 T3 20 T4 9 T6 40
valid_sources[0x08] 6835 1 T3 23 T4 41 T6 37
valid_sources[0x09] 13196 1 T3 28 T4 6 T6 25
valid_sources[0x0a] 7590 1 T2 2 T3 28 T4 27
valid_sources[0x0b] 6716 1 T3 36 T4 2 T6 9
valid_sources[0x0c] 7224 1 T2 1 T3 20 T6 29
valid_sources[0x0d] 6457 1 T3 26 T6 26 T5 38
valid_sources[0x0e] 7075 1 T2 3 T3 21 T4 2
valid_sources[0x0f] 7640 1 T2 1 T3 26 T4 35
valid_sources[0x10] 14062 1 T2 1 T3 24 T4 34
valid_sources[0x11] 7339 1 T3 36 T4 26 T6 50
valid_sources[0x12] 9071 1 T3 25 T6 29 T5 26
valid_sources[0x13] 7271 1 T2 1 T3 19 T4 10
valid_sources[0x14] 7412 1 T3 21 T4 3 T6 48
valid_sources[0x15] 7407 1 T2 2 T3 25 T6 57
valid_sources[0x16] 6975 1 T2 1 T3 17 T6 19
valid_sources[0x17] 6717 1 T3 23 T6 26 T5 36
valid_sources[0x18] 14958 1 T3 14 T8 1 T4 61
valid_sources[0x19] 7917 1 T3 23 T4 8 T6 48
valid_sources[0x1a] 6726 1 T3 28 T4 20 T6 25
valid_sources[0x1b] 7487 1 T3 18 T4 38 T6 32
valid_sources[0x1c] 6977 1 T2 1 T3 27 T4 2
valid_sources[0x1d] 6995 1 T2 1 T3 18 T4 20
valid_sources[0x1e] 7948 1 T3 21 T4 94 T6 66
valid_sources[0x1f] 6907 1 T3 20 T4 2 T6 45
valid_sources[0x20] 6408 1 T3 23 T4 79 T6 16
valid_sources[0x21] 9699 1 T2 1 T3 29 T4 7
valid_sources[0x22] 8000 1 T3 16 T6 91 T5 46
valid_sources[0x23] 10501 1 T3 23 T4 3 T6 11
valid_sources[0x24] 10818 1 T3 21 T6 24 T5 40
valid_sources[0x25] 7059 1 T2 1 T3 26 T4 16
valid_sources[0x26] 6190 1 T3 23 T6 102 T5 41
valid_sources[0x27] 6509 1 T3 24 T4 11 T6 6
valid_sources[0x28] 6379 1 T2 1 T3 23 T4 99
valid_sources[0x29] 6710 1 T3 26 T6 33 T5 35
valid_sources[0x2a] 6785 1 T2 1 T3 35 T6 17
valid_sources[0x2b] 8422 1 T2 2 T3 35 T6 55
valid_sources[0x2c] 6871 1 T2 1 T3 25 T4 15
valid_sources[0x2d] 7275 1 T3 16 T4 14 T6 9
valid_sources[0x2e] 6950 1 T2 2 T3 31 T4 67
valid_sources[0x2f] 7750 1 T3 29 T6 34 T5 22
valid_sources[0x30] 6765 1 T3 28 T4 9 T6 46
valid_sources[0x31] 8751 1 T2 1 T3 27 T4 16
valid_sources[0x32] 6810 1 T3 30 T4 14 T6 34
valid_sources[0x33] 6956 1 T2 1 T3 26 T4 3
valid_sources[0x34] 7283 1 T3 22 T6 15 T5 41
valid_sources[0x35] 7574 1 T3 37 T4 16 T6 34
valid_sources[0x36] 6931 1 T2 2 T3 32 T4 19
valid_sources[0x37] 11277 1 T3 28 T4 2 T6 19
valid_sources[0x38] 6818 1 T2 1 T3 24 T4 10
valid_sources[0x39] 7408 1 T3 40 T6 44 T5 47
valid_sources[0x3a] 6613 1 T2 1 T3 17 T4 1
valid_sources[0x3b] 6640 1 T3 26 T4 2 T6 57
valid_sources[0x3c] 6862 1 T2 1 T3 24 T4 1
valid_sources[0x3d] 6740 1 T2 1 T3 26 T4 12
valid_sources[0x3e] 7462 1 T3 46 T6 10 T5 64
valid_sources[0x3f] 6779 1 T3 27 T6 57 T5 46
valid_sources[0x40] 10837 1 T3 25 T4 29 T6 18
valid_sources[0x41] 7213 1 T2 1 T3 36 T6 32
valid_sources[0x42] 7166 1 T3 20 T4 3 T6 32
valid_sources[0x43] 6540 1 T2 1 T3 26 T4 3
valid_sources[0x44] 6315 1 T3 29 T4 6 T6 29
valid_sources[0x45] 7332 1 T3 26 T4 38 T6 34
valid_sources[0x46] 7795 1 T2 3 T3 26 T4 37
valid_sources[0x47] 6779 1 T2 5 T3 23 T4 8
valid_sources[0x48] 6614 1 T3 13 T4 25 T6 22
valid_sources[0x49] 8525 1 T2 5 T3 25 T4 3
valid_sources[0x4a] 8136 1 T2 3 T3 22 T4 8
valid_sources[0x4b] 8469 1 T2 2 T3 22 T4 15
valid_sources[0x4c] 6415 1 T2 1 T3 19 T4 11
valid_sources[0x4d] 6807 1 T2 4 T3 37 T4 8
valid_sources[0x4e] 8315 1 T2 1 T3 23 T4 9
valid_sources[0x4f] 6656 1 T3 22 T6 51 T5 41
valid_sources[0x50] 6555 1 T3 30 T4 10 T5 42
valid_sources[0x51] 9499 1 T3 21 T4 3 T6 42
valid_sources[0x52] 6960 1 T3 25 T8 3 T4 20
valid_sources[0x53] 6935 1 T3 30 T6 3 T5 35
valid_sources[0x54] 6698 1 T3 23 T4 1 T6 22
valid_sources[0x55] 6327 1 T3 33 T4 6 T6 9
valid_sources[0x56] 13740 1 T2 2 T3 32 T6 57
valid_sources[0x57] 7700 1 T1 1057 T3 33 T4 30
valid_sources[0x58] 6877 1 T2 4 T3 34 T4 1
valid_sources[0x59] 6872 1 T2 1 T3 29 T4 18
valid_sources[0x5a] 8251 1 T2 1 T3 22 T6 3
valid_sources[0x5b] 6523 1 T3 27 T4 5 T6 42
valid_sources[0x5c] 8865 1 T3 34 T6 54 T5 37
valid_sources[0x5d] 6809 1 T2 2 T3 13 T4 4
valid_sources[0x5e] 7991 1 T3 22 T6 30 T5 44
valid_sources[0x5f] 6873 1 T3 34 T4 26 T6 20
valid_sources[0x60] 7289 1 T3 27 T4 86 T6 41
valid_sources[0x61] 16026 1 T3 31 T6 29 T5 37
valid_sources[0x62] 6869 1 T3 28 T4 26 T6 45
valid_sources[0x63] 8661 1 T3 27 T6 32 T5 51
valid_sources[0x64] 8704 1 T2 3 T3 19 T4 4
valid_sources[0x65] 20969 1 T2 1 T3 25 T6 13
valid_sources[0x66] 6656 1 T3 38 T4 40 T6 15
valid_sources[0x67] 6572 1 T3 14 T4 45 T6 23
valid_sources[0x68] 6972 1 T2 2 T3 31 T4 1
valid_sources[0x69] 8017 1 T2 1 T3 29 T6 43
valid_sources[0x6a] 6550 1 T2 2 T3 22 T4 18
valid_sources[0x6b] 6188 1 T3 19 T6 3 T5 41
valid_sources[0x6c] 6717 1 T3 27 T4 29 T6 54
valid_sources[0x6d] 23792 1 T2 2 T3 25 T4 9
valid_sources[0x6e] 7930 1 T3 31 T4 1 T6 26
valid_sources[0x6f] 9144 1 T3 26 T4 18 T6 37
valid_sources[0x70] 9462 1 T3 23 T4 21 T6 38
valid_sources[0x71] 6319 1 T3 25 T4 16 T6 13
valid_sources[0x72] 8010 1 T3 29 T4 50 T6 67
valid_sources[0x73] 9119 1 T2 1 T3 27 T4 35
valid_sources[0x74] 6883 1 T3 37 T4 36 T6 40
valid_sources[0x75] 7508 1 T2 1 T3 15 T6 32
valid_sources[0x76] 10040 1 T2 1 T3 25 T6 34
valid_sources[0x77] 16539 1 T2 2 T3 25 T6 26
valid_sources[0x78] 7475 1 T2 1 T3 24 T4 29
valid_sources[0x79] 6353 1 T2 1 T3 20 T4 33
valid_sources[0x7a] 16331 1 T3 38 T6 56 T5 35
valid_sources[0x7b] 6489 1 T2 1 T3 26 T4 20
valid_sources[0x7c] 6702 1 T3 31 T4 9 T6 27
valid_sources[0x7d] 6528 1 T3 25 T6 3 T5 35
valid_sources[0x7e] 8230 1 T3 27 T6 63 T5 47
valid_sources[0x7f] 6937 1 T3 27 T4 49 T6 38
valid_sources[0x80] 7507 1 T3 29 T4 59 T6 27



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 39862 1 T4 699 T6 3 T5 33
values[0x0] all_enables biggest_size 54413 1 T3 3 T4 1030 T6 4
values[0x1] all_enables biggest_size 52677 1 T3 1 T8 1 T4 974

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%