T257 |
/workspace/coverage/default/13.sram_ctrl_executable.3451565560 |
|
|
Jan 24 05:54:34 PM PST 24 |
Jan 24 06:08:54 PM PST 24 |
2871273327 ps |
T258 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3575848411 |
|
|
Jan 24 05:55:40 PM PST 24 |
Jan 24 06:24:05 PM PST 24 |
10325123664 ps |
T28 |
/workspace/coverage/default/43.sram_ctrl_stress_all.2665414508 |
|
|
Jan 24 06:32:56 PM PST 24 |
Jan 24 07:34:01 PM PST 24 |
87430663256 ps |
T259 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.3924112473 |
|
|
Jan 24 05:47:02 PM PST 24 |
Jan 24 05:47:07 PM PST 24 |
603361826 ps |
T260 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.149276333 |
|
|
Jan 24 05:54:00 PM PST 24 |
Jan 24 05:57:45 PM PST 24 |
2554428488 ps |
T261 |
/workspace/coverage/default/18.sram_ctrl_bijection.177617057 |
|
|
Jan 24 06:09:39 PM PST 24 |
Jan 24 06:10:39 PM PST 24 |
5223065628 ps |
T262 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.870344826 |
|
|
Jan 24 06:09:53 PM PST 24 |
Jan 24 06:12:10 PM PST 24 |
2582177288 ps |
T263 |
/workspace/coverage/default/3.sram_ctrl_executable.2987287913 |
|
|
Jan 24 06:45:00 PM PST 24 |
Jan 24 06:51:38 PM PST 24 |
436517751 ps |
T264 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2131922068 |
|
|
Jan 24 06:24:33 PM PST 24 |
Jan 24 06:25:08 PM PST 24 |
98522273 ps |
T265 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2814125161 |
|
|
Jan 24 05:54:55 PM PST 24 |
Jan 24 05:55:06 PM PST 24 |
2204257821 ps |
T266 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3714552396 |
|
|
Jan 24 06:02:30 PM PST 24 |
Jan 24 06:02:40 PM PST 24 |
6761519273 ps |
T267 |
/workspace/coverage/default/3.sram_ctrl_regwen.2908768457 |
|
|
Jan 24 05:46:37 PM PST 24 |
Jan 24 06:27:51 PM PST 24 |
54044885283 ps |
T268 |
/workspace/coverage/default/2.sram_ctrl_bijection.4278895890 |
|
|
Jan 24 07:13:31 PM PST 24 |
Jan 24 07:14:53 PM PST 24 |
8375529169 ps |
T269 |
/workspace/coverage/default/14.sram_ctrl_regwen.3109454346 |
|
|
Jan 24 05:55:22 PM PST 24 |
Jan 24 06:19:59 PM PST 24 |
10792286790 ps |
T270 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.3086683350 |
|
|
Jan 24 05:49:30 PM PST 24 |
Jan 24 05:49:36 PM PST 24 |
1242504477 ps |
T271 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.531605891 |
|
|
Jan 24 07:33:53 PM PST 24 |
Jan 24 07:37:22 PM PST 24 |
17844443876 ps |
T272 |
/workspace/coverage/default/28.sram_ctrl_bijection.1879368517 |
|
|
Jan 24 06:13:18 PM PST 24 |
Jan 24 06:14:07 PM PST 24 |
3024490251 ps |
T273 |
/workspace/coverage/default/26.sram_ctrl_regwen.3307944172 |
|
|
Jan 24 06:11:17 PM PST 24 |
Jan 24 06:39:22 PM PST 24 |
27282158396 ps |
T274 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2928720640 |
|
|
Jan 24 06:17:36 PM PST 24 |
Jan 24 06:20:49 PM PST 24 |
7820990865 ps |
T275 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.526267110 |
|
|
Jan 24 05:52:20 PM PST 24 |
Jan 24 05:52:38 PM PST 24 |
77551675 ps |
T276 |
/workspace/coverage/default/34.sram_ctrl_executable.1955847274 |
|
|
Jan 24 06:22:00 PM PST 24 |
Jan 24 06:27:29 PM PST 24 |
15349289464 ps |
T277 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.149716240 |
|
|
Jan 24 06:31:46 PM PST 24 |
Jan 24 06:31:48 PM PST 24 |
82462582 ps |
T278 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2464330998 |
|
|
Jan 24 08:22:00 PM PST 24 |
Jan 24 08:45:59 PM PST 24 |
1511404257 ps |
T279 |
/workspace/coverage/default/24.sram_ctrl_executable.1291256531 |
|
|
Jan 24 06:09:01 PM PST 24 |
Jan 24 06:34:43 PM PST 24 |
58436850414 ps |
T280 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1277740868 |
|
|
Jan 24 06:11:41 PM PST 24 |
Jan 24 06:37:53 PM PST 24 |
11083485280 ps |
T281 |
/workspace/coverage/default/1.sram_ctrl_stress_all.137855186 |
|
|
Jan 24 05:43:55 PM PST 24 |
Jan 24 06:27:02 PM PST 24 |
66233927613 ps |
T282 |
/workspace/coverage/default/21.sram_ctrl_regwen.1809965965 |
|
|
Jan 24 06:05:13 PM PST 24 |
Jan 24 06:22:26 PM PST 24 |
18632859355 ps |
T283 |
/workspace/coverage/default/23.sram_ctrl_smoke.4294122060 |
|
|
Jan 24 06:06:50 PM PST 24 |
Jan 24 06:08:56 PM PST 24 |
676467812 ps |
T284 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2436861871 |
|
|
Jan 24 05:58:23 PM PST 24 |
Jan 24 05:58:29 PM PST 24 |
677938128 ps |
T285 |
/workspace/coverage/default/20.sram_ctrl_executable.29349281 |
|
|
Jan 24 07:53:12 PM PST 24 |
Jan 24 08:07:41 PM PST 24 |
2173842220 ps |
T286 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.1759336632 |
|
|
Jan 24 06:20:03 PM PST 24 |
Jan 24 06:35:15 PM PST 24 |
2787364986 ps |
T287 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.670369828 |
|
|
Jan 24 06:32:27 PM PST 24 |
Jan 24 06:39:21 PM PST 24 |
32282983749 ps |
T288 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2609101506 |
|
|
Jan 24 06:02:31 PM PST 24 |
Jan 24 06:02:33 PM PST 24 |
41169797 ps |
T289 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.645216251 |
|
|
Jan 24 06:12:21 PM PST 24 |
Jan 24 06:12:27 PM PST 24 |
44822088 ps |
T290 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.147725426 |
|
|
Jan 24 06:27:00 PM PST 24 |
Jan 24 06:27:06 PM PST 24 |
1339692307 ps |
T291 |
/workspace/coverage/default/11.sram_ctrl_stress_all.1228133970 |
|
|
Jan 24 05:53:32 PM PST 24 |
Jan 24 06:55:00 PM PST 24 |
68599213702 ps |
T292 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3177263373 |
|
|
Jan 24 07:01:17 PM PST 24 |
Jan 24 07:07:05 PM PST 24 |
7149856410 ps |
T293 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.1339110174 |
|
|
Jan 24 05:55:08 PM PST 24 |
Jan 24 05:55:13 PM PST 24 |
182358773 ps |
T294 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.2680236332 |
|
|
Jan 24 06:28:43 PM PST 24 |
Jan 24 06:28:45 PM PST 24 |
288111807 ps |
T295 |
/workspace/coverage/default/4.sram_ctrl_regwen.2111187711 |
|
|
Jan 24 05:47:14 PM PST 24 |
Jan 24 06:06:56 PM PST 24 |
9496743842 ps |
T296 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.239222687 |
|
|
Jan 24 06:32:28 PM PST 24 |
Jan 24 06:32:36 PM PST 24 |
84009465 ps |
T297 |
/workspace/coverage/default/45.sram_ctrl_executable.1890570062 |
|
|
Jan 24 06:35:13 PM PST 24 |
Jan 24 06:55:22 PM PST 24 |
10050366846 ps |
T298 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3253159099 |
|
|
Jan 24 05:54:20 PM PST 24 |
Jan 24 05:54:57 PM PST 24 |
202794373 ps |
T299 |
/workspace/coverage/default/16.sram_ctrl_partial_access.2398212683 |
|
|
Jan 24 07:26:48 PM PST 24 |
Jan 24 07:27:08 PM PST 24 |
2362725495 ps |
T300 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.727329857 |
|
|
Jan 24 06:48:01 PM PST 24 |
Jan 24 06:56:14 PM PST 24 |
5127961365 ps |
T301 |
/workspace/coverage/default/8.sram_ctrl_bijection.957239814 |
|
|
Jan 24 05:50:19 PM PST 24 |
Jan 24 05:51:02 PM PST 24 |
1799523809 ps |
T302 |
/workspace/coverage/default/46.sram_ctrl_regwen.84460662 |
|
|
Jan 24 06:36:33 PM PST 24 |
Jan 24 06:44:17 PM PST 24 |
7229771352 ps |
T303 |
/workspace/coverage/default/3.sram_ctrl_bijection.3666434095 |
|
|
Jan 24 05:45:36 PM PST 24 |
Jan 24 05:46:13 PM PST 24 |
6623469221 ps |
T304 |
/workspace/coverage/default/48.sram_ctrl_partial_access.436325831 |
|
|
Jan 24 06:38:40 PM PST 24 |
Jan 24 06:38:56 PM PST 24 |
835152731 ps |
T305 |
/workspace/coverage/default/35.sram_ctrl_smoke.3153615172 |
|
|
Jan 24 06:22:37 PM PST 24 |
Jan 24 06:22:45 PM PST 24 |
328908338 ps |
T306 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3353488734 |
|
|
Jan 24 06:36:40 PM PST 24 |
Jan 24 06:36:50 PM PST 24 |
1741188128 ps |
T307 |
/workspace/coverage/default/32.sram_ctrl_smoke.3681558755 |
|
|
Jan 24 06:19:01 PM PST 24 |
Jan 24 06:19:10 PM PST 24 |
162241981 ps |
T308 |
/workspace/coverage/default/45.sram_ctrl_smoke.1722701426 |
|
|
Jan 24 06:34:28 PM PST 24 |
Jan 24 06:34:34 PM PST 24 |
80812548 ps |
T309 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.2922441932 |
|
|
Jan 24 06:08:12 PM PST 24 |
Jan 24 06:08:32 PM PST 24 |
77223641 ps |
T310 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.3878382679 |
|
|
Jan 24 06:30:00 PM PST 24 |
Jan 24 06:32:57 PM PST 24 |
3521442799 ps |
T311 |
/workspace/coverage/default/29.sram_ctrl_regwen.342409750 |
|
|
Jan 24 06:23:01 PM PST 24 |
Jan 24 06:27:15 PM PST 24 |
26361463669 ps |
T312 |
/workspace/coverage/default/33.sram_ctrl_bijection.298390397 |
|
|
Jan 24 06:20:09 PM PST 24 |
Jan 24 06:21:35 PM PST 24 |
5481637413 ps |
T313 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.3365905479 |
|
|
Jan 24 06:09:56 PM PST 24 |
Jan 24 06:09:59 PM PST 24 |
142126173 ps |
T314 |
/workspace/coverage/default/36.sram_ctrl_executable.2428452187 |
|
|
Jan 24 06:56:17 PM PST 24 |
Jan 24 07:06:44 PM PST 24 |
2659656739 ps |
T315 |
/workspace/coverage/default/39.sram_ctrl_alert_test.3693492053 |
|
|
Jan 24 06:28:56 PM PST 24 |
Jan 24 06:28:57 PM PST 24 |
13218355 ps |
T316 |
/workspace/coverage/default/40.sram_ctrl_executable.2534799668 |
|
|
Jan 24 06:29:29 PM PST 24 |
Jan 24 06:41:13 PM PST 24 |
2917505459 ps |
T317 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.2669049519 |
|
|
Jan 24 06:37:44 PM PST 24 |
Jan 24 06:57:09 PM PST 24 |
62328048660 ps |
T318 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2029128467 |
|
|
Jan 24 06:06:29 PM PST 24 |
Jan 24 06:06:36 PM PST 24 |
62357385 ps |
T319 |
/workspace/coverage/default/29.sram_ctrl_bijection.2686157839 |
|
|
Jan 24 06:30:50 PM PST 24 |
Jan 24 06:31:30 PM PST 24 |
833871638 ps |
T320 |
/workspace/coverage/default/12.sram_ctrl_partial_access.3239314834 |
|
|
Jan 24 05:53:36 PM PST 24 |
Jan 24 05:54:40 PM PST 24 |
4792443508 ps |
T321 |
/workspace/coverage/default/37.sram_ctrl_bijection.3875333089 |
|
|
Jan 24 06:25:38 PM PST 24 |
Jan 24 06:26:45 PM PST 24 |
4176055815 ps |
T322 |
/workspace/coverage/default/42.sram_ctrl_partial_access.1235559062 |
|
|
Jan 24 06:31:27 PM PST 24 |
Jan 24 06:31:46 PM PST 24 |
1133289064 ps |
T323 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.1111366999 |
|
|
Jan 24 07:13:21 PM PST 24 |
Jan 24 07:27:41 PM PST 24 |
3072963198 ps |
T324 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.3817702338 |
|
|
Jan 24 06:06:46 PM PST 24 |
Jan 24 06:06:53 PM PST 24 |
1367816427 ps |
T325 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1556972471 |
|
|
Jan 24 05:49:48 PM PST 24 |
Jan 24 05:49:57 PM PST 24 |
670486288 ps |
T326 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3218548495 |
|
|
Jan 24 06:33:29 PM PST 24 |
Jan 24 06:35:22 PM PST 24 |
159106476 ps |
T327 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2471598857 |
|
|
Jan 24 07:09:07 PM PST 24 |
Jan 24 07:09:12 PM PST 24 |
91213250 ps |
T328 |
/workspace/coverage/default/17.sram_ctrl_regwen.1811420982 |
|
|
Jan 24 05:58:19 PM PST 24 |
Jan 24 06:15:28 PM PST 24 |
62392717247 ps |
T329 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.1502376745 |
|
|
Jan 24 06:26:13 PM PST 24 |
Jan 24 06:26:18 PM PST 24 |
87487530 ps |
T330 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1749501448 |
|
|
Jan 24 06:40:17 PM PST 24 |
Jan 24 06:40:24 PM PST 24 |
2145776995 ps |
T331 |
/workspace/coverage/default/18.sram_ctrl_partial_access.2621707364 |
|
|
Jan 24 05:58:57 PM PST 24 |
Jan 24 05:59:18 PM PST 24 |
4684770192 ps |
T332 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3289721095 |
|
|
Jan 24 06:37:50 PM PST 24 |
Jan 24 06:43:36 PM PST 24 |
6934249545 ps |
T333 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2797482016 |
|
|
Jan 24 06:18:08 PM PST 24 |
Jan 24 06:18:33 PM PST 24 |
348911377 ps |
T334 |
/workspace/coverage/default/5.sram_ctrl_executable.3402917944 |
|
|
Jan 24 05:48:23 PM PST 24 |
Jan 24 06:02:27 PM PST 24 |
3613260690 ps |
T335 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.586171596 |
|
|
Jan 24 06:09:54 PM PST 24 |
Jan 24 06:10:00 PM PST 24 |
156664046 ps |
T336 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1558921669 |
|
|
Jan 24 06:25:58 PM PST 24 |
Jan 24 06:26:07 PM PST 24 |
237321134 ps |
T337 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.1715270743 |
|
|
Jan 24 06:18:07 PM PST 24 |
Jan 24 06:18:09 PM PST 24 |
1011778611 ps |
T338 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.2983999095 |
|
|
Jan 24 05:55:58 PM PST 24 |
Jan 24 06:05:08 PM PST 24 |
20446816392 ps |
T339 |
/workspace/coverage/default/8.sram_ctrl_regwen.3573772475 |
|
|
Jan 24 05:50:32 PM PST 24 |
Jan 24 05:52:44 PM PST 24 |
1027700221 ps |
T340 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.2045773933 |
|
|
Jan 24 06:23:29 PM PST 24 |
Jan 24 06:23:31 PM PST 24 |
125426065 ps |
T341 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1270645139 |
|
|
Jan 24 05:53:35 PM PST 24 |
Jan 24 05:58:09 PM PST 24 |
10990447161 ps |
T342 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2981947747 |
|
|
Jan 24 07:23:11 PM PST 24 |
Jan 24 09:06:11 PM PST 24 |
9805971513 ps |
T343 |
/workspace/coverage/default/38.sram_ctrl_executable.2417511482 |
|
|
Jan 24 06:27:18 PM PST 24 |
Jan 24 06:29:16 PM PST 24 |
6114443916 ps |
T344 |
/workspace/coverage/default/9.sram_ctrl_stress_all.1838560006 |
|
|
Jan 24 05:51:41 PM PST 24 |
Jan 24 06:22:47 PM PST 24 |
20380860924 ps |
T345 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3333723583 |
|
|
Jan 24 06:36:49 PM PST 24 |
Jan 24 06:36:58 PM PST 24 |
1171610360 ps |
T346 |
/workspace/coverage/default/36.sram_ctrl_stress_all.273476960 |
|
|
Jan 24 06:25:30 PM PST 24 |
Jan 24 06:51:54 PM PST 24 |
6153649710 ps |
T347 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1757869033 |
|
|
Jan 24 06:40:41 PM PST 24 |
Jan 24 06:40:43 PM PST 24 |
21660717 ps |
T348 |
/workspace/coverage/default/26.sram_ctrl_bijection.972174686 |
|
|
Jan 24 06:10:24 PM PST 24 |
Jan 24 06:10:43 PM PST 24 |
985839557 ps |
T349 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.2882885308 |
|
|
Jan 24 06:10:45 PM PST 24 |
Jan 24 06:10:50 PM PST 24 |
1414843728 ps |
T350 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2100316024 |
|
|
Jan 24 06:16:42 PM PST 24 |
Jan 24 07:17:57 PM PST 24 |
5048171746 ps |
T351 |
/workspace/coverage/default/17.sram_ctrl_alert_test.886753211 |
|
|
Jan 24 05:58:54 PM PST 24 |
Jan 24 05:58:55 PM PST 24 |
12963098 ps |
T352 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2557059790 |
|
|
Jan 24 06:37:30 PM PST 24 |
Jan 24 06:41:17 PM PST 24 |
2419160776 ps |
T353 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.601925313 |
|
|
Jan 24 06:06:13 PM PST 24 |
Jan 24 07:41:35 PM PST 24 |
5798469511 ps |
T354 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.501415745 |
|
|
Jan 24 05:52:35 PM PST 24 |
Jan 24 06:09:08 PM PST 24 |
19087331718 ps |
T355 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3040084072 |
|
|
Jan 24 06:38:53 PM PST 24 |
Jan 24 06:39:07 PM PST 24 |
1071435861 ps |
T356 |
/workspace/coverage/default/44.sram_ctrl_bijection.4032282118 |
|
|
Jan 24 07:49:51 PM PST 24 |
Jan 24 07:50:27 PM PST 24 |
2392620426 ps |
T357 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2443121436 |
|
|
Jan 24 06:11:26 PM PST 24 |
Jan 24 06:11:27 PM PST 24 |
159868652 ps |
T358 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2826577063 |
|
|
Jan 24 06:19:21 PM PST 24 |
Jan 24 06:20:18 PM PST 24 |
113905335 ps |
T359 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.341742884 |
|
|
Jan 24 06:27:30 PM PST 24 |
Jan 24 06:27:36 PM PST 24 |
360921345 ps |
T360 |
/workspace/coverage/default/28.sram_ctrl_regwen.3769895318 |
|
|
Jan 24 06:14:00 PM PST 24 |
Jan 24 06:36:25 PM PST 24 |
19074242706 ps |
T361 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.901369171 |
|
|
Jan 24 08:39:16 PM PST 24 |
Jan 24 08:39:23 PM PST 24 |
383086874 ps |
T362 |
/workspace/coverage/default/1.sram_ctrl_executable.2063740340 |
|
|
Jan 24 05:43:37 PM PST 24 |
Jan 24 05:51:49 PM PST 24 |
3544188958 ps |
T363 |
/workspace/coverage/default/45.sram_ctrl_partial_access.2022324631 |
|
|
Jan 24 06:56:25 PM PST 24 |
Jan 24 06:58:08 PM PST 24 |
2029774472 ps |
T364 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.966605478 |
|
|
Jan 24 06:33:17 PM PST 24 |
Jan 24 06:37:01 PM PST 24 |
2408012133 ps |
T365 |
/workspace/coverage/default/39.sram_ctrl_partial_access.4293869898 |
|
|
Jan 24 06:28:15 PM PST 24 |
Jan 24 06:28:27 PM PST 24 |
995974522 ps |
T366 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.3301648370 |
|
|
Jan 24 06:15:07 PM PST 24 |
Jan 24 06:15:46 PM PST 24 |
183000754 ps |
T367 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.2592868061 |
|
|
Jan 24 06:34:03 PM PST 24 |
Jan 24 06:34:13 PM PST 24 |
718001744 ps |
T368 |
/workspace/coverage/default/16.sram_ctrl_smoke.1169167294 |
|
|
Jan 24 05:56:44 PM PST 24 |
Jan 24 05:56:45 PM PST 24 |
29601004 ps |
T369 |
/workspace/coverage/default/0.sram_ctrl_executable.2110825073 |
|
|
Jan 24 05:42:26 PM PST 24 |
Jan 24 05:43:00 PM PST 24 |
991380246 ps |
T370 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.1847949897 |
|
|
Jan 24 07:52:07 PM PST 24 |
Jan 24 08:16:20 PM PST 24 |
91600396155 ps |
T20 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.475335008 |
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|
Jan 24 05:46:49 PM PST 24 |
Jan 24 05:46:52 PM PST 24 |
453510194 ps |
T371 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3318811600 |
|
|
Jan 24 09:37:58 PM PST 24 |
Jan 24 10:21:10 PM PST 24 |
7853091297 ps |
T372 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3181871790 |
|
|
Jan 24 06:22:30 PM PST 24 |
Jan 24 06:59:04 PM PST 24 |
255373194 ps |
T373 |
/workspace/coverage/default/46.sram_ctrl_bijection.2765061583 |
|
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Jan 24 06:35:49 PM PST 24 |
Jan 24 06:36:34 PM PST 24 |
3395196336 ps |
T374 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.2602022459 |
|
|
Jan 24 05:57:02 PM PST 24 |
Jan 24 05:57:03 PM PST 24 |
92328025 ps |
T375 |
/workspace/coverage/default/49.sram_ctrl_regwen.621628553 |
|
|
Jan 24 09:02:25 PM PST 24 |
Jan 24 09:11:34 PM PST 24 |
129870674449 ps |
T376 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1558787640 |
|
|
Jan 24 05:46:46 PM PST 24 |
Jan 24 05:46:50 PM PST 24 |
115533917 ps |
T377 |
/workspace/coverage/default/7.sram_ctrl_alert_test.144699812 |
|
|
Jan 24 05:50:10 PM PST 24 |
Jan 24 05:50:14 PM PST 24 |
18558608 ps |
T378 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.2952814207 |
|
|
Jan 24 06:38:32 PM PST 24 |
Jan 24 06:38:43 PM PST 24 |
882624469 ps |
T379 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2097443304 |
|
|
Jan 24 06:13:05 PM PST 24 |
Jan 24 06:52:40 PM PST 24 |
1756659689 ps |
T380 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2569786768 |
|
|
Jan 24 07:19:14 PM PST 24 |
Jan 24 07:23:51 PM PST 24 |
3077912367 ps |
T381 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.2178152230 |
|
|
Jan 24 06:24:35 PM PST 24 |
Jan 24 06:24:59 PM PST 24 |
155920362 ps |
T382 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1037900052 |
|
|
Jan 24 06:15:49 PM PST 24 |
Jan 24 07:07:55 PM PST 24 |
2335810326 ps |
T383 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2209201213 |
|
|
Jan 24 07:33:32 PM PST 24 |
Jan 24 07:33:37 PM PST 24 |
317932905 ps |
T384 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2637512866 |
|
|
Jan 24 06:58:59 PM PST 24 |
Jan 24 07:00:24 PM PST 24 |
648545252 ps |
T385 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3553143671 |
|
|
Jan 24 06:08:51 PM PST 24 |
Jan 24 06:27:26 PM PST 24 |
4575708227 ps |
T386 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2466524586 |
|
|
Jan 24 05:50:41 PM PST 24 |
Jan 24 06:38:32 PM PST 24 |
1899510613 ps |
T387 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.2391720379 |
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|
Jan 24 06:19:26 PM PST 24 |
Jan 24 06:19:32 PM PST 24 |
703050104 ps |
T388 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.2218852324 |
|
|
Jan 24 07:00:34 PM PST 24 |
Jan 24 07:00:39 PM PST 24 |
1609816209 ps |
T389 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3842275469 |
|
|
Jan 24 06:19:46 PM PST 24 |
Jan 24 06:19:50 PM PST 24 |
193208458 ps |
T390 |
/workspace/coverage/default/15.sram_ctrl_partial_access.596817548 |
|
|
Jan 24 05:56:24 PM PST 24 |
Jan 24 05:58:04 PM PST 24 |
2328808770 ps |
T391 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.438045922 |
|
|
Jan 24 06:26:52 PM PST 24 |
Jan 24 06:31:50 PM PST 24 |
12231186580 ps |
T392 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2029086966 |
|
|
Jan 24 05:54:00 PM PST 24 |
Jan 24 05:54:03 PM PST 24 |
87178796 ps |
T393 |
/workspace/coverage/default/6.sram_ctrl_executable.2358861669 |
|
|
Jan 24 05:49:24 PM PST 24 |
Jan 24 06:08:24 PM PST 24 |
35607147601 ps |
T394 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1687724432 |
|
|
Jan 24 07:02:34 PM PST 24 |
Jan 24 07:04:59 PM PST 24 |
1743802903 ps |
T395 |
/workspace/coverage/default/10.sram_ctrl_bijection.3922795698 |
|
|
Jan 24 05:52:13 PM PST 24 |
Jan 24 05:53:12 PM PST 24 |
904953812 ps |
T396 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3144768948 |
|
|
Jan 24 06:01:17 PM PST 24 |
Jan 24 06:59:53 PM PST 24 |
1267846977 ps |
T397 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2223764074 |
|
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Jan 24 06:17:53 PM PST 24 |
Jan 24 06:22:49 PM PST 24 |
21076091959 ps |
T398 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.3853081034 |
|
|
Jan 24 06:18:24 PM PST 24 |
Jan 24 06:18:26 PM PST 24 |
28908993 ps |
T399 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.961496680 |
|
|
Jan 24 05:46:59 PM PST 24 |
Jan 24 05:52:46 PM PST 24 |
51155507859 ps |
T400 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2463515381 |
|
|
Jan 24 05:49:46 PM PST 24 |
Jan 24 05:52:11 PM PST 24 |
372147999 ps |
T401 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.3896877127 |
|
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Jan 24 06:35:44 PM PST 24 |
Jan 24 06:43:55 PM PST 24 |
44491793975 ps |
T402 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1940596165 |
|
|
Jan 24 06:37:07 PM PST 24 |
Jan 24 06:37:09 PM PST 24 |
131025372 ps |
T403 |
/workspace/coverage/default/47.sram_ctrl_partial_access.495061627 |
|
|
Jan 24 06:37:37 PM PST 24 |
Jan 24 06:37:45 PM PST 24 |
2694138692 ps |
T404 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1720165180 |
|
|
Jan 24 06:33:12 PM PST 24 |
Jan 24 07:19:06 PM PST 24 |
4382175051 ps |
T405 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.180104823 |
|
|
Jan 24 06:24:59 PM PST 24 |
Jan 24 06:44:51 PM PST 24 |
19754576329 ps |
T406 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3108996214 |
|
|
Jan 24 06:36:53 PM PST 24 |
Jan 24 06:49:48 PM PST 24 |
509465111 ps |
T407 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2667867038 |
|
|
Jan 24 05:53:20 PM PST 24 |
Jan 24 05:53:24 PM PST 24 |
243365096 ps |
T408 |
/workspace/coverage/default/8.sram_ctrl_executable.2754352478 |
|
|
Jan 24 06:07:46 PM PST 24 |
Jan 24 06:37:04 PM PST 24 |
13984679207 ps |
T409 |
/workspace/coverage/default/10.sram_ctrl_alert_test.64723533 |
|
|
Jan 24 05:52:33 PM PST 24 |
Jan 24 05:52:34 PM PST 24 |
15943873 ps |
T410 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3136059012 |
|
|
Jan 24 06:39:34 PM PST 24 |
Jan 24 06:42:34 PM PST 24 |
13963172435 ps |
T411 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1977694650 |
|
|
Jan 24 06:14:24 PM PST 24 |
Jan 24 06:14:26 PM PST 24 |
29108627 ps |
T412 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.3158784400 |
|
|
Jan 24 06:06:51 PM PST 24 |
Jan 24 06:08:19 PM PST 24 |
1691309312 ps |
T413 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.4200988664 |
|
|
Jan 24 06:30:29 PM PST 24 |
Jan 24 06:35:13 PM PST 24 |
5509615741 ps |
T414 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.440398800 |
|
|
Jan 24 06:05:06 PM PST 24 |
Jan 24 06:05:12 PM PST 24 |
108774787 ps |
T415 |
/workspace/coverage/default/7.sram_ctrl_bijection.82827642 |
|
|
Jan 24 05:49:34 PM PST 24 |
Jan 24 05:50:37 PM PST 24 |
15290210048 ps |
T416 |
/workspace/coverage/default/6.sram_ctrl_regwen.188929200 |
|
|
Jan 24 05:49:27 PM PST 24 |
Jan 24 06:19:50 PM PST 24 |
11303148665 ps |
T417 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1775162160 |
|
|
Jan 24 06:30:07 PM PST 24 |
Jan 24 06:30:08 PM PST 24 |
81717666 ps |
T418 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.820946682 |
|
|
Jan 24 07:00:06 PM PST 24 |
Jan 24 07:00:18 PM PST 24 |
141270537 ps |
T419 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.3231690191 |
|
|
Jan 24 05:54:57 PM PST 24 |
Jan 24 05:58:30 PM PST 24 |
2130184736 ps |
T420 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2971313992 |
|
|
Jan 24 06:35:22 PM PST 24 |
Jan 24 06:35:26 PM PST 24 |
332810698 ps |
T421 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.384428775 |
|
|
Jan 24 06:18:44 PM PST 24 |
Jan 24 06:19:43 PM PST 24 |
211514672 ps |
T422 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2377389982 |
|
|
Jan 24 07:30:54 PM PST 24 |
Jan 24 07:31:03 PM PST 24 |
482419752 ps |
T423 |
/workspace/coverage/default/9.sram_ctrl_executable.2786284936 |
|
|
Jan 24 05:51:49 PM PST 24 |
Jan 24 06:01:43 PM PST 24 |
11573922983 ps |
T424 |
/workspace/coverage/default/7.sram_ctrl_stress_all.522228258 |
|
|
Jan 24 05:50:11 PM PST 24 |
Jan 24 06:36:29 PM PST 24 |
57059890547 ps |
T425 |
/workspace/coverage/default/4.sram_ctrl_smoke.919883105 |
|
|
Jan 24 06:13:38 PM PST 24 |
Jan 24 06:13:49 PM PST 24 |
70676485 ps |
T426 |
/workspace/coverage/default/5.sram_ctrl_smoke.873265188 |
|
|
Jan 24 05:48:09 PM PST 24 |
Jan 24 05:48:37 PM PST 24 |
83542138 ps |
T427 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.1462926630 |
|
|
Jan 24 06:51:13 PM PST 24 |
Jan 24 06:51:18 PM PST 24 |
76116378 ps |
T428 |
/workspace/coverage/default/23.sram_ctrl_partial_access.2313211783 |
|
|
Jan 24 06:07:03 PM PST 24 |
Jan 24 06:07:24 PM PST 24 |
309756809 ps |
T429 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3409165279 |
|
|
Jan 24 06:28:23 PM PST 24 |
Jan 24 06:28:45 PM PST 24 |
160916966 ps |
T430 |
/workspace/coverage/default/46.sram_ctrl_smoke.2679395786 |
|
|
Jan 24 06:35:37 PM PST 24 |
Jan 24 06:37:39 PM PST 24 |
527057978 ps |
T431 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.177833683 |
|
|
Jan 24 07:06:54 PM PST 24 |
Jan 24 07:08:14 PM PST 24 |
459837754 ps |
T432 |
/workspace/coverage/default/28.sram_ctrl_executable.3049296238 |
|
|
Jan 24 06:25:55 PM PST 24 |
Jan 24 06:55:13 PM PST 24 |
43342473395 ps |
T433 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2963017118 |
|
|
Jan 24 06:54:00 PM PST 24 |
Jan 24 06:55:35 PM PST 24 |
553259040 ps |
T434 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3642058688 |
|
|
Jan 24 05:48:28 PM PST 24 |
Jan 24 05:48:30 PM PST 24 |
95847270 ps |
T435 |
/workspace/coverage/default/20.sram_ctrl_smoke.4203732394 |
|
|
Jan 24 06:40:06 PM PST 24 |
Jan 24 06:42:07 PM PST 24 |
132616588 ps |
T436 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2707202780 |
|
|
Jan 24 05:53:33 PM PST 24 |
Jan 24 05:57:14 PM PST 24 |
20773550554 ps |
T437 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2449829547 |
|
|
Jan 24 05:50:26 PM PST 24 |
Jan 24 05:51:21 PM PST 24 |
223184661 ps |
T438 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1074924150 |
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|
Jan 24 08:25:58 PM PST 24 |
Jan 24 08:28:25 PM PST 24 |
536763399 ps |
T439 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.4204733962 |
|
|
Jan 24 07:26:42 PM PST 24 |
Jan 24 07:26:47 PM PST 24 |
696293784 ps |
T440 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.439673305 |
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|
Jan 24 05:51:18 PM PST 24 |
Jan 24 05:51:21 PM PST 24 |
44379254 ps |
T441 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.21181870 |
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|
Jan 24 05:44:56 PM PST 24 |
Jan 24 05:50:23 PM PST 24 |
4485957627 ps |
T442 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.4031952769 |
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|
Jan 24 05:47:40 PM PST 24 |
Jan 24 05:47:45 PM PST 24 |
76208556 ps |
T443 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2323529887 |
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|
Jan 24 06:38:39 PM PST 24 |
Jan 24 06:44:10 PM PST 24 |
147964115722 ps |
T444 |
/workspace/coverage/default/34.sram_ctrl_stress_all.69410156 |
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Jan 24 06:22:29 PM PST 24 |
Jan 24 08:07:30 PM PST 24 |
30219593137 ps |
T445 |
/workspace/coverage/default/47.sram_ctrl_bijection.3456699335 |
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|
Jan 24 06:37:25 PM PST 24 |
Jan 24 06:37:44 PM PST 24 |
569849608 ps |
T446 |
/workspace/coverage/default/25.sram_ctrl_alert_test.409566367 |
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|
Jan 24 07:04:21 PM PST 24 |
Jan 24 07:04:23 PM PST 24 |
15535421 ps |
T447 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3006719483 |
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|
Jan 24 05:43:46 PM PST 24 |
Jan 24 05:43:52 PM PST 24 |
347153715 ps |
T448 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3412516593 |
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|
Jan 24 05:53:54 PM PST 24 |
Jan 24 05:53:55 PM PST 24 |
46625279 ps |
T449 |
/workspace/coverage/default/18.sram_ctrl_stress_all.1770045687 |
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Jan 24 05:59:34 PM PST 24 |
Jan 24 06:37:10 PM PST 24 |
106333656591 ps |
T450 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.3571257313 |
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Jan 24 05:56:33 PM PST 24 |
Jan 24 05:56:34 PM PST 24 |
85474193 ps |
T451 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3225240401 |
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|
Jan 24 06:39:26 PM PST 24 |
Jan 24 06:39:37 PM PST 24 |
880385331 ps |
T452 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.1923292177 |
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Jan 24 05:46:36 PM PST 24 |
Jan 24 05:46:48 PM PST 24 |
5563386347 ps |
T453 |
/workspace/coverage/default/49.sram_ctrl_bijection.2285386424 |
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|
Jan 24 06:39:44 PM PST 24 |
Jan 24 06:40:11 PM PST 24 |
6372110640 ps |
T454 |
/workspace/coverage/default/11.sram_ctrl_executable.3820009353 |
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|
Jan 24 06:01:40 PM PST 24 |
Jan 24 06:22:06 PM PST 24 |
33743251325 ps |
T455 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.226405060 |
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Jan 24 05:54:21 PM PST 24 |
Jan 24 06:11:00 PM PST 24 |
3708560343 ps |
T456 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2945002227 |
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|
Jan 24 06:49:48 PM PST 24 |
Jan 24 06:50:31 PM PST 24 |
99388257 ps |
T457 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1174538786 |
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Jan 24 05:48:25 PM PST 24 |
Jan 24 06:03:03 PM PST 24 |
9522429219 ps |
T458 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.359403468 |
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Jan 24 06:07:48 PM PST 24 |
Jan 24 06:07:55 PM PST 24 |
79828843 ps |
T459 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2935569717 |
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Jan 24 06:05:25 PM PST 24 |
Jan 24 06:05:28 PM PST 24 |
50299806 ps |
T460 |
/workspace/coverage/default/21.sram_ctrl_stress_all.173034317 |
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Jan 24 06:05:51 PM PST 24 |
Jan 24 06:38:16 PM PST 24 |
14357327305 ps |
T461 |
/workspace/coverage/default/17.sram_ctrl_bijection.2355852644 |
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|
Jan 24 05:58:13 PM PST 24 |
Jan 24 05:59:42 PM PST 24 |
17479892435 ps |
T462 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1276394695 |
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Jan 24 06:24:59 PM PST 24 |
Jan 24 06:59:09 PM PST 24 |
16589662940 ps |
T463 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.300945481 |
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Jan 24 06:32:44 PM PST 24 |
Jan 24 06:32:49 PM PST 24 |
30204298 ps |
T464 |
/workspace/coverage/default/43.sram_ctrl_bijection.4236307166 |
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Jan 24 06:32:43 PM PST 24 |
Jan 24 06:33:25 PM PST 24 |
2741479797 ps |
T465 |
/workspace/coverage/default/21.sram_ctrl_partial_access.4003822948 |
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Jan 24 06:53:02 PM PST 24 |
Jan 24 06:53:20 PM PST 24 |
933626225 ps |
T466 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.833238532 |
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Jan 24 07:52:08 PM PST 24 |
Jan 24 08:09:35 PM PST 24 |
2269978473 ps |
T467 |
/workspace/coverage/default/33.sram_ctrl_partial_access.2886493042 |
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|
Jan 24 06:20:24 PM PST 24 |
Jan 24 06:22:24 PM PST 24 |
930993321 ps |
T468 |
/workspace/coverage/default/23.sram_ctrl_bijection.3577399893 |
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|
Jan 24 06:06:59 PM PST 24 |
Jan 24 06:07:52 PM PST 24 |
2471896257 ps |
T469 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.297981776 |
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Jan 24 06:07:19 PM PST 24 |
Jan 24 06:12:19 PM PST 24 |
4441816741 ps |
T470 |
/workspace/coverage/default/30.sram_ctrl_executable.539842518 |
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|
Jan 24 06:16:50 PM PST 24 |
Jan 24 06:19:42 PM PST 24 |
598846591 ps |
T471 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2911645105 |
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|
Jan 24 07:01:12 PM PST 24 |
Jan 24 07:01:24 PM PST 24 |
134619269 ps |
T472 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.2395925390 |
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|
Jan 24 06:20:31 PM PST 24 |
Jan 24 06:20:45 PM PST 24 |
244554814 ps |
T473 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1812853400 |
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|
Jan 24 05:50:26 PM PST 24 |
Jan 24 05:52:14 PM PST 24 |
829989667 ps |
T474 |
/workspace/coverage/default/4.sram_ctrl_alert_test.3500734159 |
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|
Jan 24 06:08:02 PM PST 24 |
Jan 24 06:08:03 PM PST 24 |
12316995 ps |
T475 |
/workspace/coverage/default/30.sram_ctrl_bijection.1039906871 |
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|
Jan 24 06:16:18 PM PST 24 |
Jan 24 06:17:00 PM PST 24 |
1989801512 ps |
T476 |
/workspace/coverage/default/40.sram_ctrl_stress_all.2536963684 |
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|
Jan 24 06:29:51 PM PST 24 |
Jan 24 07:33:14 PM PST 24 |
57262114698 ps |
T477 |
/workspace/coverage/default/41.sram_ctrl_alert_test.3960525681 |
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Jan 24 06:31:00 PM PST 24 |
Jan 24 06:31:01 PM PST 24 |
32573916 ps |
T478 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.997907686 |
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|
Jan 24 05:59:39 PM PST 24 |
Jan 24 06:04:30 PM PST 24 |
2979899989 ps |
T479 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.966988525 |
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|
Jan 24 05:48:49 PM PST 24 |
Jan 24 05:49:53 PM PST 24 |
121533471 ps |
T480 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1677622796 |
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|
Jan 24 05:50:19 PM PST 24 |
Jan 24 05:54:33 PM PST 24 |
3927896740 ps |
T481 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3627181164 |
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|
Jan 24 05:42:42 PM PST 24 |
Jan 24 05:42:51 PM PST 24 |
78389283 ps |
T482 |
/workspace/coverage/default/19.sram_ctrl_alert_test.183080390 |
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|
Jan 24 06:01:36 PM PST 24 |
Jan 24 06:01:37 PM PST 24 |
13500630 ps |
T483 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.4188202874 |
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|
Jan 24 05:49:01 PM PST 24 |
Jan 24 05:49:11 PM PST 24 |
326716538 ps |
T484 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3254664861 |
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|
Jan 24 06:32:52 PM PST 24 |
Jan 24 06:32:58 PM PST 24 |
100788330 ps |
T485 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.1324017439 |
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|
Jan 24 05:47:40 PM PST 24 |
Jan 24 05:47:46 PM PST 24 |
700885869 ps |
T486 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.2247083011 |
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|
Jan 24 08:53:45 PM PST 24 |
Jan 24 08:53:49 PM PST 24 |
328254597 ps |
T487 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3237793735 |
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|
Jan 24 05:44:56 PM PST 24 |
Jan 24 06:08:14 PM PST 24 |
6064097099 ps |
T488 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.4239265226 |
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|
Jan 24 06:31:53 PM PST 24 |
Jan 24 06:31:57 PM PST 24 |
97288473 ps |
T489 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1389573934 |
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|
Jan 24 06:27:10 PM PST 24 |
Jan 24 06:27:18 PM PST 24 |
637077516 ps |
T490 |
/workspace/coverage/default/49.sram_ctrl_partial_access.1604746111 |
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|
Jan 24 06:40:04 PM PST 24 |
Jan 24 06:40:09 PM PST 24 |
248827026 ps |
T491 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.2889687041 |
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|
Jan 24 08:18:29 PM PST 24 |
Jan 24 08:18:38 PM PST 24 |
3028623874 ps |
T492 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.2182904096 |
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|
Jan 24 07:16:01 PM PST 24 |
Jan 24 07:28:51 PM PST 24 |
53952659903 ps |
T493 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2069739653 |
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|
Jan 24 07:13:33 PM PST 24 |
Jan 24 07:13:44 PM PST 24 |
2678384195 ps |
T494 |
/workspace/coverage/default/23.sram_ctrl_stress_all.4219668306 |
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|
Jan 24 06:26:50 PM PST 24 |
Jan 24 06:59:26 PM PST 24 |
7011370966 ps |
T495 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2843486043 |
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|
Jan 24 06:23:35 PM PST 24 |
Jan 24 06:23:41 PM PST 24 |
1300001202 ps |
T496 |
/workspace/coverage/default/40.sram_ctrl_regwen.3802419112 |
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|
Jan 24 06:29:35 PM PST 24 |
Jan 24 06:34:18 PM PST 24 |
5175872098 ps |
T497 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1424108333 |
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Jan 24 05:50:43 PM PST 24 |
Jan 24 06:07:26 PM PST 24 |
12119946719 ps |
T498 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1037942140 |
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|
Jan 24 06:09:19 PM PST 24 |
Jan 24 06:20:04 PM PST 24 |
228117838777 ps |
T499 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1328948150 |
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|
Jan 24 06:53:28 PM PST 24 |
Jan 24 07:05:18 PM PST 24 |
44826129791 ps |
T500 |
/workspace/coverage/default/16.sram_ctrl_regwen.1699418561 |
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|
Jan 24 06:23:04 PM PST 24 |
Jan 24 06:35:41 PM PST 24 |
2355827723 ps |
T501 |
/workspace/coverage/default/37.sram_ctrl_regwen.1320536996 |
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|
Jan 24 06:26:05 PM PST 24 |
Jan 24 06:40:04 PM PST 24 |
5534457563 ps |
T502 |
/workspace/coverage/default/38.sram_ctrl_partial_access.2315161692 |
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|
Jan 24 07:28:12 PM PST 24 |
Jan 24 07:28:16 PM PST 24 |
122235718 ps |
T503 |
/workspace/coverage/default/28.sram_ctrl_partial_access.3564895852 |
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|
Jan 24 06:13:34 PM PST 24 |
Jan 24 06:13:49 PM PST 24 |
2444621516 ps |
T504 |
/workspace/coverage/default/26.sram_ctrl_executable.296415882 |
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Jan 24 06:11:06 PM PST 24 |
Jan 24 06:12:55 PM PST 24 |
4522639172 ps |