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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.36 100.00 97.77 100.00 100.00 99.71 99.70 98.33


Total test records in report: 1017
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T554 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.572873861 Mar 07 01:25:28 PM PST 24 Mar 07 01:39:54 PM PST 24 58813878825 ps
T555 /workspace/coverage/default/34.sram_ctrl_partial_access.1054629467 Mar 07 01:25:28 PM PST 24 Mar 07 01:25:30 PM PST 24 143353973 ps
T556 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3114128260 Mar 07 01:25:17 PM PST 24 Mar 07 01:30:00 PM PST 24 12986636097 ps
T557 /workspace/coverage/default/16.sram_ctrl_multiple_keys.3725726271 Mar 07 01:23:16 PM PST 24 Mar 07 01:33:59 PM PST 24 39183516564 ps
T558 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2037909550 Mar 07 01:25:19 PM PST 24 Mar 07 01:26:44 PM PST 24 1181355165 ps
T559 /workspace/coverage/default/28.sram_ctrl_alert_test.850077438 Mar 07 01:24:37 PM PST 24 Mar 07 01:24:37 PM PST 24 87986649 ps
T115 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.2281132080 Mar 07 01:23:54 PM PST 24 Mar 07 01:24:44 PM PST 24 1992493238 ps
T560 /workspace/coverage/default/5.sram_ctrl_alert_test.3548282270 Mar 07 01:22:30 PM PST 24 Mar 07 01:22:30 PM PST 24 20829811 ps
T561 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.2484991381 Mar 07 01:22:17 PM PST 24 Mar 07 01:24:54 PM PST 24 2528669714 ps
T562 /workspace/coverage/default/42.sram_ctrl_mem_walk.2645670569 Mar 07 01:26:49 PM PST 24 Mar 07 01:26:54 PM PST 24 344266483 ps
T563 /workspace/coverage/default/19.sram_ctrl_smoke.2004232608 Mar 07 01:23:43 PM PST 24 Mar 07 01:23:56 PM PST 24 201343770 ps
T564 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2582242812 Mar 07 01:27:06 PM PST 24 Mar 07 01:34:11 PM PST 24 4572229976 ps
T565 /workspace/coverage/default/49.sram_ctrl_bijection.2434784959 Mar 07 01:27:37 PM PST 24 Mar 07 01:28:27 PM PST 24 7976360008 ps
T566 /workspace/coverage/default/2.sram_ctrl_smoke.125442348 Mar 07 01:22:22 PM PST 24 Mar 07 01:23:31 PM PST 24 528428586 ps
T567 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1050659203 Mar 07 01:23:04 PM PST 24 Mar 07 01:23:12 PM PST 24 129985941 ps
T568 /workspace/coverage/default/44.sram_ctrl_mem_walk.3605165923 Mar 07 01:27:01 PM PST 24 Mar 07 01:27:07 PM PST 24 4472575765 ps
T569 /workspace/coverage/default/1.sram_ctrl_ram_cfg.4147204314 Mar 07 01:22:18 PM PST 24 Mar 07 01:22:19 PM PST 24 30013799 ps
T570 /workspace/coverage/default/21.sram_ctrl_smoke.393136748 Mar 07 01:23:54 PM PST 24 Mar 07 01:26:34 PM PST 24 1588107485 ps
T571 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.25529588 Mar 07 01:22:40 PM PST 24 Mar 07 01:23:59 PM PST 24 4224828453 ps
T20 /workspace/coverage/default/4.sram_ctrl_sec_cm.636206078 Mar 07 01:22:30 PM PST 24 Mar 07 01:22:32 PM PST 24 158486766 ps
T572 /workspace/coverage/default/2.sram_ctrl_mem_walk.4005667518 Mar 07 01:22:20 PM PST 24 Mar 07 01:22:31 PM PST 24 2725675028 ps
T573 /workspace/coverage/default/30.sram_ctrl_bijection.1696226680 Mar 07 01:24:46 PM PST 24 Mar 07 01:25:28 PM PST 24 7274405684 ps
T574 /workspace/coverage/default/3.sram_ctrl_max_throughput.3042717241 Mar 07 01:22:28 PM PST 24 Mar 07 01:22:33 PM PST 24 183322447 ps
T575 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.666586378 Mar 07 01:24:46 PM PST 24 Mar 07 01:24:57 PM PST 24 74013104 ps
T576 /workspace/coverage/default/19.sram_ctrl_stress_all.3727631012 Mar 07 01:23:39 PM PST 24 Mar 07 01:44:26 PM PST 24 19433665362 ps
T577 /workspace/coverage/default/1.sram_ctrl_regwen.813145014 Mar 07 01:22:25 PM PST 24 Mar 07 01:37:05 PM PST 24 18530253618 ps
T578 /workspace/coverage/default/38.sram_ctrl_max_throughput.1698330207 Mar 07 01:25:55 PM PST 24 Mar 07 01:27:12 PM PST 24 241097661 ps
T579 /workspace/coverage/default/24.sram_ctrl_mem_walk.4132046431 Mar 07 01:24:17 PM PST 24 Mar 07 01:24:25 PM PST 24 522637433 ps
T580 /workspace/coverage/default/21.sram_ctrl_mem_walk.2367716915 Mar 07 01:23:53 PM PST 24 Mar 07 01:24:03 PM PST 24 455379881 ps
T581 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.1241883255 Mar 07 01:24:28 PM PST 24 Mar 07 01:27:33 PM PST 24 7792156467 ps
T582 /workspace/coverage/default/26.sram_ctrl_regwen.4103079039 Mar 07 01:24:28 PM PST 24 Mar 07 01:34:10 PM PST 24 47114584671 ps
T583 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.687269132 Mar 07 01:22:51 PM PST 24 Mar 07 01:22:54 PM PST 24 166141890 ps
T21 /workspace/coverage/default/3.sram_ctrl_sec_cm.2701276402 Mar 07 01:22:17 PM PST 24 Mar 07 01:22:20 PM PST 24 1390352524 ps
T584 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.775810069 Mar 07 01:24:47 PM PST 24 Mar 07 01:28:12 PM PST 24 108722067996 ps
T585 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2432106892 Mar 07 01:24:35 PM PST 24 Mar 07 01:25:14 PM PST 24 2212194204 ps
T586 /workspace/coverage/default/21.sram_ctrl_ram_cfg.130028087 Mar 07 01:23:54 PM PST 24 Mar 07 01:23:54 PM PST 24 78460145 ps
T587 /workspace/coverage/default/20.sram_ctrl_lc_escalation.3050848810 Mar 07 01:23:47 PM PST 24 Mar 07 01:24:08 PM PST 24 1488674785 ps
T588 /workspace/coverage/default/25.sram_ctrl_ram_cfg.2083821683 Mar 07 01:24:17 PM PST 24 Mar 07 01:24:18 PM PST 24 79572698 ps
T589 /workspace/coverage/default/25.sram_ctrl_smoke.2221790845 Mar 07 01:24:25 PM PST 24 Mar 07 01:24:51 PM PST 24 3163174972 ps
T590 /workspace/coverage/default/8.sram_ctrl_stress_all.2292322962 Mar 07 01:22:40 PM PST 24 Mar 07 03:26:46 PM PST 24 696882906687 ps
T591 /workspace/coverage/default/24.sram_ctrl_executable.146106476 Mar 07 01:24:04 PM PST 24 Mar 07 01:33:21 PM PST 24 26402829409 ps
T592 /workspace/coverage/default/35.sram_ctrl_multiple_keys.3555941272 Mar 07 01:25:30 PM PST 24 Mar 07 01:39:03 PM PST 24 47285113815 ps
T593 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.382369719 Mar 07 01:27:28 PM PST 24 Mar 07 01:35:54 PM PST 24 226156847378 ps
T594 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.2452841714 Mar 07 01:23:05 PM PST 24 Mar 07 01:23:08 PM PST 24 358123844 ps
T595 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1884599330 Mar 07 01:26:04 PM PST 24 Mar 07 01:37:04 PM PST 24 6430029031 ps
T596 /workspace/coverage/default/28.sram_ctrl_mem_walk.389555535 Mar 07 01:24:38 PM PST 24 Mar 07 01:24:49 PM PST 24 1808710195 ps
T597 /workspace/coverage/default/9.sram_ctrl_mem_walk.726769691 Mar 07 01:22:42 PM PST 24 Mar 07 01:22:46 PM PST 24 154996866 ps
T598 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1967870874 Mar 07 01:22:50 PM PST 24 Mar 07 01:26:01 PM PST 24 3974452910 ps
T599 /workspace/coverage/default/35.sram_ctrl_mem_walk.653826603 Mar 07 01:25:27 PM PST 24 Mar 07 01:25:40 PM PST 24 8698718686 ps
T600 /workspace/coverage/default/12.sram_ctrl_regwen.188190220 Mar 07 01:22:57 PM PST 24 Mar 07 01:28:59 PM PST 24 24907477134 ps
T601 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1288432140 Mar 07 01:22:07 PM PST 24 Mar 07 01:22:38 PM PST 24 102599590 ps
T602 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2900249035 Mar 07 01:25:27 PM PST 24 Mar 07 01:26:40 PM PST 24 2216064451 ps
T603 /workspace/coverage/default/34.sram_ctrl_smoke.3445134842 Mar 07 01:25:20 PM PST 24 Mar 07 01:25:25 PM PST 24 343109985 ps
T604 /workspace/coverage/default/5.sram_ctrl_multiple_keys.1885043600 Mar 07 01:22:29 PM PST 24 Mar 07 01:45:26 PM PST 24 58003543073 ps
T605 /workspace/coverage/default/47.sram_ctrl_ram_cfg.2143753963 Mar 07 01:27:29 PM PST 24 Mar 07 01:27:30 PM PST 24 79448688 ps
T606 /workspace/coverage/default/39.sram_ctrl_lc_escalation.3604888886 Mar 07 01:26:04 PM PST 24 Mar 07 01:26:46 PM PST 24 5470884268 ps
T607 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.3523032360 Mar 07 01:25:59 PM PST 24 Mar 07 01:26:01 PM PST 24 100790200 ps
T608 /workspace/coverage/default/47.sram_ctrl_smoke.1005151370 Mar 07 01:27:19 PM PST 24 Mar 07 01:29:00 PM PST 24 757093896 ps
T609 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2998113739 Mar 07 01:22:50 PM PST 24 Mar 07 01:27:29 PM PST 24 54092619771 ps
T610 /workspace/coverage/default/8.sram_ctrl_ram_cfg.500120503 Mar 07 01:22:39 PM PST 24 Mar 07 01:22:40 PM PST 24 30735497 ps
T611 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1885169261 Mar 07 01:22:57 PM PST 24 Mar 07 01:23:03 PM PST 24 680778411 ps
T612 /workspace/coverage/default/0.sram_ctrl_stress_all.340388000 Mar 07 01:22:12 PM PST 24 Mar 07 01:53:05 PM PST 24 15825327698 ps
T613 /workspace/coverage/default/5.sram_ctrl_lc_escalation.1660344287 Mar 07 01:22:26 PM PST 24 Mar 07 01:22:27 PM PST 24 195686928 ps
T614 /workspace/coverage/default/31.sram_ctrl_smoke.2045904094 Mar 07 01:24:58 PM PST 24 Mar 07 01:25:13 PM PST 24 1135722750 ps
T615 /workspace/coverage/default/46.sram_ctrl_mem_walk.3177975935 Mar 07 01:27:20 PM PST 24 Mar 07 01:27:25 PM PST 24 284465904 ps
T616 /workspace/coverage/default/39.sram_ctrl_executable.2872021274 Mar 07 01:26:03 PM PST 24 Mar 07 01:38:55 PM PST 24 56342015116 ps
T617 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.3541562651 Mar 07 01:25:47 PM PST 24 Mar 07 01:30:14 PM PST 24 2711844163 ps
T618 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.94126410 Mar 07 01:24:35 PM PST 24 Mar 07 01:27:48 PM PST 24 38754508711 ps
T619 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.447498516 Mar 07 01:25:28 PM PST 24 Mar 07 01:26:51 PM PST 24 538622080 ps
T620 /workspace/coverage/default/1.sram_ctrl_multiple_keys.3409482502 Mar 07 01:22:11 PM PST 24 Mar 07 01:31:41 PM PST 24 11362457223 ps
T621 /workspace/coverage/default/11.sram_ctrl_partial_access.579082474 Mar 07 01:22:53 PM PST 24 Mar 07 01:23:04 PM PST 24 282298314 ps
T622 /workspace/coverage/default/33.sram_ctrl_smoke.239328480 Mar 07 01:25:18 PM PST 24 Mar 07 01:25:25 PM PST 24 958847732 ps
T623 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.1815048212 Mar 07 01:26:22 PM PST 24 Mar 07 01:26:25 PM PST 24 89603139 ps
T624 /workspace/coverage/default/10.sram_ctrl_smoke.1591278474 Mar 07 01:22:57 PM PST 24 Mar 07 01:23:01 PM PST 24 407414165 ps
T625 /workspace/coverage/default/38.sram_ctrl_lc_escalation.3396018187 Mar 07 01:25:54 PM PST 24 Mar 07 01:26:08 PM PST 24 976146472 ps
T626 /workspace/coverage/default/41.sram_ctrl_executable.2371341579 Mar 07 01:26:27 PM PST 24 Mar 07 01:40:55 PM PST 24 6895401874 ps
T627 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4090810706 Mar 07 01:26:32 PM PST 24 Mar 07 01:32:45 PM PST 24 5522889097 ps
T628 /workspace/coverage/default/45.sram_ctrl_alert_test.2738520214 Mar 07 01:27:09 PM PST 24 Mar 07 01:27:10 PM PST 24 14867628 ps
T629 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3948501028 Mar 07 01:23:04 PM PST 24 Mar 07 01:23:32 PM PST 24 365872914 ps
T630 /workspace/coverage/default/34.sram_ctrl_regwen.801758045 Mar 07 01:25:30 PM PST 24 Mar 07 01:29:54 PM PST 24 923180944 ps
T631 /workspace/coverage/default/8.sram_ctrl_multiple_keys.1765241400 Mar 07 01:22:41 PM PST 24 Mar 07 01:31:45 PM PST 24 18354126259 ps
T632 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.1009538149 Mar 07 01:23:40 PM PST 24 Mar 07 01:27:34 PM PST 24 2625172695 ps
T633 /workspace/coverage/default/49.sram_ctrl_regwen.582390791 Mar 07 01:27:47 PM PST 24 Mar 07 01:32:52 PM PST 24 629635399 ps
T634 /workspace/coverage/default/35.sram_ctrl_stress_all.2634033984 Mar 07 01:25:36 PM PST 24 Mar 07 01:49:59 PM PST 24 8086789172 ps
T635 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3990309670 Mar 07 01:24:36 PM PST 24 Mar 07 01:24:42 PM PST 24 95333035 ps
T636 /workspace/coverage/default/31.sram_ctrl_stress_all.1862853143 Mar 07 01:25:07 PM PST 24 Mar 07 02:09:56 PM PST 24 81065057467 ps
T637 /workspace/coverage/default/9.sram_ctrl_executable.686887079 Mar 07 01:22:43 PM PST 24 Mar 07 01:36:49 PM PST 24 6210932663 ps
T116 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3713453783 Mar 07 01:22:24 PM PST 24 Mar 07 01:23:14 PM PST 24 1717087208 ps
T638 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.365520137 Mar 07 01:22:20 PM PST 24 Mar 07 01:24:50 PM PST 24 8477405017 ps
T639 /workspace/coverage/default/13.sram_ctrl_partial_access.2861625986 Mar 07 01:23:01 PM PST 24 Mar 07 01:23:03 PM PST 24 100547102 ps
T640 /workspace/coverage/default/12.sram_ctrl_ram_cfg.3967579206 Mar 07 01:22:55 PM PST 24 Mar 07 01:22:56 PM PST 24 29505825 ps
T641 /workspace/coverage/default/26.sram_ctrl_stress_all.993334859 Mar 07 01:24:28 PM PST 24 Mar 07 02:33:36 PM PST 24 248612269571 ps
T642 /workspace/coverage/default/19.sram_ctrl_alert_test.679639698 Mar 07 01:23:44 PM PST 24 Mar 07 01:23:45 PM PST 24 14917156 ps
T643 /workspace/coverage/default/2.sram_ctrl_bijection.4017995034 Mar 07 01:22:17 PM PST 24 Mar 07 01:23:25 PM PST 24 2138991194 ps
T644 /workspace/coverage/default/8.sram_ctrl_mem_walk.774900556 Mar 07 01:22:41 PM PST 24 Mar 07 01:22:49 PM PST 24 278216549 ps
T645 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.548645885 Mar 07 01:23:40 PM PST 24 Mar 07 01:47:57 PM PST 24 15426559650 ps
T646 /workspace/coverage/default/17.sram_ctrl_bijection.233924949 Mar 07 01:23:19 PM PST 24 Mar 07 01:23:47 PM PST 24 1412168601 ps
T647 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.3474556257 Mar 07 01:25:52 PM PST 24 Mar 07 01:38:35 PM PST 24 58795082715 ps
T648 /workspace/coverage/default/49.sram_ctrl_ram_cfg.3736488682 Mar 07 01:27:47 PM PST 24 Mar 07 01:27:47 PM PST 24 87572324 ps
T649 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2425756129 Mar 07 01:24:37 PM PST 24 Mar 07 01:29:55 PM PST 24 6972390081 ps
T650 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4101881876 Mar 07 01:26:38 PM PST 24 Mar 07 01:28:41 PM PST 24 548829709 ps
T651 /workspace/coverage/default/25.sram_ctrl_bijection.3872976248 Mar 07 01:24:23 PM PST 24 Mar 07 01:24:52 PM PST 24 5575658993 ps
T652 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2718546233 Mar 07 01:27:19 PM PST 24 Mar 07 01:35:24 PM PST 24 2709303901 ps
T653 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3699248935 Mar 07 01:26:17 PM PST 24 Mar 07 01:32:32 PM PST 24 7655700413 ps
T654 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1620684713 Mar 07 01:26:04 PM PST 24 Mar 07 01:30:52 PM PST 24 18294238177 ps
T655 /workspace/coverage/default/16.sram_ctrl_alert_test.3891511399 Mar 07 01:23:24 PM PST 24 Mar 07 01:23:25 PM PST 24 10646854 ps
T656 /workspace/coverage/default/15.sram_ctrl_lc_escalation.3303188199 Mar 07 01:23:10 PM PST 24 Mar 07 01:23:19 PM PST 24 481241164 ps
T657 /workspace/coverage/default/43.sram_ctrl_smoke.759790641 Mar 07 01:26:39 PM PST 24 Mar 07 01:28:24 PM PST 24 1023758928 ps
T658 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.1445823092 Mar 07 01:24:42 PM PST 24 Mar 07 01:48:51 PM PST 24 9127203524 ps
T659 /workspace/coverage/default/16.sram_ctrl_max_throughput.4043841956 Mar 07 01:23:15 PM PST 24 Mar 07 01:23:49 PM PST 24 339952958 ps
T660 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.2643502587 Mar 07 01:24:37 PM PST 24 Mar 07 01:24:41 PM PST 24 67421016 ps
T661 /workspace/coverage/default/29.sram_ctrl_stress_all.2036367090 Mar 07 01:24:45 PM PST 24 Mar 07 01:45:00 PM PST 24 19978308088 ps
T662 /workspace/coverage/default/16.sram_ctrl_executable.260117311 Mar 07 01:23:19 PM PST 24 Mar 07 01:41:43 PM PST 24 31734115702 ps
T663 /workspace/coverage/default/4.sram_ctrl_stress_all.1167140964 Mar 07 01:22:27 PM PST 24 Mar 07 01:28:37 PM PST 24 16227946276 ps
T664 /workspace/coverage/default/47.sram_ctrl_partial_access.3024592306 Mar 07 01:27:39 PM PST 24 Mar 07 01:27:55 PM PST 24 8408299961 ps
T665 /workspace/coverage/default/14.sram_ctrl_regwen.1997408254 Mar 07 01:23:07 PM PST 24 Mar 07 01:38:24 PM PST 24 1905707105 ps
T666 /workspace/coverage/default/33.sram_ctrl_bijection.824907662 Mar 07 01:25:19 PM PST 24 Mar 07 01:26:18 PM PST 24 910667521 ps
T667 /workspace/coverage/default/16.sram_ctrl_lc_escalation.4260225644 Mar 07 01:23:24 PM PST 24 Mar 07 01:23:49 PM PST 24 2475620451 ps
T668 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.89820302 Mar 07 01:26:33 PM PST 24 Mar 07 01:33:29 PM PST 24 7872777587 ps
T669 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3966382863 Mar 07 01:27:04 PM PST 24 Mar 07 01:31:33 PM PST 24 52293123137 ps
T670 /workspace/coverage/default/42.sram_ctrl_smoke.1857684389 Mar 07 01:26:30 PM PST 24 Mar 07 01:27:32 PM PST 24 2042875079 ps
T671 /workspace/coverage/default/31.sram_ctrl_ram_cfg.3217720021 Mar 07 01:25:07 PM PST 24 Mar 07 01:25:09 PM PST 24 32649552 ps
T672 /workspace/coverage/default/35.sram_ctrl_executable.2951436 Mar 07 01:25:30 PM PST 24 Mar 07 01:38:26 PM PST 24 4495691319 ps
T673 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2340076282 Mar 07 01:24:28 PM PST 24 Mar 07 01:24:33 PM PST 24 60856540 ps
T674 /workspace/coverage/default/25.sram_ctrl_alert_test.1855466838 Mar 07 01:24:22 PM PST 24 Mar 07 01:24:23 PM PST 24 43058781 ps
T675 /workspace/coverage/default/26.sram_ctrl_executable.2811133579 Mar 07 01:24:27 PM PST 24 Mar 07 01:38:57 PM PST 24 31391036876 ps
T676 /workspace/coverage/default/20.sram_ctrl_regwen.871097095 Mar 07 01:23:39 PM PST 24 Mar 07 01:26:50 PM PST 24 2267020230 ps
T677 /workspace/coverage/default/41.sram_ctrl_multiple_keys.1179891149 Mar 07 01:26:25 PM PST 24 Mar 07 01:48:01 PM PST 24 64375377713 ps
T678 /workspace/coverage/default/13.sram_ctrl_alert_test.232646761 Mar 07 01:23:05 PM PST 24 Mar 07 01:23:06 PM PST 24 43801955 ps
T679 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2552238101 Mar 07 01:26:32 PM PST 24 Mar 07 01:29:01 PM PST 24 213436926 ps
T680 /workspace/coverage/default/29.sram_ctrl_executable.2577477777 Mar 07 01:24:46 PM PST 24 Mar 07 01:39:11 PM PST 24 76333162730 ps
T681 /workspace/coverage/default/42.sram_ctrl_bijection.1566814765 Mar 07 01:26:37 PM PST 24 Mar 07 01:27:38 PM PST 24 3880499759 ps
T682 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3139647110 Mar 07 01:26:15 PM PST 24 Mar 07 01:32:47 PM PST 24 30923155901 ps
T683 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2303809473 Mar 07 01:23:41 PM PST 24 Mar 07 01:24:06 PM PST 24 166792509 ps
T684 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.2254656733 Mar 07 01:23:06 PM PST 24 Mar 07 01:38:29 PM PST 24 3411001963 ps
T685 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3358071449 Mar 07 01:22:44 PM PST 24 Mar 07 01:24:49 PM PST 24 150479875 ps
T686 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3282415909 Mar 07 01:24:59 PM PST 24 Mar 07 01:25:00 PM PST 24 88459274 ps
T687 /workspace/coverage/default/9.sram_ctrl_multiple_keys.2594435061 Mar 07 01:22:58 PM PST 24 Mar 07 01:34:29 PM PST 24 9363400001 ps
T688 /workspace/coverage/default/15.sram_ctrl_max_throughput.3076637055 Mar 07 01:23:10 PM PST 24 Mar 07 01:24:56 PM PST 24 322638719 ps
T689 /workspace/coverage/default/24.sram_ctrl_multiple_keys.943727254 Mar 07 01:24:04 PM PST 24 Mar 07 01:57:00 PM PST 24 18778975798 ps
T690 /workspace/coverage/default/12.sram_ctrl_bijection.3533900968 Mar 07 01:22:57 PM PST 24 Mar 07 01:23:26 PM PST 24 533434478 ps
T691 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.1408091749 Mar 07 01:26:24 PM PST 24 Mar 07 01:32:22 PM PST 24 24548019502 ps
T692 /workspace/coverage/default/20.sram_ctrl_executable.3573818337 Mar 07 01:23:43 PM PST 24 Mar 07 01:34:49 PM PST 24 7173387795 ps
T693 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3693334023 Mar 07 01:27:39 PM PST 24 Mar 07 01:32:02 PM PST 24 1357595001 ps
T694 /workspace/coverage/default/41.sram_ctrl_ram_cfg.4026747558 Mar 07 01:26:22 PM PST 24 Mar 07 01:26:23 PM PST 24 29923836 ps
T695 /workspace/coverage/default/37.sram_ctrl_partial_access.3762940774 Mar 07 01:25:47 PM PST 24 Mar 07 01:26:06 PM PST 24 1136671322 ps
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T699 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.3448539904 Mar 07 01:24:58 PM PST 24 Mar 07 01:28:09 PM PST 24 4296006025 ps
T700 /workspace/coverage/default/15.sram_ctrl_alert_test.50052058 Mar 07 01:23:14 PM PST 24 Mar 07 01:23:15 PM PST 24 19428751 ps
T701 /workspace/coverage/default/32.sram_ctrl_ram_cfg.1601252413 Mar 07 01:25:16 PM PST 24 Mar 07 01:25:16 PM PST 24 44124909 ps
T702 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.888937748 Mar 07 01:25:31 PM PST 24 Mar 07 01:36:33 PM PST 24 3122698042 ps
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T771 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2211353732 Mar 07 01:27:11 PM PST 24 Mar 07 01:27:12 PM PST 24 87287004 ps
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T784 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.3583369978 Mar 07 01:24:04 PM PST 24 Mar 07 01:24:07 PM PST 24 43557247 ps
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T788 /workspace/coverage/default/14.sram_ctrl_executable.3894729877 Mar 07 01:23:04 PM PST 24 Mar 07 01:27:03 PM PST 24 389520077 ps
T789 /workspace/coverage/default/38.sram_ctrl_bijection.1375145467 Mar 07 01:25:57 PM PST 24 Mar 07 01:26:11 PM PST 24 1481836525 ps
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T792 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.914817342 Mar 07 01:23:27 PM PST 24 Mar 07 01:33:06 PM PST 24 7412265628 ps
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T795 /workspace/coverage/default/37.sram_ctrl_lc_escalation.2892115743 Mar 07 01:25:48 PM PST 24 Mar 07 01:25:56 PM PST 24 528683362 ps
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