| T314 |
/workspace/coverage/default/16.sram_ctrl_stress_all.2183809588 |
|
|
Mar 21 01:39:09 PM PDT 24 |
Mar 21 01:40:23 PM PDT 24 |
8404413649 ps |
| T315 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.2662145538 |
|
|
Mar 21 01:41:08 PM PDT 24 |
Mar 21 01:41:10 PM PDT 24 |
78888986 ps |
| T316 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.4256439446 |
|
|
Mar 21 01:39:55 PM PDT 24 |
Mar 21 01:42:18 PM PDT 24 |
163195699 ps |
| T317 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3522174269 |
|
|
Mar 21 01:39:33 PM PDT 24 |
Mar 21 01:40:46 PM PDT 24 |
493281325 ps |
| T318 |
/workspace/coverage/default/2.sram_ctrl_stress_all.2348630799 |
|
|
Mar 21 01:37:58 PM PDT 24 |
Mar 21 01:46:18 PM PDT 24 |
10076670157 ps |
| T319 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.132910917 |
|
|
Mar 21 01:38:37 PM PDT 24 |
Mar 21 01:59:52 PM PDT 24 |
9607010286 ps |
| T320 |
/workspace/coverage/default/6.sram_ctrl_stress_all.803888991 |
|
|
Mar 21 01:38:21 PM PDT 24 |
Mar 21 01:52:24 PM PDT 24 |
30893316825 ps |
| T321 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1765232352 |
|
|
Mar 21 01:39:30 PM PDT 24 |
Mar 21 01:40:52 PM PDT 24 |
118050545 ps |
| T322 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.532582577 |
|
|
Mar 21 01:42:56 PM PDT 24 |
Mar 21 01:44:45 PM PDT 24 |
144872053 ps |
| T323 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.671074457 |
|
|
Mar 21 01:39:09 PM PDT 24 |
Mar 21 01:39:13 PM PDT 24 |
1373648116 ps |
| T324 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1995343482 |
|
|
Mar 21 01:38:55 PM PDT 24 |
Mar 21 01:47:46 PM PDT 24 |
2925609824 ps |
| T325 |
/workspace/coverage/default/43.sram_ctrl_regwen.4179044892 |
|
|
Mar 21 01:42:14 PM PDT 24 |
Mar 21 01:56:16 PM PDT 24 |
9229917966 ps |
| T326 |
/workspace/coverage/default/35.sram_ctrl_regwen.3320678212 |
|
|
Mar 21 01:41:05 PM PDT 24 |
Mar 21 01:54:01 PM PDT 24 |
2472372777 ps |
| T327 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.235035558 |
|
|
Mar 21 01:41:19 PM PDT 24 |
Mar 21 01:46:57 PM PDT 24 |
30686546111 ps |
| T328 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2740107024 |
|
|
Mar 21 01:39:30 PM PDT 24 |
Mar 21 01:42:50 PM PDT 24 |
5670071384 ps |
| T329 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3616412684 |
|
|
Mar 21 01:37:54 PM PDT 24 |
Mar 21 01:57:27 PM PDT 24 |
6200483996 ps |
| T330 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.441198783 |
|
|
Mar 21 01:39:55 PM PDT 24 |
Mar 21 01:39:56 PM PDT 24 |
32047005 ps |
| T331 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.166890831 |
|
|
Mar 21 01:39:19 PM PDT 24 |
Mar 21 01:39:26 PM PDT 24 |
794372958 ps |
| T332 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.1766670651 |
|
|
Mar 21 01:40:19 PM PDT 24 |
Mar 21 01:54:09 PM PDT 24 |
5135902387 ps |
| T333 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3373715933 |
|
|
Mar 21 01:41:40 PM PDT 24 |
Mar 21 02:01:16 PM PDT 24 |
31127415745 ps |
| T334 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.799984608 |
|
|
Mar 21 01:41:19 PM PDT 24 |
Mar 21 01:41:29 PM PDT 24 |
641619292 ps |
| T335 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.638205179 |
|
|
Mar 21 01:41:14 PM PDT 24 |
Mar 21 01:41:17 PM PDT 24 |
182775598 ps |
| T336 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3559171998 |
|
|
Mar 21 01:38:37 PM PDT 24 |
Mar 21 01:38:42 PM PDT 24 |
665820036 ps |
| T337 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.732284807 |
|
|
Mar 21 01:41:06 PM PDT 24 |
Mar 21 01:43:22 PM PDT 24 |
538179348 ps |
| T52 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.337253239 |
|
|
Mar 21 01:38:20 PM PDT 24 |
Mar 21 01:39:55 PM PDT 24 |
1727210325 ps |
| T118 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.711653238 |
|
|
Mar 21 01:38:08 PM PDT 24 |
Mar 21 01:38:11 PM PDT 24 |
293312488 ps |
| T119 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.885820304 |
|
|
Mar 21 01:40:05 PM PDT 24 |
Mar 21 01:43:07 PM PDT 24 |
16363259637 ps |
| T120 |
/workspace/coverage/default/38.sram_ctrl_smoke.1008227942 |
|
|
Mar 21 01:41:24 PM PDT 24 |
Mar 21 01:41:32 PM PDT 24 |
193009443 ps |
| T121 |
/workspace/coverage/default/46.sram_ctrl_stress_all.4085316957 |
|
|
Mar 21 01:42:39 PM PDT 24 |
Mar 21 02:40:20 PM PDT 24 |
236815631876 ps |
| T122 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.172671331 |
|
|
Mar 21 01:39:58 PM PDT 24 |
Mar 21 01:43:02 PM PDT 24 |
615596943 ps |
| T123 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.15986613 |
|
|
Mar 21 01:39:43 PM PDT 24 |
Mar 21 01:39:44 PM PDT 24 |
106742921 ps |
| T124 |
/workspace/coverage/default/30.sram_ctrl_alert_test.2987416907 |
|
|
Mar 21 01:40:30 PM PDT 24 |
Mar 21 01:40:31 PM PDT 24 |
23491679 ps |
| T53 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2042259637 |
|
|
Mar 21 01:40:13 PM PDT 24 |
Mar 21 01:41:11 PM PDT 24 |
3887482669 ps |
| T125 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4027857739 |
|
|
Mar 21 01:38:39 PM PDT 24 |
Mar 21 01:38:44 PM PDT 24 |
719767277 ps |
| T338 |
/workspace/coverage/default/18.sram_ctrl_stress_all.364537057 |
|
|
Mar 21 01:39:11 PM PDT 24 |
Mar 21 02:22:22 PM PDT 24 |
18544560599 ps |
| T339 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.2774193497 |
|
|
Mar 21 01:40:07 PM PDT 24 |
Mar 21 01:40:14 PM PDT 24 |
4442453281 ps |
| T340 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2539644259 |
|
|
Mar 21 01:37:49 PM PDT 24 |
Mar 21 01:56:10 PM PDT 24 |
46639294920 ps |
| T341 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2343614154 |
|
|
Mar 21 01:42:16 PM PDT 24 |
Mar 21 01:42:18 PM PDT 24 |
137797688 ps |
| T342 |
/workspace/coverage/default/22.sram_ctrl_executable.4064336123 |
|
|
Mar 21 01:39:42 PM PDT 24 |
Mar 21 01:54:45 PM PDT 24 |
2340748832 ps |
| T343 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.2597656060 |
|
|
Mar 21 01:39:19 PM PDT 24 |
Mar 21 01:39:20 PM PDT 24 |
101373807 ps |
| T344 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.1874414737 |
|
|
Mar 21 01:39:01 PM PDT 24 |
Mar 21 01:39:03 PM PDT 24 |
71304504 ps |
| T345 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.184097367 |
|
|
Mar 21 01:42:23 PM PDT 24 |
Mar 21 01:46:38 PM PDT 24 |
4015526583 ps |
| T346 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3564521182 |
|
|
Mar 21 01:42:23 PM PDT 24 |
Mar 21 01:42:25 PM PDT 24 |
79187377 ps |
| T347 |
/workspace/coverage/default/21.sram_ctrl_executable.900767259 |
|
|
Mar 21 01:39:42 PM PDT 24 |
Mar 21 01:43:24 PM PDT 24 |
4622375445 ps |
| T348 |
/workspace/coverage/default/23.sram_ctrl_bijection.700764762 |
|
|
Mar 21 01:39:44 PM PDT 24 |
Mar 21 01:40:24 PM PDT 24 |
7294603264 ps |
| T54 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3107101361 |
|
|
Mar 21 01:41:19 PM PDT 24 |
Mar 21 01:50:29 PM PDT 24 |
1546511566 ps |
| T349 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.911479972 |
|
|
Mar 21 01:39:57 PM PDT 24 |
Mar 21 01:40:00 PM PDT 24 |
148497283 ps |
| T350 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.2989102450 |
|
|
Mar 21 01:42:05 PM PDT 24 |
Mar 21 01:42:06 PM PDT 24 |
105788024 ps |
| T55 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.16286032 |
|
|
Mar 21 01:40:50 PM PDT 24 |
Mar 21 01:48:06 PM PDT 24 |
2294625050 ps |
| T351 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.2592682402 |
|
|
Mar 21 01:38:11 PM PDT 24 |
Mar 21 01:40:37 PM PDT 24 |
146137387 ps |
| T352 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.3589836749 |
|
|
Mar 21 01:39:12 PM PDT 24 |
Mar 21 01:39:13 PM PDT 24 |
142753928 ps |
| T353 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.4126814869 |
|
|
Mar 21 01:43:10 PM PDT 24 |
Mar 21 01:43:11 PM PDT 24 |
140317861 ps |
| T354 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3659821606 |
|
|
Mar 21 01:37:53 PM PDT 24 |
Mar 21 01:44:13 PM PDT 24 |
47351460572 ps |
| T355 |
/workspace/coverage/default/26.sram_ctrl_bijection.551616896 |
|
|
Mar 21 01:39:56 PM PDT 24 |
Mar 21 01:40:24 PM PDT 24 |
1805194706 ps |
| T356 |
/workspace/coverage/default/45.sram_ctrl_smoke.481546291 |
|
|
Mar 21 01:42:11 PM PDT 24 |
Mar 21 01:42:35 PM PDT 24 |
676202855 ps |
| T357 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.101846554 |
|
|
Mar 21 01:37:53 PM PDT 24 |
Mar 21 01:43:45 PM PDT 24 |
1088463978 ps |
| T358 |
/workspace/coverage/default/14.sram_ctrl_partial_access.1264091052 |
|
|
Mar 21 01:38:58 PM PDT 24 |
Mar 21 01:39:07 PM PDT 24 |
190299201 ps |
| T359 |
/workspace/coverage/default/2.sram_ctrl_regwen.1410146883 |
|
|
Mar 21 01:37:59 PM PDT 24 |
Mar 21 01:54:49 PM PDT 24 |
55397160667 ps |
| T360 |
/workspace/coverage/default/10.sram_ctrl_regwen.2055198122 |
|
|
Mar 21 01:38:54 PM PDT 24 |
Mar 21 01:50:31 PM PDT 24 |
14074491283 ps |
| T361 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3192719224 |
|
|
Mar 21 01:38:58 PM PDT 24 |
Mar 21 01:43:44 PM PDT 24 |
11327522451 ps |
| T362 |
/workspace/coverage/default/38.sram_ctrl_executable.3190544916 |
|
|
Mar 21 01:41:19 PM PDT 24 |
Mar 21 02:05:38 PM PDT 24 |
4375330088 ps |
| T363 |
/workspace/coverage/default/40.sram_ctrl_bijection.3468736047 |
|
|
Mar 21 01:41:28 PM PDT 24 |
Mar 21 01:41:52 PM PDT 24 |
1604948948 ps |
| T364 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.1363140784 |
|
|
Mar 21 01:40:24 PM PDT 24 |
Mar 21 01:40:28 PM PDT 24 |
242979117 ps |
| T365 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3713491695 |
|
|
Mar 21 01:38:52 PM PDT 24 |
Mar 21 01:38:56 PM PDT 24 |
285856138 ps |
| T366 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.194311471 |
|
|
Mar 21 01:38:55 PM PDT 24 |
Mar 21 01:42:24 PM PDT 24 |
25080873195 ps |
| T367 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3459680978 |
|
|
Mar 21 01:41:21 PM PDT 24 |
Mar 21 01:41:30 PM PDT 24 |
2698864402 ps |
| T368 |
/workspace/coverage/default/11.sram_ctrl_regwen.343779089 |
|
|
Mar 21 01:38:57 PM PDT 24 |
Mar 21 01:59:17 PM PDT 24 |
9837542983 ps |
| T369 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.1189498485 |
|
|
Mar 21 01:39:10 PM PDT 24 |
Mar 21 02:02:16 PM PDT 24 |
243925830586 ps |
| T370 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4179620979 |
|
|
Mar 21 01:38:58 PM PDT 24 |
Mar 21 01:46:04 PM PDT 24 |
5463348221 ps |
| T371 |
/workspace/coverage/default/1.sram_ctrl_bijection.1737886892 |
|
|
Mar 21 01:37:53 PM PDT 24 |
Mar 21 01:38:23 PM PDT 24 |
1338148112 ps |
| T372 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.2400313273 |
|
|
Mar 21 01:39:44 PM PDT 24 |
Mar 21 01:39:46 PM PDT 24 |
328600830 ps |
| T373 |
/workspace/coverage/default/34.sram_ctrl_bijection.2281389229 |
|
|
Mar 21 01:41:10 PM PDT 24 |
Mar 21 01:42:20 PM PDT 24 |
4607893321 ps |
| T374 |
/workspace/coverage/default/7.sram_ctrl_smoke.2178955728 |
|
|
Mar 21 01:38:22 PM PDT 24 |
Mar 21 01:39:46 PM PDT 24 |
147234824 ps |
| T375 |
/workspace/coverage/default/25.sram_ctrl_partial_access.277220598 |
|
|
Mar 21 01:39:56 PM PDT 24 |
Mar 21 01:42:21 PM PDT 24 |
641727733 ps |
| T376 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.96550909 |
|
|
Mar 21 01:37:56 PM PDT 24 |
Mar 21 01:38:01 PM PDT 24 |
152293060 ps |
| T377 |
/workspace/coverage/default/3.sram_ctrl_bijection.132541669 |
|
|
Mar 21 01:38:01 PM PDT 24 |
Mar 21 01:39:10 PM PDT 24 |
3766266391 ps |
| T378 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1760615833 |
|
|
Mar 21 01:40:00 PM PDT 24 |
Mar 21 01:48:54 PM PDT 24 |
48980888094 ps |
| T379 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.4204472907 |
|
|
Mar 21 01:38:59 PM PDT 24 |
Mar 21 01:39:00 PM PDT 24 |
29646373 ps |
| T380 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3989627949 |
|
|
Mar 21 01:38:19 PM PDT 24 |
Mar 21 01:38:20 PM PDT 24 |
11131588 ps |
| T381 |
/workspace/coverage/default/30.sram_ctrl_partial_access.2778493045 |
|
|
Mar 21 01:40:32 PM PDT 24 |
Mar 21 01:40:38 PM PDT 24 |
4697099990 ps |
| T382 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1819701919 |
|
|
Mar 21 01:39:58 PM PDT 24 |
Mar 21 01:40:10 PM PDT 24 |
322451955 ps |
| T383 |
/workspace/coverage/default/16.sram_ctrl_partial_access.985992155 |
|
|
Mar 21 01:38:59 PM PDT 24 |
Mar 21 01:39:15 PM PDT 24 |
1689211123 ps |
| T384 |
/workspace/coverage/default/18.sram_ctrl_bijection.1056161733 |
|
|
Mar 21 01:39:07 PM PDT 24 |
Mar 21 01:40:03 PM PDT 24 |
3356379039 ps |
| T385 |
/workspace/coverage/default/41.sram_ctrl_smoke.2975109501 |
|
|
Mar 21 01:41:48 PM PDT 24 |
Mar 21 01:41:50 PM PDT 24 |
123798521 ps |
| T386 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1921608273 |
|
|
Mar 21 01:41:30 PM PDT 24 |
Mar 21 01:45:57 PM PDT 24 |
2870279479 ps |
| T387 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.4277730316 |
|
|
Mar 21 01:38:16 PM PDT 24 |
Mar 21 01:38:21 PM PDT 24 |
1398887845 ps |
| T388 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1667347019 |
|
|
Mar 21 01:41:21 PM PDT 24 |
Mar 21 02:35:48 PM PDT 24 |
14335692012 ps |
| T389 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.3160972711 |
|
|
Mar 21 01:39:13 PM PDT 24 |
Mar 21 01:39:14 PM PDT 24 |
28573987 ps |
| T390 |
/workspace/coverage/default/16.sram_ctrl_alert_test.4266214066 |
|
|
Mar 21 01:39:10 PM PDT 24 |
Mar 21 01:39:11 PM PDT 24 |
35954972 ps |
| T391 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1861376796 |
|
|
Mar 21 01:41:06 PM PDT 24 |
Mar 21 01:46:07 PM PDT 24 |
4329825712 ps |
| T392 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.4045518096 |
|
|
Mar 21 01:39:12 PM PDT 24 |
Mar 21 01:39:18 PM PDT 24 |
472864190 ps |
| T393 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.794114885 |
|
|
Mar 21 01:42:37 PM PDT 24 |
Mar 21 01:42:39 PM PDT 24 |
554904651 ps |
| T112 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3053252171 |
|
|
Mar 21 01:40:31 PM PDT 24 |
Mar 21 01:42:08 PM PDT 24 |
1054677625 ps |
| T394 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.133985541 |
|
|
Mar 21 01:38:01 PM PDT 24 |
Mar 21 01:38:03 PM PDT 24 |
302146199 ps |
| T395 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1511494662 |
|
|
Mar 21 01:42:54 PM PDT 24 |
Mar 21 01:42:56 PM PDT 24 |
119121682 ps |
| T396 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3594229283 |
|
|
Mar 21 01:39:06 PM PDT 24 |
Mar 21 01:39:16 PM PDT 24 |
1137595083 ps |
| T397 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4038649480 |
|
|
Mar 21 01:38:54 PM PDT 24 |
Mar 21 01:57:47 PM PDT 24 |
17037088486 ps |
| T398 |
/workspace/coverage/default/41.sram_ctrl_partial_access.1851855411 |
|
|
Mar 21 01:41:50 PM PDT 24 |
Mar 21 01:42:07 PM PDT 24 |
1372003262 ps |
| T399 |
/workspace/coverage/default/33.sram_ctrl_executable.3556933855 |
|
|
Mar 21 01:40:53 PM PDT 24 |
Mar 21 01:55:08 PM PDT 24 |
15059925363 ps |
| T400 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1244968324 |
|
|
Mar 21 01:40:50 PM PDT 24 |
Mar 21 01:40:51 PM PDT 24 |
39733398 ps |
| T401 |
/workspace/coverage/default/33.sram_ctrl_smoke.882860405 |
|
|
Mar 21 01:40:50 PM PDT 24 |
Mar 21 01:41:17 PM PDT 24 |
377185630 ps |
| T402 |
/workspace/coverage/default/11.sram_ctrl_smoke.2164177816 |
|
|
Mar 21 01:38:58 PM PDT 24 |
Mar 21 01:39:02 PM PDT 24 |
77980012 ps |
| T403 |
/workspace/coverage/default/36.sram_ctrl_bijection.1583071944 |
|
|
Mar 21 01:41:06 PM PDT 24 |
Mar 21 01:41:36 PM PDT 24 |
861111252 ps |
| T404 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.1983575645 |
|
|
Mar 21 01:39:55 PM PDT 24 |
Mar 21 01:53:30 PM PDT 24 |
8872540217 ps |
| T405 |
/workspace/coverage/default/44.sram_ctrl_regwen.792431950 |
|
|
Mar 21 01:42:15 PM PDT 24 |
Mar 21 02:04:23 PM PDT 24 |
16797040441 ps |
| T406 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.359251481 |
|
|
Mar 21 01:42:36 PM PDT 24 |
Mar 21 01:42:40 PM PDT 24 |
44917842 ps |
| T407 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1773301657 |
|
|
Mar 21 01:40:18 PM PDT 24 |
Mar 21 01:40:23 PM PDT 24 |
74857352 ps |
| T408 |
/workspace/coverage/default/35.sram_ctrl_alert_test.1960120249 |
|
|
Mar 21 01:41:07 PM PDT 24 |
Mar 21 01:41:08 PM PDT 24 |
32477758 ps |
| T409 |
/workspace/coverage/default/5.sram_ctrl_alert_test.899900072 |
|
|
Mar 21 01:38:05 PM PDT 24 |
Mar 21 01:38:06 PM PDT 24 |
39883518 ps |
| T410 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4157541017 |
|
|
Mar 21 01:42:22 PM PDT 24 |
Mar 21 01:47:47 PM PDT 24 |
3551444838 ps |
| T411 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.412830474 |
|
|
Mar 21 01:39:43 PM PDT 24 |
Mar 21 01:39:47 PM PDT 24 |
182043844 ps |
| T412 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1349441240 |
|
|
Mar 21 01:41:19 PM PDT 24 |
Mar 21 01:41:23 PM PDT 24 |
1013375243 ps |
| T413 |
/workspace/coverage/default/39.sram_ctrl_stress_all.585742606 |
|
|
Mar 21 01:41:29 PM PDT 24 |
Mar 21 02:15:03 PM PDT 24 |
143271613955 ps |
| T414 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2503201536 |
|
|
Mar 21 01:38:52 PM PDT 24 |
Mar 21 01:38:59 PM PDT 24 |
1463989925 ps |
| T415 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2981488801 |
|
|
Mar 21 01:42:11 PM PDT 24 |
Mar 21 01:42:12 PM PDT 24 |
21782250 ps |
| T416 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.3955807205 |
|
|
Mar 21 01:41:57 PM PDT 24 |
Mar 21 01:42:01 PM PDT 24 |
837093711 ps |
| T417 |
/workspace/coverage/default/5.sram_ctrl_executable.2644987341 |
|
|
Mar 21 01:38:13 PM PDT 24 |
Mar 21 01:55:31 PM PDT 24 |
12181849979 ps |
| T418 |
/workspace/coverage/default/17.sram_ctrl_smoke.6457388 |
|
|
Mar 21 01:39:13 PM PDT 24 |
Mar 21 01:39:28 PM PDT 24 |
936685557 ps |
| T419 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.1044061981 |
|
|
Mar 21 01:40:24 PM PDT 24 |
Mar 21 01:44:31 PM PDT 24 |
2764975075 ps |
| T420 |
/workspace/coverage/default/46.sram_ctrl_partial_access.4270694198 |
|
|
Mar 21 01:42:31 PM PDT 24 |
Mar 21 01:42:34 PM PDT 24 |
680275194 ps |
| T421 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3062375578 |
|
|
Mar 21 01:38:17 PM PDT 24 |
Mar 21 01:38:21 PM PDT 24 |
843261782 ps |
| T422 |
/workspace/coverage/default/44.sram_ctrl_executable.524176166 |
|
|
Mar 21 01:42:14 PM PDT 24 |
Mar 21 01:51:01 PM PDT 24 |
17002265484 ps |
| T423 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.3819239483 |
|
|
Mar 21 01:38:57 PM PDT 24 |
Mar 21 01:39:52 PM PDT 24 |
130476295 ps |
| T26 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.830842899 |
|
|
Mar 21 01:38:13 PM PDT 24 |
Mar 21 01:38:16 PM PDT 24 |
1539445632 ps |
| T424 |
/workspace/coverage/default/25.sram_ctrl_alert_test.1799441743 |
|
|
Mar 21 01:40:01 PM PDT 24 |
Mar 21 01:40:02 PM PDT 24 |
57066033 ps |
| T425 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.1083902508 |
|
|
Mar 21 01:40:34 PM PDT 24 |
Mar 21 01:44:56 PM PDT 24 |
33419025829 ps |
| T426 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.1918122877 |
|
|
Mar 21 01:41:51 PM PDT 24 |
Mar 21 01:41:52 PM PDT 24 |
44876812 ps |
| T427 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.1483748216 |
|
|
Mar 21 01:39:12 PM PDT 24 |
Mar 21 01:47:04 PM PDT 24 |
1648463664 ps |
| T428 |
/workspace/coverage/default/10.sram_ctrl_alert_test.455600535 |
|
|
Mar 21 01:38:58 PM PDT 24 |
Mar 21 01:38:59 PM PDT 24 |
14012086 ps |
| T429 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.3052372101 |
|
|
Mar 21 01:39:05 PM PDT 24 |
Mar 21 02:01:18 PM PDT 24 |
70000853200 ps |
| T430 |
/workspace/coverage/default/17.sram_ctrl_stress_all.625033190 |
|
|
Mar 21 01:39:07 PM PDT 24 |
Mar 21 02:01:06 PM PDT 24 |
245454942825 ps |
| T431 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.4282084625 |
|
|
Mar 21 01:40:52 PM PDT 24 |
Mar 21 01:40:58 PM PDT 24 |
500703310 ps |
| T432 |
/workspace/coverage/default/21.sram_ctrl_stress_all.2137671180 |
|
|
Mar 21 01:39:42 PM PDT 24 |
Mar 21 02:42:12 PM PDT 24 |
61417637751 ps |
| T433 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.2195150400 |
|
|
Mar 21 01:42:53 PM PDT 24 |
Mar 21 01:43:00 PM PDT 24 |
1720734893 ps |
| T434 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.2598432436 |
|
|
Mar 21 01:41:06 PM PDT 24 |
Mar 21 01:53:48 PM PDT 24 |
64121669740 ps |
| T435 |
/workspace/coverage/default/10.sram_ctrl_bijection.1801328873 |
|
|
Mar 21 01:38:54 PM PDT 24 |
Mar 21 01:40:00 PM PDT 24 |
2295418806 ps |
| T436 |
/workspace/coverage/default/20.sram_ctrl_bijection.524627456 |
|
|
Mar 21 01:39:22 PM PDT 24 |
Mar 21 01:40:39 PM PDT 24 |
28897705593 ps |
| T437 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3662290147 |
|
|
Mar 21 01:42:55 PM PDT 24 |
Mar 21 01:45:24 PM PDT 24 |
161785593 ps |
| T438 |
/workspace/coverage/default/22.sram_ctrl_alert_test.2050658094 |
|
|
Mar 21 01:39:42 PM PDT 24 |
Mar 21 01:39:43 PM PDT 24 |
34375939 ps |
| T439 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.3962430561 |
|
|
Mar 21 01:39:33 PM PDT 24 |
Mar 21 01:46:14 PM PDT 24 |
4249957346 ps |
| T440 |
/workspace/coverage/default/33.sram_ctrl_regwen.2623629852 |
|
|
Mar 21 01:40:50 PM PDT 24 |
Mar 21 01:50:46 PM PDT 24 |
6804285194 ps |
| T441 |
/workspace/coverage/default/18.sram_ctrl_smoke.3869224856 |
|
|
Mar 21 01:39:06 PM PDT 24 |
Mar 21 01:39:08 PM PDT 24 |
173087007 ps |
| T442 |
/workspace/coverage/default/34.sram_ctrl_executable.2404358031 |
|
|
Mar 21 01:41:07 PM PDT 24 |
Mar 21 01:50:23 PM PDT 24 |
66232696608 ps |
| T443 |
/workspace/coverage/default/26.sram_ctrl_alert_test.3439608386 |
|
|
Mar 21 01:40:05 PM PDT 24 |
Mar 21 01:40:06 PM PDT 24 |
11179190 ps |
| T444 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.197437977 |
|
|
Mar 21 01:39:18 PM PDT 24 |
Mar 21 01:44:56 PM PDT 24 |
30450761744 ps |
| T445 |
/workspace/coverage/default/20.sram_ctrl_alert_test.2974111522 |
|
|
Mar 21 01:39:31 PM PDT 24 |
Mar 21 01:39:32 PM PDT 24 |
10894020 ps |
| T446 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3038873696 |
|
|
Mar 21 01:39:42 PM PDT 24 |
Mar 21 01:39:43 PM PDT 24 |
83818398 ps |
| T113 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2492663112 |
|
|
Mar 21 01:38:39 PM PDT 24 |
Mar 21 01:38:59 PM PDT 24 |
2447270640 ps |
| T447 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.155220031 |
|
|
Mar 21 01:40:53 PM PDT 24 |
Mar 21 01:40:58 PM PDT 24 |
2653073490 ps |
| T448 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.2752797304 |
|
|
Mar 21 01:41:08 PM PDT 24 |
Mar 21 01:44:50 PM PDT 24 |
31087041579 ps |
| T449 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.1337315016 |
|
|
Mar 21 01:42:00 PM PDT 24 |
Mar 21 01:44:03 PM PDT 24 |
519869276 ps |
| T450 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.970347233 |
|
|
Mar 21 01:42:13 PM PDT 24 |
Mar 21 01:48:13 PM PDT 24 |
5260973288 ps |
| T451 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.4056106340 |
|
|
Mar 21 01:38:58 PM PDT 24 |
Mar 21 01:38:59 PM PDT 24 |
312190417 ps |
| T452 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.1540414390 |
|
|
Mar 21 01:40:49 PM PDT 24 |
Mar 21 01:40:52 PM PDT 24 |
337560885 ps |
| T453 |
/workspace/coverage/default/37.sram_ctrl_smoke.1755280929 |
|
|
Mar 21 01:41:17 PM PDT 24 |
Mar 21 01:41:27 PM PDT 24 |
284899021 ps |
| T454 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1376229880 |
|
|
Mar 21 01:38:06 PM PDT 24 |
Mar 21 01:43:42 PM PDT 24 |
30384422709 ps |
| T455 |
/workspace/coverage/default/31.sram_ctrl_stress_all.2922824579 |
|
|
Mar 21 01:40:37 PM PDT 24 |
Mar 21 03:11:05 PM PDT 24 |
52665127548 ps |
| T456 |
/workspace/coverage/default/19.sram_ctrl_alert_test.854530793 |
|
|
Mar 21 01:39:20 PM PDT 24 |
Mar 21 01:39:21 PM PDT 24 |
43662167 ps |
| T457 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3770292629 |
|
|
Mar 21 01:39:46 PM PDT 24 |
Mar 21 01:39:54 PM PDT 24 |
79411810 ps |
| T458 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2046043891 |
|
|
Mar 21 01:38:00 PM PDT 24 |
Mar 21 01:41:26 PM PDT 24 |
2847420627 ps |
| T459 |
/workspace/coverage/default/12.sram_ctrl_bijection.3211527488 |
|
|
Mar 21 01:38:57 PM PDT 24 |
Mar 21 01:39:49 PM PDT 24 |
5571104909 ps |
| T460 |
/workspace/coverage/default/27.sram_ctrl_bijection.469917104 |
|
|
Mar 21 01:40:07 PM PDT 24 |
Mar 21 01:41:00 PM PDT 24 |
5770388443 ps |
| T461 |
/workspace/coverage/default/16.sram_ctrl_executable.2397505982 |
|
|
Mar 21 01:39:15 PM PDT 24 |
Mar 21 01:55:28 PM PDT 24 |
22502635916 ps |
| T462 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3301229639 |
|
|
Mar 21 01:39:46 PM PDT 24 |
Mar 21 01:39:47 PM PDT 24 |
63530583 ps |
| T463 |
/workspace/coverage/default/31.sram_ctrl_bijection.2498490877 |
|
|
Mar 21 01:40:34 PM PDT 24 |
Mar 21 01:41:01 PM PDT 24 |
1614542052 ps |
| T464 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.3401466221 |
|
|
Mar 21 01:41:32 PM PDT 24 |
Mar 21 01:42:04 PM PDT 24 |
2067036681 ps |
| T465 |
/workspace/coverage/default/4.sram_ctrl_bijection.875834810 |
|
|
Mar 21 01:38:07 PM PDT 24 |
Mar 21 01:38:29 PM PDT 24 |
359516518 ps |
| T466 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.485468091 |
|
|
Mar 21 01:41:59 PM PDT 24 |
Mar 21 01:42:02 PM PDT 24 |
936771430 ps |
| T467 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.34925009 |
|
|
Mar 21 01:37:57 PM PDT 24 |
Mar 21 01:53:15 PM PDT 24 |
11673620236 ps |
| T468 |
/workspace/coverage/default/22.sram_ctrl_bijection.987185142 |
|
|
Mar 21 01:39:41 PM PDT 24 |
Mar 21 01:40:30 PM PDT 24 |
808766682 ps |
| T469 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.4097081623 |
|
|
Mar 21 01:38:59 PM PDT 24 |
Mar 21 01:39:18 PM PDT 24 |
564003506 ps |
| T470 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.705581554 |
|
|
Mar 21 01:42:07 PM PDT 24 |
Mar 21 01:44:31 PM PDT 24 |
594276643 ps |
| T471 |
/workspace/coverage/default/2.sram_ctrl_bijection.202329951 |
|
|
Mar 21 01:38:03 PM PDT 24 |
Mar 21 01:38:30 PM PDT 24 |
1464962640 ps |
| T472 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1777660468 |
|
|
Mar 21 01:37:58 PM PDT 24 |
Mar 21 01:38:02 PM PDT 24 |
144115145 ps |
| T473 |
/workspace/coverage/default/40.sram_ctrl_partial_access.282701539 |
|
|
Mar 21 01:41:31 PM PDT 24 |
Mar 21 01:41:32 PM PDT 24 |
42492008 ps |
| T474 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3216279810 |
|
|
Mar 21 01:39:06 PM PDT 24 |
Mar 21 01:39:31 PM PDT 24 |
102038672 ps |
| T475 |
/workspace/coverage/default/44.sram_ctrl_bijection.3508621711 |
|
|
Mar 21 01:42:16 PM PDT 24 |
Mar 21 01:43:21 PM PDT 24 |
11152937172 ps |
| T476 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.2140584926 |
|
|
Mar 21 01:39:30 PM PDT 24 |
Mar 21 01:39:38 PM PDT 24 |
525934247 ps |
| T477 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1959931366 |
|
|
Mar 21 01:39:45 PM PDT 24 |
Mar 21 01:43:17 PM PDT 24 |
2984792265 ps |
| T478 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2049416725 |
|
|
Mar 21 01:40:34 PM PDT 24 |
Mar 21 01:42:33 PM PDT 24 |
264095728 ps |
| T479 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.1584613749 |
|
|
Mar 21 01:39:58 PM PDT 24 |
Mar 21 01:39:59 PM PDT 24 |
43180443 ps |
| T480 |
/workspace/coverage/default/23.sram_ctrl_regwen.1745667666 |
|
|
Mar 21 01:39:46 PM PDT 24 |
Mar 21 01:51:11 PM PDT 24 |
131652542910 ps |
| T481 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1951039406 |
|
|
Mar 21 01:39:44 PM PDT 24 |
Mar 21 01:43:58 PM PDT 24 |
11060741595 ps |
| T482 |
/workspace/coverage/default/45.sram_ctrl_stress_all.3971392747 |
|
|
Mar 21 01:42:24 PM PDT 24 |
Mar 21 02:29:58 PM PDT 24 |
164154615291 ps |
| T483 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.3424911935 |
|
|
Mar 21 01:39:00 PM PDT 24 |
Mar 21 01:39:05 PM PDT 24 |
136035276 ps |
| T484 |
/workspace/coverage/default/32.sram_ctrl_executable.2409908626 |
|
|
Mar 21 01:40:50 PM PDT 24 |
Mar 21 02:05:33 PM PDT 24 |
20166074088 ps |
| T485 |
/workspace/coverage/default/41.sram_ctrl_bijection.2597327404 |
|
|
Mar 21 01:41:47 PM PDT 24 |
Mar 21 01:42:34 PM PDT 24 |
3185374383 ps |
| T486 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.51272940 |
|
|
Mar 21 01:37:54 PM PDT 24 |
Mar 21 01:37:58 PM PDT 24 |
281064335 ps |
| T487 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.953841871 |
|
|
Mar 21 01:38:39 PM PDT 24 |
Mar 21 01:39:59 PM PDT 24 |
567775509 ps |
| T488 |
/workspace/coverage/default/36.sram_ctrl_executable.2880385116 |
|
|
Mar 21 01:41:21 PM PDT 24 |
Mar 21 01:51:01 PM PDT 24 |
1866547115 ps |
| T489 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3532129668 |
|
|
Mar 21 01:39:05 PM PDT 24 |
Mar 21 01:39:06 PM PDT 24 |
39439292 ps |
| T490 |
/workspace/coverage/default/42.sram_ctrl_stress_all.1929331792 |
|
|
Mar 21 01:42:08 PM PDT 24 |
Mar 21 02:32:59 PM PDT 24 |
204314915236 ps |
| T491 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3365530264 |
|
|
Mar 21 01:39:58 PM PDT 24 |
Mar 21 01:40:01 PM PDT 24 |
334989926 ps |
| T492 |
/workspace/coverage/default/35.sram_ctrl_executable.2017890093 |
|
|
Mar 21 01:41:08 PM PDT 24 |
Mar 21 01:43:55 PM PDT 24 |
4178792539 ps |
| T493 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.3248429002 |
|
|
Mar 21 01:41:06 PM PDT 24 |
Mar 21 01:41:12 PM PDT 24 |
674893661 ps |
| T494 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2970854605 |
|
|
Mar 21 01:40:32 PM PDT 24 |
Mar 21 01:40:32 PM PDT 24 |
43111927 ps |
| T495 |
/workspace/coverage/default/15.sram_ctrl_regwen.1479900113 |
|
|
Mar 21 01:39:01 PM PDT 24 |
Mar 21 01:54:58 PM PDT 24 |
3454836788 ps |
| T496 |
/workspace/coverage/default/3.sram_ctrl_stress_all.1016634457 |
|
|
Mar 21 01:38:05 PM PDT 24 |
Mar 21 02:54:19 PM PDT 24 |
22488937109 ps |
| T497 |
/workspace/coverage/default/42.sram_ctrl_regwen.2838521727 |
|
|
Mar 21 01:42:08 PM PDT 24 |
Mar 21 01:58:21 PM PDT 24 |
53598223997 ps |
| T498 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3398322217 |
|
|
Mar 21 01:39:15 PM PDT 24 |
Mar 21 01:41:55 PM PDT 24 |
1466675018 ps |
| T499 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.48811095 |
|
|
Mar 21 01:41:23 PM PDT 24 |
Mar 21 01:41:28 PM PDT 24 |
371030172 ps |
| T500 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1025904325 |
|
|
Mar 21 01:37:54 PM PDT 24 |
Mar 21 01:37:57 PM PDT 24 |
93427140 ps |
| T501 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.3381359366 |
|
|
Mar 21 01:39:43 PM PDT 24 |
Mar 21 01:41:30 PM PDT 24 |
139289894 ps |
| T502 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1589613370 |
|
|
Mar 21 01:38:54 PM PDT 24 |
Mar 21 01:38:57 PM PDT 24 |
194534895 ps |
| T503 |
/workspace/coverage/default/17.sram_ctrl_regwen.515224704 |
|
|
Mar 21 01:39:10 PM PDT 24 |
Mar 21 01:55:45 PM PDT 24 |
71156507802 ps |
| T504 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.4090103378 |
|
|
Mar 21 01:41:06 PM PDT 24 |
Mar 21 01:41:12 PM PDT 24 |
628579458 ps |
| T505 |
/workspace/coverage/default/37.sram_ctrl_regwen.1790083550 |
|
|
Mar 21 01:41:18 PM PDT 24 |
Mar 21 01:54:15 PM PDT 24 |
2675892550 ps |
| T506 |
/workspace/coverage/default/29.sram_ctrl_alert_test.1879891383 |
|
|
Mar 21 01:40:18 PM PDT 24 |
Mar 21 01:40:18 PM PDT 24 |
20332841 ps |
| T507 |
/workspace/coverage/default/49.sram_ctrl_partial_access.62523881 |
|
|
Mar 21 01:43:13 PM PDT 24 |
Mar 21 01:43:31 PM PDT 24 |
2021580462 ps |
| T508 |
/workspace/coverage/default/47.sram_ctrl_alert_test.709258711 |
|
|
Mar 21 01:42:53 PM PDT 24 |
Mar 21 01:42:55 PM PDT 24 |
30621713 ps |
| T509 |
/workspace/coverage/default/14.sram_ctrl_stress_all.1148407275 |
|
|
Mar 21 01:39:05 PM PDT 24 |
Mar 21 02:02:44 PM PDT 24 |
125377464200 ps |
| T510 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.609916696 |
|
|
Mar 21 01:38:08 PM PDT 24 |
Mar 21 01:42:51 PM PDT 24 |
1705666101 ps |
| T511 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.50782858 |
|
|
Mar 21 01:38:07 PM PDT 24 |
Mar 21 01:38:13 PM PDT 24 |
296181454 ps |
| T512 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.205957422 |
|
|
Mar 21 01:38:53 PM PDT 24 |
Mar 21 01:38:58 PM PDT 24 |
1578179290 ps |
| T513 |
/workspace/coverage/default/27.sram_ctrl_stress_all.1669312986 |
|
|
Mar 21 01:40:12 PM PDT 24 |
Mar 21 01:53:20 PM PDT 24 |
21306825655 ps |
| T514 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.3682405709 |
|
|
Mar 21 01:40:07 PM PDT 24 |
Mar 21 01:40:10 PM PDT 24 |
81569173 ps |
| T515 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.1609904104 |
|
|
Mar 21 01:41:18 PM PDT 24 |
Mar 21 01:41:23 PM PDT 24 |
215300796 ps |
| T516 |
/workspace/coverage/default/47.sram_ctrl_regwen.966681767 |
|
|
Mar 21 01:42:54 PM PDT 24 |
Mar 21 02:06:36 PM PDT 24 |
23638570970 ps |
| T517 |
/workspace/coverage/default/37.sram_ctrl_executable.3349149108 |
|
|
Mar 21 01:41:17 PM PDT 24 |
Mar 21 01:41:41 PM PDT 24 |
2562764153 ps |
| T518 |
/workspace/coverage/default/9.sram_ctrl_regwen.2728199140 |
|
|
Mar 21 01:38:41 PM PDT 24 |
Mar 21 02:01:13 PM PDT 24 |
20229170549 ps |
| T519 |
/workspace/coverage/default/9.sram_ctrl_smoke.1587632274 |
|
|
Mar 21 01:38:40 PM PDT 24 |
Mar 21 01:38:47 PM PDT 24 |
407713622 ps |
| T520 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.1468693299 |
|
|
Mar 21 01:39:15 PM PDT 24 |
Mar 21 01:41:38 PM PDT 24 |
28889667714 ps |
| T521 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.4063519688 |
|
|
Mar 21 01:39:10 PM PDT 24 |
Mar 21 01:39:11 PM PDT 24 |
116867130 ps |
| T522 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1993424029 |
|
|
Mar 21 01:40:00 PM PDT 24 |
Mar 21 01:40:40 PM PDT 24 |
92720290 ps |
| T523 |
/workspace/coverage/default/8.sram_ctrl_regwen.2200683590 |
|
|
Mar 21 01:38:39 PM PDT 24 |
Mar 21 01:41:24 PM PDT 24 |
7183002805 ps |
| T524 |
/workspace/coverage/default/43.sram_ctrl_partial_access.556409891 |
|
|
Mar 21 01:42:14 PM PDT 24 |
Mar 21 01:43:30 PM PDT 24 |
2031672449 ps |
| T525 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3082378554 |
|
|
Mar 21 01:40:33 PM PDT 24 |
Mar 21 01:40:40 PM PDT 24 |
1681818260 ps |
| T526 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3090729243 |
|
|
Mar 21 01:38:19 PM PDT 24 |
Mar 21 01:38:24 PM PDT 24 |
856843779 ps |
| T527 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.1968689133 |
|
|
Mar 21 01:39:31 PM PDT 24 |
Mar 21 01:39:37 PM PDT 24 |
664551298 ps |
| T528 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.198448840 |
|
|
Mar 21 01:41:49 PM PDT 24 |
Mar 21 01:42:00 PM PDT 24 |
336708121 ps |
| T529 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.1176350395 |
|
|
Mar 21 01:39:59 PM PDT 24 |
Mar 21 01:40:00 PM PDT 24 |
88807921 ps |
| T530 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.1536655302 |
|
|
Mar 21 01:42:53 PM PDT 24 |
Mar 21 01:42:58 PM PDT 24 |
141919593 ps |
| T531 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.944754920 |
|
|
Mar 21 01:39:30 PM PDT 24 |
Mar 21 01:39:35 PM PDT 24 |
57866434 ps |
| T532 |
/workspace/coverage/default/8.sram_ctrl_smoke.738520046 |
|
|
Mar 21 01:38:18 PM PDT 24 |
Mar 21 01:39:51 PM PDT 24 |
494404138 ps |
| T533 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.983297023 |
|
|
Mar 21 01:41:18 PM PDT 24 |
Mar 21 01:48:23 PM PDT 24 |
3670541569 ps |
| T534 |
/workspace/coverage/default/29.sram_ctrl_stress_all.3785281187 |
|
|
Mar 21 01:40:19 PM PDT 24 |
Mar 21 02:12:32 PM PDT 24 |
16575674527 ps |
| T535 |
/workspace/coverage/default/9.sram_ctrl_executable.2924087608 |
|
|
Mar 21 01:38:42 PM PDT 24 |
Mar 21 01:44:51 PM PDT 24 |
6734305539 ps |
| T536 |
/workspace/coverage/default/24.sram_ctrl_partial_access.3956660546 |
|
|
Mar 21 01:39:56 PM PDT 24 |
Mar 21 01:39:58 PM PDT 24 |
469880410 ps |
| T537 |
/workspace/coverage/default/32.sram_ctrl_alert_test.825435625 |
|
|
Mar 21 01:40:51 PM PDT 24 |
Mar 21 01:40:51 PM PDT 24 |
38152551 ps |
| T538 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.146512235 |
|
|
Mar 21 01:38:39 PM PDT 24 |
Mar 21 01:38:40 PM PDT 24 |
26936692 ps |
| T539 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.3473708754 |
|
|
Mar 21 01:40:11 PM PDT 24 |
Mar 21 01:45:08 PM PDT 24 |
3233962489 ps |
| T540 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2531887215 |
|
|
Mar 21 01:43:09 PM PDT 24 |
Mar 21 01:43:10 PM PDT 24 |
155943422 ps |
| T541 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.2245950647 |
|
|
Mar 21 01:40:17 PM PDT 24 |
Mar 21 01:40:22 PM PDT 24 |
188092976 ps |
| T542 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.1485288681 |
|
|
Mar 21 01:40:30 PM PDT 24 |
Mar 21 02:00:47 PM PDT 24 |
3941145679 ps |
| T37 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.4216002022 |
|
|
Mar 21 01:38:08 PM PDT 24 |
Mar 21 01:38:12 PM PDT 24 |
275633138 ps |
| T543 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1197844593 |
|
|
Mar 21 01:41:08 PM PDT 24 |
Mar 21 01:45:29 PM PDT 24 |
10335482140 ps |
| T544 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2726133659 |
|
|
Mar 21 01:39:57 PM PDT 24 |
Mar 21 01:52:48 PM PDT 24 |
10338959654 ps |
| T545 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.3845443700 |
|
|
Mar 21 01:41:18 PM PDT 24 |
Mar 21 01:41:47 PM PDT 24 |
322499540 ps |
| T546 |
/workspace/coverage/default/40.sram_ctrl_alert_test.3236039070 |
|
|
Mar 21 01:41:48 PM PDT 24 |
Mar 21 01:41:49 PM PDT 24 |
13238249 ps |
| T547 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.1680640196 |
|
|
Mar 21 01:40:19 PM PDT 24 |
Mar 21 01:40:20 PM PDT 24 |
52514463 ps |