Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.36 100.00 97.77 100.00 100.00 99.71 99.70 98.33


Total tests in report: 1020
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
78.68 78.68 96.60 96.60 73.64 73.64 87.20 87.20 71.43 71.43 87.03 87.03 94.60 94.60 40.26 40.26 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1735372153
87.27 8.59 98.35 1.75 83.68 10.04 88.77 1.57 100.00 28.57 94.52 7.49 94.90 0.30 50.65 10.39 /workspace/coverage/default/0.sram_ctrl_stress_all.3921465925
93.98 6.72 99.13 0.78 89.54 5.86 92.06 3.29 100.00 0.00 95.39 0.86 96.25 1.35 85.53 34.88 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1869421115
95.32 1.34 99.32 0.19 90.93 1.39 96.64 4.58 100.00 0.00 96.25 0.86 97.30 1.05 86.83 1.30 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2884517165
96.38 1.05 99.71 0.39 93.31 2.37 98.00 1.36 100.00 0.00 97.98 1.73 97.90 0.60 87.76 0.93 /workspace/coverage/default/1.sram_ctrl_sec_cm.74795276
97.18 0.80 99.71 0.00 93.72 0.42 98.00 0.00 100.00 0.00 97.98 0.00 97.90 0.00 92.95 5.19 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.962460164
97.94 0.76 99.90 0.19 95.68 1.95 98.00 0.00 100.00 0.00 99.14 1.15 97.90 0.00 94.99 2.04 /workspace/coverage/default/10.sram_ctrl_stress_all.675131752
98.30 0.36 99.90 0.00 95.96 0.28 98.07 0.07 100.00 0.00 99.14 0.00 99.70 1.80 95.36 0.37 /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1017736240
98.60 0.30 99.90 0.00 96.93 0.98 98.89 0.82 100.00 0.00 99.42 0.29 99.70 0.00 95.36 0.00 /workspace/coverage/default/45.sram_ctrl_lc_escalation.794294447
98.76 0.16 99.90 0.00 96.93 0.00 98.89 0.00 100.00 0.00 99.42 0.00 99.70 0.00 96.47 1.11 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1303890901
98.92 0.16 100.00 0.10 96.93 0.00 99.61 0.72 100.00 0.00 99.71 0.29 99.70 0.00 96.47 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.1745272507
99.06 0.14 100.00 0.00 97.07 0.14 99.89 0.29 100.00 0.00 99.71 0.00 99.70 0.00 97.03 0.56 /workspace/coverage/default/19.sram_ctrl_regwen.3408808241
99.15 0.09 100.00 0.00 97.63 0.56 99.96 0.07 100.00 0.00 99.71 0.00 99.70 0.00 97.03 0.00 /workspace/coverage/default/45.sram_ctrl_alert_test.3663149472
99.23 0.08 100.00 0.00 97.63 0.00 99.96 0.00 100.00 0.00 99.71 0.00 99.70 0.00 97.59 0.56 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3426405077
99.29 0.06 100.00 0.00 97.63 0.00 100.00 0.04 100.00 0.00 99.71 0.00 99.70 0.00 97.96 0.37 /workspace/coverage/default/41.sram_ctrl_executable.4048220874
99.31 0.03 100.00 0.00 97.63 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 98.14 0.19 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.4154996396
99.34 0.03 100.00 0.00 97.63 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 98.33 0.19 /workspace/coverage/default/13.sram_ctrl_regwen.3431549267

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1735097483
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1363419163
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1697391327
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.377612636
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2223902649
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.151682554
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3076462027
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2749754896
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3680822387
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2752182880
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.149313272
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.193170090
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2593419872
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2728733965
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4055939451
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.980130326
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.4189433543
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1740685247
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3443441658
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3112400516
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.4146760229
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2497065095
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1106327401
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.556906575
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2631970163
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3102884453
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.79219786
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2641100139
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1591303369
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3144212689
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2858177047
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2733929558
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1679399605
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2538351169
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.152297127
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3691481580
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.695576619
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4105782768
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2622753468
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2617650004
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3436581710
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3303932362
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1073683825
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2658348012
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.657617952
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3728487646
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1479059338
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3038120471
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.224536372
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1048257755
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2271450466
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2369910535
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3656100521
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3459097801
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1429140414
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1862338690
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2360993297
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3381779135
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3781926653
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2718510620
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3739816523
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.114489112
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2357171684
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3852176698
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2795003472
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3295029629
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1191612932
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.231945231
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4254114785
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3846882587
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4152811901
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1452844582
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3097793176
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2445090094
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.243564124
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.4012610280
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.322020947
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1118076432
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3943740182
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.189672659
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1246514909
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.196522615
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3345372033
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3376971117
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.870395014
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2105506254
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3076183356
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3188949240
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.523232178
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.625587235
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1311007923
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.883225875
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4023315239
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.68098819
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2807107933
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3948331934
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3862001932
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1841545627
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3302936121
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3083252384
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2110245927
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2123408445
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3694210899
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1716930515
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1300355858
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2360812364
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1005254405
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2079588952
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3829241732
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2752340314
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1264380028
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.95204570
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.51934322
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.177005004
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3311194714
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3219334359
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1678018942
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2306730687
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2838382162
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1337516370
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2793749837
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2209073717
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.759520684
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4210361293
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.518490455
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1956078952
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.979974250
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3616412684
/workspace/coverage/default/0.sram_ctrl_alert_test.530310303
/workspace/coverage/default/0.sram_ctrl_bijection.3064956879
/workspace/coverage/default/0.sram_ctrl_executable.3511143477
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3621393000
/workspace/coverage/default/0.sram_ctrl_max_throughput.515198727
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.96550909
/workspace/coverage/default/0.sram_ctrl_mem_walk.1777660468
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2539644259
/workspace/coverage/default/0.sram_ctrl_partial_access.3093473458
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3659821606
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2515452199
/workspace/coverage/default/0.sram_ctrl_regwen.1675178309
/workspace/coverage/default/0.sram_ctrl_sec_cm.1174629494
/workspace/coverage/default/0.sram_ctrl_smoke.4016723986
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.101846554
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.85701304
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2483010762
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1471156420
/workspace/coverage/default/1.sram_ctrl_alert_test.3867205427
/workspace/coverage/default/1.sram_ctrl_bijection.1737886892
/workspace/coverage/default/1.sram_ctrl_executable.152840215
/workspace/coverage/default/1.sram_ctrl_lc_escalation.198325818
/workspace/coverage/default/1.sram_ctrl_max_throughput.2040734525
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1025904325
/workspace/coverage/default/1.sram_ctrl_mem_walk.2386381117
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2576341922
/workspace/coverage/default/1.sram_ctrl_partial_access.1777020531
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1068576101
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4168186557
/workspace/coverage/default/1.sram_ctrl_regwen.2581947300
/workspace/coverage/default/1.sram_ctrl_smoke.4164969544
/workspace/coverage/default/1.sram_ctrl_stress_all.2051920221
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1984350565
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.51272940
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4125073876
/workspace/coverage/default/10.sram_ctrl_alert_test.455600535
/workspace/coverage/default/10.sram_ctrl_bijection.1801328873
/workspace/coverage/default/10.sram_ctrl_executable.814621379
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3621169102
/workspace/coverage/default/10.sram_ctrl_max_throughput.2128531266
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1589613370
/workspace/coverage/default/10.sram_ctrl_mem_walk.3713491695
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2611882219
/workspace/coverage/default/10.sram_ctrl_partial_access.3772341731
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1547776879
/workspace/coverage/default/10.sram_ctrl_ram_cfg.4170569943
/workspace/coverage/default/10.sram_ctrl_regwen.2055198122
/workspace/coverage/default/10.sram_ctrl_smoke.3386490576
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4179620979
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3192719224
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3038479194
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1995343482
/workspace/coverage/default/11.sram_ctrl_alert_test.2764884260
/workspace/coverage/default/11.sram_ctrl_bijection.2672442488
/workspace/coverage/default/11.sram_ctrl_executable.3712862869
/workspace/coverage/default/11.sram_ctrl_lc_escalation.205957422
/workspace/coverage/default/11.sram_ctrl_max_throughput.1258657659
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.4048521856
/workspace/coverage/default/11.sram_ctrl_mem_walk.1855343302
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4038649480
/workspace/coverage/default/11.sram_ctrl_partial_access.2030495310
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.394056046
/workspace/coverage/default/11.sram_ctrl_regwen.343779089
/workspace/coverage/default/11.sram_ctrl_smoke.2164177816
/workspace/coverage/default/11.sram_ctrl_stress_all.3989061652
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2667887893
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1251042398
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1530790328
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3472472673
/workspace/coverage/default/12.sram_ctrl_alert_test.174753833
/workspace/coverage/default/12.sram_ctrl_bijection.3211527488
/workspace/coverage/default/12.sram_ctrl_executable.2698010048
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2503201536
/workspace/coverage/default/12.sram_ctrl_max_throughput.1710849535
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1340524189
/workspace/coverage/default/12.sram_ctrl_mem_walk.4279029955
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3811340155
/workspace/coverage/default/12.sram_ctrl_partial_access.4074179442
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.194311471
/workspace/coverage/default/12.sram_ctrl_ram_cfg.4056106340
/workspace/coverage/default/12.sram_ctrl_regwen.1759417879
/workspace/coverage/default/12.sram_ctrl_smoke.14887059
/workspace/coverage/default/12.sram_ctrl_stress_all.1527501573
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2857806467
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.268941658
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.949656396
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/workspace/coverage/default/44.sram_ctrl_bijection.3508621711
/workspace/coverage/default/44.sram_ctrl_executable.524176166
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2343614154
/workspace/coverage/default/44.sram_ctrl_max_throughput.472140978
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.508247169
/workspace/coverage/default/44.sram_ctrl_mem_walk.2606055338
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1448227822
/workspace/coverage/default/44.sram_ctrl_partial_access.1950154906
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3624403892
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1491765896
/workspace/coverage/default/44.sram_ctrl_regwen.792431950
/workspace/coverage/default/44.sram_ctrl_smoke.126535811
/workspace/coverage/default/44.sram_ctrl_stress_all.3393182162
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2002141431
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4166529986
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3635703636
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3130493748
/workspace/coverage/default/45.sram_ctrl_bijection.3861331989
/workspace/coverage/default/45.sram_ctrl_executable.3026558278
/workspace/coverage/default/45.sram_ctrl_max_throughput.2168617994
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3510399120
/workspace/coverage/default/45.sram_ctrl_mem_walk.289572409
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4127167661
/workspace/coverage/default/45.sram_ctrl_partial_access.2474993973
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1289899197
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3564521182
/workspace/coverage/default/45.sram_ctrl_regwen.734580362
/workspace/coverage/default/45.sram_ctrl_smoke.481546291
/workspace/coverage/default/45.sram_ctrl_stress_all.3971392747
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3214964907
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4157541017
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.46156381
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2416576782
/workspace/coverage/default/46.sram_ctrl_alert_test.1682797225
/workspace/coverage/default/46.sram_ctrl_bijection.720215202
/workspace/coverage/default/46.sram_ctrl_executable.485623264
/workspace/coverage/default/46.sram_ctrl_lc_escalation.794114885
/workspace/coverage/default/46.sram_ctrl_max_throughput.2337967969
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2869275134
/workspace/coverage/default/46.sram_ctrl_mem_walk.3672062561
/workspace/coverage/default/46.sram_ctrl_multiple_keys.184097367
/workspace/coverage/default/46.sram_ctrl_partial_access.4270694198
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2854243628
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2237706130
/workspace/coverage/default/46.sram_ctrl_regwen.1782203461
/workspace/coverage/default/46.sram_ctrl_smoke.924191735
/workspace/coverage/default/46.sram_ctrl_stress_all.4085316957
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2147216444
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1698331229
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2827397940
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2617203133
/workspace/coverage/default/47.sram_ctrl_alert_test.709258711
/workspace/coverage/default/47.sram_ctrl_bijection.551193903
/workspace/coverage/default/47.sram_ctrl_executable.3390700251
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3156087324
/workspace/coverage/default/47.sram_ctrl_max_throughput.3641968974
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2717115802
/workspace/coverage/default/47.sram_ctrl_mem_walk.2195150400
/workspace/coverage/default/47.sram_ctrl_multiple_keys.154024761
/workspace/coverage/default/47.sram_ctrl_partial_access.1122317773
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1666900371
/workspace/coverage/default/47.sram_ctrl_ram_cfg.266523224
/workspace/coverage/default/47.sram_ctrl_regwen.966681767
/workspace/coverage/default/47.sram_ctrl_smoke.3655407403
/workspace/coverage/default/47.sram_ctrl_stress_all.1689219298
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.834235085
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1904133196
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.359251481
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.909819970
/workspace/coverage/default/48.sram_ctrl_alert_test.4095121378
/workspace/coverage/default/48.sram_ctrl_bijection.4262458204
/workspace/coverage/default/48.sram_ctrl_executable.465975227
/workspace/coverage/default/48.sram_ctrl_lc_escalation.173874306
/workspace/coverage/default/48.sram_ctrl_max_throughput.532582577
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1447466192
/workspace/coverage/default/48.sram_ctrl_mem_walk.1536655302
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1133516514
/workspace/coverage/default/48.sram_ctrl_partial_access.1468206004
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3353306602
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1511494662
/workspace/coverage/default/48.sram_ctrl_regwen.2467184878
/workspace/coverage/default/48.sram_ctrl_smoke.3602685111
/workspace/coverage/default/48.sram_ctrl_stress_all.442008784
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1736962217
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1732131395
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3662290147
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.4189057611
/workspace/coverage/default/49.sram_ctrl_alert_test.3349655541
/workspace/coverage/default/49.sram_ctrl_bijection.1357654423
/workspace/coverage/default/49.sram_ctrl_executable.4051888334
/workspace/coverage/default/49.sram_ctrl_lc_escalation.619511485
/workspace/coverage/default/49.sram_ctrl_max_throughput.4126814869
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2517487230
/workspace/coverage/default/49.sram_ctrl_mem_walk.2038951986
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1970431116
/workspace/coverage/default/49.sram_ctrl_partial_access.62523881
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.4286098604
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2531887215
/workspace/coverage/default/49.sram_ctrl_regwen.1664300674
/workspace/coverage/default/49.sram_ctrl_smoke.29749294
/workspace/coverage/default/49.sram_ctrl_stress_all.2129484430
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1890820457
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3618616149
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.724169413
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3046301945
/workspace/coverage/default/5.sram_ctrl_alert_test.899900072
/workspace/coverage/default/5.sram_ctrl_bijection.3996001540
/workspace/coverage/default/5.sram_ctrl_executable.2644987341
/workspace/coverage/default/5.sram_ctrl_lc_escalation.920843572
/workspace/coverage/default/5.sram_ctrl_max_throughput.1149413498
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.50782858
/workspace/coverage/default/5.sram_ctrl_mem_walk.836670454
/workspace/coverage/default/5.sram_ctrl_multiple_keys.546108471
/workspace/coverage/default/5.sram_ctrl_partial_access.1119261383
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1376229880
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3460444206
/workspace/coverage/default/5.sram_ctrl_regwen.1041535066
/workspace/coverage/default/5.sram_ctrl_smoke.2649894529
/workspace/coverage/default/5.sram_ctrl_stress_all.936444423
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3322592414
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3334622345
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3449635052
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1262119923
/workspace/coverage/default/6.sram_ctrl_alert_test.3989627949
/workspace/coverage/default/6.sram_ctrl_bijection.1026336222
/workspace/coverage/default/6.sram_ctrl_executable.3288585040
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3090729243
/workspace/coverage/default/6.sram_ctrl_max_throughput.551626701
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3062375578
/workspace/coverage/default/6.sram_ctrl_mem_walk.666031176
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3971117046
/workspace/coverage/default/6.sram_ctrl_partial_access.3969140397
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2303890134
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2656419480
/workspace/coverage/default/6.sram_ctrl_regwen.2447125793
/workspace/coverage/default/6.sram_ctrl_smoke.758259588
/workspace/coverage/default/6.sram_ctrl_stress_all.803888991
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.337253239
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2707679374
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.172993701
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2777756195
/workspace/coverage/default/7.sram_ctrl_alert_test.971978448
/workspace/coverage/default/7.sram_ctrl_bijection.1644594352
/workspace/coverage/default/7.sram_ctrl_executable.1892986509
/workspace/coverage/default/7.sram_ctrl_lc_escalation.4277730316
/workspace/coverage/default/7.sram_ctrl_max_throughput.1440615416
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.806204075
/workspace/coverage/default/7.sram_ctrl_mem_walk.2938929614
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2013870397
/workspace/coverage/default/7.sram_ctrl_partial_access.4286079787
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.430138891
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3116737270
/workspace/coverage/default/7.sram_ctrl_regwen.4012741449
/workspace/coverage/default/7.sram_ctrl_smoke.2178955728
/workspace/coverage/default/7.sram_ctrl_stress_all.2359200806
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1227904089
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1655388640
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1339093196
/workspace/coverage/default/8.sram_ctrl_alert_test.1844738101
/workspace/coverage/default/8.sram_ctrl_bijection.965681946
/workspace/coverage/default/8.sram_ctrl_executable.2874928481
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4027857739
/workspace/coverage/default/8.sram_ctrl_max_throughput.78730417
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3559171998
/workspace/coverage/default/8.sram_ctrl_mem_walk.2939669184
/workspace/coverage/default/8.sram_ctrl_multiple_keys.889097155
/workspace/coverage/default/8.sram_ctrl_partial_access.1752180092
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.314150363
/workspace/coverage/default/8.sram_ctrl_ram_cfg.146512235
/workspace/coverage/default/8.sram_ctrl_regwen.2200683590
/workspace/coverage/default/8.sram_ctrl_smoke.738520046
/workspace/coverage/default/8.sram_ctrl_stress_all.2606234717
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2492663112
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3940607303
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2794619106
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.167934058
/workspace/coverage/default/9.sram_ctrl_alert_test.491836888
/workspace/coverage/default/9.sram_ctrl_bijection.2883693216
/workspace/coverage/default/9.sram_ctrl_executable.2924087608
/workspace/coverage/default/9.sram_ctrl_lc_escalation.4292597860
/workspace/coverage/default/9.sram_ctrl_max_throughput.2777044358
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2805454275
/workspace/coverage/default/9.sram_ctrl_mem_walk.921705339
/workspace/coverage/default/9.sram_ctrl_multiple_keys.132910917
/workspace/coverage/default/9.sram_ctrl_partial_access.926400408
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.503891314
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1577494244
/workspace/coverage/default/9.sram_ctrl_regwen.2728199140
/workspace/coverage/default/9.sram_ctrl_smoke.1587632274
/workspace/coverage/default/9.sram_ctrl_stress_all.3597447639
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3332632196
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.953841871



Total test records in report: 1020
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/20.sram_ctrl_smoke.1562456934 Mar 21 01:39:20 PM PDT 24 Mar 21 01:39:48 PM PDT 24 446259074 ps
T2 /workspace/coverage/default/11.sram_ctrl_ram_cfg.1745272507 Mar 21 01:38:54 PM PDT 24 Mar 21 01:38:57 PM PDT 24 121091071 ps
T3 /workspace/coverage/default/39.sram_ctrl_partial_access.2774963779 Mar 21 01:41:42 PM PDT 24 Mar 21 01:41:46 PM PDT 24 1599111146 ps
T10 /workspace/coverage/default/45.sram_ctrl_alert_test.3663149472 Mar 21 01:42:31 PM PDT 24 Mar 21 01:42:31 PM PDT 24 47768398 ps
T4 /workspace/coverage/default/11.sram_ctrl_partial_access.2030495310 Mar 21 01:38:55 PM PDT 24 Mar 21 01:39:06 PM PDT 24 200849168 ps
T5 /workspace/coverage/default/33.sram_ctrl_bijection.4239179623 Mar 21 01:40:51 PM PDT 24 Mar 21 01:41:41 PM PDT 24 3047430312 ps
T6 /workspace/coverage/default/6.sram_ctrl_smoke.758259588 Mar 21 01:38:11 PM PDT 24 Mar 21 01:38:19 PM PDT 24 181377849 ps
T11 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1735372153 Mar 21 01:37:59 PM PDT 24 Mar 21 01:42:11 PM PDT 24 10443743203 ps
T12 /workspace/coverage/default/43.sram_ctrl_mem_walk.1216495553 Mar 21 01:42:14 PM PDT 24 Mar 21 01:42:19 PM PDT 24 337402708 ps
T13 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2483010762 Mar 21 01:37:55 PM PDT 24 Mar 21 01:38:35 PM PDT 24 104689749 ps
T14 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2884517165 Mar 21 01:41:10 PM PDT 24 Mar 21 01:51:20 PM PDT 24 6136131939 ps
T15 /workspace/coverage/default/31.sram_ctrl_executable.1522669537 Mar 21 01:40:34 PM PDT 24 Mar 21 01:45:18 PM PDT 24 1438952991 ps
T32 /workspace/coverage/default/14.sram_ctrl_ram_cfg.802642286 Mar 21 01:39:01 PM PDT 24 Mar 21 01:39:03 PM PDT 24 51321741 ps
T16 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1655388640 Mar 21 01:38:16 PM PDT 24 Mar 21 01:39:19 PM PDT 24 236392349 ps
T7 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2999195834 Mar 21 01:39:58 PM PDT 24 Mar 21 01:40:01 PM PDT 24 739087335 ps
T64 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.174652704 Mar 21 01:38:09 PM PDT 24 Mar 21 01:38:18 PM PDT 24 215265359 ps
T8 /workspace/coverage/default/45.sram_ctrl_lc_escalation.794294447 Mar 21 01:42:26 PM PDT 24 Mar 21 01:42:31 PM PDT 24 2563832952 ps
T23 /workspace/coverage/default/38.sram_ctrl_alert_test.2285837423 Mar 21 01:41:30 PM PDT 24 Mar 21 01:41:31 PM PDT 24 23179599 ps
T65 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.949656396 Mar 21 01:38:59 PM PDT 24 Mar 21 01:39:35 PM PDT 24 100458179 ps
T19 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.167934058 Mar 21 01:38:37 PM PDT 24 Mar 21 01:48:17 PM PDT 24 10295465369 ps
T66 /workspace/coverage/default/14.sram_ctrl_max_throughput.2849262687 Mar 21 01:38:57 PM PDT 24 Mar 21 01:38:59 PM PDT 24 161010326 ps
T17 /workspace/coverage/default/41.sram_ctrl_executable.4048220874 Mar 21 01:42:07 PM PDT 24 Mar 21 02:09:27 PM PDT 24 5176100103 ps
T67 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2213640119 Mar 21 01:38:57 PM PDT 24 Mar 21 01:40:17 PM PDT 24 133548392 ps
T18 /workspace/coverage/default/9.sram_ctrl_stress_all.3597447639 Mar 21 01:38:39 PM PDT 24 Mar 21 03:09:55 PM PDT 24 11005307239 ps
T9 /workspace/coverage/default/24.sram_ctrl_lc_escalation.86069716 Mar 21 01:39:58 PM PDT 24 Mar 21 01:40:05 PM PDT 24 1406300029 ps
T78 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.613146558 Mar 21 01:40:34 PM PDT 24 Mar 21 01:40:37 PM PDT 24 355734008 ps
T174 /workspace/coverage/default/13.sram_ctrl_bijection.2455312416 Mar 21 01:38:56 PM PDT 24 Mar 21 01:39:26 PM PDT 24 2490555286 ps
T140 /workspace/coverage/default/24.sram_ctrl_executable.2859158684 Mar 21 01:39:55 PM PDT 24 Mar 21 01:50:00 PM PDT 24 10952644011 ps
T154 /workspace/coverage/default/45.sram_ctrl_bijection.3861331989 Mar 21 01:42:22 PM PDT 24 Mar 21 01:42:48 PM PDT 24 3903697249 ps
T110 /workspace/coverage/default/0.sram_ctrl_bijection.3064956879 Mar 21 01:37:54 PM PDT 24 Mar 21 01:38:22 PM PDT 24 30371431946 ps
T47 /workspace/coverage/default/15.sram_ctrl_stress_all.56116281 Mar 21 01:39:01 PM PDT 24 Mar 21 01:54:24 PM PDT 24 93430280292 ps
T79 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.2773773424 Mar 21 01:39:13 PM PDT 24 Mar 21 01:39:19 PM PDT 24 197159367 ps
T156 /workspace/coverage/default/13.sram_ctrl_partial_access.3932650407 Mar 21 01:38:57 PM PDT 24 Mar 21 01:39:12 PM PDT 24 777807374 ps
T167 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1135140268 Mar 21 01:39:45 PM PDT 24 Mar 21 01:39:47 PM PDT 24 141756418 ps
T163 /workspace/coverage/default/40.sram_ctrl_max_throughput.4131250752 Mar 21 01:41:47 PM PDT 24 Mar 21 01:41:50 PM PDT 24 44768638 ps
T80 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1190471073 Mar 21 01:40:19 PM PDT 24 Mar 21 01:44:42 PM PDT 24 20916474470 ps
T81 /workspace/coverage/default/20.sram_ctrl_multiple_keys.544605676 Mar 21 01:39:20 PM PDT 24 Mar 21 02:06:25 PM PDT 24 44444643098 ps
T29 /workspace/coverage/default/43.sram_ctrl_lc_escalation.4244170691 Mar 21 01:42:14 PM PDT 24 Mar 21 01:42:18 PM PDT 24 224941565 ps
T99 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1991057454 Mar 21 01:39:59 PM PDT 24 Mar 21 01:47:03 PM PDT 24 17235390179 ps
T111 /workspace/coverage/default/46.sram_ctrl_executable.485623264 Mar 21 01:42:36 PM PDT 24 Mar 21 01:44:42 PM PDT 24 10299689189 ps
T159 /workspace/coverage/default/37.sram_ctrl_partial_access.169422732 Mar 21 01:41:18 PM PDT 24 Mar 21 01:41:21 PM PDT 24 449781828 ps
T141 /workspace/coverage/default/47.sram_ctrl_executable.3390700251 Mar 21 01:42:36 PM PDT 24 Mar 21 01:54:26 PM PDT 24 36051866868 ps
T164 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.174757345 Mar 21 01:38:56 PM PDT 24 Mar 21 01:39:49 PM PDT 24 242070032 ps
T86 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2300699604 Mar 21 01:39:05 PM PDT 24 Mar 21 01:39:08 PM PDT 24 158983618 ps
T175 /workspace/coverage/default/31.sram_ctrl_mem_walk.1662979447 Mar 21 01:40:32 PM PDT 24 Mar 21 01:40:36 PM PDT 24 93767210 ps
T62 /workspace/coverage/default/37.sram_ctrl_stress_all.2208696893 Mar 21 01:41:21 PM PDT 24 Mar 21 02:25:48 PM PDT 24 46006517790 ps
T172 /workspace/coverage/default/24.sram_ctrl_smoke.403284454 Mar 21 01:39:59 PM PDT 24 Mar 21 01:40:05 PM PDT 24 103304604 ps
T147 /workspace/coverage/default/21.sram_ctrl_bijection.3047213859 Mar 21 01:39:31 PM PDT 24 Mar 21 01:40:42 PM PDT 24 17248022595 ps
T100 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1984350565 Mar 21 01:37:54 PM PDT 24 Mar 21 01:42:10 PM PDT 24 22699968146 ps
T30 /workspace/coverage/default/10.sram_ctrl_lc_escalation.3621169102 Mar 21 01:38:53 PM PDT 24 Mar 21 01:38:59 PM PDT 24 2389556010 ps
T176 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3503221208 Mar 21 01:41:50 PM PDT 24 Mar 21 01:42:26 PM PDT 24 96075322 ps
T33 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1869421115 Mar 21 01:38:06 PM PDT 24 Mar 21 01:41:49 PM PDT 24 5010626113 ps
T20 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1296044294 Mar 21 01:39:32 PM PDT 24 Mar 21 01:52:09 PM PDT 24 7074432931 ps
T56 /workspace/coverage/default/35.sram_ctrl_stress_all.3090113204 Mar 21 01:41:12 PM PDT 24 Mar 21 01:58:12 PM PDT 24 54608129183 ps
T31 /workspace/coverage/default/15.sram_ctrl_lc_escalation.900375660 Mar 21 01:38:59 PM PDT 24 Mar 21 01:39:05 PM PDT 24 741999980 ps
T57 /workspace/coverage/default/17.sram_ctrl_mem_walk.3989077572 Mar 21 01:39:10 PM PDT 24 Mar 21 01:39:15 PM PDT 24 285625570 ps
T58 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2293123213 Mar 21 01:42:11 PM PDT 24 Mar 21 01:48:41 PM PDT 24 62835519380 ps
T59 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.384784624 Mar 21 01:40:32 PM PDT 24 Mar 21 01:40:35 PM PDT 24 152556040 ps
T60 /workspace/coverage/default/19.sram_ctrl_smoke.745374884 Mar 21 01:39:10 PM PDT 24 Mar 21 01:39:19 PM PDT 24 1964451346 ps
T61 /workspace/coverage/default/19.sram_ctrl_partial_access.318550678 Mar 21 01:39:19 PM PDT 24 Mar 21 01:40:40 PM PDT 24 2191009283 ps
T48 /workspace/coverage/default/0.sram_ctrl_stress_all.3921465925 Mar 21 01:37:56 PM PDT 24 Mar 21 02:29:41 PM PDT 24 48412100120 ps
T168 /workspace/coverage/default/48.sram_ctrl_partial_access.1468206004 Mar 21 01:42:54 PM PDT 24 Mar 21 01:43:24 PM PDT 24 669144444 ps
T161 /workspace/coverage/default/32.sram_ctrl_smoke.3498145215 Mar 21 01:40:32 PM PDT 24 Mar 21 01:40:38 PM PDT 24 288196839 ps
T177 /workspace/coverage/default/40.sram_ctrl_mem_walk.2230525288 Mar 21 01:41:47 PM PDT 24 Mar 21 01:41:52 PM PDT 24 77804927 ps
T178 /workspace/coverage/default/25.sram_ctrl_executable.389370386 Mar 21 01:39:55 PM PDT 24 Mar 21 01:44:10 PM PDT 24 2569022944 ps
T179 /workspace/coverage/default/38.sram_ctrl_max_throughput.3297830802 Mar 21 01:41:21 PM PDT 24 Mar 21 01:43:36 PM PDT 24 142184352 ps
T63 /workspace/coverage/default/14.sram_ctrl_regwen.2901333005 Mar 21 01:39:01 PM PDT 24 Mar 21 01:57:58 PM PDT 24 3406497918 ps
T180 /workspace/coverage/default/6.sram_ctrl_mem_walk.666031176 Mar 21 01:38:15 PM PDT 24 Mar 21 01:38:24 PM PDT 24 275329683 ps
T127 /workspace/coverage/default/5.sram_ctrl_lc_escalation.920843572 Mar 21 01:38:06 PM PDT 24 Mar 21 01:38:13 PM PDT 24 1121730725 ps
T148 /workspace/coverage/default/25.sram_ctrl_max_throughput.1428769764 Mar 21 01:39:58 PM PDT 24 Mar 21 01:40:11 PM PDT 24 70745078 ps
T181 /workspace/coverage/default/8.sram_ctrl_mem_walk.2939669184 Mar 21 01:38:38 PM PDT 24 Mar 21 01:38:47 PM PDT 24 137402985 ps
T106 /workspace/coverage/default/30.sram_ctrl_regwen.331184568 Mar 21 01:40:31 PM PDT 24 Mar 21 02:13:19 PM PDT 24 113398048324 ps
T182 /workspace/coverage/default/13.sram_ctrl_max_throughput.2931779754 Mar 21 01:38:53 PM PDT 24 Mar 21 01:41:18 PM PDT 24 145642274 ps
T101 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3618616149 Mar 21 01:43:09 PM PDT 24 Mar 21 01:47:48 PM PDT 24 3015520256 ps
T157 /workspace/coverage/default/43.sram_ctrl_bijection.1541589044 Mar 21 01:42:16 PM PDT 24 Mar 21 01:43:10 PM PDT 24 2456412007 ps
T153 /workspace/coverage/default/32.sram_ctrl_bijection.3350512021 Mar 21 01:40:32 PM PDT 24 Mar 21 01:42:00 PM PDT 24 21665092684 ps
T170 /workspace/coverage/default/47.sram_ctrl_bijection.551193903 Mar 21 01:42:36 PM PDT 24 Mar 21 01:43:03 PM PDT 24 1752036448 ps
T162 /workspace/coverage/default/37.sram_ctrl_multiple_keys.1555176568 Mar 21 01:41:18 PM PDT 24 Mar 21 02:07:29 PM PDT 24 3483486838 ps
T166 /workspace/coverage/default/23.sram_ctrl_multiple_keys.3963661856 Mar 21 01:39:43 PM PDT 24 Mar 21 01:48:54 PM PDT 24 6422779489 ps
T183 /workspace/coverage/default/47.sram_ctrl_stress_all.1689219298 Mar 21 01:42:53 PM PDT 24 Mar 21 01:56:35 PM PDT 24 62737677674 ps
T184 /workspace/coverage/default/14.sram_ctrl_bijection.2386247199 Mar 21 01:39:01 PM PDT 24 Mar 21 01:39:46 PM PDT 24 5796688349 ps
T185 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.4169041651 Mar 21 01:41:17 PM PDT 24 Mar 21 01:42:34 PM PDT 24 242922786 ps
T102 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.117667914 Mar 21 01:38:13 PM PDT 24 Mar 21 01:43:37 PM PDT 24 9105758995 ps
T186 /workspace/coverage/default/45.sram_ctrl_mem_walk.289572409 Mar 21 01:42:23 PM PDT 24 Mar 21 01:42:31 PM PDT 24 280323091 ps
T187 /workspace/coverage/default/33.sram_ctrl_mem_walk.3530643334 Mar 21 01:40:50 PM PDT 24 Mar 21 01:41:00 PM PDT 24 479060547 ps
T87 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.3895961440 Mar 21 01:42:08 PM PDT 24 Mar 21 01:42:11 PM PDT 24 381024380 ps
T152 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2794619106 Mar 21 01:38:42 PM PDT 24 Mar 21 01:39:21 PM PDT 24 112027790 ps
T27 /workspace/coverage/default/49.sram_ctrl_stress_all.2129484430 Mar 21 01:43:14 PM PDT 24 Mar 21 02:09:32 PM PDT 24 111086496060 ps
T188 /workspace/coverage/default/25.sram_ctrl_multiple_keys.1852002082 Mar 21 01:39:57 PM PDT 24 Mar 21 01:58:25 PM PDT 24 12324530385 ps
T88 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.2617203133 Mar 21 01:42:37 PM PDT 24 Mar 21 01:54:01 PM PDT 24 5776173267 ps
T189 /workspace/coverage/default/43.sram_ctrl_executable.1982096237 Mar 21 01:42:11 PM PDT 24 Mar 21 01:56:09 PM PDT 24 18261517426 ps
T190 /workspace/coverage/default/42.sram_ctrl_smoke.1445609637 Mar 21 01:41:58 PM PDT 24 Mar 21 01:42:20 PM PDT 24 6047217479 ps
T191 /workspace/coverage/default/20.sram_ctrl_partial_access.1173552871 Mar 21 01:39:30 PM PDT 24 Mar 21 01:39:47 PM PDT 24 1807422349 ps
T24 /workspace/coverage/default/1.sram_ctrl_sec_cm.74795276 Mar 21 01:37:55 PM PDT 24 Mar 21 01:37:56 PM PDT 24 167481547 ps
T39 /workspace/coverage/default/40.sram_ctrl_lc_escalation.1306134507 Mar 21 01:41:46 PM PDT 24 Mar 21 01:41:57 PM PDT 24 5564236188 ps
T40 /workspace/coverage/default/8.sram_ctrl_max_throughput.78730417 Mar 21 01:38:39 PM PDT 24 Mar 21 01:39:56 PM PDT 24 2072711314 ps
T41 /workspace/coverage/default/6.sram_ctrl_bijection.1026336222 Mar 21 01:38:08 PM PDT 24 Mar 21 01:39:01 PM PDT 24 1581970543 ps
T42 /workspace/coverage/default/3.sram_ctrl_partial_access.1330951625 Mar 21 01:37:55 PM PDT 24 Mar 21 01:38:12 PM PDT 24 1014343174 ps
T43 /workspace/coverage/default/41.sram_ctrl_max_throughput.1207165327 Mar 21 01:41:46 PM PDT 24 Mar 21 01:42:21 PM PDT 24 318402528 ps
T44 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.3974061476 Mar 21 01:39:45 PM PDT 24 Mar 21 01:54:26 PM PDT 24 6237988376 ps
T36 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2891168015 Mar 21 01:42:06 PM PDT 24 Mar 21 01:42:06 PM PDT 24 26777212 ps
T45 /workspace/coverage/default/18.sram_ctrl_regwen.1222386291 Mar 21 01:39:09 PM PDT 24 Mar 21 01:46:51 PM PDT 24 9824173249 ps
T46 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3971117046 Mar 21 01:38:12 PM PDT 24 Mar 21 01:58:49 PM PDT 24 36129033476 ps
T103 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.314150363 Mar 21 01:38:40 PM PDT 24 Mar 21 01:42:16 PM PDT 24 3068993213 ps
T192 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.430138891 Mar 21 01:38:17 PM PDT 24 Mar 21 01:44:40 PM PDT 24 14512174241 ps
T149 /workspace/coverage/default/28.sram_ctrl_max_throughput.3313211054 Mar 21 01:40:14 PM PDT 24 Mar 21 01:40:17 PM PDT 24 185792557 ps
T193 /workspace/coverage/default/5.sram_ctrl_ram_cfg.3460444206 Mar 21 01:38:06 PM PDT 24 Mar 21 01:38:08 PM PDT 24 80515545 ps
T194 /workspace/coverage/default/9.sram_ctrl_max_throughput.2777044358 Mar 21 01:38:39 PM PDT 24 Mar 21 01:39:45 PM PDT 24 435221991 ps
T195 /workspace/coverage/default/21.sram_ctrl_ram_cfg.4092284580 Mar 21 01:39:43 PM PDT 24 Mar 21 01:39:45 PM PDT 24 82752613 ps
T173 /workspace/coverage/default/8.sram_ctrl_bijection.965681946 Mar 21 01:38:41 PM PDT 24 Mar 21 01:39:28 PM PDT 24 4549046757 ps
T196 /workspace/coverage/default/44.sram_ctrl_smoke.126535811 Mar 21 01:42:13 PM PDT 24 Mar 21 01:44:11 PM PDT 24 136737029 ps
T28 /workspace/coverage/default/39.sram_ctrl_regwen.3480020649 Mar 21 01:41:29 PM PDT 24 Mar 21 01:54:04 PM PDT 24 21422746200 ps
T21 /workspace/coverage/default/1.sram_ctrl_alert_test.3867205427 Mar 21 01:37:55 PM PDT 24 Mar 21 01:37:56 PM PDT 24 37448247 ps
T171 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.246233513 Mar 21 01:42:06 PM PDT 24 Mar 21 01:43:57 PM PDT 24 7009724272 ps
T197 /workspace/coverage/default/16.sram_ctrl_smoke.2822288036 Mar 21 01:39:01 PM PDT 24 Mar 21 01:39:18 PM PDT 24 1978014763 ps
T198 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3188758780 Mar 21 01:39:42 PM PDT 24 Mar 21 01:39:46 PM PDT 24 93238473 ps
T22 /workspace/coverage/default/0.sram_ctrl_alert_test.530310303 Mar 21 01:37:55 PM PDT 24 Mar 21 01:37:56 PM PDT 24 11281588 ps
T199 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.535815213 Mar 21 01:39:57 PM PDT 24 Mar 21 01:54:55 PM PDT 24 18764916885 ps
T34 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3214964907 Mar 21 01:42:25 PM PDT 24 Mar 21 01:42:31 PM PDT 24 604919661 ps
T200 /workspace/coverage/default/2.sram_ctrl_smoke.1126568852 Mar 21 01:38:05 PM PDT 24 Mar 21 01:38:46 PM PDT 24 433989613 ps
T155 /workspace/coverage/default/41.sram_ctrl_stress_all.2426972225 Mar 21 01:42:09 PM PDT 24 Mar 21 02:11:39 PM PDT 24 24104527660 ps
T144 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3329642204 Mar 21 01:41:05 PM PDT 24 Mar 21 01:46:26 PM PDT 24 55667121352 ps
T201 /workspace/coverage/default/0.sram_ctrl_lc_escalation.3621393000 Mar 21 01:37:54 PM PDT 24 Mar 21 01:37:57 PM PDT 24 300134866 ps
T202 /workspace/coverage/default/31.sram_ctrl_smoke.3974493578 Mar 21 01:40:32 PM PDT 24 Mar 21 01:41:21 PM PDT 24 410979073 ps
T203 /workspace/coverage/default/8.sram_ctrl_partial_access.1752180092 Mar 21 01:38:38 PM PDT 24 Mar 21 01:38:57 PM PDT 24 4072300016 ps
T204 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1654160971 Mar 21 01:39:05 PM PDT 24 Mar 21 01:39:11 PM PDT 24 379785348 ps
T205 /workspace/coverage/default/4.sram_ctrl_alert_test.2610602310 Mar 21 01:38:09 PM PDT 24 Mar 21 01:38:10 PM PDT 24 23500570 ps
T206 /workspace/coverage/default/46.sram_ctrl_bijection.720215202 Mar 21 01:42:24 PM PDT 24 Mar 21 01:43:15 PM PDT 24 14520204462 ps
T207 /workspace/coverage/default/48.sram_ctrl_alert_test.4095121378 Mar 21 01:42:57 PM PDT 24 Mar 21 01:42:58 PM PDT 24 13344460 ps
T165 /workspace/coverage/default/10.sram_ctrl_stress_all.675131752 Mar 21 01:38:53 PM PDT 24 Mar 21 02:21:00 PM PDT 24 6828237340 ps
T35 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.834235085 Mar 21 01:42:54 PM PDT 24 Mar 21 01:43:28 PM PDT 24 3040091784 ps
T143 /workspace/coverage/default/13.sram_ctrl_regwen.3431549267 Mar 21 01:38:57 PM PDT 24 Mar 21 01:39:30 PM PDT 24 2047621294 ps
T25 /workspace/coverage/default/0.sram_ctrl_sec_cm.1174629494 Mar 21 01:38:06 PM PDT 24 Mar 21 01:38:08 PM PDT 24 222621913 ps
T208 /workspace/coverage/default/28.sram_ctrl_multiple_keys.553699792 Mar 21 01:40:06 PM PDT 24 Mar 21 01:51:12 PM PDT 24 8352362715 ps
T209 /workspace/coverage/default/20.sram_ctrl_regwen.1079613462 Mar 21 01:39:30 PM PDT 24 Mar 21 01:53:16 PM PDT 24 5677232010 ps
T210 /workspace/coverage/default/25.sram_ctrl_smoke.1642827915 Mar 21 01:39:56 PM PDT 24 Mar 21 01:40:28 PM PDT 24 187839353 ps
T211 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.160716153 Mar 21 01:41:20 PM PDT 24 Mar 21 01:48:43 PM PDT 24 7958669198 ps
T142 /workspace/coverage/default/24.sram_ctrl_regwen.2529461093 Mar 21 01:39:58 PM PDT 24 Mar 21 01:55:56 PM PDT 24 10069437043 ps
T212 /workspace/coverage/default/5.sram_ctrl_smoke.2649894529 Mar 21 01:38:05 PM PDT 24 Mar 21 01:38:18 PM PDT 24 1289451596 ps
T213 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.209263175 Mar 21 01:39:14 PM PDT 24 Mar 21 01:43:32 PM PDT 24 23364990131 ps
T49 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2147216444 Mar 21 01:42:37 PM PDT 24 Mar 21 01:51:10 PM PDT 24 4835813447 ps
T214 /workspace/coverage/default/43.sram_ctrl_max_throughput.2323745029 Mar 21 01:42:11 PM PDT 24 Mar 21 01:44:42 PM PDT 24 138124592 ps
T215 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.1196995213 Mar 21 01:39:08 PM PDT 24 Mar 21 01:43:23 PM PDT 24 12123701368 ps
T216 /workspace/coverage/default/28.sram_ctrl_partial_access.3228404513 Mar 21 01:40:07 PM PDT 24 Mar 21 01:40:12 PM PDT 24 108496735 ps
T169 /workspace/coverage/default/19.sram_ctrl_regwen.3408808241 Mar 21 01:39:18 PM PDT 24 Mar 21 01:43:26 PM PDT 24 17075256286 ps
T217 /workspace/coverage/default/18.sram_ctrl_alert_test.2469735617 Mar 21 01:39:08 PM PDT 24 Mar 21 01:39:09 PM PDT 24 11608304 ps
T50 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1065386418 Mar 21 01:41:33 PM PDT 24 Mar 21 01:42:56 PM PDT 24 5044120542 ps
T218 /workspace/coverage/default/37.sram_ctrl_bijection.2444674060 Mar 21 01:41:17 PM PDT 24 Mar 21 01:42:24 PM PDT 24 4108016270 ps
T219 /workspace/coverage/default/22.sram_ctrl_smoke.4291251064 Mar 21 01:39:45 PM PDT 24 Mar 21 01:40:01 PM PDT 24 672756198 ps
T220 /workspace/coverage/default/12.sram_ctrl_multiple_keys.3811340155 Mar 21 01:38:54 PM PDT 24 Mar 21 01:44:28 PM PDT 24 639205521 ps
T145 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1303890901 Mar 21 01:39:07 PM PDT 24 Mar 21 01:42:52 PM PDT 24 43669484745 ps
T221 /workspace/coverage/default/12.sram_ctrl_smoke.14887059 Mar 21 01:38:58 PM PDT 24 Mar 21 01:39:15 PM PDT 24 1855121390 ps
T222 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2243503868 Mar 21 01:39:00 PM PDT 24 Mar 21 01:39:03 PM PDT 24 89014412 ps
T223 /workspace/coverage/default/7.sram_ctrl_ram_cfg.3116737270 Mar 21 01:38:18 PM PDT 24 Mar 21 01:38:19 PM PDT 24 30572392 ps
T224 /workspace/coverage/default/26.sram_ctrl_stress_all.4107309323 Mar 21 01:40:06 PM PDT 24 Mar 21 02:31:08 PM PDT 24 35178017404 ps
T225 /workspace/coverage/default/26.sram_ctrl_executable.143036189 Mar 21 01:39:58 PM PDT 24 Mar 21 01:43:07 PM PDT 24 3822207240 ps
T226 /workspace/coverage/default/36.sram_ctrl_alert_test.1848490838 Mar 21 01:41:18 PM PDT 24 Mar 21 01:41:19 PM PDT 24 16795058 ps
T227 /workspace/coverage/default/31.sram_ctrl_multiple_keys.2680385793 Mar 21 01:40:31 PM PDT 24 Mar 21 01:57:21 PM PDT 24 8636579464 ps
T228 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.633565402 Mar 21 01:38:07 PM PDT 24 Mar 21 01:43:02 PM PDT 24 14640197810 ps
T229 /workspace/coverage/default/29.sram_ctrl_multiple_keys.2715553271 Mar 21 01:40:16 PM PDT 24 Mar 21 01:58:43 PM PDT 24 16006893703 ps
T230 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.85701304 Mar 21 01:37:55 PM PDT 24 Mar 21 01:41:22 PM PDT 24 8405712990 ps
T231 /workspace/coverage/default/26.sram_ctrl_max_throughput.2590771532 Mar 21 01:39:56 PM PDT 24 Mar 21 01:41:19 PM PDT 24 332799248 ps
T232 /workspace/coverage/default/35.sram_ctrl_ram_cfg.3586758053 Mar 21 01:41:06 PM PDT 24 Mar 21 01:41:07 PM PDT 24 28587672 ps
T233 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.46156381 Mar 21 01:42:26 PM PDT 24 Mar 21 01:43:06 PM PDT 24 389462028 ps
T234 /workspace/coverage/default/21.sram_ctrl_multiple_keys.565486106 Mar 21 01:39:30 PM PDT 24 Mar 21 02:04:16 PM PDT 24 8668748268 ps
T235 /workspace/coverage/default/41.sram_ctrl_multiple_keys.3655398065 Mar 21 01:41:52 PM PDT 24 Mar 21 01:57:59 PM PDT 24 12381274749 ps
T236 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2618167807 Mar 21 01:38:55 PM PDT 24 Mar 21 02:06:53 PM PDT 24 6172695922 ps
T237 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2408676305 Mar 21 01:39:57 PM PDT 24 Mar 21 01:39:59 PM PDT 24 40923104 ps
T238 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3940607303 Mar 21 01:38:42 PM PDT 24 Mar 21 01:45:12 PM PDT 24 15488502313 ps
T239 /workspace/coverage/default/48.sram_ctrl_smoke.3602685111 Mar 21 01:42:53 PM PDT 24 Mar 21 01:42:58 PM PDT 24 82704367 ps
T240 /workspace/coverage/default/22.sram_ctrl_regwen.1811185234 Mar 21 01:39:45 PM PDT 24 Mar 21 01:53:51 PM PDT 24 20760549787 ps
T160 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.909819970 Mar 21 01:42:53 PM PDT 24 Mar 21 01:54:17 PM PDT 24 7332681715 ps
T241 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.758361051 Mar 21 01:38:59 PM PDT 24 Mar 21 01:57:15 PM PDT 24 11146792115 ps
T242 /workspace/coverage/default/34.sram_ctrl_ram_cfg.826319643 Mar 21 01:41:13 PM PDT 24 Mar 21 01:41:14 PM PDT 24 26043365 ps
T243 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.1447466192 Mar 21 01:42:53 PM PDT 24 Mar 21 01:42:59 PM PDT 24 700263313 ps
T244 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3838428328 Mar 21 01:39:11 PM PDT 24 Mar 21 01:39:22 PM PDT 24 3149791940 ps
T245 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.3067611926 Mar 21 01:40:34 PM PDT 24 Mar 21 02:02:16 PM PDT 24 2705727168 ps
T246 /workspace/coverage/default/1.sram_ctrl_smoke.4164969544 Mar 21 01:37:57 PM PDT 24 Mar 21 01:38:02 PM PDT 24 350682715 ps
T247 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.2160632365 Mar 21 01:39:06 PM PDT 24 Mar 21 02:05:07 PM PDT 24 19626315706 ps
T248 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.1543385297 Mar 21 01:37:54 PM PDT 24 Mar 21 01:46:04 PM PDT 24 24918639270 ps
T249 /workspace/coverage/default/21.sram_ctrl_partial_access.2792582920 Mar 21 01:39:32 PM PDT 24 Mar 21 01:39:33 PM PDT 24 129791840 ps
T250 /workspace/coverage/default/28.sram_ctrl_mem_walk.3942720345 Mar 21 01:40:19 PM PDT 24 Mar 21 01:40:24 PM PDT 24 461958410 ps
T251 /workspace/coverage/default/12.sram_ctrl_max_throughput.1710849535 Mar 21 01:38:55 PM PDT 24 Mar 21 01:39:10 PM PDT 24 607407352 ps
T252 /workspace/coverage/default/41.sram_ctrl_alert_test.1902348113 Mar 21 01:42:06 PM PDT 24 Mar 21 01:42:06 PM PDT 24 27463988 ps
T253 /workspace/coverage/default/35.sram_ctrl_lc_escalation.942881207 Mar 21 01:41:05 PM PDT 24 Mar 21 01:41:08 PM PDT 24 239615800 ps
T254 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.835803625 Mar 21 01:41:05 PM PDT 24 Mar 21 01:41:08 PM PDT 24 172274779 ps
T150 /workspace/coverage/default/7.sram_ctrl_regwen.4012741449 Mar 21 01:38:18 PM PDT 24 Mar 21 01:52:12 PM PDT 24 1917670278 ps
T158 /workspace/coverage/default/27.sram_ctrl_lc_escalation.3105977431 Mar 21 01:40:07 PM PDT 24 Mar 21 01:40:11 PM PDT 24 778432848 ps
T255 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1772351743 Mar 21 01:37:59 PM PDT 24 Mar 21 01:39:06 PM PDT 24 124631750 ps
T256 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.1131151009 Mar 21 01:42:08 PM PDT 24 Mar 21 01:42:11 PM PDT 24 97669273 ps
T257 /workspace/coverage/default/17.sram_ctrl_bijection.1806096297 Mar 21 01:39:09 PM PDT 24 Mar 21 01:40:17 PM PDT 24 4089608450 ps
T258 /workspace/coverage/default/5.sram_ctrl_regwen.1041535066 Mar 21 01:38:06 PM PDT 24 Mar 21 01:53:57 PM PDT 24 6250996930 ps
T259 /workspace/coverage/default/49.sram_ctrl_executable.4051888334 Mar 21 01:43:09 PM PDT 24 Mar 21 01:55:27 PM PDT 24 6026029317 ps
T260 /workspace/coverage/default/47.sram_ctrl_lc_escalation.3156087324 Mar 21 01:42:45 PM PDT 24 Mar 21 01:42:47 PM PDT 24 605495335 ps
T261 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.4261416831 Mar 21 01:37:57 PM PDT 24 Mar 21 01:37:59 PM PDT 24 45578383 ps
T262 /workspace/coverage/default/34.sram_ctrl_smoke.283707223 Mar 21 01:41:06 PM PDT 24 Mar 21 01:41:09 PM PDT 24 51489620 ps
T263 /workspace/coverage/default/36.sram_ctrl_lc_escalation.3991447002 Mar 21 01:41:23 PM PDT 24 Mar 21 01:41:29 PM PDT 24 440951453 ps
T264 /workspace/coverage/default/49.sram_ctrl_regwen.1664300674 Mar 21 01:43:12 PM PDT 24 Mar 21 01:48:25 PM PDT 24 26079233383 ps
T265 /workspace/coverage/default/18.sram_ctrl_max_throughput.2362965166 Mar 21 01:39:08 PM PDT 24 Mar 21 01:39:25 PM PDT 24 288360034 ps
T266 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.999825166 Mar 21 01:39:43 PM PDT 24 Mar 21 01:48:03 PM PDT 24 8712174616 ps
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T309 /workspace/coverage/default/26.sram_ctrl_partial_access.1801889377 Mar 21 01:39:57 PM PDT 24 Mar 21 01:39:58 PM PDT 24 170758919 ps
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T51 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2981174679 Mar 21 01:42:20 PM PDT 24 Mar 21 01:54:19 PM PDT 24 2082613460 ps
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T313 /workspace/coverage/default/23.sram_ctrl_mem_walk.2950963943 Mar 21 01:39:44 PM PDT 24 Mar 21 01:39:53 PM PDT 24 617336968 ps
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