Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.08	99.81	96.99	100.00	100.00	98.57	99.70	98.52

Total tests in report: 1027

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
80.37	80.37	96.59	96.59	75.58	75.58	93.56	93.56	71.43	71.43	87.03	87.03	95.51	95.51	42.86	42.86	/workspace/coverage/default/6.sram_ctrl_access_during_key_req.949671446
90.15	9.79	98.34	1.75	84.68	9.09	96.67	3.11	100.00	28.57	95.10	8.07	95.81	0.30	60.48	17.63	/workspace/coverage/default/27.sram_ctrl_stress_all.3102770196
94.80	4.64	98.83	0.49	88.44	3.77	97.39	0.72	100.00	0.00	95.97	0.86	97.60	1.80	85.34	24.86	/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.4171063918
95.82	1.03	99.03	0.19	90.52	2.08	98.00	0.61	100.00	0.00	97.12	1.15	97.60	0.00	88.50	3.15	/workspace/coverage/default/32.sram_ctrl_stress_all.3276486088
96.81	0.99	99.22	0.19	91.17	0.65	98.21	0.21	100.00	0.00	97.98	0.86	97.60	0.00	93.51	5.01	/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1859177866
97.43	0.62	99.42	0.19	93.12	1.95	98.57	0.36	100.00	0.00	98.85	0.86	98.20	0.60	93.88	0.37	/workspace/coverage/default/0.sram_ctrl_sec_cm.2013155481
97.69	0.26	99.42	0.00	93.38	0.26	98.57	0.00	100.00	0.00	98.85	0.00	99.55	1.35	94.06	0.19	/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3627467084
97.93	0.24	99.71	0.29	93.77	0.39	99.03	0.46	100.00	0.00	98.85	0.00	99.55	0.00	94.62	0.56	/workspace/coverage/default/10.sram_ctrl_alert_test.791581453
98.11	0.18	99.71	0.00	93.77	0.00	99.03	0.00	100.00	0.00	98.85	0.00	99.70	0.15	95.73	1.11	/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2014306925
98.24	0.13	99.71	0.00	93.90	0.13	99.07	0.04	100.00	0.00	98.85	0.00	99.70	0.00	96.47	0.74	/workspace/coverage/default/46.sram_ctrl_regwen.2031840948
98.36	0.12	99.81	0.10	93.90	0.00	99.79	0.72	100.00	0.00	98.85	0.00	99.70	0.00	96.47	0.00	/workspace/coverage/default/17.sram_ctrl_ram_cfg.4115845153
98.46	0.11	99.81	0.00	93.90	0.00	99.79	0.00	100.00	0.00	98.85	0.00	99.70	0.00	97.22	0.74	/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3531298443
98.56	0.09	99.81	0.00	94.03	0.13	99.93	0.14	100.00	0.00	98.85	0.00	99.70	0.00	97.59	0.37	/workspace/coverage/default/45.sram_ctrl_stress_all.1193484362
98.61	0.05	99.81	0.00	94.03	0.00	99.93	0.00	100.00	0.00	98.85	0.00	99.70	0.00	97.96	0.37	/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.146535927
98.65	0.04	99.81	0.00	94.03	0.00	100.00	0.07	100.00	0.00	98.85	0.00	99.70	0.00	98.14	0.19	/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.803242435
98.67	0.03	99.81	0.00	94.03	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.33	0.19	/workspace/coverage/default/0.sram_ctrl_executable.1835891888
98.70	0.03	99.81	0.00	94.03	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.52	0.19	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2189524993
98.72	0.02	99.81	0.00	94.16	0.13	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.52	0.00	/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1457024875

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2474292896
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3407426190
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3915723893
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2293989787
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.226154006
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3207145935
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.812557141
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3662947361
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.215033077
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4048575469
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2614030905
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.233694614
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2869232226
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3195825497
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3953743942
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1036502361
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1956225028
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1083186380
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.635785326
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.742808279
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.265197997
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2735663222
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2512396675
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3616939230
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2731626679
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2834006684
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.183552821
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.155971348
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.442640366
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4010097659
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.876552027
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3147486247
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2581563744
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1309320151
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2323794785
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3884678261
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.658912275
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3489145411
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2000022255
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.895662694
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.107984902
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.294610702
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1115354926
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.563233444
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2735529278
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1591592196
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3268143038
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3027532722
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2749807681
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1132234135
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1606706028
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.529740171
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2848597346
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.825134095
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.637697803
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3603986870
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1856010856
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2571833057
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3848811919
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3970774657
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3168680524
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.949875310
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3723381841
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2154119379
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.4015846629
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1749260709
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2222157960
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1689961138
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4033945507
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.407829991
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2535176173
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2214355567
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1310360960
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3991258990
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2297317701
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3343181035
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1895085180
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2465179986
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1765686138
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1609575022
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.541223166
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2626857730
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1926739960
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3581353599
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3189120215
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1100006544
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3655280029
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3531154621
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1541800358
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2862136453
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3868161043
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1824892544
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.34133544
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.769675822
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.837155796
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1839957765
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3242727937
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3145264011
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3273954401
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2734096941
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4173401602
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2294883421
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.129829741
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2415866175
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2274716773
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1937688235
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2408713021
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3731320424
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3496965628
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1192188064
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.732009753
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.789157582
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1100329890
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.583176697
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3973087958
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2065642605
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3785225653
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1299996877
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2892443599
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.311408872
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1859795305
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.197406514
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.830652269
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2744837510
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3971094940
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2496532792
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3801825598
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3168337441
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.329417584
/workspace/coverage/default/0.sram_ctrl_alert_test.1027702631
/workspace/coverage/default/0.sram_ctrl_bijection.521642557
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1934343409
/workspace/coverage/default/0.sram_ctrl_max_throughput.3189058490
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2949890882
/workspace/coverage/default/0.sram_ctrl_mem_walk.2535981642
/workspace/coverage/default/0.sram_ctrl_multiple_keys.4165344892
/workspace/coverage/default/0.sram_ctrl_partial_access.1999288704
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.439008674
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2710817122
/workspace/coverage/default/0.sram_ctrl_regwen.597002299
/workspace/coverage/default/0.sram_ctrl_smoke.1913033499
/workspace/coverage/default/0.sram_ctrl_stress_all.529410761
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1608955484
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1784130740
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2352982429
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1435338686
/workspace/coverage/default/1.sram_ctrl_alert_test.3080150616
/workspace/coverage/default/1.sram_ctrl_bijection.1703912774
/workspace/coverage/default/1.sram_ctrl_executable.1071942534
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1994513491
/workspace/coverage/default/1.sram_ctrl_max_throughput.1272265340
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1555973560
/workspace/coverage/default/1.sram_ctrl_mem_walk.4238692026
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3697610116
/workspace/coverage/default/1.sram_ctrl_partial_access.2591256692
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2859411569
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2996262918
/workspace/coverage/default/1.sram_ctrl_regwen.4000690167
/workspace/coverage/default/1.sram_ctrl_sec_cm.1936284946
/workspace/coverage/default/1.sram_ctrl_smoke.3133067936
/workspace/coverage/default/1.sram_ctrl_stress_all.1116425034
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1707395837
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4258625440
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3874064595
/workspace/coverage/default/10.sram_ctrl_bijection.3624766512
/workspace/coverage/default/10.sram_ctrl_executable.3791827024
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1445661290
/workspace/coverage/default/10.sram_ctrl_max_throughput.862325878
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3843356338
/workspace/coverage/default/10.sram_ctrl_mem_walk.1244420914
/workspace/coverage/default/10.sram_ctrl_multiple_keys.284839456
/workspace/coverage/default/10.sram_ctrl_partial_access.3279257325
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.805095361
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3780088560
/workspace/coverage/default/10.sram_ctrl_regwen.1432988682
/workspace/coverage/default/10.sram_ctrl_smoke.410493431
/workspace/coverage/default/10.sram_ctrl_stress_all.501078658
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1432794398
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3277765219
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1045776553
/workspace/coverage/default/11.sram_ctrl_alert_test.1811629036
/workspace/coverage/default/11.sram_ctrl_bijection.3694172623
/workspace/coverage/default/11.sram_ctrl_executable.2133111105
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3773630922
/workspace/coverage/default/11.sram_ctrl_max_throughput.2057614977
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.4251433279
/workspace/coverage/default/11.sram_ctrl_mem_walk.406443401
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1057853918
/workspace/coverage/default/11.sram_ctrl_partial_access.3571893130
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3491125084
/workspace/coverage/default/11.sram_ctrl_ram_cfg.737244139
/workspace/coverage/default/11.sram_ctrl_regwen.2472314674
/workspace/coverage/default/11.sram_ctrl_smoke.4099646837
/workspace/coverage/default/11.sram_ctrl_stress_all.1200504094
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3318955659
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3208345977
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3838389673
/workspace/coverage/default/12.sram_ctrl_alert_test.420311965
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/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2795186731
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.855756218
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1119041058
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3657508694
/workspace/coverage/default/43.sram_ctrl_alert_test.2822489766
/workspace/coverage/default/43.sram_ctrl_bijection.508143782
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3652616222
/workspace/coverage/default/43.sram_ctrl_max_throughput.314510609
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2789119608
/workspace/coverage/default/43.sram_ctrl_mem_walk.4135923489
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3935758135
/workspace/coverage/default/43.sram_ctrl_partial_access.2571802564
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.4138538386
/workspace/coverage/default/43.sram_ctrl_ram_cfg.23548567
/workspace/coverage/default/43.sram_ctrl_regwen.3109834139
/workspace/coverage/default/43.sram_ctrl_smoke.1758985872
/workspace/coverage/default/43.sram_ctrl_stress_all.2716757120
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2190006618
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1866217272
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3825009979
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.718658144
/workspace/coverage/default/44.sram_ctrl_alert_test.2259190970
/workspace/coverage/default/44.sram_ctrl_bijection.4112225157
/workspace/coverage/default/44.sram_ctrl_executable.3578865889
/workspace/coverage/default/44.sram_ctrl_lc_escalation.495759806
/workspace/coverage/default/44.sram_ctrl_max_throughput.4127847291
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4268297835
/workspace/coverage/default/44.sram_ctrl_mem_walk.1055817501
/workspace/coverage/default/44.sram_ctrl_multiple_keys.109639974
/workspace/coverage/default/44.sram_ctrl_partial_access.4030835448
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3893622819
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2338594765
/workspace/coverage/default/44.sram_ctrl_regwen.383254930
/workspace/coverage/default/44.sram_ctrl_smoke.572132875
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.979674988
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3999108832
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2791359100
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3153661497
/workspace/coverage/default/45.sram_ctrl_alert_test.2124888238
/workspace/coverage/default/45.sram_ctrl_bijection.2515647085
/workspace/coverage/default/45.sram_ctrl_executable.832117762
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1152293321
/workspace/coverage/default/45.sram_ctrl_max_throughput.68284615
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1591872042
/workspace/coverage/default/45.sram_ctrl_mem_walk.2095086157
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1961595891
/workspace/coverage/default/45.sram_ctrl_partial_access.2841286374
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2362599392
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1155476291
/workspace/coverage/default/45.sram_ctrl_regwen.1729596524
/workspace/coverage/default/45.sram_ctrl_smoke.893116146
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2451905793
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.693893430
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2372111846
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3867283762
/workspace/coverage/default/46.sram_ctrl_alert_test.3089823891
/workspace/coverage/default/46.sram_ctrl_bijection.1569013289
/workspace/coverage/default/46.sram_ctrl_executable.558624763
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3979301075
/workspace/coverage/default/46.sram_ctrl_max_throughput.2252391404
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3286077643
/workspace/coverage/default/46.sram_ctrl_mem_walk.2660591639
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2725849058
/workspace/coverage/default/46.sram_ctrl_partial_access.671780144
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4011701604
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3905630773
/workspace/coverage/default/46.sram_ctrl_smoke.3734565678
/workspace/coverage/default/46.sram_ctrl_stress_all.3394609727
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2445020063
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3289484722
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1362928613
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3176413435
/workspace/coverage/default/47.sram_ctrl_alert_test.299853415
/workspace/coverage/default/47.sram_ctrl_bijection.4141530282
/workspace/coverage/default/47.sram_ctrl_executable.3393664690
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3056624840
/workspace/coverage/default/47.sram_ctrl_max_throughput.2934642749
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.255445889
/workspace/coverage/default/47.sram_ctrl_mem_walk.1856152933
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3906966607
/workspace/coverage/default/47.sram_ctrl_partial_access.901964083
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2974073723
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1956192439
/workspace/coverage/default/47.sram_ctrl_regwen.2096452022
/workspace/coverage/default/47.sram_ctrl_smoke.3461587752
/workspace/coverage/default/47.sram_ctrl_stress_all.3723466252
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3489882975
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2910501085
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4008034791
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1102988698
/workspace/coverage/default/48.sram_ctrl_alert_test.1252214643
/workspace/coverage/default/48.sram_ctrl_bijection.1978824858
/workspace/coverage/default/48.sram_ctrl_executable.3154629191
/workspace/coverage/default/48.sram_ctrl_lc_escalation.546290117
/workspace/coverage/default/48.sram_ctrl_max_throughput.1781841516
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2405908552
/workspace/coverage/default/48.sram_ctrl_mem_walk.367011036
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2320453313
/workspace/coverage/default/48.sram_ctrl_partial_access.3849678075
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3357153980
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1348112413
/workspace/coverage/default/48.sram_ctrl_regwen.1399612817
/workspace/coverage/default/48.sram_ctrl_smoke.1176221130
/workspace/coverage/default/48.sram_ctrl_stress_all.3214948849
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.473589849
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.4276827317
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1718841147
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3934756134
/workspace/coverage/default/49.sram_ctrl_alert_test.2264901013
/workspace/coverage/default/49.sram_ctrl_bijection.2568195468
/workspace/coverage/default/49.sram_ctrl_executable.4190916580
/workspace/coverage/default/49.sram_ctrl_lc_escalation.125883875
/workspace/coverage/default/49.sram_ctrl_max_throughput.1739870161
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2228265801
/workspace/coverage/default/49.sram_ctrl_mem_walk.185125083
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2760328273
/workspace/coverage/default/49.sram_ctrl_partial_access.530065116
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1048392140
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2394714577
/workspace/coverage/default/49.sram_ctrl_regwen.3941658447
/workspace/coverage/default/49.sram_ctrl_smoke.3735537071
/workspace/coverage/default/49.sram_ctrl_stress_all.1644424769
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3729414557
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.643755320
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1318345521
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3716828107
/workspace/coverage/default/5.sram_ctrl_alert_test.2309627570
/workspace/coverage/default/5.sram_ctrl_bijection.2109943972
/workspace/coverage/default/5.sram_ctrl_executable.247333076
/workspace/coverage/default/5.sram_ctrl_lc_escalation.4072549266
/workspace/coverage/default/5.sram_ctrl_max_throughput.1122820405
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2617765520
/workspace/coverage/default/5.sram_ctrl_mem_walk.3963191292
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2857122664
/workspace/coverage/default/5.sram_ctrl_partial_access.3355057096
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1109970670
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1245907970
/workspace/coverage/default/5.sram_ctrl_regwen.558890902
/workspace/coverage/default/5.sram_ctrl_smoke.509384805
/workspace/coverage/default/5.sram_ctrl_stress_all.1363581197
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4129785196
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.4039260052
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2587166065
/workspace/coverage/default/6.sram_ctrl_alert_test.27742060
/workspace/coverage/default/6.sram_ctrl_bijection.50353150
/workspace/coverage/default/6.sram_ctrl_executable.4268664377
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2524239497
/workspace/coverage/default/6.sram_ctrl_max_throughput.2865331032
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.43217395
/workspace/coverage/default/6.sram_ctrl_mem_walk.3568216274
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2623774685
/workspace/coverage/default/6.sram_ctrl_partial_access.1437391701
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.786923198
/workspace/coverage/default/6.sram_ctrl_ram_cfg.563033771
/workspace/coverage/default/6.sram_ctrl_regwen.3545963011
/workspace/coverage/default/6.sram_ctrl_smoke.3164972804
/workspace/coverage/default/6.sram_ctrl_stress_all.987009336
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3548917586
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.535646723
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1796672039
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3641341036
/workspace/coverage/default/7.sram_ctrl_alert_test.2016888552
/workspace/coverage/default/7.sram_ctrl_bijection.15158374
/workspace/coverage/default/7.sram_ctrl_executable.3285856512
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3317636510
/workspace/coverage/default/7.sram_ctrl_max_throughput.992833015
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.287733471
/workspace/coverage/default/7.sram_ctrl_mem_walk.1438597399
/workspace/coverage/default/7.sram_ctrl_multiple_keys.80822916
/workspace/coverage/default/7.sram_ctrl_partial_access.413347480
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1140855884
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3157983003
/workspace/coverage/default/7.sram_ctrl_regwen.1968953887
/workspace/coverage/default/7.sram_ctrl_smoke.3554423365
/workspace/coverage/default/7.sram_ctrl_stress_all.1479046669
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3982363626
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.634889542
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2610226803
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1448878423
/workspace/coverage/default/8.sram_ctrl_alert_test.1239198321
/workspace/coverage/default/8.sram_ctrl_bijection.1678101443
/workspace/coverage/default/8.sram_ctrl_executable.3908157478
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3865703685
/workspace/coverage/default/8.sram_ctrl_max_throughput.2657073405
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3391608387
/workspace/coverage/default/8.sram_ctrl_mem_walk.1549405371
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1156672422
/workspace/coverage/default/8.sram_ctrl_partial_access.312771929
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1781399582
/workspace/coverage/default/8.sram_ctrl_ram_cfg.4139600766
/workspace/coverage/default/8.sram_ctrl_regwen.2504346688
/workspace/coverage/default/8.sram_ctrl_smoke.461197557
/workspace/coverage/default/8.sram_ctrl_stress_all.2526640430
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.4284507524
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3833663515
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1223139320
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1999507307
/workspace/coverage/default/9.sram_ctrl_alert_test.3779194789
/workspace/coverage/default/9.sram_ctrl_bijection.2015205431
/workspace/coverage/default/9.sram_ctrl_executable.3885325689
/workspace/coverage/default/9.sram_ctrl_lc_escalation.590001461
/workspace/coverage/default/9.sram_ctrl_max_throughput.3456473370
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.794326551
/workspace/coverage/default/9.sram_ctrl_mem_walk.3413725105
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2862805413
/workspace/coverage/default/9.sram_ctrl_partial_access.2523874978
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2977990465
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2477739987
/workspace/coverage/default/9.sram_ctrl_regwen.1108146733
/workspace/coverage/default/9.sram_ctrl_smoke.3417435962
/workspace/coverage/default/9.sram_ctrl_stress_all.2050748523
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2075336396
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.4076107255
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3667480163

Total test records in report: 1027

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2610226803	Apr 21 01:09:17 PM PDT 24	Apr 21 01:10:26 PM PDT 24	142895803 ps
T2	/workspace/coverage/default/25.sram_ctrl_smoke.409946109	Apr 21 01:11:10 PM PDT 24	Apr 21 01:11:12 PM PDT 24	44559624 ps
T3	/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3277765219	Apr 21 01:09:38 PM PDT 24	Apr 21 01:09:40 PM PDT 24	331331688 ps
T4	/workspace/coverage/default/35.sram_ctrl_mem_walk.2830284121	Apr 21 01:12:43 PM PDT 24	Apr 21 01:12:49 PM PDT 24	1166828991 ps
T5	/workspace/coverage/default/22.sram_ctrl_access_during_key_req.646241061	Apr 21 01:10:49 PM PDT 24	Apr 21 01:25:25 PM PDT 24	19939676169 ps
T10	/workspace/coverage/default/29.sram_ctrl_alert_test.679556216	Apr 21 01:11:47 PM PDT 24	Apr 21 01:11:48 PM PDT 24	12112501 ps
T6	/workspace/coverage/default/6.sram_ctrl_access_during_key_req.949671446	Apr 21 01:09:17 PM PDT 24	Apr 21 01:20:30 PM PDT 24	2747498095 ps
T11	/workspace/coverage/default/35.sram_ctrl_ram_cfg.2845085975	Apr 21 01:12:46 PM PDT 24	Apr 21 01:12:47 PM PDT 24	28832034 ps
T12	/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.677995234	Apr 21 01:10:55 PM PDT 24	Apr 21 01:14:11 PM PDT 24	93904721575 ps
T13	/workspace/coverage/default/20.sram_ctrl_bijection.3869844109	Apr 21 01:10:32 PM PDT 24	Apr 21 01:11:06 PM PDT 24	856868925 ps
T16	/workspace/coverage/default/42.sram_ctrl_bijection.3721433946	Apr 21 01:13:52 PM PDT 24	Apr 21 01:15:06 PM PDT 24	6837822036 ps
T17	/workspace/coverage/default/47.sram_ctrl_regwen.2096452022	Apr 21 01:14:58 PM PDT 24	Apr 21 01:23:45 PM PDT 24	6574479956 ps
T27	/workspace/coverage/default/4.sram_ctrl_ram_cfg.1607516202	Apr 21 01:09:10 PM PDT 24	Apr 21 01:09:11 PM PDT 24	108597879 ps
T14	/workspace/coverage/default/32.sram_ctrl_stress_all.3276486088	Apr 21 01:12:16 PM PDT 24	Apr 21 02:11:27 PM PDT 24	74424611371 ps
T7	/workspace/coverage/default/48.sram_ctrl_lc_escalation.546290117	Apr 21 01:15:04 PM PDT 24	Apr 21 01:15:13 PM PDT 24	1579873148 ps
T15	/workspace/coverage/default/48.sram_ctrl_multiple_keys.2320453313	Apr 21 01:15:00 PM PDT 24	Apr 21 01:30:23 PM PDT 24	34531313674 ps
T61	/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2742150228	Apr 21 01:13:18 PM PDT 24	Apr 21 01:13:21 PM PDT 24	1470707170 ps
T62	/workspace/coverage/default/29.sram_ctrl_bijection.654972057	Apr 21 01:11:37 PM PDT 24	Apr 21 01:12:20 PM PDT 24	2098243969 ps
T63	/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.798049269	Apr 21 01:09:06 PM PDT 24	Apr 21 01:10:34 PM PDT 24	250549126 ps
T64	/workspace/coverage/default/36.sram_ctrl_multiple_keys.2646521454	Apr 21 01:12:50 PM PDT 24	Apr 21 01:26:47 PM PDT 24	16820576220 ps
T65	/workspace/coverage/default/19.sram_ctrl_max_throughput.2404810843	Apr 21 01:10:23 PM PDT 24	Apr 21 01:11:39 PM PDT 24	244164289 ps
T8	/workspace/coverage/default/27.sram_ctrl_stress_all.3102770196	Apr 21 01:11:24 PM PDT 24	Apr 21 01:55:45 PM PDT 24	43918128688 ps
T76	/workspace/coverage/default/7.sram_ctrl_smoke.3554423365	Apr 21 01:09:18 PM PDT 24	Apr 21 01:09:24 PM PDT 24	268590496 ps
T142	/workspace/coverage/default/1.sram_ctrl_bijection.1703912774	Apr 21 01:09:03 PM PDT 24	Apr 21 01:09:44 PM PDT 24	650396559 ps
T9	/workspace/coverage/default/44.sram_ctrl_lc_escalation.495759806	Apr 21 01:14:21 PM PDT 24	Apr 21 01:14:28 PM PDT 24	2949606033 ps
T21	/workspace/coverage/default/23.sram_ctrl_alert_test.883911580	Apr 21 01:10:56 PM PDT 24	Apr 21 01:10:57 PM PDT 24	30346421 ps
T28	/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.397345685	Apr 21 01:13:16 PM PDT 24	Apr 21 01:15:12 PM PDT 24	4755580295 ps
T52	/workspace/coverage/default/11.sram_ctrl_regwen.2472314674	Apr 21 01:09:49 PM PDT 24	Apr 21 01:17:23 PM PDT 24	43973053681 ps
T44	/workspace/coverage/default/22.sram_ctrl_executable.2036067741	Apr 21 01:10:47 PM PDT 24	Apr 21 01:17:39 PM PDT 24	4933787770 ps
T53	/workspace/coverage/default/2.sram_ctrl_stress_pipeline.447622302	Apr 21 01:09:08 PM PDT 24	Apr 21 01:13:49 PM PDT 24	3126547423 ps
T54	/workspace/coverage/default/9.sram_ctrl_bijection.2015205431	Apr 21 01:09:33 PM PDT 24	Apr 21 01:10:33 PM PDT 24	957465683 ps
T25	/workspace/coverage/default/45.sram_ctrl_lc_escalation.1152293321	Apr 21 01:14:31 PM PDT 24	Apr 21 01:14:37 PM PDT 24	1345372186 ps
T55	/workspace/coverage/default/16.sram_ctrl_mem_walk.2777301550	Apr 21 01:10:10 PM PDT 24	Apr 21 01:10:16 PM PDT 24	1748527891 ps
T56	/workspace/coverage/default/32.sram_ctrl_max_throughput.3939378390	Apr 21 01:12:07 PM PDT 24	Apr 21 01:14:14 PM PDT 24	140606590 ps
T57	/workspace/coverage/default/32.sram_ctrl_multiple_keys.4097019813	Apr 21 01:12:06 PM PDT 24	Apr 21 01:21:43 PM PDT 24	19418229523 ps
T58	/workspace/coverage/default/21.sram_ctrl_mem_walk.1182104424	Apr 21 01:10:41 PM PDT 24	Apr 21 01:10:45 PM PDT 24	281719136 ps
T147	/workspace/coverage/default/5.sram_ctrl_bijection.2109943972	Apr 21 01:09:11 PM PDT 24	Apr 21 01:09:33 PM PDT 24	1981610684 ps
T31	/workspace/coverage/default/30.sram_ctrl_ram_cfg.2753006206	Apr 21 01:11:51 PM PDT 24	Apr 21 01:11:52 PM PDT 24	95621218 ps
T43	/workspace/coverage/default/42.sram_ctrl_access_during_key_req.3710780960	Apr 21 01:13:59 PM PDT 24	Apr 21 01:30:55 PM PDT 24	8528513379 ps
T83	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1493029913	Apr 21 01:09:51 PM PDT 24	Apr 21 01:14:34 PM PDT 24	830734052 ps
T59	/workspace/coverage/default/46.sram_ctrl_stress_all.3394609727	Apr 21 01:14:52 PM PDT 24	Apr 21 01:33:53 PM PDT 24	56655156065 ps
T26	/workspace/coverage/default/8.sram_ctrl_stress_all.2526640430	Apr 21 01:09:33 PM PDT 24	Apr 21 01:33:19 PM PDT 24	226041473992 ps
T146	/workspace/coverage/default/16.sram_ctrl_max_throughput.3882462294	Apr 21 01:10:10 PM PDT 24	Apr 21 01:10:50 PM PDT 24	564294348 ps
T22	/workspace/coverage/default/35.sram_ctrl_alert_test.3594103585	Apr 21 01:12:45 PM PDT 24	Apr 21 01:12:46 PM PDT 24	38709703 ps
T99	/workspace/coverage/default/27.sram_ctrl_stress_pipeline.4221310072	Apr 21 01:11:18 PM PDT 24	Apr 21 01:16:47 PM PDT 24	6897982551 ps
T148	/workspace/coverage/default/27.sram_ctrl_max_throughput.2365424034	Apr 21 01:11:17 PM PDT 24	Apr 21 01:11:36 PM PDT 24	701436970 ps
T149	/workspace/coverage/default/8.sram_ctrl_smoke.461197557	Apr 21 01:09:28 PM PDT 24	Apr 21 01:09:31 PM PDT 24	124480499 ps
T84	/workspace/coverage/default/6.sram_ctrl_mem_partial_access.43217395	Apr 21 01:09:17 PM PDT 24	Apr 21 01:09:19 PM PDT 24	155921757 ps
T150	/workspace/coverage/default/46.sram_ctrl_partial_access.671780144	Apr 21 01:14:38 PM PDT 24	Apr 21 01:14:52 PM PDT 24	8166963730 ps
T100	/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3848040019	Apr 21 01:12:11 PM PDT 24	Apr 21 01:17:38 PM PDT 24	14258982678 ps
T60	/workspace/coverage/default/49.sram_ctrl_stress_all.1644424769	Apr 21 01:15:23 PM PDT 24	Apr 21 01:51:06 PM PDT 24	145753111335 ps
T151	/workspace/coverage/default/49.sram_ctrl_partial_access.530065116	Apr 21 01:15:17 PM PDT 24	Apr 21 01:15:57 PM PDT 24	272640791 ps
T133	/workspace/coverage/default/12.sram_ctrl_executable.1749685280	Apr 21 01:09:47 PM PDT 24	Apr 21 01:10:16 PM PDT 24	2666198562 ps
T152	/workspace/coverage/default/4.sram_ctrl_regwen.3036447964	Apr 21 01:09:10 PM PDT 24	Apr 21 01:15:02 PM PDT 24	6181426588 ps
T153	/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3115592605	Apr 21 01:10:56 PM PDT 24	Apr 21 01:11:15 PM PDT 24	181509632 ps
T101	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2189524993	Apr 21 01:09:47 PM PDT 24	Apr 21 01:14:50 PM PDT 24	3437696798 ps
T154	/workspace/coverage/default/2.sram_ctrl_smoke.1087582516	Apr 21 01:09:05 PM PDT 24	Apr 21 01:09:28 PM PDT 24	2462957945 ps
T23	/workspace/coverage/default/14.sram_ctrl_regwen.4237960986	Apr 21 01:10:04 PM PDT 24	Apr 21 01:32:41 PM PDT 24	14811466776 ps
T155	/workspace/coverage/default/22.sram_ctrl_alert_test.2754947063	Apr 21 01:10:46 PM PDT 24	Apr 21 01:10:47 PM PDT 24	50755856 ps
T144	/workspace/coverage/default/16.sram_ctrl_smoke.2090963639	Apr 21 01:10:04 PM PDT 24	Apr 21 01:10:10 PM PDT 24	226060403 ps
T156	/workspace/coverage/default/1.sram_ctrl_alert_test.3080150616	Apr 21 01:09:01 PM PDT 24	Apr 21 01:09:02 PM PDT 24	33537500 ps
T157	/workspace/coverage/default/24.sram_ctrl_lc_escalation.2069422786	Apr 21 01:11:00 PM PDT 24	Apr 21 01:11:02 PM PDT 24	349447917 ps
T29	/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.4171063918	Apr 21 01:11:35 PM PDT 24	Apr 21 01:11:44 PM PDT 24	1023752140 ps
T115	/workspace/coverage/default/38.sram_ctrl_mem_walk.935785031	Apr 21 01:13:16 PM PDT 24	Apr 21 01:13:25 PM PDT 24	1986339409 ps
T85	/workspace/coverage/default/37.sram_ctrl_access_during_key_req.1046526283	Apr 21 01:13:06 PM PDT 24	Apr 21 01:13:44 PM PDT 24	208804573 ps
T116	/workspace/coverage/default/40.sram_ctrl_mem_walk.4062009952	Apr 21 01:13:43 PM PDT 24	Apr 21 01:13:52 PM PDT 24	1754325891 ps
T117	/workspace/coverage/default/25.sram_ctrl_executable.3912659126	Apr 21 01:11:04 PM PDT 24	Apr 21 01:18:15 PM PDT 24	9573479796 ps
T86	/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1633272776	Apr 21 01:13:48 PM PDT 24	Apr 21 01:20:43 PM PDT 24	6744310515 ps
T24	/workspace/coverage/default/47.sram_ctrl_stress_all.3723466252	Apr 21 01:15:02 PM PDT 24	Apr 21 01:38:28 PM PDT 24	126741684292 ps
T118	/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2881375443	Apr 21 01:10:35 PM PDT 24	Apr 21 01:10:43 PM PDT 24	237303382 ps
T119	/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3380517497	Apr 21 01:10:07 PM PDT 24	Apr 21 01:10:09 PM PDT 24	78561398 ps
T87	/workspace/coverage/default/16.sram_ctrl_access_during_key_req.788170879	Apr 21 01:10:09 PM PDT 24	Apr 21 01:19:54 PM PDT 24	7412402203 ps
T134	/workspace/coverage/default/0.sram_ctrl_regwen.597002299	Apr 21 01:08:58 PM PDT 24	Apr 21 01:26:17 PM PDT 24	9942210674 ps
T145	/workspace/coverage/default/31.sram_ctrl_regwen.3004415755	Apr 21 01:12:02 PM PDT 24	Apr 21 01:15:48 PM PDT 24	3702642609 ps
T102	/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1458423811	Apr 21 01:10:15 PM PDT 24	Apr 21 01:14:02 PM PDT 24	14045448443 ps
T135	/workspace/coverage/default/25.sram_ctrl_stress_all.2203134268	Apr 21 01:11:08 PM PDT 24	Apr 21 01:42:51 PM PDT 24	142286326656 ps
T88	/workspace/coverage/default/4.sram_ctrl_mem_partial_access.1570900756	Apr 21 01:09:11 PM PDT 24	Apr 21 01:09:17 PM PDT 24	1122048711 ps
T158	/workspace/coverage/default/18.sram_ctrl_smoke.475621424	Apr 21 01:10:18 PM PDT 24	Apr 21 01:10:20 PM PDT 24	349850906 ps
T159	/workspace/coverage/default/28.sram_ctrl_ram_cfg.865281752	Apr 21 01:11:32 PM PDT 24	Apr 21 01:11:33 PM PDT 24	57271840 ps
T160	/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3874064595	Apr 21 01:09:39 PM PDT 24	Apr 21 01:20:37 PM PDT 24	10670989765 ps
T161	/workspace/coverage/default/39.sram_ctrl_mem_walk.2019814081	Apr 21 01:13:29 PM PDT 24	Apr 21 01:13:40 PM PDT 24	724341840 ps
T162	/workspace/coverage/default/11.sram_ctrl_lc_escalation.3773630922	Apr 21 01:09:48 PM PDT 24	Apr 21 01:09:57 PM PDT 24	814864479 ps
T163	/workspace/coverage/default/11.sram_ctrl_max_throughput.2057614977	Apr 21 01:09:46 PM PDT 24	Apr 21 01:09:52 PM PDT 24	60379270 ps
T164	/workspace/coverage/default/2.sram_ctrl_alert_test.2186808104	Apr 21 01:09:06 PM PDT 24	Apr 21 01:09:07 PM PDT 24	38581486 ps
T139	/workspace/coverage/default/36.sram_ctrl_stress_all.625941722	Apr 21 01:12:55 PM PDT 24	Apr 21 01:30:28 PM PDT 24	196269492690 ps
T136	/workspace/coverage/default/46.sram_ctrl_regwen.2031840948	Apr 21 01:14:46 PM PDT 24	Apr 21 01:37:25 PM PDT 24	17053599577 ps
T141	/workspace/coverage/default/34.sram_ctrl_lc_escalation.2041975797	Apr 21 01:12:32 PM PDT 24	Apr 21 01:12:36 PM PDT 24	1509143784 ps
T138	/workspace/coverage/default/14.sram_ctrl_stress_all.3747251914	Apr 21 01:10:02 PM PDT 24	Apr 21 01:53:15 PM PDT 24	55089358266 ps
T137	/workspace/coverage/default/24.sram_ctrl_mem_partial_access.2362461405	Apr 21 01:11:05 PM PDT 24	Apr 21 01:11:08 PM PDT 24	97561265 ps
T165	/workspace/coverage/default/3.sram_ctrl_lc_escalation.991216518	Apr 21 01:09:08 PM PDT 24	Apr 21 01:09:11 PM PDT 24	112781413 ps
T166	/workspace/coverage/default/43.sram_ctrl_mem_walk.4135923489	Apr 21 01:14:16 PM PDT 24	Apr 21 01:14:22 PM PDT 24	1146676468 ps
T167	/workspace/coverage/default/10.sram_ctrl_alert_test.791581453	Apr 21 01:09:47 PM PDT 24	Apr 21 01:09:48 PM PDT 24	27088391 ps
T103	/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2014306925	Apr 21 01:11:12 PM PDT 24	Apr 21 01:16:11 PM PDT 24	26903110841 ps
T104	/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2081843839	Apr 21 01:12:18 PM PDT 24	Apr 21 01:16:48 PM PDT 24	7461150976 ps
T168	/workspace/coverage/default/11.sram_ctrl_stress_all.1200504094	Apr 21 01:09:46 PM PDT 24	Apr 21 03:33:57 PM PDT 24	40049161990 ps
T169	/workspace/coverage/default/42.sram_ctrl_stress_pipeline.855756218	Apr 21 01:13:54 PM PDT 24	Apr 21 01:18:14 PM PDT 24	5912068727 ps
T170	/workspace/coverage/default/26.sram_ctrl_partial_access.1503888957	Apr 21 01:11:13 PM PDT 24	Apr 21 01:11:29 PM PDT 24	345731039 ps
T171	/workspace/coverage/default/23.sram_ctrl_mem_walk.2173136873	Apr 21 01:10:53 PM PDT 24	Apr 21 01:10:58 PM PDT 24	350273326 ps
T172	/workspace/coverage/default/7.sram_ctrl_mem_partial_access.287733471	Apr 21 01:09:25 PM PDT 24	Apr 21 01:09:28 PM PDT 24	171692416 ps
T173	/workspace/coverage/default/43.sram_ctrl_alert_test.2822489766	Apr 21 01:14:17 PM PDT 24	Apr 21 01:14:18 PM PDT 24	16007538 ps
T174	/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.4205679692	Apr 21 01:13:09 PM PDT 24	Apr 21 01:13:49 PM PDT 24	459666727 ps
T175	/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2190157209	Apr 21 01:11:23 PM PDT 24	Apr 21 01:11:26 PM PDT 24	344289174 ps
T176	/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3672982447	Apr 21 01:11:44 PM PDT 24	Apr 21 01:11:47 PM PDT 24	148528561 ps
T177	/workspace/coverage/default/19.sram_ctrl_alert_test.3234356929	Apr 21 01:10:29 PM PDT 24	Apr 21 01:10:30 PM PDT 24	34719983 ps
T178	/workspace/coverage/default/26.sram_ctrl_mem_walk.1803604229	Apr 21 01:11:18 PM PDT 24	Apr 21 01:11:28 PM PDT 24	2405909320 ps
T179	/workspace/coverage/default/31.sram_ctrl_lc_escalation.2658381330	Apr 21 01:12:01 PM PDT 24	Apr 21 01:12:05 PM PDT 24	313216422 ps
T180	/workspace/coverage/default/28.sram_ctrl_max_throughput.3237883381	Apr 21 01:11:30 PM PDT 24	Apr 21 01:12:24 PM PDT 24	227403841 ps
T181	/workspace/coverage/default/30.sram_ctrl_executable.2818743816	Apr 21 01:11:47 PM PDT 24	Apr 21 01:27:45 PM PDT 24	3933678241 ps
T182	/workspace/coverage/default/15.sram_ctrl_multiple_keys.3519409568	Apr 21 01:10:04 PM PDT 24	Apr 21 01:21:35 PM PDT 24	1268841627 ps
T183	/workspace/coverage/default/47.sram_ctrl_multiple_keys.3906966607	Apr 21 01:14:51 PM PDT 24	Apr 21 01:17:45 PM PDT 24	1951079073 ps
T184	/workspace/coverage/default/24.sram_ctrl_executable.2225289126	Apr 21 01:10:59 PM PDT 24	Apr 21 01:25:25 PM PDT 24	46432849953 ps
T185	/workspace/coverage/default/17.sram_ctrl_max_throughput.3110809269	Apr 21 01:10:14 PM PDT 24	Apr 21 01:10:51 PM PDT 24	180323008 ps
T186	/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.3878436006	Apr 21 01:11:04 PM PDT 24	Apr 21 01:12:45 PM PDT 24	610666925 ps
T187	/workspace/coverage/default/22.sram_ctrl_stress_pipeline.823194884	Apr 21 01:10:44 PM PDT 24	Apr 21 01:15:18 PM PDT 24	2948514252 ps
T188	/workspace/coverage/default/0.sram_ctrl_stress_all.529410761	Apr 21 01:08:57 PM PDT 24	Apr 21 01:31:52 PM PDT 24	72100596171 ps
T189	/workspace/coverage/default/4.sram_ctrl_alert_test.579691801	Apr 21 01:09:11 PM PDT 24	Apr 21 01:09:12 PM PDT 24	44562181 ps
T190	/workspace/coverage/default/34.sram_ctrl_bijection.527654835	Apr 21 01:12:24 PM PDT 24	Apr 21 01:12:55 PM PDT 24	2052152132 ps
T191	/workspace/coverage/default/27.sram_ctrl_bijection.3145679318	Apr 21 01:11:19 PM PDT 24	Apr 21 01:11:51 PM PDT 24	1027293079 ps
T192	/workspace/coverage/default/3.sram_ctrl_stress_all.583458536	Apr 21 01:09:09 PM PDT 24	Apr 21 01:52:20 PM PDT 24	72218604177 ps
T193	/workspace/coverage/default/40.sram_ctrl_stress_all.1606125624	Apr 21 01:13:40 PM PDT 24	Apr 21 01:38:16 PM PDT 24	122952913579 ps
T194	/workspace/coverage/default/46.sram_ctrl_bijection.1569013289	Apr 21 01:14:38 PM PDT 24	Apr 21 01:15:40 PM PDT 24	1460142332 ps
T195	/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2696969113	Apr 21 01:10:04 PM PDT 24	Apr 21 01:10:08 PM PDT 24	105542729 ps
T196	/workspace/coverage/default/37.sram_ctrl_mem_partial_access.757670575	Apr 21 01:13:06 PM PDT 24	Apr 21 01:13:09 PM PDT 24	166880813 ps
T197	/workspace/coverage/default/4.sram_ctrl_executable.1673358088	Apr 21 01:09:09 PM PDT 24	Apr 21 01:13:10 PM PDT 24	4029352400 ps
T143	/workspace/coverage/default/45.sram_ctrl_stress_all.1193484362	Apr 21 01:14:34 PM PDT 24	Apr 21 01:36:12 PM PDT 24	24516971512 ps
T198	/workspace/coverage/default/47.sram_ctrl_lc_escalation.3056624840	Apr 21 01:14:54 PM PDT 24	Apr 21 01:15:02 PM PDT 24	5500802848 ps
T199	/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2468340574	Apr 21 01:09:04 PM PDT 24	Apr 21 01:09:20 PM PDT 24	175700980 ps
T200	/workspace/coverage/default/26.sram_ctrl_smoke.1068919810	Apr 21 01:11:09 PM PDT 24	Apr 21 01:11:49 PM PDT 24	114972743 ps
T201	/workspace/coverage/default/8.sram_ctrl_max_throughput.2657073405	Apr 21 01:09:31 PM PDT 24	Apr 21 01:10:49 PM PDT 24	128271265 ps
T140	/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2100573002	Apr 21 01:09:08 PM PDT 24	Apr 21 01:12:14 PM PDT 24	17090089026 ps
T30	/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3001260784	Apr 21 01:11:12 PM PDT 24	Apr 21 01:12:39 PM PDT 24	4206963747 ps
T202	/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2085706927	Apr 21 01:12:36 PM PDT 24	Apr 21 01:16:45 PM PDT 24	2725874500 ps
T203	/workspace/coverage/default/48.sram_ctrl_stress_pipeline.4276827317	Apr 21 01:15:04 PM PDT 24	Apr 21 01:19:04 PM PDT 24	10188580406 ps
T204	/workspace/coverage/default/49.sram_ctrl_ram_cfg.2394714577	Apr 21 01:15:25 PM PDT 24	Apr 21 01:15:27 PM PDT 24	36552198 ps
T205	/workspace/coverage/default/26.sram_ctrl_alert_test.1766393822	Apr 21 01:11:18 PM PDT 24	Apr 21 01:11:19 PM PDT 24	23627572 ps
T206	/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2779339451	Apr 21 01:11:20 PM PDT 24	Apr 21 01:11:38 PM PDT 24	112956999 ps
T207	/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.911286357	Apr 21 01:11:47 PM PDT 24	Apr 21 01:12:06 PM PDT 24	167486937 ps
T45	/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2052414501	Apr 21 01:11:54 PM PDT 24	Apr 21 01:19:14 PM PDT 24	7926895210 ps
T208	/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3736661987	Apr 21 01:10:05 PM PDT 24	Apr 21 01:13:00 PM PDT 24	2293280462 ps
T209	/workspace/coverage/default/35.sram_ctrl_bijection.574803730	Apr 21 01:12:32 PM PDT 24	Apr 21 01:13:31 PM PDT 24	1804919327 ps
T210	/workspace/coverage/default/20.sram_ctrl_partial_access.2470390795	Apr 21 01:10:33 PM PDT 24	Apr 21 01:11:04 PM PDT 24	391658318 ps
T211	/workspace/coverage/default/9.sram_ctrl_lc_escalation.590001461	Apr 21 01:09:36 PM PDT 24	Apr 21 01:09:44 PM PDT 24	1062661334 ps
T212	/workspace/coverage/default/32.sram_ctrl_mem_partial_access.642620900	Apr 21 01:12:14 PM PDT 24	Apr 21 01:12:16 PM PDT 24	57884592 ps
T213	/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1432794398	Apr 21 01:09:39 PM PDT 24	Apr 21 01:14:32 PM PDT 24	6478659640 ps
T214	/workspace/coverage/default/30.sram_ctrl_mem_partial_access.1523589457	Apr 21 01:11:51 PM PDT 24	Apr 21 01:11:54 PM PDT 24	182897977 ps
T215	/workspace/coverage/default/3.sram_ctrl_smoke.994977085	Apr 21 01:09:04 PM PDT 24	Apr 21 01:09:19 PM PDT 24	1561733658 ps
T216	/workspace/coverage/default/15.sram_ctrl_stress_pipeline.1062949478	Apr 21 01:10:05 PM PDT 24	Apr 21 01:15:32 PM PDT 24	3505684380 ps
T217	/workspace/coverage/default/43.sram_ctrl_max_throughput.314510609	Apr 21 01:14:13 PM PDT 24	Apr 21 01:14:26 PM PDT 24	99906593 ps
T218	/workspace/coverage/default/35.sram_ctrl_regwen.1984474377	Apr 21 01:12:39 PM PDT 24	Apr 21 01:18:26 PM PDT 24	2610867478 ps
T219	/workspace/coverage/default/5.sram_ctrl_smoke.509384805	Apr 21 01:09:09 PM PDT 24	Apr 21 01:09:27 PM PDT 24	1102828052 ps
T220	/workspace/coverage/default/7.sram_ctrl_bijection.15158374	Apr 21 01:09:19 PM PDT 24	Apr 21 01:10:34 PM PDT 24	4642130007 ps
T221	/workspace/coverage/default/31.sram_ctrl_executable.2420237924	Apr 21 01:12:00 PM PDT 24	Apr 21 01:22:25 PM PDT 24	9295064739 ps
T46	/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1842023454	Apr 21 01:10:56 PM PDT 24	Apr 21 01:12:25 PM PDT 24	5400790060 ps
T222	/workspace/coverage/default/4.sram_ctrl_partial_access.2822099966	Apr 21 01:09:08 PM PDT 24	Apr 21 01:09:15 PM PDT 24	344863506 ps
T223	/workspace/coverage/default/22.sram_ctrl_stress_all.4284511406	Apr 21 01:10:46 PM PDT 24	Apr 21 01:12:00 PM PDT 24	2070953932 ps
T224	/workspace/coverage/default/27.sram_ctrl_mem_walk.286357257	Apr 21 01:11:25 PM PDT 24	Apr 21 01:11:31 PM PDT 24	2210766925 ps
T225	/workspace/coverage/default/41.sram_ctrl_ram_cfg.61755549	Apr 21 01:13:47 PM PDT 24	Apr 21 01:13:48 PM PDT 24	121576676 ps
T226	/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.999986140	Apr 21 01:11:17 PM PDT 24	Apr 21 01:11:28 PM PDT 24	73677040 ps
T227	/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.2130959921	Apr 21 01:12:20 PM PDT 24	Apr 21 01:12:29 PM PDT 24	267309442 ps
T228	/workspace/coverage/default/17.sram_ctrl_ram_cfg.4115845153	Apr 21 01:10:16 PM PDT 24	Apr 21 01:10:17 PM PDT 24	35256571 ps
T229	/workspace/coverage/default/2.sram_ctrl_access_during_key_req.1599052537	Apr 21 01:09:04 PM PDT 24	Apr 21 01:17:01 PM PDT 24	6621190427 ps
T230	/workspace/coverage/default/4.sram_ctrl_smoke.2056789170	Apr 21 01:09:06 PM PDT 24	Apr 21 01:10:48 PM PDT 24	1993016938 ps
T231	/workspace/coverage/default/2.sram_ctrl_regwen.198239872	Apr 21 01:09:08 PM PDT 24	Apr 21 01:24:44 PM PDT 24	33336536386 ps
T232	/workspace/coverage/default/0.sram_ctrl_multiple_keys.4165344892	Apr 21 01:08:54 PM PDT 24	Apr 21 01:25:39 PM PDT 24	11496166274 ps
T47	/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3548917586	Apr 21 01:09:16 PM PDT 24	Apr 21 01:09:26 PM PDT 24	1606167466 ps
T233	/workspace/coverage/default/21.sram_ctrl_executable.3047256697	Apr 21 01:10:37 PM PDT 24	Apr 21 01:25:08 PM PDT 24	12776745604 ps
T234	/workspace/coverage/default/49.sram_ctrl_regwen.3941658447	Apr 21 01:15:26 PM PDT 24	Apr 21 01:29:53 PM PDT 24	64953484830 ps
T235	/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3357153980	Apr 21 01:15:04 PM PDT 24	Apr 21 01:20:52 PM PDT 24	8726460058 ps
T236	/workspace/coverage/default/24.sram_ctrl_stress_pipeline.4164636172	Apr 21 01:10:56 PM PDT 24	Apr 21 01:15:19 PM PDT 24	11297130845 ps
T237	/workspace/coverage/default/33.sram_ctrl_access_during_key_req.3686991418	Apr 21 01:12:18 PM PDT 24	Apr 21 01:14:00 PM PDT 24	290702255 ps
T238	/workspace/coverage/default/30.sram_ctrl_bijection.2785755253	Apr 21 01:11:44 PM PDT 24	Apr 21 01:12:59 PM PDT 24	20114751084 ps
T239	/workspace/coverage/default/31.sram_ctrl_stress_all.4046416153	Apr 21 01:12:06 PM PDT 24	Apr 21 01:54:45 PM PDT 24	615957956153 ps
T240	/workspace/coverage/default/26.sram_ctrl_max_throughput.3767191491	Apr 21 01:11:17 PM PDT 24	Apr 21 01:12:31 PM PDT 24	1615803463 ps
T241	/workspace/coverage/default/41.sram_ctrl_stress_pipeline.3939210184	Apr 21 01:13:41 PM PDT 24	Apr 21 01:18:16 PM PDT 24	6046953137 ps
T242	/workspace/coverage/default/6.sram_ctrl_alert_test.27742060	Apr 21 01:09:15 PM PDT 24	Apr 21 01:09:16 PM PDT 24	43020324 ps
T243	/workspace/coverage/default/23.sram_ctrl_multiple_keys.4287505018	Apr 21 01:10:47 PM PDT 24	Apr 21 01:33:46 PM PDT 24	28500495366 ps
T244	/workspace/coverage/default/33.sram_ctrl_regwen.179990953	Apr 21 01:12:17 PM PDT 24	Apr 21 01:16:13 PM PDT 24	47515911667 ps
T245	/workspace/coverage/default/0.sram_ctrl_smoke.1913033499	Apr 21 01:08:53 PM PDT 24	Apr 21 01:09:00 PM PDT 24	621706597 ps
T246	/workspace/coverage/default/6.sram_ctrl_max_throughput.2865331032	Apr 21 01:09:15 PM PDT 24	Apr 21 01:09:36 PM PDT 24	321347384 ps
T247	/workspace/coverage/default/25.sram_ctrl_regwen.1214510141	Apr 21 01:11:07 PM PDT 24	Apr 21 01:26:14 PM PDT 24	14347843358 ps
T248	/workspace/coverage/default/41.sram_ctrl_smoke.1312778260	Apr 21 01:13:41 PM PDT 24	Apr 21 01:13:43 PM PDT 24	76171261 ps
T249	/workspace/coverage/default/12.sram_ctrl_lc_escalation.673598360	Apr 21 01:09:47 PM PDT 24	Apr 21 01:09:50 PM PDT 24	185854171 ps
T250	/workspace/coverage/default/10.sram_ctrl_partial_access.3279257325	Apr 21 01:09:39 PM PDT 24	Apr 21 01:09:46 PM PDT 24	485658670 ps
T251	/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2679044025	Apr 21 01:12:30 PM PDT 24	Apr 21 01:12:34 PM PDT 24	158487301 ps
T252	/workspace/coverage/default/40.sram_ctrl_multiple_keys.2207570154	Apr 21 01:13:31 PM PDT 24	Apr 21 01:30:45 PM PDT 24	59691586350 ps
T253	/workspace/coverage/default/20.sram_ctrl_multiple_keys.1438424397	Apr 21 01:10:33 PM PDT 24	Apr 21 01:18:21 PM PDT 24	9000987912 ps
T254	/workspace/coverage/default/8.sram_ctrl_lc_escalation.3865703685	Apr 21 01:09:32 PM PDT 24	Apr 21 01:09:35 PM PDT 24	114846412 ps
T255	/workspace/coverage/default/13.sram_ctrl_partial_access.3419359895	Apr 21 01:10:03 PM PDT 24	Apr 21 01:10:23 PM PDT 24	10407170243 ps
T256	/workspace/coverage/default/19.sram_ctrl_stress_all.3550800814	Apr 21 01:11:03 PM PDT 24	Apr 21 01:16:01 PM PDT 24	6643797084 ps
T257	/workspace/coverage/default/18.sram_ctrl_mem_walk.1175086047	Apr 21 01:10:22 PM PDT 24	Apr 21 01:10:32 PM PDT 24	4431744519 ps
T258	/workspace/coverage/default/3.sram_ctrl_mem_partial_access.2420445327	Apr 21 01:09:10 PM PDT 24	Apr 21 01:09:13 PM PDT 24	435626934 ps
T259	/workspace/coverage/default/32.sram_ctrl_bijection.2842883491	Apr 21 01:12:05 PM PDT 24	Apr 21 01:12:52 PM PDT 24	5120543101 ps
T260	/workspace/coverage/default/44.sram_ctrl_max_throughput.4127847291	Apr 21 01:14:21 PM PDT 24	Apr 21 01:15:46 PM PDT 24	122398759 ps
T48	/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3489882975	Apr 21 01:14:58 PM PDT 24	Apr 21 01:18:26 PM PDT 24	4601488025 ps
T261	/workspace/coverage/default/2.sram_ctrl_mem_partial_access.3955094314	Apr 21 01:09:09 PM PDT 24	Apr 21 01:09:12 PM PDT 24	112029782 ps
T262	/workspace/coverage/default/3.sram_ctrl_partial_access.1828644676	Apr 21 01:09:05 PM PDT 24	Apr 21 01:09:07 PM PDT 24	81720263 ps
T263	/workspace/coverage/default/4.sram_ctrl_stress_all.1158431436	Apr 21 01:09:12 PM PDT 24	Apr 21 01:45:59 PM PDT 24	76810606619 ps
T264	/workspace/coverage/default/26.sram_ctrl_regwen.2179651434	Apr 21 01:11:17 PM PDT 24	Apr 21 01:22:15 PM PDT 24	37765128542 ps
T265	/workspace/coverage/default/22.sram_ctrl_smoke.3167216171	Apr 21 01:10:44 PM PDT 24	Apr 21 01:10:55 PM PDT 24	290350741 ps
T266	/workspace/coverage/default/35.sram_ctrl_max_throughput.2726916935	Apr 21 01:12:39 PM PDT 24	Apr 21 01:13:17 PM PDT 24	388496183 ps
T267	/workspace/coverage/default/39.sram_ctrl_max_throughput.880237028	Apr 21 01:13:22 PM PDT 24	Apr 21 01:13:25 PM PDT 24	46141167 ps
T268	/workspace/coverage/default/19.sram_ctrl_mem_partial_access.175991848	Apr 21 01:10:30 PM PDT 24	Apr 21 01:10:33 PM PDT 24	46404325 ps
T49	/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.300658699	Apr 21 01:10:21 PM PDT 24	Apr 21 01:17:55 PM PDT 24	1631078123 ps
T269	/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2617765520	Apr 21 01:09:13 PM PDT 24	Apr 21 01:09:18 PM PDT 24	1131460953 ps
T270	/workspace/coverage/default/43.sram_ctrl_multiple_keys.3935758135	Apr 21 01:14:10 PM PDT 24	Apr 21 01:17:24 PM PDT 24	1055091726 ps
T271	/workspace/coverage/default/28.sram_ctrl_alert_test.1376270304	Apr 21 01:11:36 PM PDT 24	Apr 21 01:11:37 PM PDT 24	32094960 ps
T272	/workspace/coverage/default/32.sram_ctrl_smoke.3375971042	Apr 21 01:12:08 PM PDT 24	Apr 21 01:12:09 PM PDT 24	82886810 ps
T273	/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1223139320	Apr 21 01:09:31 PM PDT 24	Apr 21 01:09:48 PM PDT 24	354621780 ps
T274	/workspace/coverage/default/25.sram_ctrl_lc_escalation.97130279	Apr 21 01:11:04 PM PDT 24	Apr 21 01:11:09 PM PDT 24	1719750631 ps
T275	/workspace/coverage/default/41.sram_ctrl_regwen.3144638652	Apr 21 01:13:49 PM PDT 24	Apr 21 01:31:53 PM PDT 24	29571906682 ps
T276	/workspace/coverage/default/49.sram_ctrl_smoke.3735537071	Apr 21 01:15:10 PM PDT 24	Apr 21 01:15:31 PM PDT 24	305584795 ps
T277	/workspace/coverage/default/43.sram_ctrl_lc_escalation.3652616222	Apr 21 01:14:12 PM PDT 24	Apr 21 01:14:20 PM PDT 24	564004583 ps
T278	/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1973209136	Apr 21 01:13:05 PM PDT 24	Apr 21 01:13:49 PM PDT 24	414911152 ps
T279	/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2949890882	Apr 21 01:09:00 PM PDT 24	Apr 21 01:09:03 PM PDT 24	917014754 ps
T280	/workspace/coverage/default/14.sram_ctrl_max_throughput.3146372881	Apr 21 01:10:03 PM PDT 24	Apr 21 01:11:37 PM PDT 24	163566242 ps
T281	/workspace/coverage/default/49.sram_ctrl_alert_test.2264901013	Apr 21 01:15:25 PM PDT 24	Apr 21 01:15:26 PM PDT 24	31753001 ps
T282	/workspace/coverage/default/8.sram_ctrl_multiple_keys.1156672422	Apr 21 01:09:26 PM PDT 24	Apr 21 01:30:26 PM PDT 24	3285105105 ps
T283	/workspace/coverage/default/0.sram_ctrl_executable.1835891888	Apr 21 01:09:01 PM PDT 24	Apr 21 01:22:45 PM PDT 24	56300277171 ps
T284	/workspace/coverage/default/25.sram_ctrl_mem_walk.1083326173	Apr 21 01:11:07 PM PDT 24	Apr 21 01:11:12 PM PDT 24	599422016 ps
T285	/workspace/coverage/default/29.sram_ctrl_regwen.2781692969	Apr 21 01:11:44 PM PDT 24	Apr 21 01:34:45 PM PDT 24	10470781784 ps
T286	/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3208345977	Apr 21 01:09:42 PM PDT 24	Apr 21 01:10:02 PM PDT 24	342645220 ps
T287	/workspace/coverage/default/41.sram_ctrl_mem_walk.845455660	Apr 21 01:13:51 PM PDT 24	Apr 21 01:14:01 PM PDT 24	659218138 ps
T288	/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.4109309509	Apr 21 01:11:29 PM PDT 24	Apr 21 01:12:03 PM PDT 24	108715529 ps
T289	/workspace/coverage/default/21.sram_ctrl_max_throughput.623893845	Apr 21 01:10:43 PM PDT 24	Apr 21 01:11:32 PM PDT 24	120116019 ps
T290	/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3061627259	Apr 21 01:10:17 PM PDT 24	Apr 21 01:10:22 PM PDT 24	276756924 ps
T291	/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1534251401	Apr 21 01:09:06 PM PDT 24	Apr 21 01:13:12 PM PDT 24	5618374298 ps
T292	/workspace/coverage/default/18.sram_ctrl_lc_escalation.3903170247	Apr 21 01:10:21 PM PDT 24	Apr 21 01:10:22 PM PDT 24	251176652 ps
T293	/workspace/coverage/default/46.sram_ctrl_max_throughput.2252391404	Apr 21 01:14:38 PM PDT 24	Apr 21 01:16:46 PM PDT 24	528238576 ps
T50	/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1272356641	Apr 21 01:10:47 PM PDT 24	Apr 21 01:19:50 PM PDT 24	953223730 ps
T294	/workspace/coverage/default/32.sram_ctrl_mem_walk.3062817848	Apr 21 01:12:16 PM PDT 24	Apr 21 01:12:21 PM PDT 24	1300626085 ps
T295	/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3289484722	Apr 21 01:14:40 PM PDT 24	Apr 21 01:18:24 PM PDT 24	9534969273 ps
T296	/workspace/coverage/default/9.sram_ctrl_executable.3885325689	Apr 21 01:09:37 PM PDT 24	Apr 21 01:22:45 PM PDT 24	28455573661 ps
T297	/workspace/coverage/default/0.sram_ctrl_bijection.521642557	Apr 21 01:08:56 PM PDT 24	Apr 21 01:09:19 PM PDT 24	358765079 ps
T298	/workspace/coverage/default/29.sram_ctrl_access_during_key_req.2855361496	Apr 21 01:11:44 PM PDT 24	Apr 21 01:25:16 PM PDT 24	22071694238 ps
T299	/workspace/coverage/default/27.sram_ctrl_regwen.3028832267	Apr 21 01:11:20 PM PDT 24	Apr 21 01:22:06 PM PDT 24	5204186976 ps
T300	/workspace/coverage/default/36.sram_ctrl_alert_test.1242058958	Apr 21 01:12:56 PM PDT 24	Apr 21 01:12:57 PM PDT 24	15494213 ps
T301	/workspace/coverage/default/18.sram_ctrl_max_throughput.3065482233	Apr 21 01:10:18 PM PDT 24	Apr 21 01:10:27 PM PDT 24	609199737 ps
T302	/workspace/coverage/default/8.sram_ctrl_partial_access.312771929	Apr 21 01:09:31 PM PDT 24	Apr 21 01:10:27 PM PDT 24	688584092 ps
T303	/workspace/coverage/default/28.sram_ctrl_mem_walk.2602539885	Apr 21 01:11:33 PM PDT 24	Apr 21 01:11:41 PM PDT 24	141890636 ps
T304	/workspace/coverage/default/45.sram_ctrl_alert_test.2124888238	Apr 21 01:14:37 PM PDT 24	Apr 21 01:14:38 PM PDT 24	20882988 ps
T51	/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3982363626	Apr 21 01:09:27 PM PDT 24	Apr 21 01:09:35 PM PDT 24	276374924 ps
T305	/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3884800965	Apr 21 01:10:38 PM PDT 24	Apr 21 01:14:21 PM PDT 24	9393943017 ps
T306	/workspace/coverage/default/1.sram_ctrl_mem_walk.4238692026	Apr 21 01:09:04 PM PDT 24	Apr 21 01:09:15 PM PDT 24	2269324980 ps
T307	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2616045220	Apr 21 01:13:43 PM PDT 24	Apr 21 01:13:48 PM PDT 24	612402212 ps
T308	/workspace/coverage/default/23.sram_ctrl_executable.3934472880	Apr 21 01:10:53 PM PDT 24	Apr 21 01:27:05 PM PDT 24	18871361915 ps
T309	/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.3855602755	Apr 21 01:13:45 PM PDT 24	Apr 21 01:20:10 PM PDT 24	11695985805 ps
T310	/workspace/coverage/default/2.sram_ctrl_executable.885188495	Apr 21 01:09:03 PM PDT 24	Apr 21 01:17:03 PM PDT 24	7302812008 ps
T311	/workspace/coverage/default/37.sram_ctrl_smoke.2585087584	Apr 21 01:12:53 PM PDT 24	Apr 21 01:13:03 PM PDT 24	2818674894 ps
T312	/workspace/coverage/default/36.sram_ctrl_access_during_key_req.1278636853	Apr 21 01:12:55 PM PDT 24	Apr 21 01:20:39 PM PDT 24	2213460076 ps
T313	/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3018859345	Apr 21 01:11:34 PM PDT 24	Apr 21 01:25:11 PM PDT 24	34027397715 ps