Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 13802597 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 58452272 1 T1 106 T2 134238 T3 1317



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 36020782 1 T1 851 T2 73927 T3 759
values[0x0] 16734661 1 T1 354 T2 35520 T3 330
values[0x1] 19499426 1 T1 744 T2 38261 T3 375



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 6879733 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 65375136 1 T1 890 T2 140957 T3 1395



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 264516 1 T1 5 T3 16 T4 8
valid_sources[0x01] 251149 1 T1 7 T3 7 T4 4
valid_sources[0x02] 290568 1 T1 3 T3 12 T4 8
valid_sources[0x03] 253452 1 T1 11 T3 3 T4 6
valid_sources[0x04] 288317 1 T1 7 T4 10 T5 46
valid_sources[0x05] 259895 1 T1 7 T3 10 T4 7
valid_sources[0x06] 288362 1 T1 9 T2 5044 T3 7
valid_sources[0x07] 299604 1 T1 1 T3 3 T4 3
valid_sources[0x08] 321250 1 T1 6 T3 4 T4 14
valid_sources[0x09] 249086 1 T1 10 T3 13 T4 9
valid_sources[0x0a] 361248 1 T1 4 T3 4 T4 8
valid_sources[0x0b] 329536 1 T1 10 T3 1 T4 6
valid_sources[0x0c] 272999 1 T1 3 T3 8 T4 7
valid_sources[0x0d] 262340 1 T1 7 T3 15 T4 7
valid_sources[0x0e] 315272 1 T1 6 T3 1 T4 7
valid_sources[0x0f] 367078 1 T1 5 T3 2 T4 5
valid_sources[0x10] 257768 1 T1 5 T3 5 T4 9
valid_sources[0x11] 299613 1 T1 10 T4 8 T5 29
valid_sources[0x12] 270126 1 T1 9 T3 12 T4 16
valid_sources[0x13] 242849 1 T1 20 T4 8 T5 49
valid_sources[0x14] 275498 1 T1 7 T3 2 T4 9
valid_sources[0x15] 276915 1 T1 3 T3 1 T4 13
valid_sources[0x16] 260599 1 T1 7 T4 11 T5 17
valid_sources[0x17] 342678 1 T1 8 T3 4 T4 10
valid_sources[0x18] 362272 1 T1 17 T4 11 T5 63
valid_sources[0x19] 268775 1 T1 3 T3 4 T4 4
valid_sources[0x1a] 250187 1 T1 6 T3 1 T4 4
valid_sources[0x1b] 246852 1 T1 5 T3 2 T4 11
valid_sources[0x1c] 289342 1 T1 11 T3 5 T4 7
valid_sources[0x1d] 249940 1 T1 5 T4 5 T5 32
valid_sources[0x1e] 262587 1 T1 7 T3 8 T4 10
valid_sources[0x1f] 254161 1 T1 10 T3 8 T4 6
valid_sources[0x20] 258868 1 T1 7 T3 1 T4 11
valid_sources[0x21] 264168 1 T1 7 T4 4 T5 63
valid_sources[0x22] 260591 1 T1 3 T3 13 T4 9
valid_sources[0x23] 245919 1 T1 13 T3 9 T4 3
valid_sources[0x24] 243779 1 T1 6 T3 1 T4 4
valid_sources[0x25] 271692 1 T1 4 T3 14 T4 5
valid_sources[0x26] 297422 1 T1 5 T3 1 T4 13
valid_sources[0x27] 360031 1 T1 7 T3 1 T4 5
valid_sources[0x28] 251005 1 T1 7 T3 1 T4 8
valid_sources[0x29] 308058 1 T1 12 T3 8 T4 15
valid_sources[0x2a] 268209 1 T1 16 T3 1 T4 7
valid_sources[0x2b] 259591 1 T1 13 T3 5 T4 15
valid_sources[0x2c] 295817 1 T1 14 T3 8 T4 6
valid_sources[0x2d] 341741 1 T1 9 T3 5 T4 3
valid_sources[0x2e] 265543 1 T1 8 T4 10 T5 58
valid_sources[0x2f] 264084 1 T1 6 T4 3 T5 37
valid_sources[0x30] 289988 1 T1 5 T4 7 T5 21
valid_sources[0x31] 245237 1 T1 8 T3 4 T4 2
valid_sources[0x32] 306410 1 T1 6 T3 5 T4 11
valid_sources[0x33] 278382 1 T1 17 T3 16 T4 4
valid_sources[0x34] 296521 1 T1 3 T3 2 T4 9
valid_sources[0x35] 286618 1 T1 7 T3 17 T4 6
valid_sources[0x36] 251341 1 T1 5 T3 15 T4 9
valid_sources[0x37] 369810 1 T1 11 T3 12 T4 9
valid_sources[0x38] 306838 1 T1 1 T3 8 T4 16
valid_sources[0x39] 243759 1 T1 3 T3 4 T4 10
valid_sources[0x3a] 275769 1 T1 9 T2 25030 T3 25
valid_sources[0x3b] 312125 1 T1 9 T3 9 T4 7
valid_sources[0x3c] 284597 1 T1 3 T3 6 T4 3
valid_sources[0x3d] 315789 1 T1 5 T3 1 T4 5
valid_sources[0x3e] 314917 1 T1 14 T2 17923 T3 1
valid_sources[0x3f] 291496 1 T1 4 T3 2 T4 10
valid_sources[0x40] 253156 1 T1 7 T3 16 T4 4
valid_sources[0x41] 307710 1 T1 4 T3 6 T4 6
valid_sources[0x42] 273662 1 T1 2 T3 1 T4 12
valid_sources[0x43] 305044 1 T1 8 T2 33703 T3 6
valid_sources[0x44] 284531 1 T1 10 T4 10 T5 49
valid_sources[0x45] 280549 1 T1 6 T3 9 T4 6
valid_sources[0x46] 288003 1 T1 10 T2 599 T3 2
valid_sources[0x47] 270365 1 T1 6 T3 5 T4 7
valid_sources[0x48] 258984 1 T1 6 T4 13 T5 42
valid_sources[0x49] 292848 1 T1 4 T3 6 T4 10
valid_sources[0x4a] 268421 1 T1 8 T4 4 T5 36
valid_sources[0x4b] 304183 1 T1 8 T3 6 T4 8
valid_sources[0x4c] 258236 1 T1 12 T3 9 T4 14
valid_sources[0x4d] 261962 1 T1 5 T3 7 T4 12
valid_sources[0x4e] 248406 1 T1 4 T3 2 T4 9
valid_sources[0x4f] 281287 1 T1 13 T3 2 T4 3
valid_sources[0x50] 298997 1 T1 7 T3 7 T4 5
valid_sources[0x51] 293626 1 T1 3 T3 8 T4 4
valid_sources[0x52] 267975 1 T1 12 T3 2 T4 4
valid_sources[0x53] 321215 1 T1 4 T3 7 T4 6
valid_sources[0x54] 281882 1 T1 7 T3 16 T4 9
valid_sources[0x55] 288496 1 T1 3 T3 2 T4 6
valid_sources[0x56] 253926 1 T1 12 T3 16 T4 7
valid_sources[0x57] 295961 1 T1 11 T2 9226 T4 6
valid_sources[0x58] 280157 1 T1 9 T3 4 T4 5
valid_sources[0x59] 271612 1 T1 7 T3 2 T4 8
valid_sources[0x5a] 243866 1 T1 4 T3 13 T4 6
valid_sources[0x5b] 273611 1 T1 6 T3 22 T4 7
valid_sources[0x5c] 293813 1 T1 12 T3 7 T4 6
valid_sources[0x5d] 260379 1 T1 4 T3 9 T4 5
valid_sources[0x5e] 396847 1 T1 5 T3 8 T4 9
valid_sources[0x5f] 277714 1 T1 9 T3 7 T4 7
valid_sources[0x60] 342263 1 T1 8 T3 15 T4 5
valid_sources[0x61] 264353 1 T1 19 T3 5 T4 5
valid_sources[0x62] 283390 1 T1 2 T3 12 T4 10
valid_sources[0x63] 252784 1 T1 4 T3 1 T4 11
valid_sources[0x64] 258014 1 T1 7 T3 9 T4 8
valid_sources[0x65] 264148 1 T1 5 T3 5 T4 5
valid_sources[0x66] 262470 1 T1 14 T3 8 T4 5
valid_sources[0x67] 287566 1 T1 6 T3 1 T4 14
valid_sources[0x68] 352714 1 T1 13 T4 7 T5 42
valid_sources[0x69] 259978 1 T1 8 T3 9 T4 1
valid_sources[0x6a] 269983 1 T1 6 T4 12 T5 33
valid_sources[0x6b] 312251 1 T1 10 T3 17 T4 3
valid_sources[0x6c] 302202 1 T1 10 T3 10 T4 6
valid_sources[0x6d] 243407 1 T1 7 T3 20 T4 6
valid_sources[0x6e] 260132 1 T1 10 T3 7 T4 8
valid_sources[0x6f] 251526 1 T1 9 T3 1 T4 8
valid_sources[0x70] 275223 1 T1 7 T3 11 T4 4
valid_sources[0x71] 262154 1 T1 6 T3 2 T4 12
valid_sources[0x72] 259263 1 T1 6 T3 2 T4 15
valid_sources[0x73] 271382 1 T1 14 T3 14 T4 13
valid_sources[0x74] 279639 1 T1 11 T4 5 T5 19
valid_sources[0x75] 270527 1 T1 3 T3 3 T4 10
valid_sources[0x76] 256760 1 T1 11 T4 6 T5 51
valid_sources[0x77] 276733 1 T1 8 T4 9 T5 38
valid_sources[0x78] 277062 1 T1 4 T3 11 T4 5
valid_sources[0x79] 248039 1 T1 10 T3 5 T4 20
valid_sources[0x7a] 256014 1 T1 2 T3 10 T4 1
valid_sources[0x7b] 245552 1 T1 4 T4 9 T5 21
valid_sources[0x7c] 281482 1 T1 11 T4 6 T5 36
valid_sources[0x7d] 311226 1 T1 8 T2 9636 T3 4
valid_sources[0x7e] 305275 1 T1 7 T2 22615 T3 2
valid_sources[0x7f] 286611 1 T1 6 T2 4913 T3 12
valid_sources[0x80] 263376 1 T1 4 T3 15 T4 12



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 29124753 1 T1 8 T2 67225 T3 679
values[0x0] all_enables biggest_size 14662039 1 T1 43 T2 33513 T3 311
values[0x1] all_enables biggest_size 14665480 1 T1 55 T2 33500 T3 327


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 33609 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 144076 1 T2 24 T3 8 T5 1



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 51184 1 T2 15 T3 13 T11 16
values[0x0] 61128 1 T1 1 T2 36 T3 4
values[0x1] 65373 1 T2 29 T3 11 T9 1



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 25601 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 152084 1 T2 30 T3 12 T5 1



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 577 1 T11 2 T15 4 T26 9
valid_sources[0x01] 682 1 T11 2 T15 27 T54 9
valid_sources[0x02] 639 1 T15 24 T26 12 T27 22
valid_sources[0x03] 497 1 T15 9 T53 1 T26 13
valid_sources[0x04] 784 1 T11 4 T15 4 T26 11
valid_sources[0x05] 594 1 T11 1 T15 8 T26 11
valid_sources[0x06] 734 1 T2 80 T15 26 T20 22
valid_sources[0x07] 644 1 T15 21 T54 1 T26 9
valid_sources[0x08] 917 1 T10 1 T15 10 T26 11
valid_sources[0x09] 661 1 T15 14 T26 7 T27 22
valid_sources[0x0a] 651 1 T4 1 T15 10 T22 1
valid_sources[0x0b] 658 1 T11 3 T15 8 T26 13
valid_sources[0x0c] 581 1 T11 3 T15 36 T26 6
valid_sources[0x0d] 640 1 T11 4 T15 18 T26 6
valid_sources[0x0e] 544 1 T11 5 T15 25 T26 22
valid_sources[0x0f] 600 1 T15 10 T26 12 T27 23
valid_sources[0x10] 759 1 T5 2 T11 1 T15 20
valid_sources[0x11] 732 1 T11 1 T15 22 T26 15
valid_sources[0x12] 751 1 T11 1 T15 17 T26 9
valid_sources[0x13] 609 1 T11 1 T15 11 T26 4
valid_sources[0x14] 586 1 T11 2 T15 33 T26 10
valid_sources[0x15] 774 1 T15 11 T26 6 T27 11
valid_sources[0x16] 673 1 T12 16 T15 23 T26 8
valid_sources[0x17] 768 1 T15 18 T26 7 T27 16
valid_sources[0x18] 719 1 T15 27 T26 9 T27 29
valid_sources[0x19] 812 1 T15 16 T26 7 T27 23
valid_sources[0x1a] 929 1 T15 9 T26 11 T70 2
valid_sources[0x1b] 791 1 T11 1 T15 13 T54 1
valid_sources[0x1c] 709 1 T15 21 T26 6 T27 18
valid_sources[0x1d] 612 1 T11 2 T15 17 T26 9
valid_sources[0x1e] 1045 1 T15 20 T54 11 T26 8
valid_sources[0x1f] 612 1 T15 13 T54 1 T26 6
valid_sources[0x20] 588 1 T11 1 T15 16 T22 1
valid_sources[0x21] 1142 1 T15 18 T26 4 T41 1
valid_sources[0x22] 635 1 T15 13 T26 13 T27 9
valid_sources[0x23] 831 1 T3 4 T11 2 T15 22
valid_sources[0x24] 916 1 T11 2 T15 14 T26 8
valid_sources[0x25] 799 1 T11 1 T15 16 T54 1
valid_sources[0x26] 940 1 T15 8 T26 11 T27 14
valid_sources[0x27] 745 1 T15 26 T26 10 T27 22
valid_sources[0x28] 637 1 T11 1 T15 18 T26 16
valid_sources[0x29] 671 1 T15 16 T54 1 T26 5
valid_sources[0x2a] 854 1 T11 1 T15 2 T26 11
valid_sources[0x2b] 849 1 T11 3 T15 14 T26 7
valid_sources[0x2c] 786 1 T15 8 T26 13 T71 1
valid_sources[0x2d] 682 1 T11 1 T15 10 T26 9
valid_sources[0x2e] 586 1 T15 31 T26 4 T27 24
valid_sources[0x2f] 571 1 T11 1 T15 15 T26 9
valid_sources[0x30] 639 1 T15 19 T26 8 T27 28
valid_sources[0x31] 585 1 T11 2 T15 17 T26 9
valid_sources[0x32] 649 1 T15 13 T26 5 T27 26
valid_sources[0x33] 965 1 T15 15 T26 7 T27 16
valid_sources[0x34] 1085 1 T15 16 T26 5 T96 1
valid_sources[0x35] 835 1 T15 19 T26 8 T27 20
valid_sources[0x36] 460 1 T15 5 T26 12 T27 32
valid_sources[0x37] 950 1 T15 8 T26 14 T27 22
valid_sources[0x38] 754 1 T15 21 T26 9 T27 12
valid_sources[0x39] 663 1 T15 14 T53 1 T26 14
valid_sources[0x3a] 707 1 T11 1 T15 17 T26 10
valid_sources[0x3b] 812 1 T11 1 T15 17 T26 7
valid_sources[0x3c] 521 1 T15 9 T26 10 T27 23
valid_sources[0x3d] 979 1 T15 14 T26 8 T27 25
valid_sources[0x3e] 878 1 T15 23 T54 1 T26 10
valid_sources[0x3f] 587 1 T15 8 T26 6 T27 14
valid_sources[0x40] 629 1 T15 24 T53 2 T26 8
valid_sources[0x41] 455 1 T15 13 T26 17 T27 24
valid_sources[0x42] 702 1 T15 5 T26 11 T27 24
valid_sources[0x43] 492 1 T11 1 T15 7 T26 11
valid_sources[0x44] 624 1 T11 2 T15 21 T26 17
valid_sources[0x45] 674 1 T11 1 T15 13 T26 11
valid_sources[0x46] 767 1 T11 1 T15 8 T26 10
valid_sources[0x47] 587 1 T11 2 T15 27 T26 12
valid_sources[0x48] 531 1 T15 20 T26 14 T27 13
valid_sources[0x49] 524 1 T11 2 T15 18 T26 13
valid_sources[0x4a] 1059 1 T11 2 T15 7 T26 3
valid_sources[0x4b] 587 1 T11 7 T15 15 T22 4
valid_sources[0x4c] 545 1 T11 2 T15 10 T26 6
valid_sources[0x4d] 973 1 T15 12 T26 12 T27 22
valid_sources[0x4e] 588 1 T15 10 T26 6 T27 16
valid_sources[0x4f] 710 1 T11 2 T15 20 T26 12
valid_sources[0x50] 554 1 T15 11 T26 12 T27 12
valid_sources[0x51] 633 1 T15 10 T53 1 T26 8
valid_sources[0x52] 593 1 T11 3 T15 14 T26 10
valid_sources[0x53] 487 1 T15 19 T26 11 T41 1
valid_sources[0x54] 729 1 T15 38 T26 10 T27 31
valid_sources[0x55] 966 1 T15 18 T26 12 T27 14
valid_sources[0x56] 737 1 T11 1 T15 7 T54 1
valid_sources[0x57] 633 1 T15 12 T26 17 T27 13
valid_sources[0x58] 554 1 T11 1 T15 29 T26 8
valid_sources[0x59] 485 1 T11 5 T15 11 T26 8
valid_sources[0x5a] 1023 1 T11 2 T15 13 T26 5
valid_sources[0x5b] 819 1 T15 9 T26 8 T27 24
valid_sources[0x5c] 467 1 T10 1 T15 20 T26 10
valid_sources[0x5d] 529 1 T11 1 T15 7 T26 11
valid_sources[0x5e] 851 1 T11 1 T15 16 T26 7
valid_sources[0x5f] 567 1 T15 13 T26 14 T27 24
valid_sources[0x60] 539 1 T15 16 T26 11 T27 16
valid_sources[0x61] 538 1 T11 1 T15 14 T26 7
valid_sources[0x62] 518 1 T15 9 T26 14 T27 15
valid_sources[0x63] 558 1 T15 24 T26 8 T27 27
valid_sources[0x64] 1338 1 T15 8 T26 16 T27 23
valid_sources[0x65] 682 1 T15 23 T54 9 T26 8
valid_sources[0x66] 702 1 T11 4 T15 14 T26 10
valid_sources[0x67] 674 1 T11 3 T15 18 T26 13
valid_sources[0x68] 551 1 T15 8 T26 10 T41 1
valid_sources[0x69] 967 1 T11 1 T15 10 T26 13
valid_sources[0x6a] 838 1 T15 12 T26 10 T27 20
valid_sources[0x6b] 673 1 T15 8 T26 9 T27 16
valid_sources[0x6c] 451 1 T15 14 T22 1 T26 5
valid_sources[0x6d] 638 1 T15 19 T26 6 T27 4
valid_sources[0x6e] 733 1 T15 8 T26 8 T27 26
valid_sources[0x6f] 607 1 T11 2 T15 6 T26 10
valid_sources[0x70] 662 1 T11 1 T15 7 T26 8
valid_sources[0x71] 569 1 T15 21 T26 8 T27 14
valid_sources[0x72] 853 1 T15 15 T26 8 T27 14
valid_sources[0x73] 674 1 T11 2 T15 14 T26 11
valid_sources[0x74] 1114 1 T11 3 T15 27 T26 11
valid_sources[0x75] 560 1 T11 1 T15 9 T26 15
valid_sources[0x76] 918 1 T15 20 T26 13 T27 12
valid_sources[0x77] 1032 1 T15 12 T26 6 T27 27
valid_sources[0x78] 438 1 T15 20 T54 1 T26 7
valid_sources[0x79] 474 1 T15 10 T26 5 T27 28
valid_sources[0x7a] 663 1 T11 1 T15 17 T26 13
valid_sources[0x7b] 818 1 T15 29 T26 6 T27 35
valid_sources[0x7c] 671 1 T11 1 T15 10 T26 8
valid_sources[0x7d] 927 1 T11 3 T15 21 T26 3
valid_sources[0x7e] 508 1 T11 2 T15 17 T26 4
valid_sources[0x7f] 639 1 T11 1 T15 9 T54 4
valid_sources[0x80] 712 1 T11 1 T15 28 T54 3



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 39243 1 T2 8 T3 4 T11 9
values[0x0] all_enables biggest_size 53219 1 T2 13 T5 1 T9 1
values[0x1] all_enables biggest_size 51614 1 T2 3 T3 4 T10 1

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