Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.08	99.81	96.99	100.00	100.00	98.57	99.70	98.52

Total tests in report: 1029

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
83.19	83.19	97.66	97.66	76.75	76.75	84.33	84.33	100.00	100.00	91.35	91.35	94.90	94.90	37.29	37.29	/workspace/coverage/default/34.sram_ctrl_lc_escalation.1926616467
92.83	9.65	98.73	1.07	87.27	10.52	94.85	10.52	100.00	0.00	94.24	2.88	96.25	1.35	78.48	41.19	/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1908946532
94.87	2.03	99.32	0.58	90.13	2.86	95.92	1.07	100.00	0.00	96.54	2.31	96.25	0.00	85.90	7.42	/workspace/coverage/default/35.sram_ctrl_stress_all.862045401
95.83	0.96	99.51	0.19	90.78	0.65	96.14	0.21	100.00	0.00	97.41	0.86	96.25	0.00	90.72	4.82	/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1192982619
96.47	0.64	99.51	0.00	90.78	0.00	97.10	0.97	100.00	0.00	97.41	0.00	96.40	0.15	94.06	3.34	/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2476051771
97.09	0.62	99.71	0.19	92.73	1.95	97.46	0.36	100.00	0.00	98.27	0.86	97.00	0.60	94.43	0.37	/workspace/coverage/default/0.sram_ctrl_sec_cm.491494832
97.45	0.36	99.71	0.00	93.25	0.52	98.25	0.79	100.00	0.00	98.56	0.29	97.00	0.00	95.36	0.93	/workspace/coverage/default/15.sram_ctrl_stress_all.1059016450
97.71	0.27	99.71	0.00	93.51	0.26	98.32	0.07	100.00	0.00	98.56	0.00	98.35	1.35	95.55	0.19	/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1299062830
97.97	0.26	99.71	0.00	94.03	0.52	98.75	0.43	100.00	0.00	98.85	0.29	98.35	0.00	96.10	0.56	/workspace/coverage/default/29.sram_ctrl_alert_test.3406531281
98.16	0.19	99.71	0.00	94.16	0.13	99.07	0.32	100.00	0.00	98.85	0.00	99.25	0.90	96.10	0.00	/workspace/coverage/default/38.sram_ctrl_access_during_key_req.4170721448
98.29	0.13	99.71	0.00	94.16	0.00	99.07	0.00	100.00	0.00	98.85	0.00	99.25	0.00	97.03	0.93	/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3979122241
98.42	0.13	99.81	0.10	94.16	0.00	99.86	0.79	100.00	0.00	98.85	0.00	99.25	0.00	97.03	0.00	/workspace/coverage/default/12.sram_ctrl_ram_cfg.3024463515
98.50	0.08	99.81	0.00	94.16	0.00	99.86	0.00	100.00	0.00	98.85	0.00	99.25	0.00	97.59	0.56	/workspace/coverage/default/30.sram_ctrl_stress_all.2423541483
98.56	0.06	99.81	0.00	94.16	0.00	99.86	0.00	100.00	0.00	98.85	0.00	99.70	0.45	97.59	0.00	/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.202405959
98.62	0.05	99.81	0.00	94.16	0.00	99.86	0.00	100.00	0.00	98.85	0.00	99.70	0.00	97.96	0.37	/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2385693188
98.67	0.05	99.81	0.00	94.16	0.00	99.86	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.33	0.37	/workspace/coverage/default/0.sram_ctrl_executable.1346093883
98.70	0.03	99.81	0.00	94.16	0.00	99.86	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.52	0.19	/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.842294114
98.72	0.02	99.81	0.00	94.16	0.00	100.00	0.14	100.00	0.00	98.85	0.00	99.70	0.00	98.52	0.00	/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2522451969

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1909363848
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1362928617
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3285199858
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3447637351
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.726019993
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1435065022
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3168927552
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2436426163
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1998155360
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3357560145
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1059966856
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3209397141
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.985458874
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3349894811
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2551268537
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.641019033
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3262804822
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.680497353
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3471788468
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.819455475
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3793070421
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.396107442
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1622248470
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2807417139
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3376820098
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.219114749
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2446547080
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2085820584
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3314814565
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.384386553
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1400205253
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1484232347
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.819782231
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3516936348
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.754763960
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.645771031
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3651235333
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3930005832
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.568647670
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.281869271
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3873030515
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2582703496
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3949712170
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1466329141
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3318220957
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1421076970
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1160723376
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2829076909
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1574826527
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2460302914
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2578789591
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2083700782
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2116299305
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2926641101
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1598154203
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1278098020
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2357806306
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.214359886
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.35144465
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.408798130
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3461254652
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1296792065
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.357167835
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1777794106
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2404291344
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2518779516
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2083110085
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2412354555
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1063037910
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4151891233
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2983782392
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.487203046
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3793056498
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2188713179
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.72015058
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.4113108582
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3174530818
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2261733572
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1348495200
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3316436080
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3467172790
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1203122532
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2797898157
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2541924443
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2283112156
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2768024196
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3569600236
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.175192795
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4252239847
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.235202586
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3581400456
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1614727970
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2066105296
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2255943077
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.151647650
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1887569407
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1468575210
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4040296929
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2027816598
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1378549359
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4182518272
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1066502031
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3807942677
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3710203641
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3951934286
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.947979060
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1854252505
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3689312932
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3068350192
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3420622820
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4031577192
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3734813577
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2585886286
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1174970254
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2737864654
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1394375305
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1895294059
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2950940429
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1123565490
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1429284014
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.432986657
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4155328027
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2537942623
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2989749431
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3345744825
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4204896677
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1995176645
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3797933107
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2305776160
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.865146636
/workspace/coverage/default/0.sram_ctrl_alert_test.1458269840
/workspace/coverage/default/0.sram_ctrl_bijection.4212478462
/workspace/coverage/default/0.sram_ctrl_lc_escalation.525626793
/workspace/coverage/default/0.sram_ctrl_max_throughput.3379331325
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1753713390
/workspace/coverage/default/0.sram_ctrl_mem_walk.1333742302
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1164887256
/workspace/coverage/default/0.sram_ctrl_partial_access.643755887
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2995529176
/workspace/coverage/default/0.sram_ctrl_ram_cfg.4006862684
/workspace/coverage/default/0.sram_ctrl_regwen.2645048916
/workspace/coverage/default/0.sram_ctrl_smoke.3555713558
/workspace/coverage/default/0.sram_ctrl_stress_all.2389079450
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.662022171
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1460908173
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.630565155
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.179135401
/workspace/coverage/default/1.sram_ctrl_alert_test.278141188
/workspace/coverage/default/1.sram_ctrl_bijection.2683991050
/workspace/coverage/default/1.sram_ctrl_executable.2817302569
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2675092714
/workspace/coverage/default/1.sram_ctrl_max_throughput.1612532600
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2961774
/workspace/coverage/default/1.sram_ctrl_mem_walk.488971740
/workspace/coverage/default/1.sram_ctrl_multiple_keys.332866739
/workspace/coverage/default/1.sram_ctrl_partial_access.3772433614
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2664611636
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2991913395
/workspace/coverage/default/1.sram_ctrl_regwen.806778851
/workspace/coverage/default/1.sram_ctrl_sec_cm.962420434
/workspace/coverage/default/1.sram_ctrl_smoke.1082144246
/workspace/coverage/default/1.sram_ctrl_stress_all.657851149
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.590318880
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2002432019
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4173007699
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2902931423
/workspace/coverage/default/10.sram_ctrl_alert_test.3056049725
/workspace/coverage/default/10.sram_ctrl_bijection.3508369150
/workspace/coverage/default/10.sram_ctrl_executable.3287389513
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2044892936
/workspace/coverage/default/10.sram_ctrl_max_throughput.659633192
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1642535667
/workspace/coverage/default/10.sram_ctrl_mem_walk.3210983716
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2802637599
/workspace/coverage/default/10.sram_ctrl_partial_access.742260850
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1278518251
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3807450245
/workspace/coverage/default/10.sram_ctrl_regwen.940101063
/workspace/coverage/default/10.sram_ctrl_smoke.1755991572
/workspace/coverage/default/10.sram_ctrl_stress_all.1742221705
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3676902750
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.546863706
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2069525963
/workspace/coverage/default/11.sram_ctrl_alert_test.2558442007
/workspace/coverage/default/11.sram_ctrl_bijection.310636472
/workspace/coverage/default/11.sram_ctrl_executable.3903151281
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1474552624
/workspace/coverage/default/11.sram_ctrl_max_throughput.1005627112
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.720807156
/workspace/coverage/default/11.sram_ctrl_mem_walk.3901902991
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3822669275
/workspace/coverage/default/11.sram_ctrl_partial_access.3167897635
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2642129440
/workspace/coverage/default/11.sram_ctrl_ram_cfg.4240798425
/workspace/coverage/default/11.sram_ctrl_regwen.2201639498
/workspace/coverage/default/11.sram_ctrl_smoke.4092609250
/workspace/coverage/default/11.sram_ctrl_stress_all.1869081221
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/workspace/coverage/default/42.sram_ctrl_regwen.3803522707
/workspace/coverage/default/42.sram_ctrl_smoke.3751812575
/workspace/coverage/default/42.sram_ctrl_stress_all.2698010232
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1263703137
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1664292815
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3714758531
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1022639744
/workspace/coverage/default/43.sram_ctrl_alert_test.3050085057
/workspace/coverage/default/43.sram_ctrl_bijection.3241698763
/workspace/coverage/default/43.sram_ctrl_executable.3022127710
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2011159099
/workspace/coverage/default/43.sram_ctrl_max_throughput.380805001
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.4123893333
/workspace/coverage/default/43.sram_ctrl_mem_walk.1842496994
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2434962735
/workspace/coverage/default/43.sram_ctrl_partial_access.3546478896
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1654605864
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1509292549
/workspace/coverage/default/43.sram_ctrl_regwen.1056307834
/workspace/coverage/default/43.sram_ctrl_smoke.1744473155
/workspace/coverage/default/43.sram_ctrl_stress_all.3705455165
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3504480748
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2470835982
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2032802718
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.177238179
/workspace/coverage/default/44.sram_ctrl_alert_test.3935043067
/workspace/coverage/default/44.sram_ctrl_bijection.2355536096
/workspace/coverage/default/44.sram_ctrl_executable.3631814992
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3583936089
/workspace/coverage/default/44.sram_ctrl_max_throughput.4072834185
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3828838838
/workspace/coverage/default/44.sram_ctrl_mem_walk.3456421670
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2396732307
/workspace/coverage/default/44.sram_ctrl_partial_access.3766426872
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3330976018
/workspace/coverage/default/44.sram_ctrl_regwen.198477036
/workspace/coverage/default/44.sram_ctrl_smoke.538823808
/workspace/coverage/default/44.sram_ctrl_stress_all.2790758413
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4070930692
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1393126416
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1323107734
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3396625633
/workspace/coverage/default/45.sram_ctrl_alert_test.3648915903
/workspace/coverage/default/45.sram_ctrl_bijection.2369586486
/workspace/coverage/default/45.sram_ctrl_executable.2815130575
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1699751742
/workspace/coverage/default/45.sram_ctrl_max_throughput.10330660
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.848625594
/workspace/coverage/default/45.sram_ctrl_mem_walk.1331979071
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3750631995
/workspace/coverage/default/45.sram_ctrl_partial_access.3871621852
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3736892181
/workspace/coverage/default/45.sram_ctrl_ram_cfg.42528344
/workspace/coverage/default/45.sram_ctrl_regwen.1255549522
/workspace/coverage/default/45.sram_ctrl_smoke.714532337
/workspace/coverage/default/45.sram_ctrl_stress_all.29608109
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4072478061
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.828832102
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.854565362
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1517181822
/workspace/coverage/default/46.sram_ctrl_alert_test.2287437458
/workspace/coverage/default/46.sram_ctrl_bijection.3704731351
/workspace/coverage/default/46.sram_ctrl_executable.2392795761
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1052435743
/workspace/coverage/default/46.sram_ctrl_max_throughput.3486952416
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1304880911
/workspace/coverage/default/46.sram_ctrl_mem_walk.2737158592
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1217892871
/workspace/coverage/default/46.sram_ctrl_partial_access.3720203494
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3990003365
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1486359023
/workspace/coverage/default/46.sram_ctrl_regwen.2500322594
/workspace/coverage/default/46.sram_ctrl_smoke.25709473
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2504135618
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3862625174
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3533780232
/workspace/coverage/default/47.sram_ctrl_alert_test.999602943
/workspace/coverage/default/47.sram_ctrl_bijection.1159532766
/workspace/coverage/default/47.sram_ctrl_executable.1944061835
/workspace/coverage/default/47.sram_ctrl_lc_escalation.229598047
/workspace/coverage/default/47.sram_ctrl_max_throughput.466383095
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1961470716
/workspace/coverage/default/47.sram_ctrl_mem_walk.1140018850
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3672999258
/workspace/coverage/default/47.sram_ctrl_partial_access.632836990
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.168784432
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3061991903
/workspace/coverage/default/47.sram_ctrl_regwen.4081363074
/workspace/coverage/default/47.sram_ctrl_smoke.2472782641
/workspace/coverage/default/47.sram_ctrl_stress_all.3449391663
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1596976657
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2341480033
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.761709669
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2563004531
/workspace/coverage/default/48.sram_ctrl_alert_test.1367352001
/workspace/coverage/default/48.sram_ctrl_bijection.1078673020
/workspace/coverage/default/48.sram_ctrl_executable.1693330142
/workspace/coverage/default/48.sram_ctrl_lc_escalation.4151476874
/workspace/coverage/default/48.sram_ctrl_max_throughput.3100921342
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2411243593
/workspace/coverage/default/48.sram_ctrl_mem_walk.1208263730
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3461020873
/workspace/coverage/default/48.sram_ctrl_partial_access.3796012574
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3378379393
/workspace/coverage/default/48.sram_ctrl_ram_cfg.606496042
/workspace/coverage/default/48.sram_ctrl_regwen.3558200649
/workspace/coverage/default/48.sram_ctrl_smoke.51489574
/workspace/coverage/default/48.sram_ctrl_stress_all.151963287
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3171768333
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.953873653
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1086089160
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1824328316
/workspace/coverage/default/49.sram_ctrl_alert_test.2292125621
/workspace/coverage/default/49.sram_ctrl_bijection.549331989
/workspace/coverage/default/49.sram_ctrl_executable.319650060
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2169819041
/workspace/coverage/default/49.sram_ctrl_max_throughput.3826732324
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1607738266
/workspace/coverage/default/49.sram_ctrl_mem_walk.1915197535
/workspace/coverage/default/49.sram_ctrl_multiple_keys.249023315
/workspace/coverage/default/49.sram_ctrl_partial_access.2725604695
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.425270342
/workspace/coverage/default/49.sram_ctrl_ram_cfg.136803653
/workspace/coverage/default/49.sram_ctrl_regwen.3683209109
/workspace/coverage/default/49.sram_ctrl_smoke.816830897
/workspace/coverage/default/49.sram_ctrl_stress_all.741779996
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.356073427
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2102356269
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1401880937
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3398611241
/workspace/coverage/default/5.sram_ctrl_alert_test.2566337739
/workspace/coverage/default/5.sram_ctrl_bijection.1524428895
/workspace/coverage/default/5.sram_ctrl_executable.2779473322
/workspace/coverage/default/5.sram_ctrl_lc_escalation.4167009886
/workspace/coverage/default/5.sram_ctrl_max_throughput.1750083010
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1437064112
/workspace/coverage/default/5.sram_ctrl_mem_walk.501854876
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1293791649
/workspace/coverage/default/5.sram_ctrl_partial_access.841639809
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1309548129
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1426391859
/workspace/coverage/default/5.sram_ctrl_regwen.1195636791
/workspace/coverage/default/5.sram_ctrl_smoke.3816446034
/workspace/coverage/default/5.sram_ctrl_stress_all.2553832877
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1783183866
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.116202010
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4279021247
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3215060789
/workspace/coverage/default/6.sram_ctrl_alert_test.3646455039
/workspace/coverage/default/6.sram_ctrl_bijection.2447436731
/workspace/coverage/default/6.sram_ctrl_executable.3637906538
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3979792777
/workspace/coverage/default/6.sram_ctrl_max_throughput.3362960115
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2911596025
/workspace/coverage/default/6.sram_ctrl_mem_walk.1963523815
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1121942591
/workspace/coverage/default/6.sram_ctrl_partial_access.2450594615
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1170013412
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1693237960
/workspace/coverage/default/6.sram_ctrl_regwen.1199043689
/workspace/coverage/default/6.sram_ctrl_smoke.2618580953
/workspace/coverage/default/6.sram_ctrl_stress_all.1606909295
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.733374323
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2049634662
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.270665298
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3396812802
/workspace/coverage/default/7.sram_ctrl_alert_test.3499076667
/workspace/coverage/default/7.sram_ctrl_bijection.645235066
/workspace/coverage/default/7.sram_ctrl_executable.1501073792
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1971042662
/workspace/coverage/default/7.sram_ctrl_max_throughput.3014647720
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1715744362
/workspace/coverage/default/7.sram_ctrl_mem_walk.3863496135
/workspace/coverage/default/7.sram_ctrl_multiple_keys.415526862
/workspace/coverage/default/7.sram_ctrl_partial_access.4233796292
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1860674235
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3660347497
/workspace/coverage/default/7.sram_ctrl_regwen.3217845418
/workspace/coverage/default/7.sram_ctrl_smoke.2481080651
/workspace/coverage/default/7.sram_ctrl_stress_all.3397286863
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2366514168
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3650106829
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2336546310
/workspace/coverage/default/8.sram_ctrl_alert_test.2213036319
/workspace/coverage/default/8.sram_ctrl_bijection.2237674105
/workspace/coverage/default/8.sram_ctrl_executable.695839491
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1458130745
/workspace/coverage/default/8.sram_ctrl_max_throughput.3432816079
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1167090123
/workspace/coverage/default/8.sram_ctrl_mem_walk.3286124297
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2586231371
/workspace/coverage/default/8.sram_ctrl_partial_access.1096537104
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.883138774
/workspace/coverage/default/8.sram_ctrl_ram_cfg.772316121
/workspace/coverage/default/8.sram_ctrl_regwen.1251908795
/workspace/coverage/default/8.sram_ctrl_smoke.2646638089
/workspace/coverage/default/8.sram_ctrl_stress_all.2337158147
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.940857176
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1436108798
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.560520616
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3074852461
/workspace/coverage/default/9.sram_ctrl_alert_test.2073633219
/workspace/coverage/default/9.sram_ctrl_bijection.4101152705
/workspace/coverage/default/9.sram_ctrl_executable.543418275
/workspace/coverage/default/9.sram_ctrl_lc_escalation.101359375
/workspace/coverage/default/9.sram_ctrl_max_throughput.4010996440
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.653910168
/workspace/coverage/default/9.sram_ctrl_mem_walk.1734686138
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1159646976
/workspace/coverage/default/9.sram_ctrl_partial_access.2213051402
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.754194313
/workspace/coverage/default/9.sram_ctrl_ram_cfg.179829045
/workspace/coverage/default/9.sram_ctrl_regwen.3076799201
/workspace/coverage/default/9.sram_ctrl_smoke.317887056
/workspace/coverage/default/9.sram_ctrl_stress_all.2228002878
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1333235472
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.33190666
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3655207834

Total test records in report: 1029

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/34.sram_ctrl_mem_partial_access.4029027766	May 02 03:20:33 PM PDT 24	May 02 03:20:38 PM PDT 24	121771371 ps
T2	/workspace/coverage/default/10.sram_ctrl_regwen.940101063	May 02 03:14:24 PM PDT 24	May 02 03:28:26 PM PDT 24	4787189145 ps
T3	/workspace/coverage/default/34.sram_ctrl_lc_escalation.1926616467	May 02 03:20:40 PM PDT 24	May 02 03:20:45 PM PDT 24	1237667841 ps
T4	/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3891726470	May 02 03:19:47 PM PDT 24	May 02 03:19:53 PM PDT 24	302772587 ps
T5	/workspace/coverage/default/2.sram_ctrl_max_throughput.2545307815	May 02 03:12:24 PM PDT 24	May 02 03:14:42 PM PDT 24	203231685 ps
T8	/workspace/coverage/default/12.sram_ctrl_ram_cfg.3024463515	May 02 03:14:48 PM PDT 24	May 02 03:14:50 PM PDT 24	27807882 ps
T9	/workspace/coverage/default/29.sram_ctrl_alert_test.3406531281	May 02 03:19:21 PM PDT 24	May 02 03:19:23 PM PDT 24	13480506 ps
T10	/workspace/coverage/default/22.sram_ctrl_stress_pipeline.2022159920	May 02 03:17:16 PM PDT 24	May 02 03:21:14 PM PDT 24	10231531032 ps
T11	/workspace/coverage/default/35.sram_ctrl_stress_all.862045401	May 02 03:20:55 PM PDT 24	May 02 05:11:59 PM PDT 24	324472286001 ps
T12	/workspace/coverage/default/13.sram_ctrl_stress_all.2886242740	May 02 03:15:09 PM PDT 24	May 02 03:18:51 PM PDT 24	27434575622 ps
T14	/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.854565362	May 02 03:23:28 PM PDT 24	May 02 03:23:36 PM PDT 24	60448170 ps
T15	/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1908946532	May 02 03:21:38 PM PDT 24	May 02 03:24:26 PM PDT 24	45626118986 ps
T16	/workspace/coverage/default/22.sram_ctrl_smoke.3495793875	May 02 03:17:16 PM PDT 24	May 02 03:19:26 PM PDT 24	1060506647 ps
T25	/workspace/coverage/default/15.sram_ctrl_smoke.725248517	May 02 03:15:35 PM PDT 24	May 02 03:15:37 PM PDT 24	63393490 ps
T20	/workspace/coverage/default/47.sram_ctrl_alert_test.999602943	May 02 03:24:14 PM PDT 24	May 02 03:24:17 PM PDT 24	42621735 ps
T22	/workspace/coverage/default/48.sram_ctrl_regwen.3558200649	May 02 03:24:22 PM PDT 24	May 02 03:24:50 PM PDT 24	9669867945 ps
T52	/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.531542971	May 02 03:17:22 PM PDT 24	May 02 03:17:41 PM PDT 24	82899069 ps
T53	/workspace/coverage/default/34.sram_ctrl_stress_all.1070151270	May 02 03:20:33 PM PDT 24	May 02 03:22:56 PM PDT 24	3742541243 ps
T54	/workspace/coverage/default/32.sram_ctrl_regwen.1613046198	May 02 03:20:01 PM PDT 24	May 02 03:36:35 PM PDT 24	2954024875 ps
T55	/workspace/coverage/default/18.sram_ctrl_max_throughput.1455456220	May 02 03:16:21 PM PDT 24	May 02 03:16:55 PM PDT 24	869852824 ps
T26	/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.920129011	May 02 03:15:37 PM PDT 24	May 02 03:15:59 PM PDT 24	1410963061 ps
T96	/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1240051647	May 02 03:16:34 PM PDT 24	May 02 03:22:02 PM PDT 24	26048859257 ps
T69	/workspace/coverage/default/4.sram_ctrl_mem_partial_access.3520823096	May 02 03:12:51 PM PDT 24	May 02 03:12:55 PM PDT 24	202985984 ps
T70	/workspace/coverage/default/2.sram_ctrl_stress_pipeline.2635101226	May 02 03:12:22 PM PDT 24	May 02 03:17:40 PM PDT 24	3400457617 ps
T71	/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3828838838	May 02 03:23:20 PM PDT 24	May 02 03:23:23 PM PDT 24	91632657 ps
T72	/workspace/coverage/default/49.sram_ctrl_executable.319650060	May 02 03:24:34 PM PDT 24	May 02 03:47:21 PM PDT 24	14387080021 ps
T41	/workspace/coverage/default/19.sram_ctrl_access_during_key_req.213390336	May 02 03:16:32 PM PDT 24	May 02 03:30:43 PM PDT 24	5252490501 ps
T141	/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3655207834	May 02 03:13:58 PM PDT 24	May 02 03:14:29 PM PDT 24	93889125 ps
T13	/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2476051771	May 02 03:23:13 PM PDT 24	May 02 03:27:48 PM PDT 24	47720720669 ps
T142	/workspace/coverage/default/40.sram_ctrl_partial_access.3835633170	May 02 03:22:06 PM PDT 24	May 02 03:22:09 PM PDT 24	859956503 ps
T27	/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3033483057	May 02 03:15:23 PM PDT 24	May 02 03:21:13 PM PDT 24	1230134264 ps
T143	/workspace/coverage/default/14.sram_ctrl_mem_walk.66232684	May 02 03:15:22 PM PDT 24	May 02 03:15:31 PM PDT 24	525975417 ps
T134	/workspace/coverage/default/38.sram_ctrl_executable.824330325	May 02 03:21:38 PM PDT 24	May 02 03:29:37 PM PDT 24	6401772148 ps
T42	/workspace/coverage/default/4.sram_ctrl_access_during_key_req.1319334468	May 02 03:12:49 PM PDT 24	May 02 03:25:29 PM PDT 24	1995743724 ps
T78	/workspace/coverage/default/29.sram_ctrl_mem_partial_access.4104997258	May 02 03:19:20 PM PDT 24	May 02 03:19:25 PM PDT 24	153318345 ps
T6	/workspace/coverage/default/8.sram_ctrl_stress_all.2337158147	May 02 03:13:59 PM PDT 24	May 02 03:48:48 PM PDT 24	27688392107 ps
T137	/workspace/coverage/default/44.sram_ctrl_smoke.538823808	May 02 03:23:11 PM PDT 24	May 02 03:23:29 PM PDT 24	1239980424 ps
T144	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.4216219315	May 02 03:22:11 PM PDT 24	May 02 03:23:59 PM PDT 24	585231954 ps
T23	/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3750679308	May 02 03:22:20 PM PDT 24	May 02 03:27:29 PM PDT 24	3009399530 ps
T145	/workspace/coverage/default/30.sram_ctrl_partial_access.2678534009	May 02 03:19:28 PM PDT 24	May 02 03:19:38 PM PDT 24	455479102 ps
T97	/workspace/coverage/default/24.sram_ctrl_stress_pipeline.602503278	May 02 03:17:51 PM PDT 24	May 02 03:20:42 PM PDT 24	1864447110 ps
T43	/workspace/coverage/default/38.sram_ctrl_access_during_key_req.4170721448	May 02 03:21:38 PM PDT 24	May 02 03:30:04 PM PDT 24	2529155601 ps
T146	/workspace/coverage/default/38.sram_ctrl_max_throughput.2924059379	May 02 03:21:38 PM PDT 24	May 02 03:21:42 PM PDT 24	101977227 ps
T98	/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.425270342	May 02 03:24:30 PM PDT 24	May 02 03:28:37 PM PDT 24	38920830861 ps
T47	/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2084663649	May 02 03:14:43 PM PDT 24	May 02 03:18:49 PM PDT 24	2359072485 ps
T7	/workspace/coverage/default/27.sram_ctrl_lc_escalation.892206507	May 02 03:18:46 PM PDT 24	May 02 03:18:51 PM PDT 24	343446204 ps
T147	/workspace/coverage/default/17.sram_ctrl_multiple_keys.4165399061	May 02 03:15:55 PM PDT 24	May 02 03:19:04 PM PDT 24	9140908432 ps
T148	/workspace/coverage/default/38.sram_ctrl_multiple_keys.148797965	May 02 03:21:33 PM PDT 24	May 02 03:25:57 PM PDT 24	1433097677 ps
T48	/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.202405959	May 02 03:12:29 PM PDT 24	May 02 03:12:49 PM PDT 24	1627568668 ps
T56	/workspace/coverage/default/19.sram_ctrl_lc_escalation.3090137832	May 02 03:16:28 PM PDT 24	May 02 03:16:36 PM PDT 24	2591862017 ps
T112	/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.4294229274	May 02 03:15:15 PM PDT 24	May 02 03:17:24 PM PDT 24	611964179 ps
T113	/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1401880937	May 02 03:24:29 PM PDT 24	May 02 03:24:31 PM PDT 24	303891654 ps
T99	/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1460908173	May 02 03:12:01 PM PDT 24	May 02 03:14:18 PM PDT 24	2906909819 ps
T100	/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3456947626	May 02 03:19:08 PM PDT 24	May 02 03:21:34 PM PDT 24	17522171371 ps
T79	/workspace/coverage/default/15.sram_ctrl_mem_partial_access.4014784542	May 02 03:15:38 PM PDT 24	May 02 03:15:42 PM PDT 24	158258712 ps
T114	/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3476229221	May 02 03:16:28 PM PDT 24	May 02 03:20:42 PM PDT 24	37804988280 ps
T115	/workspace/coverage/default/45.sram_ctrl_mem_walk.1331979071	May 02 03:23:33 PM PDT 24	May 02 03:23:40 PM PDT 24	352092684 ps
T116	/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1817342966	May 02 03:20:28 PM PDT 24	May 02 03:25:10 PM PDT 24	7305567938 ps
T44	/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2522451969	May 02 03:14:23 PM PDT 24	May 02 03:15:06 PM PDT 24	1927564513 ps
T57	/workspace/coverage/default/25.sram_ctrl_regwen.46903348	May 02 03:18:13 PM PDT 24	May 02 03:36:56 PM PDT 24	87972545944 ps
T21	/workspace/coverage/default/17.sram_ctrl_alert_test.3954362098	May 02 03:16:17 PM PDT 24	May 02 03:16:18 PM PDT 24	199507470 ps
T149	/workspace/coverage/default/37.sram_ctrl_stress_pipeline.3144139818	May 02 03:21:18 PM PDT 24	May 02 03:25:05 PM PDT 24	2564298670 ps
T150	/workspace/coverage/default/0.sram_ctrl_partial_access.643755887	May 02 03:12:01 PM PDT 24	May 02 03:12:03 PM PDT 24	313976898 ps
T80	/workspace/coverage/default/37.sram_ctrl_access_during_key_req.1911189965	May 02 03:21:24 PM PDT 24	May 02 03:39:42 PM PDT 24	7380517285 ps
T28	/workspace/coverage/default/16.sram_ctrl_ram_cfg.283303197	May 02 03:15:48 PM PDT 24	May 02 03:15:50 PM PDT 24	47951793 ps
T151	/workspace/coverage/default/38.sram_ctrl_stress_all.2120168747	May 02 03:21:43 PM PDT 24	May 02 03:39:47 PM PDT 24	8187256925 ps
T152	/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1323107734	May 02 03:23:15 PM PDT 24	May 02 03:23:21 PM PDT 24	704684085 ps
T153	/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.630565155	May 02 03:12:01 PM PDT 24	May 02 03:12:45 PM PDT 24	400235883 ps
T154	/workspace/coverage/default/0.sram_ctrl_alert_test.1458269840	May 02 03:12:10 PM PDT 24	May 02 03:12:11 PM PDT 24	22014445 ps
T155	/workspace/coverage/default/19.sram_ctrl_partial_access.2074574413	May 02 03:16:27 PM PDT 24	May 02 03:18:59 PM PDT 24	1358171617 ps
T156	/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3215060789	May 02 03:13:16 PM PDT 24	May 02 03:16:48 PM PDT 24	953152083 ps
T157	/workspace/coverage/default/2.sram_ctrl_mem_partial_access.443848736	May 02 03:12:30 PM PDT 24	May 02 03:12:35 PM PDT 24	48177269 ps
T49	/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1952478805	May 02 03:12:35 PM PDT 24	May 02 03:20:52 PM PDT 24	2288344806 ps
T158	/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3809197315	May 02 03:19:00 PM PDT 24	May 02 03:39:28 PM PDT 24	20844391731 ps
T135	/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1860183910	May 02 03:18:19 PM PDT 24	May 02 03:23:38 PM PDT 24	14760072433 ps
T159	/workspace/coverage/default/20.sram_ctrl_alert_test.786662996	May 02 03:16:53 PM PDT 24	May 02 03:16:54 PM PDT 24	21874067 ps
T160	/workspace/coverage/default/31.sram_ctrl_partial_access.2691773980	May 02 03:19:39 PM PDT 24	May 02 03:19:59 PM PDT 24	1033108432 ps
T58	/workspace/coverage/default/38.sram_ctrl_regwen.2428068156	May 02 03:21:38 PM PDT 24	May 02 03:33:35 PM PDT 24	3035022362 ps
T45	/workspace/coverage/default/49.sram_ctrl_regwen.3683209109	May 02 03:24:34 PM PDT 24	May 02 03:32:33 PM PDT 24	69094178470 ps
T161	/workspace/coverage/default/36.sram_ctrl_alert_test.1684316206	May 02 03:21:15 PM PDT 24	May 02 03:21:16 PM PDT 24	26273467 ps
T162	/workspace/coverage/default/15.sram_ctrl_access_during_key_req.2518572019	May 02 03:15:29 PM PDT 24	May 02 03:37:46 PM PDT 24	3516399288 ps
T163	/workspace/coverage/default/21.sram_ctrl_max_throughput.695410170	May 02 03:17:07 PM PDT 24	May 02 03:18:46 PM PDT 24	142655714 ps
T131	/workspace/coverage/default/29.sram_ctrl_executable.274677570	May 02 03:19:16 PM PDT 24	May 02 03:28:15 PM PDT 24	4182816774 ps
T29	/workspace/coverage/default/13.sram_ctrl_ram_cfg.1370903337	May 02 03:15:08 PM PDT 24	May 02 03:15:09 PM PDT 24	50738310 ps
T164	/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2504135618	May 02 03:23:59 PM PDT 24	May 02 03:28:20 PM PDT 24	17327637052 ps
T165	/workspace/coverage/default/25.sram_ctrl_alert_test.1185318513	May 02 03:18:16 PM PDT 24	May 02 03:18:17 PM PDT 24	14000794 ps
T166	/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2642129440	May 02 03:14:31 PM PDT 24	May 02 03:20:53 PM PDT 24	10781571006 ps
T167	/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.560520616	May 02 03:13:43 PM PDT 24	May 02 03:14:04 PM PDT 24	123669462 ps
T46	/workspace/coverage/default/33.sram_ctrl_regwen.10069656	May 02 03:20:20 PM PDT 24	May 02 03:42:41 PM PDT 24	11494305078 ps
T168	/workspace/coverage/default/45.sram_ctrl_mem_partial_access.848625594	May 02 03:23:37 PM PDT 24	May 02 03:23:42 PM PDT 24	254381389 ps
T169	/workspace/coverage/default/5.sram_ctrl_max_throughput.1750083010	May 02 03:13:03 PM PDT 24	May 02 03:13:19 PM PDT 24	73760192 ps
T170	/workspace/coverage/default/41.sram_ctrl_max_throughput.547770788	May 02 03:22:26 PM PDT 24	May 02 03:24:05 PM PDT 24	585246315 ps
T171	/workspace/coverage/default/47.sram_ctrl_ram_cfg.3061991903	May 02 03:24:07 PM PDT 24	May 02 03:24:09 PM PDT 24	144476474 ps
T172	/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3165066108	May 02 03:17:06 PM PDT 24	May 02 03:19:25 PM PDT 24	619998562 ps
T173	/workspace/coverage/default/13.sram_ctrl_max_throughput.1780028612	May 02 03:15:02 PM PDT 24	May 02 03:17:19 PM PDT 24	140578686 ps
T139	/workspace/coverage/default/15.sram_ctrl_stress_all.1059016450	May 02 03:15:35 PM PDT 24	May 02 03:55:58 PM PDT 24	37090743834 ps
T174	/workspace/coverage/default/10.sram_ctrl_partial_access.742260850	May 02 03:14:12 PM PDT 24	May 02 03:14:24 PM PDT 24	964991218 ps
T140	/workspace/coverage/default/43.sram_ctrl_regwen.1056307834	May 02 03:23:06 PM PDT 24	May 02 03:47:55 PM PDT 24	20958100354 ps
T175	/workspace/coverage/default/37.sram_ctrl_alert_test.1229332729	May 02 03:21:32 PM PDT 24	May 02 03:21:34 PM PDT 24	76522646 ps
T176	/workspace/coverage/default/18.sram_ctrl_bijection.3909118444	May 02 03:16:14 PM PDT 24	May 02 03:17:09 PM PDT 24	2197998007 ps
T50	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1048310919	May 02 03:21:16 PM PDT 24	May 02 03:22:00 PM PDT 24	3033509391 ps
T177	/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3166181194	May 02 03:16:36 PM PDT 24	May 02 03:16:42 PM PDT 24	271480699 ps
T24	/workspace/coverage/default/30.sram_ctrl_stress_all.2423541483	May 02 03:19:36 PM PDT 24	May 02 04:19:36 PM PDT 24	12365753877 ps
T178	/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2470835982	May 02 03:22:58 PM PDT 24	May 02 03:26:09 PM PDT 24	7827589044 ps
T117	/workspace/coverage/default/17.sram_ctrl_lc_escalation.2471579967	May 02 03:16:05 PM PDT 24	May 02 03:16:12 PM PDT 24	523043547 ps
T51	/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2851804031	May 02 03:20:35 PM PDT 24	May 02 03:21:59 PM PDT 24	310119383 ps
T179	/workspace/coverage/default/36.sram_ctrl_stress_pipeline.1391109812	May 02 03:21:01 PM PDT 24	May 02 03:26:08 PM PDT 24	3250295254 ps
T180	/workspace/coverage/default/7.sram_ctrl_executable.1501073792	May 02 03:13:28 PM PDT 24	May 02 03:35:40 PM PDT 24	50144727747 ps
T136	/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2958681385	May 02 03:21:38 PM PDT 24	May 02 03:21:45 PM PDT 24	3279267449 ps
T181	/workspace/coverage/default/28.sram_ctrl_smoke.2709043441	May 02 03:18:52 PM PDT 24	May 02 03:19:25 PM PDT 24	404216822 ps
T182	/workspace/coverage/default/15.sram_ctrl_executable.798167285	May 02 03:15:30 PM PDT 24	May 02 03:32:08 PM PDT 24	68024232136 ps
T183	/workspace/coverage/default/35.sram_ctrl_bijection.1897551278	May 02 03:20:44 PM PDT 24	May 02 03:21:31 PM PDT 24	12147952673 ps
T184	/workspace/coverage/default/16.sram_ctrl_stress_pipeline.3427084008	May 02 03:15:45 PM PDT 24	May 02 03:20:24 PM PDT 24	12467077162 ps
T185	/workspace/coverage/default/26.sram_ctrl_lc_escalation.3054920975	May 02 03:18:26 PM PDT 24	May 02 03:18:34 PM PDT 24	610329101 ps
T186	/workspace/coverage/default/22.sram_ctrl_max_throughput.2468823744	May 02 03:17:22 PM PDT 24	May 02 03:18:59 PM PDT 24	502738620 ps
T132	/workspace/coverage/default/0.sram_ctrl_executable.1346093883	May 02 03:12:02 PM PDT 24	May 02 03:22:33 PM PDT 24	62123232029 ps
T187	/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1860674235	May 02 03:13:28 PM PDT 24	May 02 03:17:05 PM PDT 24	10568258341 ps
T188	/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3499243796	May 02 03:18:19 PM PDT 24	May 02 03:18:39 PM PDT 24	383853061 ps
T189	/workspace/coverage/default/30.sram_ctrl_mem_walk.2873197736	May 02 03:19:34 PM PDT 24	May 02 03:19:44 PM PDT 24	703431366 ps
T118	/workspace/coverage/default/36.sram_ctrl_stress_all.157869773	May 02 03:21:15 PM PDT 24	May 02 03:25:54 PM PDT 24	8500790533 ps
T190	/workspace/coverage/default/12.sram_ctrl_lc_escalation.4037230331	May 02 03:14:48 PM PDT 24	May 02 03:14:57 PM PDT 24	591526003 ps
T191	/workspace/coverage/default/35.sram_ctrl_executable.1613416209	May 02 03:20:48 PM PDT 24	May 02 03:37:08 PM PDT 24	19611150319 ps
T192	/workspace/coverage/default/33.sram_ctrl_smoke.3309819816	May 02 03:20:11 PM PDT 24	May 02 03:20:18 PM PDT 24	426404217 ps
T193	/workspace/coverage/default/40.sram_ctrl_regwen.1989833655	May 02 03:22:20 PM PDT 24	May 02 03:23:41 PM PDT 24	221811281 ps
T194	/workspace/coverage/default/6.sram_ctrl_executable.3637906538	May 02 03:13:15 PM PDT 24	May 02 03:37:09 PM PDT 24	24206218143 ps
T195	/workspace/coverage/default/1.sram_ctrl_smoke.1082144246	May 02 03:12:07 PM PDT 24	May 02 03:12:20 PM PDT 24	235015269 ps
T196	/workspace/coverage/default/38.sram_ctrl_bijection.3903634767	May 02 03:21:31 PM PDT 24	May 02 03:22:22 PM PDT 24	27709611382 ps
T197	/workspace/coverage/default/24.sram_ctrl_lc_escalation.3755225543	May 02 03:17:51 PM PDT 24	May 02 03:18:03 PM PDT 24	1916656509 ps
T198	/workspace/coverage/default/12.sram_ctrl_partial_access.1086120737	May 02 03:14:47 PM PDT 24	May 02 03:17:36 PM PDT 24	1614190373 ps
T199	/workspace/coverage/default/39.sram_ctrl_regwen.3920787215	May 02 03:21:51 PM PDT 24	May 02 03:43:13 PM PDT 24	129826508179 ps
T200	/workspace/coverage/default/20.sram_ctrl_regwen.544902353	May 02 03:16:46 PM PDT 24	May 02 03:21:12 PM PDT 24	60262968430 ps
T201	/workspace/coverage/default/42.sram_ctrl_max_throughput.2185456534	May 02 03:22:43 PM PDT 24	May 02 03:24:19 PM PDT 24	423351660 ps
T202	/workspace/coverage/default/17.sram_ctrl_bijection.221448475	May 02 03:15:57 PM PDT 24	May 02 03:16:35 PM PDT 24	2127508016 ps
T203	/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3736892181	May 02 03:23:30 PM PDT 24	May 02 03:30:01 PM PDT 24	20099157094 ps
T204	/workspace/coverage/default/20.sram_ctrl_executable.3933994334	May 02 03:16:47 PM PDT 24	May 02 03:30:02 PM PDT 24	1584767614 ps
T205	/workspace/coverage/default/5.sram_ctrl_regwen.1195636791	May 02 03:13:01 PM PDT 24	May 02 03:37:57 PM PDT 24	20254108111 ps
T206	/workspace/coverage/default/20.sram_ctrl_stress_pipeline.925070743	May 02 03:16:41 PM PDT 24	May 02 03:18:39 PM PDT 24	1243859199 ps
T207	/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3093179760	May 02 03:15:57 PM PDT 24	May 02 03:17:22 PM PDT 24	540847563 ps
T208	/workspace/coverage/default/4.sram_ctrl_bijection.1826964188	May 02 03:12:44 PM PDT 24	May 02 03:13:38 PM PDT 24	1676836032 ps
T133	/workspace/coverage/default/25.sram_ctrl_executable.1693976683	May 02 03:18:04 PM PDT 24	May 02 03:35:08 PM PDT 24	15161238501 ps
T209	/workspace/coverage/default/42.sram_ctrl_executable.149453230	May 02 03:22:48 PM PDT 24	May 02 03:38:26 PM PDT 24	22623333087 ps
T210	/workspace/coverage/default/8.sram_ctrl_alert_test.2213036319	May 02 03:13:58 PM PDT 24	May 02 03:13:59 PM PDT 24	14237084 ps
T211	/workspace/coverage/default/8.sram_ctrl_multiple_keys.2586231371	May 02 03:13:40 PM PDT 24	May 02 03:22:49 PM PDT 24	11723278652 ps
T212	/workspace/coverage/default/34.sram_ctrl_stress_pipeline.420692618	May 02 03:20:27 PM PDT 24	May 02 03:25:12 PM PDT 24	3173755189 ps
T213	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3548132813	May 02 03:14:43 PM PDT 24	May 02 03:18:01 PM PDT 24	4305683151 ps
T214	/workspace/coverage/default/18.sram_ctrl_partial_access.391697916	May 02 03:16:21 PM PDT 24	May 02 03:16:38 PM PDT 24	644682266 ps
T215	/workspace/coverage/default/22.sram_ctrl_stress_all.2132121601	May 02 03:17:29 PM PDT 24	May 02 03:51:23 PM PDT 24	453958413556 ps
T216	/workspace/coverage/default/17.sram_ctrl_smoke.3180963649	May 02 03:15:49 PM PDT 24	May 02 03:15:55 PM PDT 24	164974486 ps
T217	/workspace/coverage/default/39.sram_ctrl_executable.188534587	May 02 03:21:53 PM PDT 24	May 02 03:22:26 PM PDT 24	4354551645 ps
T218	/workspace/coverage/default/26.sram_ctrl_max_throughput.3962366524	May 02 03:18:19 PM PDT 24	May 02 03:18:29 PM PDT 24	134273130 ps
T219	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1561547633	May 02 03:15:09 PM PDT 24	May 02 03:32:26 PM PDT 24	37096176829 ps
T220	/workspace/coverage/default/2.sram_ctrl_smoke.3431285220	May 02 03:12:13 PM PDT 24	May 02 03:13:23 PM PDT 24	2501385569 ps
T221	/workspace/coverage/default/45.sram_ctrl_max_throughput.10330660	May 02 03:23:28 PM PDT 24	May 02 03:23:30 PM PDT 24	41015863 ps
T222	/workspace/coverage/default/45.sram_ctrl_regwen.1255549522	May 02 03:23:29 PM PDT 24	May 02 03:37:47 PM PDT 24	9222357843 ps
T223	/workspace/coverage/default/17.sram_ctrl_max_throughput.2854463538	May 02 03:15:54 PM PDT 24	May 02 03:15:57 PM PDT 24	70708126 ps
T224	/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3777060098	May 02 03:15:28 PM PDT 24	May 02 03:15:47 PM PDT 24	171471176 ps
T225	/workspace/coverage/default/24.sram_ctrl_stress_all.3669103880	May 02 03:17:56 PM PDT 24	May 02 03:49:54 PM PDT 24	21909896341 ps
T226	/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2983895047	May 02 03:18:33 PM PDT 24	May 02 03:41:51 PM PDT 24	9793463042 ps
T227	/workspace/coverage/default/44.sram_ctrl_lc_escalation.3583936089	May 02 03:23:12 PM PDT 24	May 02 03:23:20 PM PDT 24	2174705909 ps
T138	/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2494404178	May 02 03:20:48 PM PDT 24	May 02 03:26:12 PM PDT 24	13648173037 ps
T228	/workspace/coverage/default/18.sram_ctrl_regwen.1928066387	May 02 03:16:21 PM PDT 24	May 02 03:26:31 PM PDT 24	9188418352 ps
T229	/workspace/coverage/default/16.sram_ctrl_access_during_key_req.705818026	May 02 03:15:42 PM PDT 24	May 02 03:31:55 PM PDT 24	4377546036 ps
T230	/workspace/coverage/default/44.sram_ctrl_regwen.198477036	May 02 03:23:12 PM PDT 24	May 02 03:38:53 PM PDT 24	51909081248 ps
T231	/workspace/coverage/default/27.sram_ctrl_bijection.2699647652	May 02 03:18:40 PM PDT 24	May 02 03:19:13 PM PDT 24	485040732 ps
T232	/workspace/coverage/default/35.sram_ctrl_mem_walk.2045265473	May 02 03:20:54 PM PDT 24	May 02 03:21:03 PM PDT 24	1825076728 ps
T233	/workspace/coverage/default/31.sram_ctrl_stress_pipeline.4248284957	May 02 03:19:40 PM PDT 24	May 02 03:23:13 PM PDT 24	5296181956 ps
T234	/workspace/coverage/default/25.sram_ctrl_stress_pipeline.1574696398	May 02 03:18:03 PM PDT 24	May 02 03:21:21 PM PDT 24	2585101250 ps
T235	/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3751339969	May 02 03:12:41 PM PDT 24	May 02 03:17:29 PM PDT 24	6184101283 ps
T236	/workspace/coverage/default/30.sram_ctrl_ram_cfg.3486289061	May 02 03:19:26 PM PDT 24	May 02 03:19:28 PM PDT 24	61134645 ps
T237	/workspace/coverage/default/21.sram_ctrl_access_during_key_req.1345495588	May 02 03:17:28 PM PDT 24	May 02 03:36:06 PM PDT 24	4237585867 ps
T238	/workspace/coverage/default/21.sram_ctrl_ram_cfg.204007791	May 02 03:17:08 PM PDT 24	May 02 03:17:10 PM PDT 24	81310858 ps
T239	/workspace/coverage/default/20.sram_ctrl_lc_escalation.1255485344	May 02 03:16:48 PM PDT 24	May 02 03:16:56 PM PDT 24	1736965909 ps
T240	/workspace/coverage/default/20.sram_ctrl_stress_all.1174769023	May 02 03:16:53 PM PDT 24	May 02 03:27:07 PM PDT 24	54829840802 ps
T241	/workspace/coverage/default/42.sram_ctrl_regwen.3803522707	May 02 03:22:52 PM PDT 24	May 02 03:54:16 PM PDT 24	97977384884 ps
T242	/workspace/coverage/default/1.sram_ctrl_mem_walk.488971740	May 02 03:12:15 PM PDT 24	May 02 03:12:27 PM PDT 24	1358612443 ps
T243	/workspace/coverage/default/20.sram_ctrl_bijection.1484101818	May 02 03:16:42 PM PDT 24	May 02 03:17:27 PM PDT 24	2346791657 ps
T244	/workspace/coverage/default/42.sram_ctrl_bijection.3674135846	May 02 03:22:36 PM PDT 24	May 02 03:23:10 PM PDT 24	17026873034 ps
T245	/workspace/coverage/default/40.sram_ctrl_mem_walk.3570375884	May 02 03:22:21 PM PDT 24	May 02 03:22:30 PM PDT 24	291888991 ps
T246	/workspace/coverage/default/32.sram_ctrl_executable.963994098	May 02 03:20:02 PM PDT 24	May 02 03:31:27 PM PDT 24	2807468649 ps
T247	/workspace/coverage/default/12.sram_ctrl_executable.3524978046	May 02 03:14:48 PM PDT 24	May 02 03:18:01 PM PDT 24	9432185433 ps
T248	/workspace/coverage/default/22.sram_ctrl_mem_walk.3889400441	May 02 03:17:22 PM PDT 24	May 02 03:17:32 PM PDT 24	1678236564 ps
T249	/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.829062375	May 02 03:21:30 PM PDT 24	May 02 03:27:02 PM PDT 24	63440185993 ps
T250	/workspace/coverage/default/7.sram_ctrl_max_throughput.3014647720	May 02 03:13:30 PM PDT 24	May 02 03:14:34 PM PDT 24	201636531 ps
T251	/workspace/coverage/default/37.sram_ctrl_multiple_keys.3985582347	May 02 03:21:17 PM PDT 24	May 02 03:25:20 PM PDT 24	3444758177 ps
T252	/workspace/coverage/default/31.sram_ctrl_ram_cfg.326534849	May 02 03:19:47 PM PDT 24	May 02 03:19:49 PM PDT 24	193460748 ps
T253	/workspace/coverage/default/0.sram_ctrl_access_during_key_req.865146636	May 02 03:12:01 PM PDT 24	May 02 03:20:13 PM PDT 24	32512695463 ps
T254	/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2094026166	May 02 03:17:09 PM PDT 24	May 02 03:17:22 PM PDT 24	184035642 ps
T255	/workspace/coverage/default/16.sram_ctrl_mem_partial_access.758939068	May 02 03:15:53 PM PDT 24	May 02 03:16:00 PM PDT 24	576034332 ps
T256	/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3275457583	May 02 03:16:19 PM PDT 24	May 02 03:21:41 PM PDT 24	18008641446 ps
T257	/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2049634662	May 02 03:13:13 PM PDT 24	May 02 03:17:14 PM PDT 24	9842741627 ps
T258	/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.883138774	May 02 03:13:43 PM PDT 24	May 02 03:19:13 PM PDT 24	14851518257 ps
T259	/workspace/coverage/default/33.sram_ctrl_stress_all.2647505124	May 02 03:20:27 PM PDT 24	May 02 03:53:44 PM PDT 24	142362555948 ps
T260	/workspace/coverage/default/3.sram_ctrl_multiple_keys.2043204535	May 02 03:12:30 PM PDT 24	May 02 03:14:25 PM PDT 24	1193084655 ps
T261	/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2799955358	May 02 03:21:08 PM PDT 24	May 02 03:21:15 PM PDT 24	903807997 ps
T262	/workspace/coverage/default/11.sram_ctrl_multiple_keys.3822669275	May 02 03:14:27 PM PDT 24	May 02 03:24:09 PM PDT 24	10475079630 ps
T263	/workspace/coverage/default/1.sram_ctrl_stress_all.657851149	May 02 03:12:16 PM PDT 24	May 02 03:37:10 PM PDT 24	77570969632 ps
T264	/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.489819584	May 02 03:19:46 PM PDT 24	May 02 03:20:38 PM PDT 24	2378774377 ps
T265	/workspace/coverage/default/47.sram_ctrl_lc_escalation.229598047	May 02 03:24:01 PM PDT 24	May 02 03:24:12 PM PDT 24	1031882722 ps
T266	/workspace/coverage/default/14.sram_ctrl_executable.124907158	May 02 03:15:15 PM PDT 24	May 02 03:26:56 PM PDT 24	24752071484 ps
T267	/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.662022171	May 02 03:12:10 PM PDT 24	May 02 03:12:35 PM PDT 24	3189072380 ps
T268	/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1712937048	May 02 03:12:37 PM PDT 24	May 02 03:39:23 PM PDT 24	9114986627 ps
T269	/workspace/coverage/default/19.sram_ctrl_bijection.2528123388	May 02 03:16:27 PM PDT 24	May 02 03:17:03 PM PDT 24	1195142658 ps
T270	/workspace/coverage/default/23.sram_ctrl_stress_pipeline.4221202706	May 02 03:17:29 PM PDT 24	May 02 03:22:33 PM PDT 24	5837077355 ps
T271	/workspace/coverage/default/32.sram_ctrl_alert_test.1458090716	May 02 03:20:11 PM PDT 24	May 02 03:20:12 PM PDT 24	12754362 ps
T272	/workspace/coverage/default/43.sram_ctrl_lc_escalation.2011159099	May 02 03:23:00 PM PDT 24	May 02 03:23:06 PM PDT 24	809163787 ps
T273	/workspace/coverage/default/47.sram_ctrl_executable.1944061835	May 02 03:24:01 PM PDT 24	May 02 03:41:40 PM PDT 24	46857670045 ps
T274	/workspace/coverage/default/0.sram_ctrl_stress_all.2389079450	May 02 03:12:08 PM PDT 24	May 02 04:15:34 PM PDT 24	195997493235 ps
T275	/workspace/coverage/default/1.sram_ctrl_ram_cfg.2991913395	May 02 03:12:14 PM PDT 24	May 02 03:12:16 PM PDT 24	88880934 ps
T276	/workspace/coverage/default/37.sram_ctrl_partial_access.2867624218	May 02 03:21:17 PM PDT 24	May 02 03:21:24 PM PDT 24	278043958 ps
T277	/workspace/coverage/default/14.sram_ctrl_smoke.2585070906	May 02 03:15:07 PM PDT 24	May 02 03:15:19 PM PDT 24	1047736196 ps
T278	/workspace/coverage/default/32.sram_ctrl_mem_partial_access.1323960217	May 02 03:20:11 PM PDT 24	May 02 03:20:15 PM PDT 24	341201165 ps
T279	/workspace/coverage/default/32.sram_ctrl_stress_pipeline.93819590	May 02 03:19:54 PM PDT 24	May 02 03:23:51 PM PDT 24	2672086208 ps
T280	/workspace/coverage/default/49.sram_ctrl_mem_walk.1915197535	May 02 03:24:37 PM PDT 24	May 02 03:24:43 PM PDT 24	79471363 ps
T281	/workspace/coverage/default/0.sram_ctrl_ram_cfg.4006862684	May 02 03:12:01 PM PDT 24	May 02 03:12:02 PM PDT 24	195478020 ps
T104	/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1783183866	May 02 03:13:15 PM PDT 24	May 02 03:13:47 PM PDT 24	4855936487 ps
T282	/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.4022784652	May 02 03:18:39 PM PDT 24	May 02 03:24:29 PM PDT 24	4746903512 ps
T283	/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.782891464	May 02 03:12:30 PM PDT 24	May 02 03:18:16 PM PDT 24	13468503845 ps
T284	/workspace/coverage/default/34.sram_ctrl_smoke.4114380784	May 02 03:20:28 PM PDT 24	May 02 03:20:39 PM PDT 24	2298286276 ps
T285	/workspace/coverage/default/37.sram_ctrl_lc_escalation.3876974802	May 02 03:21:22 PM PDT 24	May 02 03:21:31 PM PDT 24	589123148 ps
T286	/workspace/coverage/default/42.sram_ctrl_ram_cfg.2730063957	May 02 03:22:47 PM PDT 24	May 02 03:22:48 PM PDT 24	98699109 ps
T287	/workspace/coverage/default/10.sram_ctrl_executable.3287389513	May 02 03:14:27 PM PDT 24	May 02 03:20:57 PM PDT 24	2239946138 ps
T288	/workspace/coverage/default/46.sram_ctrl_ram_cfg.1486359023	May 02 03:23:46 PM PDT 24	May 02 03:23:48 PM PDT 24	51537194 ps
T289	/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.466667816	May 02 03:22:10 PM PDT 24	May 02 03:27:39 PM PDT 24	13716325774 ps
T290	/workspace/coverage/default/14.sram_ctrl_access_during_key_req.3045942897	May 02 03:15:16 PM PDT 24	May 02 03:34:16 PM PDT 24	5051881859 ps
T291	/workspace/coverage/default/15.sram_ctrl_partial_access.525257524	May 02 03:15:33 PM PDT 24	May 02 03:15:53 PM PDT 24	4362134253 ps
T292	/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1824328316	May 02 03:24:35 PM PDT 24	May 02 03:32:36 PM PDT 24	3564382839 ps
T293	/workspace/coverage/default/8.sram_ctrl_smoke.2646638089	May 02 03:13:36 PM PDT 24	May 02 03:13:46 PM PDT 24	78777193 ps
T294	/workspace/coverage/default/46.sram_ctrl_max_throughput.3486952416	May 02 03:23:42 PM PDT 24	May 02 03:24:19 PM PDT 24	176182764 ps
T295	/workspace/coverage/default/2.sram_ctrl_mem_walk.2536226993	May 02 03:12:30 PM PDT 24	May 02 03:12:40 PM PDT 24	148324919 ps
T296	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1654605864	May 02 03:23:00 PM PDT 24	May 02 03:28:16 PM PDT 24	19512667990 ps
T297	/workspace/coverage/default/14.sram_ctrl_alert_test.3144202393	May 02 03:15:31 PM PDT 24	May 02 03:15:32 PM PDT 24	41476046 ps
T298	/workspace/coverage/default/28.sram_ctrl_stress_all.3513721508	May 02 03:19:06 PM PDT 24	May 02 03:45:05 PM PDT 24	115272823374 ps
T299	/workspace/coverage/default/48.sram_ctrl_lc_escalation.4151476874	May 02 03:24:14 PM PDT 24	May 02 03:24:17 PM PDT 24	63542908 ps
T105	/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2455545362	May 02 03:17:28 PM PDT 24	May 02 03:18:24 PM PDT 24	3891786870 ps
T300	/workspace/coverage/default/11.sram_ctrl_stress_pipeline.544966874	May 02 03:14:31 PM PDT 24	May 02 03:17:51 PM PDT 24	4121243250 ps
T301	/workspace/coverage/default/40.sram_ctrl_stress_all.3639244467	May 02 03:22:20 PM PDT 24	May 02 03:48:35 PM PDT 24	25349836620 ps
T302	/workspace/coverage/default/29.sram_ctrl_partial_access.2108767658	May 02 03:19:16 PM PDT 24	May 02 03:19:40 PM PDT 24	406394730 ps
T303	/workspace/coverage/default/15.sram_ctrl_multiple_keys.3820966836	May 02 03:15:29 PM PDT 24	May 02 03:37:39 PM PDT 24	207666967757 ps
T304	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4070930692	May 02 03:23:20 PM PDT 24	May 02 03:26:42 PM PDT 24	1138800908 ps
T305	/workspace/coverage/default/19.sram_ctrl_regwen.4198613870	May 02 03:16:35 PM PDT 24	May 02 03:33:07 PM PDT 24	23704956449 ps
T306	/workspace/coverage/default/6.sram_ctrl_smoke.2618580953	May 02 03:13:15 PM PDT 24	May 02 03:13:24 PM PDT 24	308901305 ps
T307	/workspace/coverage/default/48.sram_ctrl_bijection.1078673020	May 02 03:24:14 PM PDT 24	May 02 03:25:14 PM PDT 24	1973618886 ps
T308	/workspace/coverage/default/4.sram_ctrl_stress_all.627973357	May 02 03:12:55 PM PDT 24	May 02 03:51:01 PM PDT 24	6495257209 ps
T309	/workspace/coverage/default/15.sram_ctrl_alert_test.2344104959	May 02 03:15:35 PM PDT 24	May 02 03:15:36 PM PDT 24	21410687 ps
T310	/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.2505276539	May 02 03:16:47 PM PDT 24	May 02 03:30:44 PM PDT 24	2032727053 ps
T311	/workspace/coverage/default/43.sram_ctrl_smoke.1744473155	May 02 03:23:01 PM PDT 24	May 02 03:23:11 PM PDT 24	204461428 ps
T312	/workspace/coverage/default/1.sram_ctrl_max_throughput.1612532600	May 02 03:12:10 PM PDT 24	May 02 03:12:21 PM PDT 24	59957811 ps
T313	/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.605241807	May 02 03:19:39 PM PDT 24	May 02 03:23:25 PM PDT 24	8827962869 ps
T314	/workspace/coverage/default/9.sram_ctrl_regwen.3076799201	May 02 03:14:07 PM PDT 24	May 02 03:18:22 PM PDT 24	1629162580 ps
T315	/workspace/coverage/default/22.sram_ctrl_partial_access.2316765903	May 02 03:17:14 PM PDT 24	May 02 03:17:22 PM PDT 24	699826234 ps